An on-chip capacitance standard unit and its manufacturing method and linear value setting method

Abstract

The present invention belongs to the technical field of standard capacitors, and specifically relates to an on-chip capacitor standard sample unit and a manufacturing method and a linear value determination method thereof. The on-chip capacitor standard unit includes a basic capacitor and a standard capacitor. The standard capacitor is obtained by adding the number of pairs of forked electrodes to the basic capacitor. The standard capacitance value of the on-chip capacitor standard unit is the difference between the capacitance values ​​of the standard capacitor and the basic capacitor, and the standard capacitance value is linearly related to the number of pairs of forked electrodes of the standard capacitor under the nominal step capacitance value of the standard capacitor. The standard capacitance value of the on-chip capacitor standard unit is determined based on the nominal step capacitance value and the number of pairs of forked electrodes of the standard capacitor, so that the standard capacitance value changes linearly with the number of pairs of forked electrodes. The present invention linearly associates the number of pairs of forked electrodes of the standard capacitor with the standard capacitance value through the nominal step capacitance value. Once the nominal step capacitance value is determined, the capacitance standard unit can be determined according to the number of pairs of forked electrodes, which is very convenient and efficient.

Description

Technical Field

[0001] The invention belongs to the technical field of standard capacitors, and in particular relates to an on-chip capacitor standard sample unit and a manufacturing method and a linear value determination method thereof. Background Art

[0002] Integrated circuit testing plays a vital role in the electronics industry, and it plays a pivotal role in ensuring the functionality, reliability and safety of electronic products. Process monitoring (PCM) in the semiconductor process monitors the quality of key processes in the semiconductor production process by measuring the electrical parameters on the PCM graph, and determines whether the dielectric thickness meets the design requirements by detecting the capacitance value, effectively ensuring process consistency.

[0003] Semiconductor capacitance is generally in the picofarad (pF) or nanofarad (nF) levels. Some applications require very sensitive capacitance measurements in the femtofarad (fF) level, including measuring metal-to-metal capacitance, interconnect capacitance on wafers, MEMS devices such as switches, or capacitance between terminals on nano devices. At the same time, as the key dimensions of integrated circuit chips continue to shrink, the characteristic dimensions of MOSFETs are getting smaller and smaller, the proportion of gate parasitic capacitance in the overall capacitance is increasing, and the parasitic effect of capacitance is becoming more and more serious. Parasitic capacitance will bring about circuit delays, frequency characteristics, stability and other effects. In many fields, there is an increasing demand for the measurement of small on-chip capacitance in the femtofarad (fF) level. Accurate on-chip capacitance measurement of integrated circuits requires accurate on-chip capacitance standard samples. However, there is relatively little research in China on small on-chip capacitance standard samples in the fF level, especially the calibration of fF on-chip capacitance standard samples.

[0004] A Chinese patent (CN112666506A) discloses an on-chip capacitance standard sample for integrated circuit calibration, which requires a complex calibration structure to perform multiple iterations of capacitance size to find the optimal capacitance size when reproducing a specific capacitance value. Summary of the invention

[0005] The purpose of the present invention is to solve the above-mentioned problems existing in the prior art and to provide an on-chip capacitance standard sample unit and a manufacturing method and a linear value determination method thereof.

[0006] The present invention is achieved through the following technical solutions:

[0007] An on-chip capacitance standard unit includes a basic capacitance and a standard capacitance, wherein the standard capacitance is obtained by adding the number of pairs of interdigital electrodes to the basic capacitance, the standard capacitance value of the on-chip capacitance standard unit is the difference between the capacitance values ​​of the standard capacitance and the basic capacitance, and the standard capacitance value is linearly related to the number of pairs of interdigital electrodes of the standard capacitance under the nominal step capacitance value of the standard capacitance, and the nominal step capacitance value refers to the capacitance value increased corresponding to each additional pair of interdigital electrodes.

[0008] Furthermore, the basic capacitor includes two composite electrodes, each composite electrode includes a probe contact electrode and an interdigital electrode, the number of the interdigital electrode is 1, the interdigital electrode is connected to the probe contact electrode through a connecting line, the two composite electrodes are arranged opposite to each other, and their interdigital electrodes are parallel to each other to form an interdigital electrode pair.

[0009] Furthermore, the standard capacitor includes two composite electrodes, each composite electrode includes a probe contact electrode and an interdigital electrode, the number of the interdigital electrodes is n, n≥2, the interdigital electrodes are arranged at equal intervals, and are electrically connected to the probe contact electrode through the same connecting line, the two composite electrodes are arranged opposite to each other, and their interdigital electrodes form n interdigital electrode pairs by inserting each other into the intervals between the interdigital electrodes.

[0010] Furthermore, the substrate of the basic capacitor or the standard capacitor is made of borosilicate glass, sapphire or fused quartz.

[0011] The present invention also provides a method for manufacturing an on-chip capacitance standard unit, which is used to manufacture an on-chip capacitance standard unit with different nominal step capacitance values, and comprises the following steps:

[0012] Simulate the on-chip capacitance standard unit at the set step capacitance value;

[0013] Obtaining capacitance parameters of a simulated on-chip capacitance standard cell having a corresponding step capacitance value;

[0014] Determining a capacitance parameter range according to the capacitance parameter, and manufacturing a plurality of on-chip capacitance standard units within the capacitance parameter range;

[0015] Measuring the step capacitance value of the physical object, and obtaining the capacitance parameter of the physical object closest to the set step capacitance value as the optimal capacitance parameter;

[0016] According to the optimal capacitance parameters, the theoretical capacitance value C of a single pair of interdigital electrodes is calculated. w , and calculate the influence coefficient m between the interdigital electrode pairs according to the calculation formula of the step capacitance value; the influence coefficient m between the interdigital electrode pairs is applicable to the same series of standard capacitors, and the same series of standard capacitors refers to standard capacitors with only different electrode lengths;

[0017] According to the influence coefficient m between the interdigital electrode pairs, the length of the interdigital electrodes is changed to calculate the nominal step capacitance value of the standard capacitor of the same series;

[0018] An on-chip capacitance standard unit is produced according to capacitance parameters corresponding to the nominal step capacitance value.

[0019] The present invention also provides a linear value setting method for an on-chip capacitance standard unit, comprising the following steps:

[0020] Obtaining a nominal step capacitance value of the standard capacitor;

[0021] The standard capacitance value of the on-chip capacitance standard unit is determined based on the nominal step capacitance value and the number of interdigital electrode pairs of the standard capacitance, so that the standard capacitance value changes linearly with the number of interdigital electrode pairs.

[0022] Furthermore, the calculation formula of the nominal step capacitance value is as follows:

[0023] C Sp =2mC w

[0024] In the formula, C Sp Indicates the nominal step capacitance value, C w represents the theoretical capacitance value of a single pair of interdigital electrodes; m represents the influence coefficient between the interdigital electrode pairs.

[0025] Further, the inter-electrode influence coefficient m in the standard capacitor is determined as follows:

[0026] Simulate the on-chip capacitance standard unit at the set step capacitance value;

[0027] Obtaining capacitance parameters of a simulated on-chip capacitance standard cell having a corresponding step capacitance value;

[0028] Determining a capacitance parameter range according to the capacitance parameter, and manufacturing a plurality of on-chip capacitance standard units within the capacitance parameter range;

[0029] Measuring the step capacitance value of the physical object, and obtaining the capacitance parameter of the physical object closest to the set step capacitance value as the optimal capacitance parameter;

[0030] According to the optimal capacitance parameters, the theoretical capacitance value C of a single pair of interdigital electrodes is calculated. w , and calculate the influence coefficient m between the interdigital electrode pairs according to the calculation formula of the step capacitance value.

[0031] Furthermore, the calculation formula of the standard capacitance value is as follows:

[0032] C=C Sp (n-1)

[0033] Where C represents the standard capacitance value, C Sp It represents the nominal step capacitance value, n represents the number of pairs of interdigital electrodes of the standard capacitance, and n≥2.

[0034] Furthermore, the capacitance parameters include the size parameters and dielectric constant of the interdigital capacitance formed by the interdigital electrode pair; other capacitance parameters remain unchanged, and the capacitance parameter range is determined by setting the upper and lower limits of the length of the interdigital electrodes.

[0035] Compared with the prior art, the beneficial effects of the present invention include:

[0036] 1. The present invention eliminates the interference of additional capacitance other than the interdigital capacitance structure (composed of interdigital electrode pairs) in the standard capacitor through the basic capacitance: the standard capacitance value of the on-chip capacitance standard unit is the difference between the capacitance values ​​of the standard capacitance and the basic capacitance; that is, the standard capacitance value corresponds to the capacitance value of the interdigital capacitance after the standard capacitance is deducted from the basic capacitance, and the capacitance value of the interdigital capacitance is small enough to meet the femtofarad level requirement.

[0037] 2. The present invention takes into account the mutual influence between the interdigital electrode pairs, that is, introduces the influence coefficient m between the interdigital electrode pairs, which can more accurately characterize the nominal step capacitance value and improve the accuracy of the standard capacitance value.

[0038] 3. After the influence coefficient m between the interdigital electrode pairs under a certain electrode length is determined by the present invention, the step capacitance value of the standard capacitors in the same series can be expanded, that is, the influence coefficient m of the standard capacitors in the same series is the same, and the theoretical capacitance value C of a single pair of interdigital electrodes of the standard capacitors in the same series is w The same series of standard capacitors differ only in electrode length, and other capacitance parameters are the same. Therefore, the theoretical capacitance value C of a single pair of interdigital electrodes of the same series of standard capacitors is w It can be calculated based on the electrode length, and then the theoretical capacitance value C w Substituting the influence coefficient m into the calculation formula of the nominal step capacitance value can calculate the nominal step capacitance value of the same series of standard capacitors.

[0039] 4. The present invention linearly correlates the number of finger electrode pairs of the standard capacitor with the standard capacitance value through the nominal step capacitance value. Once the nominal step capacitance value is determined, the capacitance standard unit can be set according to the number of finger electrode pairs. There is no need to repeatedly iterate the size as in the prior art, which is very convenient and efficient. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1 It is the structural diagram of the standard capacitor;

[0041] Figure 2 is a schematic diagram of the structure of the basic capacitor;

[0042] Figure 3 is a schematic diagram of the structure of the interdigitated electrode pair;

[0043] Figure 4A comparison chart of the simulation value and the theoretical calculated value of the interdigital electrode pairs of different lengths;

[0044] Figure 5 The capacitance change diagram of the interdigital capacitor after increasing the number of interdigital electrode pairs;

[0045] Figure 6 This is a flow chart of the capacitor manufacturing process;

[0046] Figure 7 is the standard capacitance value corresponding to different numbers of electrode pairs when the length of the interdigital electrode is 180 μm;

[0047] Figure 8 Schematic diagram of the direction of increase in the number of interdigital electrode pairs;

[0048] Fig. 9 This is a curve diagram of the measured values ​​of the capacitance standard unit when the nominal step capacitance value is 10fF. DETAILED DESCRIPTION

[0049] On-chip capacitor standard samples solve the needs of on-chip small capacitor parameter calibration and measurement. Different capacitor structures require capacitor standard units with different capacitance values. In order to obtain on-chip capacitor standard units with different capacitance values, the existing technology needs to change the geometric dimensions of the interdigital electrodes. Every time a capacitor with different capacitance values ​​is made, the geometric dimensions of the interdigital electrodes must be repeatedly iterated to obtain the accurate capacitance value.

[0050] The present invention provides an on-chip capacitance standard unit, comprising a basic capacitance and a standard capacitance, wherein the standard capacitance is obtained by adding the number of pairs of interdigital electrodes to the basic capacitance, the standard capacitance value of the on-chip capacitance standard unit is the difference between the capacitance values ​​of the standard capacitance and the basic capacitance, and the standard capacitance value is linearly related to the number of pairs of interdigital electrodes of the standard capacitance under the nominal step capacitance value of the standard capacitance, and the nominal step capacitance value refers to the capacitance value increased corresponding to each additional pair of interdigital electrodes.

[0051] The present invention realizes the linear stepping of the capacitance value by changing the logarithm of the interdigital electrodes on the standard capacitor, so that the calibration of the femtofarad-level on-chip capacitance standard sample becomes efficient and convenient.

[0052] The present invention is described below in detail with reference to the accompanying drawings to illustrate various details involved in the technical solution of the present invention. It should be noted that the described embodiments are only intended to facilitate the understanding of the present invention and do not have any limiting effect on it.

[0053] 1) Modeling of femtofarad capacitor standard unit

[0054] refer to Figure 1As shown, a standard capacitor includes two composite electrodes, each of which includes a probe contact electrode 1 and an interdigital electrode 3. The number of interdigital electrodes 3 is n, where n≥2. The interdigital electrodes 3 are arranged at equal intervals and are electrically connected to the probe contact electrode 1 through the same connecting line 2. The two composite electrodes are arranged opposite to each other, and their interdigital electrodes are inserted into the intervals between each other's interdigital electrodes to form n interdigital electrode pairs. The interdigital electrode pairs form interdigital capacitors, and the capacitance of the interdigital capacitors can reach the femtofarad level.

[0055] Since the standard capacitor contains capacitor structures other than the interdigital capacitor, such as the capacitance between the probe contact electrodes and the capacitance between the connecting wires, it is difficult to directly measure the capacitance of the standard deviation capacitor. In order to eliminate the influence of the additional capacitance, the basic capacitance is introduced.

[0056] The only difference between the basic capacitor and the standard capacitor is the number of interdigital electrode pairs. The number of interdigital electrode pairs of the basic capacitor is less than that of the standard capacitor. For example, a standard capacitor with three interdigital electrode pairs can use a standard capacitor with two interdigital electrode pairs as the basic capacitor, or a standard capacitor with one interdigital electrode pair as the basic capacitor.

[0057] In this specific implementation, in order to improve the versatility of the basic capacitor, a standard capacitor having a pair of interdigital electrodes is used as the basic capacitor. Figure 2 As shown, a basic capacitor includes two composite electrodes, each composite electrode includes a probe contact electrode and an interdigital electrode, the number of the interdigital electrode is 1, the interdigital electrode is connected to the probe contact electrode through a connecting line, the two composite electrodes are arranged opposite to each other, and the interdigital electrodes are parallel to each other to form an interdigital electrode pair.

[0058] The capacitance value of the capacitor standard unit can be obtained by subtracting the capacitance value of the basic capacitor from the standard capacitance value, which can be expressed as follows:

[0059] C=C T -C0; (1)

[0060] Where C represents the capacitance value of the capacitance standard unit, C T It represents the total capacitance value of the standard capacitor, and C0 represents the capacitance value of the basic capacitor.

[0061] The basic capacitor structure eliminates external interference, capacitance between transmission lines, capacitance between test probes, and interference from redundant structures other than the interdigital electrodes, and also ensures that the capacitance value increases linearly when the number of interdigital electrode pairs increases.

[0062] 2) Determine the step capacitance value C sp

[0063] like Figure 3The figure shows a top view and a cross-sectional view of an interdigital electrode pair. The capacitance C between the two interdigital electrodes w It is mainly composed of C1, C2, and C3, and the calculation formula is as follows:

[0064] C w =C1+C2+C3

[0065] Among them, C2 is the capacitance of the flat plate capacitor structure formed by the interdigitated electrodes; C1 and C3 are both side capacitances of the flat plate capacitor structure.

[0066] C2 is a common flat plate capacitor structure and can be calculated using formula (2):

[0067]

[0068] Among them, ε is the dielectric constant of the medium between the plates, L is the electrode length, T is the electrode thickness, d is the relative distance between the plates (i.e. the relative distance between the interdigitated electrodes), and d=2a.

[0069] C1 and C3 are equal and can be calculated by the Schwarz-Christopher Fide conformal transformation method, as shown in formula (3):

[0070]

[0071] Among them, K() is the first kind of complete elliptic integral, a is half of the distance between the electrodes, b is the electrode width, L is the electrode length; ε1 is the relative dielectric constant of the upper half space of the electrode, ε2 is the dielectric constant of the lower half space of the electrode, and ε0 is the dielectric constant of vacuum.

[0072] Since the upper half space of the electrode is usually air, in this specific embodiment, ε1 uses the dielectric constant of air. Obviously, the lower half space of the electrode is the base of the capacitor, so ε2 is the relative dielectric constant of the capacitor base.

[0073] After obtaining the relative dielectric constant, the dielectric constant can be calculated according to the formula dielectric constant = relative dielectric constant × dielectric constant of vacuum.

[0074] Theoretical calculated capacitance value C of a single pair of interdigital electrodes w It is the sum of C1, C2 and C3. Under the condition that other parameters of the capacitor remain unchanged, by changing the length of the electrode to obtain a single pair of interdigital electrodes with different lengths, the theoretical calculated capacitance value C of each pair of interdigital electrodes is calculated respectively. w , and the corresponding simulation is performed to obtain the capacitance simulation value of each pair of interdigital electrodes, such as Figure 4 C w Comparison chart of simulation and theory, Figure 4The simulation values ​​are basically consistent with the theoretical calculation values, and the simulation values ​​and the calculation values ​​are mutually verified, indicating that both the simulation and the calculation are accurate.

[0075] Figure 5 Schematic diagram of the increase in the number of interdigital electrode pairs, (a), (b), and (c) represent the cases when the number of interdigital electrode pairs is 1, 2, and 3, respectively. A to E represent the capacitance between two electrodes. Figure 5 (a) When the electrode pair changes from 0 to 1, the capacitance A increases. Figure 5 (b) When one pair of electrodes is changed to two pairs of electrodes, the capacitances B and C are increased. Figure 5 (c) When the number of electrodes increases from 2 pairs to 3 pairs, the capacitance D and E increase. Therefore, when the number of interdigital electrode pairs increases from 0 pairs, the change in capacitance is not linear. At the same time, when the number of interdigital electrode pairs increases, the adjacent interdigital electrodes will affect each other, such as Figure 5 In (b), B and A will affect each other, that is, Figure 5 (a) and Figure 5 (b) The value of capacitor A is different, and Figure 5 (b) and Figure 5 (c) The capacitance A is the same, so in order to ensure the linearity of the capacitance change when the number of interdigital electrode pairs increases, the basic capacitance should be designed to consist of the probe contact electrode, the connecting wire, and an interdigital electrode pair, such as Figure 2 shown.

[0076] The capacitance value of the interdigital capacitor after increasing the number of interdigital electrode pairs is calculated based on the capacitance value of a single interdigital electrode pair. However, when the number of interdigital electrode pairs is increased, the adjacent interdigital electrodes will affect each other, so the capacitance value C of a pair of interdigital electrodes cannot be simply used. w It can be calculated by multiplying by 2 times the number of interdigital electrode pairs. It should also be multiplied by a coefficient m, then:

[0077] C T =C0+2mC w (n-1) (4)

[0078] Among them, C T represents the capacitance value of the standard capacitor, C0 represents the capacitance value of the basic capacitor, and the theoretical calculated capacitance value C of a single pair of interdigital electrodes w , n represents the number of interdigital electrode pairs of the standard capacitor, n≥2; m represents the influence coefficient between the interdigital electrode pairs.

[0079] Combining formula (1) and formula (4), we get:

[0080] C=2mC w (n-1) (5)

[0081] Wherein, C represents the capacitance value of the capacitance standard unit, that is, the standard capacitance value; C w is the theoretical calculated value of the capacitance of a pair of interdigital electrodes, n represents the number of interdigital electrode pairs, n≥2.

[0082] In order to achieve linear setting, the step capacitance value C is introduced Sp :

[0083] C Sp =2mC w (6)

[0084] Combining formulas (5) and (6), we get:

[0085] C=C Sp (n-1) (7)

[0086] According to formula (7), at a certain step capacitance value C Sp Under this condition, the standard capacitance value is linearly related to the number of interdigital electrode pairs.

[0087] The inter-electrode influence coefficient m in the standard capacitance is determined as follows:

[0088] S1: Simulate the on-chip capacitance standard cell at the set step capacitance value.

[0089] This specific implementation adopts finite element simulation. In order to obtain accurate step capacitance value, when performing simulation, the number of electrode pairs of the basic capacitor should be greater than or equal to 2, and the number of forked electrode pairs of the standard capacitor is 1 more than the number of forked electrode pairs of the basic capacitor. Then, the increased capacitance value of the standard capacitor for each additional pair of forked electrodes can be obtained by subtracting the simulation value of the basic capacitor from the simulation value of the standard capacitor, that is, the step capacitance value.

[0090] During simulation, the number of interdigital electrode pairs of the standard capacitor may be 2 or more pairs than that of the basic capacitor. Then, when calculating the step capacitance value, the difference between the simulation value of the standard capacitor and the simulation value of the basic capacitor is divided by the difference between the number of interdigital electrode pairs of the standard capacitor and the basic capacitor.

[0091] S2: Obtain capacitance parameters of the simulated on-chip capacitance standard cell with corresponding step capacitance value.

[0092] The capacitance parameters include the size parameters and dielectric constant of the interdigital capacitance formed by the interdigital electrode pair;

[0093] The size parameters of the capacitor include the relative distance d between the interdigital electrodes, the electrode length L and the thickness T of the interdigital electrodes.

[0094] The dielectric constants include the dielectric constants in formula (2) and formula (3): the dielectric constant ε of the medium between the plates, the relative dielectric constant ε1 of the upper half space of the electrode, the dielectric constant ε2 of the lower half space of the electrode, and ε0 is the dielectric constant of the vacuum.

[0095] S3: Determine a capacitance parameter range according to the capacitance parameter, and manufacture a plurality of on-chip capacitance standard units within the capacitance parameter range.

[0096] In this specific implementation, when other capacitance parameters remain unchanged, the capacitance parameter range is determined by setting the upper and lower limits of the length of the interdigital electrodes.

[0097] For example, the electrode length of the on-chip capacitance standard unit with the corresponding step capacitance value is 150nm. On this basis, the capacitance parameter range is set to [100, 200]. Multiple parameters are selected within the capacitance parameter range for manufacturing, which can be selected according to a certain step size: the step size is set to 10nm, and each electrode length parameter differs by 10nm.

[0098] A series of on-chip capacitance standard units within the capacitance parameter range are fabricated on the same substrate by using micro-nano processing technologies such as magnetron sputtering to deposit thin films, ultraviolet exposure to realize photoresist patterning, and etching thin films.

[0099] For detailed process flow, see Figure 6 As shown. The process steps are as follows: (1) Substrate cleaning: including acetone, ethanol, isopropyl alcohol (IPA) cleaning to remove organic contamination on the surface of borosilicate glass, and concentrated sulfuric acid and hydrogen peroxide cleaning to remove metal contamination ions remaining on the substrate surface; (2) Photolithography: using a designed photomask for photolithography exposure to define the capacitor structure pattern; (3) using metal sputtering or evaporation process to deposit metal. (4) using a wet etching process to remove excess metal.

[0100] S4: measuring the step capacitance value of the physical object, and obtaining the capacitance parameter of the physical object closest to the set step capacitance value as the optimal capacitance parameter.

[0101] Each on-chip capacitance standard unit (physical object) includes a basic capacitance and a standard capacitance, and the capacitance values ​​of the basic capacitance and the standard capacitance are measured respectively: a probe is brought into contact with a probe contact electrode through a probe station, and the capacitance values ​​of the basic capacitance and the standard capacitance are measured respectively through an LCR meter.

[0102] Then, the capacitance value of the measured standard capacitor is subtracted from the capacitance value of the measured basic capacitor to obtain the step capacitance value.

[0103] S5: Calculate the theoretical capacitance value C of a single pair of interdigital electrodes according to the optimal capacitance parameters w, and calculate the influence coefficient m between the interdigital electrode pairs according to the calculation formula of the step capacitance value.

[0104] Theoretical capacitance value C of a single pair of interdigital electrodes w This corresponds to the situation where there is only one pair of interdigital electrodes, that is, there is no mutual influence between the electrode pairs.

[0105] The calculated theoretical capacitance value C of a single pair of interdigital electrodes w , set the step capacitance value C Sp , substituted into formula (6), the influence coefficient m between the interdigital electrode pairs can be calculated. The coefficient m is a positive number less than 1, and the value range of m is 0.7 to 0.8.

[0106] In order to verify whether the actual step capacitance value can be used to linearize the capacitance standard unit, a comparison between simulation and actual measurement was carried out. The set step capacitance value was 10fF, and the capacitance parameters were as follows: ε is the dielectric constant of the medium between the plates, ε1 is the dielectric constant of air, ε2 is the dielectric constant of borosilicate glass, and its relative dielectric constant is 4.6. The relative distance d between the plates is 12 microns, the electrode length L is 180 microns, and the electrode thickness T is 800nm.

[0107] Comparison of simulation and measured values, reference Figure 7 As shown, as the number of interdigital electrode pairs increases, the standard capacitance value of the capacitance standard unit increases linearly, and for each additional pair of electrodes, the measured value and the simulation value both increase by about 10fF.

[0108] 3) Make a series of capacitor standard units

[0109] After determining the influence coefficient m between the interdigital electrode pairs at a certain electrode length, the step capacitance value of the same series of standard capacitors can be expanded, as follows:

[0110] According to the optimal capacitance parameters, the theoretical capacitance value C of a single pair of interdigital electrodes is calculated. w , and the influence coefficient m between the interdigital electrode pairs is calculated according to the calculation formula of the step capacitance value; the influence coefficient m between the interdigital electrode pairs is applicable to the same series of standard capacitors, and the same series of standard capacitors refers to standard capacitors with only different electrode lengths.

[0111] According to the influence coefficient m between the interdigital electrode pairs, the length of the interdigital electrodes is changed to calculate the nominal step capacitance value of the standard capacitor of the same series;

[0112] like Figure 8As shown in , the direction of increase of the number of interdigital electrode pairs is along the X-axis direction, and the direction of increase of the length of the interdigital electrodes is along the Y-axis direction, so the influence between the interdigital electrode pairs occurs in the X-axis direction, and therefore the influence between the interdigital electrode pairs is independent of the length. The same series of standard capacitors differ only in electrode length, and other capacitance parameters are the same. The influence coefficient m of the same series of standard capacitors is the same, and the theoretical capacitance value C of a single pair of interdigital electrodes is w is different, so the theoretical capacitance value C of a single pair of interdigital electrodes of the same series of standard capacitors is w It can be calculated based on the electrode length, and then the theoretical capacitance value C w Substituting the influence coefficient m into the calculation formula (6) of the nominal step capacitance value can calculate the nominal step capacitance value of the same series of standard capacitors.

[0113] An on-chip capacitance standard unit is produced according to capacitance parameters corresponding to the nominal step capacitance value.

[0114] 4) Linear change of standard capacitance value is achieved by changing the number of interdigital electrode pairs

[0115] On-chip capacitors with a step value of 10fF in the range of 10fF-100fF were fabricated on the BOROFLOAT 33 substrate.

[0116] BOROFLOAT 33 is a high-quality borosilicate glass with a low thermal expansion coefficient and a dielectric constant of 4.6. When a capacitor with a larger step value is required, sapphire (dielectric constant of 11.6) can be used as the substrate. When a smaller loss is required, fused quartz (dielectric constant of 3.4) can be used as the substrate. As shown in Table 1, Fig. 9 It is the actual measurement value. The test instrument uses EB series probe station, 73CT-APTA coaxial probe and AH2700A multi-frequency capacitance bridge, and the measurement standard uncertainty is ≤0.5%*C+100aF (C is the capacitance value).

[0117] When measuring, the standard capacitance value C of the femtofarad capacitor standard sample is calculated using formula (1):

[0118] C=C T -C0; (1)

[0119] Among them, C T represents the total capacitance value of the standard sample of femtofarad capacitors, and C0 represents the capacitance value of the basic capacitor structure.

[0120] Table 1 Measured values ​​of 10fF step capacitors

[0121]

[0122]

[0123] The nominal value of the sample under test refers to the nominal value of the capacitance standard unit, which can also be said to be the theoretical value of Formula 7.

[0124] From the above tests, it can be seen that accurate stepping of the on-chip capacitance in the fF level can be achieved, and the typical deviation of the specific capacitance value formed by stepping is ≤±5%.

[0125] The above technical scheme is only a specific implementation method of the present invention. For those skilled in the art, it is easy to make various types of improvements or modifications based on the principles disclosed in the present invention, and it is not limited to the technical scheme described in the above specific embodiments of the present invention. Therefore, the above description is only preferred and does not have a restrictive meaning.

Claims

1. A method for manufacturing an on-chip capacitance standard unit, characterized in that: For making an on-chip capacitance standard cell with different nominal step capacitance values, and comprising the following steps: Simulate the on-chip capacitance standard unit at the set step capacitance value; Obtaining capacitance parameters of a simulated on-chip capacitance standard cell having a corresponding step capacitance value; Determining a capacitance parameter range according to the capacitance parameter, and manufacturing a plurality of on-chip capacitance standard units within the capacitance parameter range; Measuring the step capacitance value of the physical object, and obtaining the capacitance parameter of the physical object closest to the set step capacitance value as the optimal capacitance parameter; According to the optimal capacitance parameters, the theoretical capacitance value C of a single pair of interdigital electrodes is calculated. w , and calculate the influence coefficient m between the interdigital electrode pairs according to the calculation formula of the step capacitance value; the influence coefficient m between the interdigital electrode pairs is applicable to the same series of standard capacitors, and the same series of standard capacitors refers to standard capacitors with only different electrode lengths; According to the influence coefficient m between the interdigital electrode pairs, the length of the interdigital electrodes is changed to calculate the nominal step capacitance value of the standard capacitor of the same series; Making an on-chip capacitance standard unit according to capacitance parameters corresponding to the nominal step capacitance value; The calculation formula of the step capacitance value is as follows: C Sp =2mC w Among them, C Sp Indicates the nominal step capacitance value; The on-chip capacitance standard unit includes a basic capacitance and a standard capacitance, the standard capacitance is obtained by adding the number of pairs of interdigital electrodes to the basic capacitance, the standard capacitance value of the on-chip capacitance standard unit is the difference between the capacitance values ​​of the standard capacitance and the basic capacitance, and the standard capacitance value is linearly related to the number of pairs of interdigital electrodes of the standard capacitance under the nominal step capacitance value of the standard capacitance, and the nominal step capacitance value refers to the capacitance value increased corresponding to each additional pair of interdigital electrodes; The basic capacitor includes two composite electrodes, each of which includes a probe contact electrode and an interdigital electrode, the number of the interdigital electrode is 1, the interdigital electrode is connected to the probe contact electrode through a connecting line, the two composite electrodes are arranged opposite to each other, and the interdigital electrodes are parallel to each other to form an interdigital electrode pair; The standard capacitor includes two composite electrodes, each of which includes a probe contact electrode and an interdigital electrode. The number of the interdigital electrodes is n, where n≥2. The interdigital electrodes are arranged at equal intervals and are electrically connected to the probe contact electrode through the same connecting line. The two composite electrodes are arranged opposite to each other, and their interdigital electrodes are inserted into the intervals between each other's interdigital electrodes to form n interdigital electrode pairs.

2. A linear value setting method for an on-chip capacitance standard unit, wherein the on-chip capacitance standard unit is manufactured by the method according to claim 1, characterized in that: The following steps are involved: Obtaining a nominal step capacitance value of the standard capacitor; The standard capacitance value of the on-chip capacitance standard unit is determined based on the nominal step capacitance value and the number of interdigital electrode pairs of the standard capacitance, so that the standard capacitance value changes linearly with the number of interdigital electrode pairs.

3. The linear value determination method of the on-chip capacitance standard unit according to claim 2, characterized in that: The nominal step capacitance value is calculated as follows: C Sp =2mC w In the formula, C Sp Indicates the nominal step capacitance value, C w represents the theoretical capacitance value of a single pair of interdigital electrodes; m represents the influence coefficient between the interdigital electrode pairs.

4. The linear value determination method of the on-chip capacitance standard unit according to claim 3, characterized in that: The inter-electrode influence coefficient m in the standard capacitance is determined as follows: Simulate the on-chip capacitance standard unit at the set step capacitance value; Obtaining capacitance parameters of a simulated on-chip capacitance standard cell having a corresponding step capacitance value; Determining a capacitance parameter range according to the capacitance parameter, and manufacturing a plurality of on-chip capacitance standard units within the capacitance parameter range; Measuring the step capacitance value of the physical object, and obtaining the capacitance parameter of the physical object closest to the set step capacitance value as the optimal capacitance parameter; According to the optimal capacitance parameters, the theoretical capacitance value C of a single pair of interdigital electrodes is calculated. w , and calculate the influence coefficient m between the interdigital electrode pairs according to the calculation formula of the step capacitance value.

5. The linear value determination method of the on-chip capacitance standard unit according to claim 4, characterized in that: The calculation formula of the standard capacitance value is as follows: C=C Sp (n-1) Where C represents the standard capacitance value, C Sp It represents the nominal step capacitance value, n represents the number of pairs of interdigital electrodes of the standard capacitance, and n≥2.

6. The linear value determination method of the on-chip capacitance standard unit according to claim 4, characterized in that: The capacitance parameters include the size parameters and dielectric constant of the interdigital capacitance formed by the interdigital electrode pair; other capacitance parameters remain unchanged, and the capacitance parameter range is determined by setting the upper and lower limits of the length of the interdigital electrodes.

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