Semiconductor process apparatus and its lining structure

Abstract

The application discloses a semiconductor process equipment and a lining structure thereof, and belongs to the technical field of semiconductor processes. The lining structure comprises a first annular lining, a second annular lining and a third annular lining, and the first annular lining, the second annular lining and the third annular lining are sequentially arranged in sequence. The first annular lining and the second annular lining extend along the vertical direction of a process chamber, and a plurality of strip-shaped exhaust grates are distributed on the second annular lining along the circumferential direction of the second annular lining at equal intervals. The third annular lining extends along the horizontal direction of the process chamber, and the third annular lining is an annular plate-shaped body without grates. According to the technical scheme, the lining structure can improve the uniformity of the airflow field in the chamber of the semiconductor process equipment, improve the uniformity of wafer surface etching, and improve the shielding effect on plasma, thereby prolonging the service life of components below the lining structure.

Description

Technical Field

[0001] This application belongs to the field of semiconductor process technology, and in particular relates to a semiconductor process equipment and its internal structure. Background Technology

[0002] With the rapid development of semiconductor process technology, plasma etching machines are widely used in the semiconductor manufacturing process of integrated circuits (ICs). Plasma etching machines primarily remove material from wafers and form specific patterns through physical and chemical reactions, thereby achieving the etching purpose. Its working principle is as follows: the process gas participating in the reaction is excited by radio frequency power in a low-pressure chamber to generate ionization, forming a high-density plasma. The plasma contains a large number of active particles such as electrons, ions, excited-state atoms, and free radicals. These active particles react with the surface of the material being etched, generating volatile compounds, which are then removed from the chamber using a vacuum system, completing the etching process.

[0003] In conventional plasma etching machines, the bottom of the liner structure has a ring-shaped radial strip-shaped extraction grid or a perforated extraction grid, which allows process gases and etching byproducts in the reaction chamber to be pumped away by a molecular pump. However, in actual use, it has been found that this liner structure exhibits uneven flow field distribution during the process, resulting in an M-shaped distribution of airflow velocity above the wafer surface in the linear direction. This leads to uneven etching rates and affects the uniformity of wafer surface etching. Furthermore, although it can confine the plasma above the liner to some extent, some plasma still travels through the radial strip-shaped extraction grid or a perforated extraction grid at the bottom of the liner to the lower half of the reaction chamber. This plasma that crosses the liner etches the lower half of the reaction chamber and the components within that space, affecting the lifespan of these components. Summary of the Invention

[0004] This application provides a semiconductor process equipment and its liner structure, aiming to improve the technical problems of existing liner structures easily affecting the uniformity of the internal airflow field of the plasma etching machine, resulting in low uniformity of wafer surface etching, and easily causing some plasma to escape into the lower half of the reaction chamber during the process, affecting the service life of its internal components.

[0005] In a first aspect, embodiments of this application provide an inner liner structure for semiconductor process equipment, used to fix on the inner wall of the process chamber of the semiconductor process equipment, so as to cooperate with the base of the semiconductor process equipment to divide the internal space of the process chamber into a first space and a second space vertically. The inner liner structure includes a first annular inner liner, a second annular inner liner and a third annular inner liner, which are sequentially connected.

[0006] Both the first annular liner and the second annular liner extend along the vertical direction of the process chamber, and the second annular liner has multiple strip-shaped exhaust grids evenly distributed along its circumference.

[0007] The third annular liner extends horizontally along the process chamber and is a ring-shaped plate without a grid design.

[0008] Optionally, in some embodiments of this application, the surfaces of the first annular liner facing the first space, the second annular liner facing the first space, and the third annular liner facing the first space are all coated with a protective coating.

[0009] Optionally, in some embodiments of this application, the first annular inner liner and the second annular inner liner are connected to form a first included angle greater than 90° toward the first space, and the first annular inner liner and the second annular inner liner are connected by a rounded corner transition.

[0010] Optionally, in some embodiments of this application, the second annular inner liner and the third annular inner liner are connected to form a second included angle greater than 90° toward the first space, and the second annular inner liner and the third annular inner liner are connected by a rounded corner transition.

[0011] Optionally, in some embodiments of this application, the value of the second included angle is in the range of 110° to 125°.

[0012] Optionally, in some embodiments of this application, the end of the strip-shaped exhaust grid adjacent to the first annular liner is arc-shaped.

[0013] Optionally, in some embodiments of this application, the plurality of strip-shaped exhaust grids include a plurality of first exhaust grids and a plurality of second exhaust grids. The length of each first exhaust grid is greater than the length of each second exhaust grid. The plurality of first exhaust grids and the plurality of second exhaust grids are distributed at equal intervals along the circumference of the second annular lining to divide the second annular lining into a first grid setting segment and a second grid setting segment along its circumference. The first grid setting segment is provided with the plurality of first exhaust grids, and the second grid setting segment is provided with the plurality of second exhaust grids on the side adjacent to the third annular lining. The side of the second grid setting segment adjacent to the first annular lining is also provided with a strip-shaped inner door or window extending along its circumference.

[0014] Optionally, in some embodiments of this application, the vertical distance from the junction of the second annular liner and the first annular liner to the wafer carried on the base is set as a first distance, and the vertical distance from one end of the first exhaust grid adjacent to the first annular liner to the wafer carried on the base is set as a second distance; the second distance is greater than 0 mm and less than the first distance, and the first distance is less than 30 mm.

[0015] Optionally, in some embodiments of this application, a fourth annular liner is further included, the fourth annular liner extending along the horizontal direction of the process chamber, and the fourth annular liner being disposed in contact with the side of the first annular liner away from the second annular liner.

[0016] Secondly, embodiments of this application provide a semiconductor process apparatus, including a semiconductor process component, a process chamber, a base, and the aforementioned inner liner structure. The base is built into the process chamber, and the inner liner structure is fixed to the inner wall of the process chamber to cooperate with the base in dividing the internal space of the process chamber into a first space and a second space vertically. The semiconductor process component is installed in the first space to perform corresponding semiconductor process processing on the wafer on the base.

[0017] In this application, the liner structure includes a first annular liner, a second annular liner, and a third annular liner, which are sequentially connected. The first and second annular liners extend vertically along the process chamber, and the second annular liner has multiple strip-shaped suction grids evenly distributed along its circumference. The third annular liner extends horizontally along the process chamber and is a grid-free annular plate. In this way, the liner structure of this semiconductor process equipment can allow airflow to exit from the sides in advance through the multiple strip-shaped suction grids of the second annular liner, inducing the airflow field above the liner structure to diffuse outwards, thereby improving the uniformity of the airflow field inside the chamber, reducing the velocity difference on the wafer, and improving the uniformity of wafer surface etching. Meanwhile, by using a gridless annular plate-shaped third ring liner, the bottom of the liner structure becomes solid, which improves the shielding effect against plasma and prevents a large amount of plasma from moving to the bottom of the liner structure and causing damage to other components, thereby increasing the service life of the components below the liner structure. Attached Figure Description

[0018] The technical solution and its beneficial effects will become apparent from the following detailed description of specific embodiments of this application, in conjunction with the accompanying drawings.

[0019] Figure 1 This is a schematic diagram of the structure of an existing plasma etching machine.

[0020] Figure 2 yes Figure 1 The diagram shows a structural schematic of the liner of a plasma etching machine.

[0021] Figure 3 yes Figure 1 This is a partial schematic diagram of another structure of the liner of the plasma etching machine shown.

[0022] Figure 4 This is a schematic diagram of the structure of the semiconductor process equipment provided in the embodiments of this application.

[0023] Figure 5 yes Figure 4 The diagram shows a three-dimensional structural schematic of the inner liner structure of the semiconductor process equipment.

[0024] Figure 6 yes Figure 4 The diagram shows a side view of the liner structure of the semiconductor process equipment.

[0025] Figure 7 This is a comparison chart of the linear flow velocity analysis in the X direction at 1 mm on the wafer surface of the prior art and the embodiments of this application.

[0026] Figure 8This is a comparison chart of the linear flow velocity analysis in the Y direction at 1 mm on the wafer surface of the prior art and the embodiments of this application.

[0027] Figure 9 This is a schematic diagram of the cross-sectional flow field distribution under the existing lining structure.

[0028] Figure 10 yes Figure 5 A schematic diagram of the flow field distribution in the cross section under the lining structure shown. Detailed Implementation

[0029] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application. In the absence of conflict, the following embodiments and their technical features can be combined with each other.

[0030] With the rapid development of semiconductor process technology, plasma etching machines are widely used in the semiconductor manufacturing process of integrated circuits (ICs). Plasma etching machines primarily remove material from wafers and form specific patterns through physical and chemical reactions, thereby achieving the etching purpose. Its working principle is as follows: the process gas participating in the reaction is excited by radio frequency power in a low-pressure chamber to generate ionization, forming a high-density plasma. The plasma contains a large number of active particles such as electrons, ions, excited-state atoms, and free radicals. These active particles react with the surface of the material being etched, generating volatile compounds, which are then removed from the chamber using a vacuum system, completing the etching process.

[0031] like Figure 1 As shown, in a conventional plasma etching machine, the process gas enters the reaction chamber 13 of the etching machine through the inlet nozzle 12 at the center of the dielectric window 11. When the radio frequency coil 14 is connected to radio frequency current, the process gas in the reaction chamber 13 is excited into a plasma state under the action of an alternating electromagnetic field. The plasma 15 is confined to a specific area by the dielectric window 11, the adjustment support 16, the liner 17, the base 18, and the wafer 19 on the base 18. The lower electrode inside the base 18 generates a lower bias electric field to accelerate the plasma movement. When the plasma 15 diffuses downward to the surface of the wafer 19, the two react, completing the etching process. After the etching reaction is completed, the molecular pump 20 performs a vacuum operation on the reaction chamber 13, thereby allowing the gas in the reaction chamber 13 and the etching byproducts to be discharged from the reaction chamber 13 through the pores at the bottom of the liner 17. The liner structure of the prior art is generally as follows: Figure 2 or Figure 3As shown, the bottom of the liner 17 has a ring-shaped radial strip-shaped exhaust grid or a perforated exhaust grid, which allows the process gas and byproducts of the etching reaction in the reaction chamber 13 to be drawn away by the molecular pump 20 through the radial strip-shaped exhaust grid or the perforated exhaust grid.

[0032] However, in actual use, it was found that this liner structure exhibits uneven flow field distribution during the process, resulting in an M-shaped distribution of airflow velocity above the surface of wafer 19 in the linear direction. This leads to uneven etching rates and affects the uniformity of etching on the wafer surface. Furthermore, although it can confine the plasma 15 above the liner 17 to some extent, some plasma 15 still moves through the radial strip-shaped or perforated suction grid at the bottom of the liner 17 to the lower half of the reaction chamber 13. Plasma 15 that crosses the liner 17 will etch the lower half of the reaction chamber 13 and the components within that space, affecting the lifespan of these components.

[0033] Therefore, it is necessary to provide a new solution for the inner liner structure to improve the technical problems that the existing inner liner structure easily affects the uniformity of the airflow field inside the plasma etching machine, resulting in low uniformity of wafer surface etching, and easily causes some plasma to escape into the lower half of the reaction chamber during the process, affecting the service life of its internal components.

[0034] like Figures 4 to 6 As shown, in one embodiment, this application provides a semiconductor process apparatus 1, which includes a semiconductor process component 100, a process chamber 200, a base 300, and an inner liner structure 400. The base 300 is built into the process chamber 200, and the inner liner structure 400 is fixed to the inner wall of the process chamber 200 to cooperate with the base 300 to divide the internal space of the process chamber 200 into a first space and a second space. The semiconductor process component 100 is installed in the first space to perform corresponding semiconductor process processing on the wafer 500 on the base 300.

[0035] Specifically, the inner lining structure 400 may include a first annular inner lining 410, a second annular inner lining 420, and a third annular inner lining 430, which are sequentially connected. The first annular inner lining 410 and the second annular inner lining 420 both extend vertically along the process chamber 200, and the second annular inner lining 420 has multiple strip-shaped exhaust grids 440 evenly distributed along its circumference. The third annular inner lining 430 extends horizontally along the process chamber and is an annular plate without grids.

[0036] It should be noted that the semiconductor process equipment 1 can specifically be a plasma etching machine. In this case, the semiconductor process component 100 can specifically include components such as an inlet nozzle, an RF coil, a dielectric window, and a lower electrode for performing corresponding plasma etching on the wafer 500 on the substrate 300. For those skilled in the art, this semiconductor process equipment can also be used to perform other semiconductor process treatments on the wafer 500. In this case, it is only necessary to replace the semiconductor process component with a component capable of performing the corresponding semiconductor process treatment. Furthermore, to create a vacuum space inside the process chamber 200 when the semiconductor process component 100 performs the corresponding semiconductor process treatment on the wafer 500 on the substrate 300, and to ensure that the gas and etching byproducts in the process chamber 200 are promptly discharged from the process chamber 200, a molecular pump 620 controlled by a vertical valve plate 610 can be installed on the bottom wall of the process chamber 200 to perform vacuum evacuation operations inside the process chamber 200. At this point, in order to leave sufficient installation space for the molecular pump 620, the base 300 can be fixed to the side wall of the process chamber 200 by means of a side connecting rod.

[0037] Based on the above description, it can be seen that the lining structure of the prior art is generally as follows: Figure 2 or Figure 3 As shown, the bottom of the liner 17 has a ring-shaped radial strip-shaped suction grid or a perforated suction grid. When the plasma etching machine is working, the airflow velocity on the wafer surface exhibits a linear pattern as shown in the figure. Figure 7 and Figure 8 The diagram shows an M-shaped distribution with low velocity at the center and ends and high velocity in the middle. In this embodiment, a strip-shaped extraction grid 440 is formed on the second annular liner 420. This effectively guides the airflow above the wafer to move towards the outer edge of the wafer in advance, even with the same porosity. This effectively reduces the velocity difference of the airflow on the wafer surface when the velocity and flow rate of the process gas ejected from the inlet nozzle are equal to those in the prior art. Under the prior art liner structure, the cross-sectional flow field distribution is as follows: Figure 9 As shown, the cross-sectional flow field distribution of the lining structure 400 in this embodiment is as follows. Figure 10 As shown, through Figure 7 and Figure 8 Analysis of flow velocities in different directions revealed that, compared with the prior art, the technical solution of this application embodiment can significantly improve the M-shaped distribution of airflow velocity on the wafer surface in the linear direction, reduce the velocity range by 7.5%, and effectively improve the etching uniformity of the wafer surface.

[0038] Meanwhile, in the case where the bottom of the prior art liner 17 has a ring-shaped radial strip-shaped exhaust grid or a perforated exhaust grid, when the plasma moves vertically downwards, part of the plasma is annihilated by impact when passing through the solid structure of the inner substrate with the high-speed airflow, while the other part moves to the bottom of the reaction chamber through the exhaust grid of the inner substrate. Long-term use will damage the components below the liner. However, the third annular liner 430 in this embodiment is an annular plate without a grid design, so the bottom of the liner structure 400 in this embodiment is a solid structure without a grid. When the plasma etching machine is working, most of the plasma collides with the solid structure of the third annular liner 430 and is annihilated. Only a small part of the plasma moves to the bottom of the process chamber 200 through the strip-shaped exhaust grid 440 of the second annular liner 420. That is, the liner structure 400 in this embodiment has a better plasma shielding effect than the liner of the prior art.

[0039] In this way, the semiconductor process equipment 1 of this application embodiment allows the liner structure 400 to allow airflow to exit from the side in advance through multiple strip-shaped exhaust grids 440 of the second annular liner 420, thereby inducing the airflow field above the liner structure 400 to diffuse to the surroundings, improving the uniformity of the airflow field inside the cavity, reducing the velocity difference on the wafer, and improving the uniformity of wafer surface etching. Simultaneously, the third annular liner 430 is a gridless annular plate, making the bottom of the liner structure 400 solid, which improves the shielding effect against plasma, preventing damage to other components caused by a large amount of plasma moving to the bottom of the liner structure, and thus improving the service life of the components below the liner structure 400.

[0040] In some examples, such as Figures 4 to 6 As shown, to ensure better plasma shielding of the inner liner structure 400, the entire inner liner structure 400 is integrally formed from aluminum alloy material, and its surface is treated with hard anodizing technology. Furthermore, the surfaces of the first annular inner liner 410 facing the first space, the second annular inner liner 420 facing the first space, and the third annular inner liner 430 facing the first space are all coated with a protective coating, specifically a Y2O3 coating, to protect the inner liner structure 400 from direct plasma impact, thereby significantly extending the service life of the inner liner structure 400.

[0041] In some examples, such as Figures 4 to 6As shown, the first annular inner liner 410 and the second annular inner liner 420 are connected to form a first included angle A greater than 90° facing the first space, and the first annular inner liner 410 and the second annular inner liner 420 are connected through a rounded corner transition. Similarly, the second annular inner liner 420 and the third annular inner liner 430 are connected to form a second included angle B greater than 90° facing the first space, and the second annular inner liner 420 and the third annular inner liner 430 are connected through a rounded corner transition. In the prior art, the connection between the bottom and side of the inner liner is a right-angle structure. This can easily cause plasma or electron accumulation near the right-angle connection, resulting in a large change in the plasma or electron density gradient above the inner liner. Consequently, this leads to a large difference in the etching rate on the wafer surface, affecting the overall etching uniformity of the wafer. In this application example, a three-segment inner liner connection structure is adopted. The connection angles of the first annular inner liner 410, the second annular inner liner 420, and the third annular inner liner 430 are all greater than 90° and have rounded corner transition structures, which can avoid small-scale plasma accumulation and effectively improve the plasma density distribution above the inner liner structure 400, thereby improving the etching uniformity of the wafer 500 surface. Furthermore, the value range of the second included angle B is preferably 110° to 125°, which effectively avoids the problem that when the second included angle B is close to 90°, the airflow is difficult to flow smoothly through the grid on the side wall, and when the second included angle B is large, the plasma shielding effect of the second annular inner liner 420 with the strip-shaped exhaust grid on the side is poor. Even further, the optimal value of the second included angle B is 115°.

[0042] In some examples, such as Figures 4 to 6 As shown, the end of the strip-shaped extraction grid 440 adjacent to the first annular liner 410 is arc-shaped, which can prevent plasma from accumulating in a small area at that location.

[0043] In some examples, such as Figures 4 to 6As shown, the plurality of strip-shaped exhaust grilles 440 include a plurality of first exhaust grilles 441 and a plurality of second exhaust grilles 442. The length of each first exhaust grille 441 is greater than the length of each second exhaust grille 442. The plurality of first exhaust grilles 441 and the plurality of second exhaust grilles 442 are distributed at equal intervals along the circumference of the second annular lining 420 to divide the second annular lining 420 into a first grille setting section 421 and a second grille setting section 422 along its circumference. The first grille setting section 421 is provided with a plurality of first exhaust grilles 441. The second grille setting section 422 is provided with a plurality of second exhaust grilles 442 on the side adjacent to the third annular lining 430. The side of the second grille setting section 422 adjacent to the first annular lining 410 is also provided with a strip-shaped inner door / window 460 extending along its circumference. The strip-shaped inner door / window 460 can be connected to the wafer transfer port on the side wall of the process chamber 200 to facilitate the transfer of wafers 500. To avoid the connection structure affecting the airflow of the second exhaust grid 442, the strip-shaped inner door / window 460 is spaced at a preset distance from the multiple second exhaust grids 442, which is generally about 3mm.

[0044] In some examples, such as Figures 4 to 6 As shown, the vertical distance from the junction of the second annular liner 420 and the first annular liner 410 to the wafer 500 supported on the base 300 is set as the first distance a, and the vertical distance from one end of the first suction grid 441 adjacent to the first annular liner 410 to the wafer 500 supported on the base 300 is set as the second distance b. The second distance b is greater than 0 mm and less than the first distance a, and the first distance a is less than 30 mm, i.e., 0 mm < b < a < 30 mm. The second distance b is preferably 8 mm, and the number of annular arrays of multiple strip suction grids 440 and the grid width can be specifically related to the actual required porosity of the liner structure 400. When the second distance b is less than 0 mm, the openings of the multiple strip suction grids 440 are lower than the surface of the wafer 500, so the effect of improving the surface airflow uniformity of the wafer 500 is poor. When the first distance a is large, plasma is more likely to flow out through the multiple strip suction grids 440 in advance, reducing the etching rate. Therefore, its overall performance is best when its value conforms to the above formula range. In addition, the width of the multiple first suction grids 441 and the multiple second suction grids 442 can be 3.5mm to 4.5mm (preferably 4mm). This can avoid the problems of poor plasma shielding effect when the grid width is too large, damage to the components below the liner caused by a large amount of plasma passing through the grid, and high airflow velocity through the liner, large pressure difference between the upper and lower parts of the liner, low flow conductivity, and delayed chamber pressure control response time when the grid width is small.

[0045] In some examples, such as Figures 4 to 6As shown, the inner liner structure 400 in this example also includes a fourth annular inner liner 450. The fourth annular inner liner 450 extends along the horizontal direction of the process chamber 200, and the fourth annular inner liner 450 is connected to the side of the first annular inner liner 410 away from the second annular inner liner 420. In this way, the structural arrangement of the fourth annular inner liner 450 can achieve a smooth installation between the inner liner structure 400 and the process chamber 200.

[0046] In one embodiment, this application also provides a carrier device for semiconductor process equipment. The structure and function of the carrier device can be referred to the carrier device in the above embodiment, and will not be repeated here.

[0047] Although this application has been shown and described with respect to one or more implementations, equivalent variations and modifications will occur to those skilled in the art based on a reading and understanding of this specification and drawings. This application includes all such modifications and variations and is limited only by the scope of the appended claims. In particular, with respect to the various functions performed by the aforementioned components, the terminology used to describe such components is intended to correspond to any component (unless otherwise indicated) that performs the specified function of said component (e.g., is functionally equivalent to it), even if structurally not equivalent to the disclosed structure performing the functions in the exemplary implementations of this specification shown herein.

[0048] That is, the above description is only an embodiment of this application and does not limit the patent scope of this application. Any equivalent structural or procedural changes made using the content of this application’s specification and drawings, such as the combination of technical features between different embodiments, or direct or indirect application in other related technical fields, are similarly included within the patent protection scope of this application.

[0049] Furthermore, it should be understood that in the description of this application, the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicating the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. Additionally, for structural elements with the same or similar characteristics, this application may use the same or different reference numerals for identification. Moreover, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more features. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0050] In this application, the term "exemplary" is used to mean "serving as an example, illustration, or description." Any embodiment described as "exemplary" in this application is not necessarily to be construed as more preferred or advantageous than other embodiments. This application has been provided above to enable any person skilled in the art to implement and use it. Various details have been set forth in the above description for purposes of explanation. It should be understood that those skilled in the art will recognize that this application can be implemented without using these specific details. In other embodiments, well-known structures and processes will not be described in detail to avoid obscuring the description of this application with unnecessary detail. Therefore, this application is not intended to be limited to the embodiments shown, but is consistent with the broadest scope of the principles and features disclosed herein.

Claims

1. A liner structure for a semiconductor process apparatus, used to be fixed to the inner wall of the process chamber of the semiconductor process apparatus, so as to cooperate with the base of the semiconductor process apparatus to vertically divide the internal space of the process chamber into a first space and a second space, characterized in that, The inner lining structure includes a first annular inner lining, a second annular inner lining, and a third annular inner lining, which are sequentially connected. The first annular inner liner is arranged in the vertical direction, and the second annular inner liner is arranged at an angle to the vertical direction. Furthermore, multiple strip-shaped air extraction grids are evenly distributed on the second annular inner liner along its circumference. The third annular liner extends horizontally along the process chamber and is a solid annular plate structure without grids, designed to annihilate the plasma by impacting it. The plurality of strip-shaped air extraction grids include a plurality of first air extraction grids and a plurality of second air extraction grids. The length of each first air extraction grid is greater than the length of each second air extraction grid. The plurality of first air extraction grids and the plurality of second air extraction grids are distributed at equal intervals along the circumference of the second annular liner.

2. The lining structure according to claim 1, characterized in that, The surfaces of the first annular liner facing the first space, the second annular liner facing the first space, and the third annular liner facing the first space are all coated with a protective coating.

3. The lining structure according to claim 1, characterized in that, The first annular inner liner and the second annular inner liner are connected to form a first included angle greater than 90° toward the first space, and the first annular inner liner and the second annular inner liner are connected by a rounded corner transition.

4. The lining structure according to claim 1, characterized in that, The second annular inner liner and the third annular inner liner are connected to form a second included angle greater than 90° toward the first space, and the second annular inner liner and the third annular inner liner are connected by a rounded corner transition.

5. The lining structure according to claim 4, characterized in that, The second included angle ranges from 110° to 125°.

6. The lining structure according to claim 1, characterized in that, The end of the strip-shaped exhaust grid adjacent to the first annular liner is arc-shaped.

7. The lining structure according to claim 1, characterized in that, The plurality of first exhaust grids and the plurality of second exhaust grids divide the second annular liner into a first grid section and a second grid section along its circumference. The first grid section is provided with the plurality of first exhaust grids, and the second grid section is provided with the plurality of second exhaust grids on the side adjacent to the third annular liner. The side of the second grid section adjacent to the first annular liner is also provided with a strip-shaped inner door and window extending along its circumference.

8. The lining structure according to claim 7, characterized in that, The vertical distance from the junction of the second annular inner liner and the first annular inner liner to the wafer supported on the base is set as the first distance, and the vertical distance from one end of the first exhaust grid adjacent to the first annular inner liner to the wafer supported on the base is set as the second distance; the second distance is greater than 0 mm and less than the first distance, and the first distance is less than 30 mm.

9. The lining structure according to any one of claims 1-8, characterized in that, It also includes a fourth annular liner, which extends along the horizontal direction of the process chamber and is connected to the side of the first annular liner away from the second annular liner.

10. A semiconductor process apparatus, characterized in that, The device includes a semiconductor process assembly, a process chamber, a base, and a liner structure as described in any one of claims 1-9. The base is built into the process chamber, and the liner structure is fixed to the inner wall of the process chamber to cooperate with the base in dividing the internal space of the process chamber into a first space and a second space. The semiconductor process assembly is installed in the first space to perform corresponding semiconductor process processing on the wafer on the base.

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