A firmware update method, system and product

Abstract

The embodiment of the present application provides a firmware update method, system and product, belonging to the technical field of computer systems, the method includes: in response to the firmware update operation, the baseboard management controller obtains the firmware to be updated, and based on the high-speed serial computer expansion protocol, sends the update signal of the firmware to be updated to the conversion module; the conversion module converts the received update signal based on the high-speed serial computer expansion protocol into multiple asynchronous communication update signals corresponding to the update signal, and sends them to the asynchronous communication interfaces of the multiple link compensation modules respectively, wherein the conversion module is respectively connected to the asynchronous communication interfaces of the multiple link compensation modules; any link compensation module updates the firmware to be updated in response to the received asynchronous communication update signal. The embodiment of the present application aims to improve the reliability of the firmware upgrade process of the link compensation module.

Description

Technical Field

[0001] The embodiments of the present application relate to the technical field of computer systems, and more specifically, to a firmware update method, system, and product. Background Art

[0002] The development of PCIe (Peripheral Component Interconnect Express, a high-speed serial computer expansion bus standard) reflects the continuous advancement of computer hardware technology and the demand for higher performance. With the development of PCIe technology, not only the data transmission rate is improved, but also low power consumption, hot plug, power management and stricter signal integrity improvements are included. At the same time, the transmission distance of PCIe signal links is also longer and longer.

[0003] When transmitting data in increasingly longer transmission links, in order to compensate for link losses, most link compensation modules are currently used, such as PCIe Retimer cards, to ensure the signal quality and signal integrity of PCIe signals when transmitting over long distances or passing through complex topologies. PCIe Retimer can regenerate PCIe signals and retime signals to ensure accurate data transmission.

[0004] The link compensation module inevitably needs to be upgraded and maintained for its firmware. The current method is to update the firmware of the link compensation module based on the I2C bus (Inter-Integrated Circuit) of the BMC (Basic Complex Programmable Logic Device). However, since multiple device connections may be stored on the I2C bus of the BMC and multiple link compensation modules are usually provided, communication contention may occur when the firmware of multiple link compensation modules is upgraded based on the I2C bus of the BMC. In particular, in a system with busy communication, the update process of the link compensation module may be interrupted, thereby affecting the reliability of the firmware upgrade process of the link compensation module. Summary of the invention

[0005] Embodiments of the present application provide a firmware update method, system, and product, which are intended to improve the reliability of a firmware upgrade process of a link compensation module.

[0006] In a first aspect, an embodiment of the present application provides a firmware update method, which is applied to a computer system including a baseboard management controller, a plurality of link compensation modules and a conversion module, wherein the link compensation module is used to compensate for link loss during a high-speed serial computer extension protocol transmission process, and the method comprises:

[0007] In response to the firmware update operation, the baseboard management controller obtains the firmware to be updated, and sends an update signal of the firmware to be updated to the conversion module based on a high-speed serial computer expansion protocol;

[0008] The conversion module converts the received update signal based on the high-speed serial computer expansion protocol into a plurality of asynchronous communication update signals corresponding to the update signal, and sends them to the respective asynchronous communication interfaces of the plurality of link compensation modules, wherein the conversion module is respectively connected to the asynchronous communication interfaces of the plurality of link compensation modules;

[0009] Any link compensation module updates the firmware to be updated in response to the received asynchronous communication update signal.

[0010] Optionally, any link compensation module updates the firmware to be updated in response to the received asynchronous communication update signal, including:

[0011] After any link compensation module receives the asynchronous communication update signal, the processing unit in the link compensation module deletes the current firmware in its corresponding memory and writes the firmware to be updated into the memory.

[0012] Optionally, the method further comprises:

[0013] In response to a firmware update operation for a target link compensation module, the baseboard management controller obtains the target update firmware, and sends an update signal of the target update firmware to the conversion module based on a high-speed serial computer extension protocol, wherein the update signal of the target update firmware carries a module identifier of the target link compensation module;

[0014] The conversion module converts the update signal of the target update firmware into an asynchronous communication update signal corresponding to the update signal of the target update firmware, and sends the asynchronous communication update signal of the target update firmware to the target link compensation module according to the module identifier of the target link compensation module;

[0015] The target link compensation module updates the target update firmware in response to the received asynchronous communication update signal.

[0016] Optionally, after any link compensation module updates the firmware to be updated in response to the received asynchronous communication update signal, the method further includes:

[0017] In response to the firmware update stop operation, the baseboard management controller sends a firmware update stop signal to the conversion module based on a high-speed serial computer expansion protocol;

[0018] The conversion module converts the firmware update stop signal into a plurality of asynchronous communication update stop signals corresponding to the firmware update stop signal, and sends the plurality of asynchronous communication update stop signals to the plurality of link compensation modules respectively;

[0019] Any link compensation module stops updating its own firmware to be updated in response to the received asynchronous communication update stop signal.

[0020] Optionally, after any link compensation module updates the firmware to be updated in response to the received asynchronous communication update signal, the method further includes:

[0021] In response to the firmware update verification operation, the baseboard management controller sends a firmware update verification signal to the conversion module based on a high-speed serial computer extension protocol;

[0022] The conversion module converts the firmware update verification signal into a plurality of asynchronous communication verification signals corresponding to the firmware update verification signal, and sends the plurality of asynchronous communication verification signals to the plurality of link compensation modules respectively;

[0023] Any link compensation module generates a verification result corresponding to the firmware to be updated in response to the received asynchronous communication verification signal, and sends the verification result to the baseboard management controller through the conversion module.

[0024] Optionally, any link compensation module generates a verification result corresponding to the firmware to be updated in response to the received asynchronous communication verification signal, including:

[0025] In response to the received asynchronous communication verification signal, the processing unit of any link compensation module obtains the updated firmware to be updated and generates a verification code corresponding to the updated firmware to be updated as the verification result according to a preset verification rule.

[0026] Optionally, after any link compensation module generates a verification result corresponding to the firmware to be updated in response to the received asynchronous communication verification signal, and sends the verification result to the baseboard management controller through the conversion module, the method further includes:

[0027] The baseboard management controller generates a verification code corresponding to the updated firmware to be updated according to a preset verification rule;

[0028] When the baseboard management controller receives the verification result corresponding to any link compensation module, it determines the firmware update status of any link compensation module according to the verification code and the verification result corresponding to any link compensation module.

[0029] Optionally, determining the firmware update status of any link compensation module according to the verification check code and a verification result corresponding to any link compensation module includes:

[0030] When the verification result corresponding to any link compensation module is consistent with the verification code, determining that the firmware update status of the link compensation module is a firmware update success;

[0031] When the verification result corresponding to any link compensation module is inconsistent with the verification code, the firmware update status of the link compensation module is determined to be firmware update failure, and an update failure label corresponding to the firmware to be updated is added to the link compensation module.

[0032] Optionally, after adding an update failure tag corresponding to the firmware to be updated to the link compensation module, the method further includes:

[0033] The baseboard management controller sends a re-update signal of the firmware to be updated to the conversion module based on a high-speed serial computer extension protocol, wherein the re-update signal carries a module identifier of the link compensation module corresponding to the update failure tag;

[0034] The conversion module converts the re-update signal into an asynchronous communication re-update signal corresponding to the re-update signal, and sends the asynchronous communication re-update signal to the link compensation module corresponding to the update failure label according to the module identifier of the link compensation module corresponding to the update failure label;

[0035] The link compensation module corresponding to the update failure tag re-updates its own firmware to be updated in response to the received asynchronous communication re-update signal.

[0036] Optionally, after the link compensation module corresponding to the update failure tag re-updates its own firmware to be updated in response to the received asynchronous communication re-update signal, the method further includes:

[0037] The processing unit of the link compensation module corresponding to the update failure tag generates a verification code corresponding to the current firmware to be updated as the verification result according to a preset verification rule, and sends it to the baseboard management controller through the conversion module.

[0038] Optionally, after any link compensation module updates the firmware to be updated in response to the received asynchronous communication update signal, the method further includes:

[0039] The baseboard management controller sends a parameter debugging signal to the conversion module based on a high-speed serial computer expansion protocol, wherein the parameter debugging signal carries a target parameter and a test signal;

[0040] The conversion module converts the parameter debugging signal into a plurality of asynchronous communication parameter debugging signals corresponding to the parameter debugging signal, and sends the plurality of asynchronous communication parameter debugging signals to the plurality of link compensation modules respectively;

[0041] After responding to the asynchronous communication parameter debugging signal, any link compensation module sets the current parameter as the target parameter, generates a debugging result of the test signal, and sends the debugging result to the baseboard management controller through the conversion module; the debugging result includes enhanced strength.

[0042] In a second aspect, an embodiment of the present application provides a computer system, comprising a baseboard management controller, multiple link compensation modules and a conversion module, wherein the baseboard management controller and the conversion module communicate with each other based on a high-speed serial computer expansion protocol, the multiple link compensation modules are each provided with an asynchronous communication interface, the conversion module is respectively connected to the asynchronous communication interface of the multiple link compensation modules, the link compensation module is used to compensate for the link loss in the transmission process of the high-speed serial computer expansion protocol, and the computer system is used to execute the firmware update method described in the first aspect of the embodiment.

[0043] In a third aspect, an embodiment of the present application provides a computer device, comprising: at least one processor, and a memory, wherein the memory stores a computer program that can be run on the processor, wherein when the processor executes the computer program, the firmware update method described in the first aspect of the embodiment is performed.

[0044] In a fourth aspect, an embodiment of the present application provides a non-volatile readable storage medium, wherein the non-volatile readable storage medium stores a computer program, wherein when the computer program is executed by a processor, the firmware update method described in the first aspect of the embodiment is performed.

[0045] In a fifth aspect, an embodiment of the present application provides a computer program product, including a computer program / instruction, which, when executed by a processor, implements the firmware update method described in the first aspect of the embodiment.

[0046] Beneficial effects:

[0047] The method is applied to a computer system including a baseboard management controller, multiple link compensation modules and a conversion module. The link compensation module is used to compensate for the link loss in the transmission process of the high-speed serial computer extension protocol. In response to the firmware update operation, the baseboard management controller obtains the firmware to be updated, and based on the high-speed serial computer extension protocol, sends the update signal of the firmware to be updated to the conversion module; the conversion module converts the received update signal based on the high-speed serial computer extension protocol into multiple asynchronous communication update signals corresponding to the update signal, and sends them to the respective asynchronous communication interfaces of the multiple link compensation modules respectively. When any link compensation module responds to the received asynchronous communication update signal, the firmware to be updated is updated.

[0048] By transmitting the update signal of the firmware to be updated of the baseboard management controller to the conversion module based on the high-speed serial computer expansion protocol, namely PCIe, the data transmission rate of PCIe is greater than I2C, thereby increasing the rate of the firmware update process; and the conversion module can convert the update signal based on PCIe into multiple asynchronous communication signals and send them to multiple link compensation modules respectively, thereby enabling each link compensation module to perform firmware upgrade based on an asynchronous communication signal, thereby realizing parallel firmware upgrade of multiple link compensation modules, avoiding interruption of the update process of the link compensation module due to communication competition, and improving the reliability of the firmware upgrade process of the link compensation module. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art.

[0050] Figure 1 A schematic diagram of an existing firmware upgrade provided by an embodiment of the present application is shown;

[0051] Figure 2 A connection diagram of a computer system provided in an embodiment of the present application is shown;

[0052] Figure 3 A schematic diagram of a link compensation module provided in an embodiment of the present application is shown;

[0053] Figure 4 A flowchart showing the steps of the firmware update method provided by an embodiment of the present application is shown;

[0054] Figure 5 A functional module diagram of a firmware update device provided in an embodiment of the present application is shown;

[0055] Figure 6 A schematic diagram of a computer device provided in an embodiment of the present application is shown;

[0056] Figure 7 A schematic diagram of a non-volatile readable storage medium provided in an embodiment of the present application is shown;

[0057] Figure 8 A schematic diagram of a computer program product provided by an embodiment of the present application is shown. DETAILED DESCRIPTION

[0058] The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application.

[0059] To make the purpose, technical scheme and advantages of the embodiments of the present application clearer, each embodiment of the present application will be described in detail below in conjunction with the accompanying drawings. However, it will be appreciated by those skilled in the art that in each embodiment of the present application, many technical details are proposed in order to enable the reader to better understand the present application. However, even without these technical details and various changes and modifications based on the following embodiments, the technical scheme claimed in the present application can also be implemented. The division of the following embodiments is for the convenience of description, and the specific implementation of the present application should not constitute any limitation, and the various embodiments can be combined with each other and referenced to each other without contradiction.

[0060] CPU: Central Processing Unit, central processing unit;

[0061] PCIe: Peripheral Component Interconnect Express, a high-speed serial computer expansion bus standard;

[0062] BMC: Basic Complex Programmable Logic Device, baseboard management controller;

[0063] UART: Universal Asynchronous Receiver / Transmitter, universal asynchronous receiver / transmitter;

[0064] I2C: Inter-Integrated Circuit, internal integrated circuit bus;

[0065] PCIe is a high-speed serial computer expansion bus standard. The development of PCIe reflects the continuous advancement of computer hardware technology and the demand for higher performance. The development of PCIe has improved the data transmission rate. For example, the data transmission rate of PCIe5.0 has been increased to 32GT / S, and the data transmission rate of PCIe 6.0 has been increased to 64 GT / s. It is expected that the bandwidth of each channel will reach 7.88 GB / s.

[0066] The development of PCIe is not only about improving data transmission rate, but also includes improvements in low power consumption, hot plugging, power management and stricter signal integrity. The PCIe standard will continue to evolve to meet the future needs of high-performance computing, data centers, AI and machine learning for higher bandwidth and lower latency.

[0067] With the extensive application of PCIe bus in the server field, the transmission distance of PCIe signal link is getting longer and longer. When transmitting data in longer and longer transmission links, problems such as signal attenuation, reflection, crosstalk and delay will cause signal quality to deteriorate. In order to compensate for link loss, most link compensation modules are currently used, such as PCIe Retimer card to ensure the signal quality and signal integrity of PCIe signal when it is transmitted over long distances or through complex topology structures. Link compensation modules such as PCIeRetimer card can regenerate PCIe signal and retime signal to ensure accurate data transmission.

[0068] The application scenarios of PCIe Retimer include: servers and data centers, long-distance cable connections, and high-density backplane designs. In the complex PCIe networks of servers and data centers, Retimer is used to connect PCIe switches, network cards, storage cards, and other PCIe devices to ensure the reliability and integrity of high-speed data transmission. A general server can be equipped with 8 or even more cards. When using long-distance cables to connect PCIe devices, Retimer can overcome signal attenuation and maintain signal quality. In high-density backplane designs, Retimer can help overcome signal routing complexity and signal quality challenges.

[0069] Reference Figure 1 , showing a schematic diagram of an existing firmware upgrade, when a central processing unit CPU and a target device, namely a PCIe device, perform data exchange based on a link of a high-speed serial computer expansion bus, namely a PCIe link, a link compensation module for link compensation is provided in the PCIe link, such as a PCIe Retimer card, and the link compensation module needs to be upgraded and maintained in firmware. Currently, an I2C upgrade method using an integrated circuit bus of a baseboard management controller BMC is adopted, that is, the BMC is connected to each link compensation module based on I2C to update the firmware of each link compensation module.

[0070] However, upgrading the firmware of the PCIe Retimer card based on I2C has the following disadvantages:

[0071] 1. Low transmission rate: Compared with the high speed of PCIe, the transmission rate of I2C is usually low, which makes the firmware upgrade process slow. Especially when the firmware file is large, the upgrade time will increase significantly. Generally, it takes 4 to 5 hours to upgrade 8 Retimer cards.

[0072] 2. Risk of interruption during the upgrade process: Due to the low rate of I2C, the firmware upgrade process may be longer, which increases the possibility of process interruption, such as power failure, communication error or hardware failure, which may cause upgrade failure or device damage.

[0073] 3. Multiple device conflicts: There may be multiple devices on the I2C bus, which may cause address conflicts or communication competition. Especially in a busy system, it may affect the reliability and success rate of firmware upgrades. The current BMC I2C process can only upgrade one Retimer card at a time.

[0074] 4. Error detection and recovery: I2C’s error detection mechanism may not be sufficient to ensure data integrity during firmware upgrades. Errors that occur during transmission may not be easily detected until the upgrade is complete, which may cause the device to malfunction or require a complex recovery process.

[0075] 5. Resource competition: In a PCIe card, the I2C bus may share resources with other components. For example, during the upgrade process, the normal operation of other I2C devices may be affected, resulting in system instability.

[0076] Therefore, in order to improve the reliability of the firmware upgrade process of the link compensation module, an embodiment of the present application provides a firmware update method, which can be applied to a computer system that uses the link compensation module, and the computer system includes a server, etc.

[0077] Reference Figure 2 , shows a connection diagram of a computer system provided in an embodiment of the present application, wherein the computer system includes a central processing unit, a target device 1-N, the target device refers to a PCIe device 1-N, and data is exchanged between the CPU and the PCIe device based on a link based on a high-speed serial computer expansion bus, namely a PCIe link; when data is transmitted between the central processing unit, namely the CPU, and any PCIe device based on a PCIe link, a link compensation module is provided in the long link between the central processing unit CPU and the PCIe device in order to compensate for the link loss caused by a longer link. In the actual implementation process, the link compensation module can select different types of PCIe Retimer cards according to the needs of the actual application; in this embodiment, the PCIe link between the CPU and the target device 1-N is provided with a link compensation module, such as multiple link compensation modules 1-N.

[0078] The link compensation module also needs to perform a firmware upgrade. The firmware refers to the "driver" stored inside the link compensation module. In order to facilitate the upgrade of the firmware of any link compensation module, in this embodiment, the baseboard management control BMC is connected to the conversion module based on the high-speed serial computer extension protocol, namely the PCIe protocol. During the firmware update process, the BMC sends any PCIe signal to the conversion module, and the conversion module is respectively connected to the asynchronous communication interface of each link compensation module, and then the conversion module can convert the PCIe signal sent by the BMC into multiple asynchronous communication signals, namely UART, and send them to each link compensation module respectively.

[0079] During the implementation process, the conversion module can adopt a PCIe to UART conversion chip, and the PCIe interface on the conversion module is connected to the PCIe interface of the BMC, such as connected to the PCIe Root Port in the BMC; the UART interface of the conversion module is respectively connected to the UART interface set in each link compensation module, and the conversion module can convert the PCIe signal sent by the BMC into multiple UART signals, so that each UART signal can communicate with the BMC through the conversion module alone, and there is no communication competition. Moreover, the transmission rate of PCIe is greater than the transmission rate of the I2C protocol. Therefore, based on the method of converting PCIe signals to UART signals, not only the firmware update process can be improved, but also the parallel firmware upgrade of multiple link compensation modules can be achieved, avoiding the interruption of the update process of the link compensation module due to communication competition, and improving the reliability of the firmware upgrade process of the link compensation module.

[0080] Reference Figure 3 , shows a schematic diagram of a link compensation module provided in an embodiment of the present application, wherein the link compensation module includes an asynchronous communication interface for communicating with the conversion module, namely, a UART interface; the link compensation module includes a processing unit and a clock recovery circuit, specifically, the processing unit may be an MPU (Microprocessor Unit), which is used to receive and process any signal sent from the conversion module; the clock recovery circuit is used to retime any PCIe signal during the communication process between the CPU and the PCIe device to eliminate clock offset and jitter, and correct the phase and time deviation of the signal to improve the signal quality. In the actual implementation process, the corresponding clock recovery circuit can be applied according to different requirements, and this embodiment does not impose any limitation.

[0081] The link compensation module is also connected to a memory for storing firmware; by way of example, the memory may be an EEPROM (Electrically ErasableProgrammable read only memory), and the link compensation module is connected to the EEPROM based on the integrated circuit bus I2C, which can ensure that the firmware data is not lost after power failure.

[0082] Reference Figure 4 , shows a flowchart of a firmware update method provided by an embodiment of the present application, the method is applied to a computer system including a baseboard management controller, multiple link compensation modules and a conversion module, and the method may include the following steps:

[0083] S101: In response to a firmware update operation, the baseboard management controller obtains firmware to be updated, and sends an update signal of the firmware to be updated to the conversion module based on a high-speed serial computer expansion protocol.

[0084] Specifically, when a firmware upgrade is required, the baseboard management controller BMC responds to the firmware update operation by sending an update signal of the firmware to be updated based on PCIe to a conversion module, such as a PCIe to UART conversion chip.

[0085] S102: The conversion module converts the received update signal based on the high-speed serial computer expansion protocol into a plurality of asynchronous communication update signals corresponding to the update signal, and sends the signals to the respective asynchronous communication interfaces of the plurality of link compensation modules.

[0086] Specifically, the conversion module converts the update signal of the PCIe signal to obtain multiple asynchronous communication update signals, where the multiple asynchronous communication update signals are all UART signals, and then sends the multiple asynchronous communication update signals to multiple link compensation modules respectively.

[0087] S103: Any link compensation module updates the firmware to be updated in response to the received asynchronous communication update signal.

[0088] After any link compensation module receives the asynchronous communication update signal, the processing unit in the link compensation module deletes the current firmware in its corresponding memory and writes the firmware to be updated in the memory. Specifically, the MPU of the link compensation module deletes the current firmware in the EEPROM connected to itself, and then writes the firmware to be updated into the EEPROM, thereby realizing the process of updating the firmware of the link compensation module.

[0089] Since there is a UART signal transmission path between the conversion module and each link compensation module, the process of parallel firmware upgrade of multiple link compensation modules can be realized. Compared with the process that requires bus arbitration based on I2C, each link compensation module can perform firmware upgrade based on an asynchronous communication signal, thereby realizing parallel firmware upgrade of multiple link compensation modules, avoiding interruption of the link compensation module update process due to communication competition, and improving the reliability of the firmware upgrade process of the link compensation module.

[0090] In a feasible implementation, in addition to the baseboard management controller synchronously updating the multiple link compensation modules, a process of performing a separate firmware upgrade on any link compensation module among the multiple link compensation modules can also be implemented.

[0091] Specifically, in response to a firmware update operation for a target link compensation module, the baseboard management controller obtains the target update firmware and, based on a high-speed serial computer extension protocol, sends an update signal of the target update firmware to the conversion module, wherein the update signal of the target update firmware carries a module identifier of the target link compensation module.

[0092] The conversion module converts the update signal of the target update firmware into an asynchronous communication update signal corresponding to the update signal of the target update firmware, and sends the asynchronous communication update signal of the target update firmware to the target link compensation module according to the module identifier of the target link compensation module.

[0093] The target link compensation module updates the target update firmware in response to the received asynchronous communication update signal.

[0094] For example, modules 1-N are respectively set for multiple link compensation modules. When the link compensation module N needs to be upgraded with its firmware separately, the update signal sent by the baseboard management controller carries the module identifier N. After the conversion module converts the update signal of the PCIe signal to obtain an asynchronous communication update signal, the UART update signal is sent to the link compensation module corresponding to the module identifier N to upgrade the firmware of the link compensation module N.

[0095] In a feasible implementation manner, the current firmware update process may also be suspended. Specifically, in response to the firmware update stop operation, the baseboard management controller sends a firmware update stop signal to the conversion module based on a high-speed serial computer expansion protocol.

[0096] The conversion module converts the firmware update stop signal into a plurality of asynchronous communication update stop signals corresponding to the firmware update stop signal, and sends the plurality of asynchronous communication update stop signals to the plurality of link compensation modules respectively.

[0097] Any link compensation module stops updating its own firmware to be updated in response to the received asynchronous communication update stop signal.

[0098] During the process of updating the firmware to be updated of multiple link compensation modules, the update process can also be paused according to user needs. It not only includes synchronously pausing the update process of all link compensation modules, but also can specify any link compensation module to pause the firmware upgrade process. At this time, the update stop signal carries the module identifier of the link compensation module whose firmware upgrade process needs to be paused.

[0099] In a feasible implementation manner, the method further includes:

[0100] In response to the firmware update verification operation, the baseboard management controller sends a firmware update verification signal to the conversion module based on a high-speed serial computer expansion protocol.

[0101] The conversion module converts the firmware update verification signal into a plurality of asynchronous communication verification signals corresponding to the firmware update verification signal, and sends the plurality of asynchronous communication verification signals to the plurality of link compensation modules respectively.

[0102] Any link compensation module generates a verification result corresponding to the firmware to be updated in response to the received asynchronous communication verification signal, and sends the verification result to the baseboard management controller through the conversion module. Specifically, any link compensation module responds to the received asynchronous communication verification signal, and the processing unit MPU of the link compensation module obtains the updated firmware to be updated in the EEPROM, and generates a verification code corresponding to the updated firmware to be updated as the verification result according to a preset verification rule.

[0103] The baseboard management controller generates a verification code corresponding to the updated firmware to be updated according to the same preset verification rules. When the baseboard management controller receives the verification result corresponding to any link compensation module, it determines the firmware update status of any link compensation module according to the verification code and the verification result corresponding to any link compensation module, and then determines whether the update of any link compensation module fails or the updated firmware is inaccurate.

[0104] When the verification result corresponding to any link compensation module is consistent with the verification code, it is determined that the firmware update status of the link compensation module is that the firmware update is successful.

[0105] When the verification result corresponding to any link compensation module is inconsistent with the verification code, the firmware update status of the link compensation module is determined to be firmware update failure, and an update failure label corresponding to the firmware to be updated is added to the link compensation module.

[0106] For example, the preset verification rule may include generating a checksum for the updated firmware to be updated, or using a CRC (Cyclic Redundancy Check) verification rule, which may be customized according to actual application requirements and is not limited in the embodiments of the present application.

[0107] By performing upgrade verification, not only can we detect whether the firmware upgrade is successful, but we can also avoid the problem of incorrect firmware upgrade due to loss during data transmission, thereby improving the accuracy of firmware upgrade.

[0108] In a feasible implementation manner, when any link compensation module fails to be updated, the firmware to be updated of the link compensation module may be upgraded again. Specifically:

[0109] The baseboard management controller sends a re-update signal of the firmware to be updated to the conversion module based on a high-speed serial computer extension protocol, and the re-update signal carries a module identifier of the link compensation module corresponding to the update failure tag.

[0110] The conversion module converts the re-update signal into an asynchronous communication re-update signal corresponding to the re-update signal, and sends the asynchronous communication re-update signal to the link compensation module corresponding to the update failure label according to the module identifier of the link compensation module corresponding to the update failure label.

[0111] The link compensation module corresponding to the update failure tag re-updates its own firmware to be updated in response to the received asynchronous communication re-update signal.

[0112] In addition, when the link compensation module of the re-firmware update is updated, the processing unit of the link compensation module corresponding to the update failure label generates a verification code corresponding to the current firmware to be updated as the verification result according to the preset verification rules, and sends it to the baseboard management controller through the conversion module, so that the baseboard management controller can verify the updated firmware again.

[0113] When upgrading the firmware of the link compensation module, the upgrade success rate of the link compensation module can be improved by verifying whether the firmware is successfully upgraded and then re-upgrading the firmware that failed to upgrade. The re-upgraded firmware can be verified again to ensure the success rate and accuracy of the firmware upgrade.

[0114] In another feasible implementation manner, after any link compensation module updates its own firmware to be updated in response to the received asynchronous communication update signal, the method further includes:

[0115] The baseboard management controller sends a parameter debugging signal to the conversion module based on a high-speed serial computer expansion protocol, wherein the parameter debugging signal carries a target parameter and a test signal.

[0116] The conversion module converts the parameter debugging signal into a plurality of asynchronous communication parameter debugging signals corresponding to the parameter debugging signal, and sends the plurality of asynchronous communication parameter debugging signals to the plurality of link compensation modules respectively.

[0117] After responding to the asynchronous communication parameter debugging signal, any link compensation module sets the current parameter as the target parameter, generates a debugging result of the test signal, and sends the debugging result to the baseboard management controller through the conversion module; the debugging result includes enhanced strength.

[0118] Furthermore, the target parameters of multiple link compensation modules can be set in batches, or the parameters of any link compensation module can be set. After the parameters are set successfully, the link compensation module is tested based on the test signal to generate the debugging results after the parameters are modified, so that the user can intuitively detect the effect of the link compensation module on the test signal after the parameter adjustment, such as whether the enhanced strength of the test signal meets the requirements.

[0119] This method converts PCIe signals with higher transmission rates into UART signals to perform parallel or individual firmware upgrades on multiple link compensation modules. This not only enables parallel upgrades of multiple cards at a time, greatly reducing upgrade efficiency, but also allows targeted adjustment or upgrade of any link compensation module, improving the applicability of firmware upgrades. Each UART signal generated based on the conversion module is only connected to one link compensation module, and bus arbitration and communication competition are no longer required, which can greatly improve the success rate of firmware upgrades.

[0120] In this implementation, converting the efficiently transmitted PCIe signal into a UART signal has the following advantages when performing a firmware upgrade on the link compensation module:

[0121] 1. Easy to use and low cost: The UART interface is simple to set up, usually only two data lines (TX and RX) plus a ground line are needed to achieve communication, so the connection between the conversion module and the link compensation module is very direct and easy; the hardware cost of the UART interface is very low, and only a minimum of pins and simple circuits are needed to achieve it, which can save costs in mass production;

[0122] 2. Controllability: UART signals are easy to control, allowing error detection and correction mechanisms to be implemented during firmware upgrades to ensure data integrity;

[0123] 3. Low power consumption: Compared with other high-speed interfaces, UART consumes less power at low speeds, and can also be used in battery-powered devices;

[0124] 4. Easy to debug: UART interface can be used as a debugging interface, not only for firmware upgrades, but also for sending debugging information, which is convenient for development and maintenance;

[0125] 6. Flexibility: UART signals can adapt to various baud rates, from low speed to high speed, and have high adaptability.

[0126] Reference Figure 5 , shows a functional module diagram of a firmware update device provided by an embodiment of the present application, which is applied to a computer system including a baseboard management controller, multiple link compensation modules and a conversion module, wherein the link compensation module is used to compensate for the link loss during the transmission process of the high-speed serial computer extension protocol, and the device includes:

[0127] An update signal sending unit 100 is provided in the baseboard management controller, and is used for, in response to a firmware update operation, the baseboard management controller obtains the firmware to be updated, and sends an update signal of the firmware to be updated to the conversion module based on a high-speed serial computer extension protocol;

[0128] A signal conversion unit 200 is provided in the conversion module, and is used for the conversion module to convert the received update signal based on the high-speed serial computer expansion protocol into a plurality of asynchronous communication update signals corresponding to the update signal, and respectively send them to the respective asynchronous communication interfaces of the plurality of link compensation modules, wherein the conversion module is respectively connected to the asynchronous communication interfaces of the plurality of link compensation modules;

[0129] The updating unit 300 is arranged in any link compensation module, and is used for any link compensation module to update the firmware to be updated in response to the received asynchronous communication updating signal.

[0130] Optionally, the updating unit includes an updating subunit, which is used for causing the processing unit in the link compensation module to delete the current firmware in its corresponding memory and write the firmware to be updated into the memory after receiving the asynchronous communication update signal.

[0131] Optionally, the device further comprises:

[0132] A separate update signal sending unit is provided in the baseboard management controller, and is used to respond to the firmware update operation for the target link compensation module, obtain the target update firmware, and send the update signal of the target update firmware to the conversion module based on the high-speed serial computer extension protocol, wherein the update signal of the target update firmware carries the module identification of the target link compensation module;

[0133] A separate signal conversion unit is provided in the conversion module, and is used to convert the update signal of the target update firmware into an asynchronous communication update signal corresponding to the update signal of the target update firmware, and send the asynchronous communication update signal of the target update firmware to the target link compensation module according to the module identifier of the target link compensation module;

[0134] The separate updating unit is arranged in any link compensation module, and is used for updating its own firmware to be updated in response to the received asynchronous communication updating signal.

[0135] Optionally, the device further comprises:

[0136] a stop signal sending unit, arranged in the baseboard management controller, for sending a firmware update stop signal to the conversion module based on a high-speed serial computer extension protocol in response to a firmware update stop operation;

[0137] a stop signal conversion unit, arranged in the conversion module, for converting the firmware update stop signal into a plurality of asynchronous communication update stop signals corresponding to the firmware update stop signal, and sending the plurality of asynchronous communication update stop signals to the plurality of link compensation modules respectively;

[0138] The update stopping unit is arranged in any link compensation module, and is used for stopping updating the firmware to be updated in response to the received asynchronous communication update stopping signal.

[0139] Optionally, the device further comprises:

[0140] A verification signal sending unit is provided in the baseboard management controller, and is used to send a firmware update verification signal to the conversion module based on a high-speed serial computer extension protocol in response to a firmware update verification operation;

[0141] A verification signal conversion unit, arranged in the conversion module, for converting the firmware update verification signal into a plurality of asynchronous communication verification signals corresponding to the firmware update verification signal, and sending the plurality of asynchronous communication verification signals to the plurality of link compensation modules respectively;

[0142] The verification signal processing unit is arranged in any link compensation module, and is used to generate a verification result corresponding to the firmware to be updated in response to the received asynchronous communication verification signal, and send the verification result to the baseboard management controller through the conversion module.

[0143] Optionally, the verification signal processing unit includes:

[0144] The verification signal processing subunit is used to obtain the updated firmware to be updated in response to the received asynchronous communication verification signal, and generate a verification code corresponding to the updated firmware to be updated as the verification result according to a preset verification rule.

[0145] Optionally, the device further comprises:

[0146] A first update verification subunit, arranged in the baseboard management controller, is used to generate a verification code corresponding to the updated firmware to be updated according to a preset verification rule;

[0147] The second update verification subunit is arranged in the baseboard management controller, and is used to determine the firmware update status of any link compensation module according to the verification verification code and the verification result corresponding to any link compensation module when receiving the verification result corresponding to any link compensation module.

[0148] Optionally, the second update check subunit includes:

[0149] A first firmware update status generating subunit is used to determine that the firmware update status of any link compensation module is a firmware update success when the verification result corresponding to any link compensation module is consistent with the verification code;

[0150] The second firmware update status generating subunit is used to determine that the firmware update status of any link compensation module is a firmware update failure when the verification result corresponding to any link compensation module is inconsistent with the verification code, and to add an update failure tag corresponding to the firmware to be updated to the link compensation module

[0151] Optionally, the device further comprises:

[0152] A re-update signal sending unit is provided in the baseboard management controller, and is used to send a re-update signal of the firmware to be updated to the conversion module based on a high-speed serial computer extension protocol, wherein the re-update signal carries a module identifier of the link compensation module corresponding to the update failure tag;

[0153] A re-update signal conversion unit is provided in the conversion module, and is used to convert the re-update signal into an asynchronous communication re-update signal corresponding to the re-update signal, and send the asynchronous communication re-update signal to the link compensation module corresponding to the update failure label according to the module identifier of the link compensation module corresponding to the update failure label;

[0154] The re-update unit is arranged in any link compensation module, and is used to re-update its own firmware to be updated in response to the received asynchronous communication re-update signal.

[0155] Optionally, the device further comprises:

[0156] The re-verification unit is arranged in any link compensation module, and is used to generate a verification code corresponding to the current firmware to be updated as the verification result according to a preset verification rule, and send it to the baseboard management controller through the conversion module.

[0157] Optionally, the device further comprises:

[0158] A parameter debugging signal sending unit is arranged in the baseboard management controller and is used to send a parameter debugging signal to the conversion module based on a high-speed serial computer expansion protocol, wherein the parameter debugging signal carries a target parameter and a test signal;

[0159] A parameter debugging signal conversion unit is provided in the conversion module, and is used to convert the parameter debugging signal into a plurality of asynchronous communication parameter debugging signals corresponding to the parameter debugging signal, and send the plurality of asynchronous communication parameter debugging signals to the plurality of link compensation modules respectively;

[0160] A parameter debugging signal processing unit is arranged in any link compensation module, and is used to set the current parameter to the target parameter in response to the asynchronous communication parameter debugging signal, and generate a debugging result of the test signal, and send the debugging result to the baseboard management controller through the conversion module; the debugging result includes enhanced strength.

[0161] Reference Figure 6 , shows a schematic diagram of a computer device provided in an embodiment of the present application, the computer device comprising: at least one processor 601, and a memory 602, the memory 602 storing a computer program that can be run on the processor 601, wherein the processor executes the firmware update method described in the embodiment when executing the computer program.

[0162] Reference Figure 7, shows a schematic diagram of a non-volatile readable storage medium provided in an embodiment of the present application, wherein the non-volatile readable storage medium 700 stores a computer program 701, wherein the computer program 701, when executed by a processor, performs the firmware update method described in the embodiment.

[0163] Reference Figure 8 , shows a schematic diagram of a computer program product provided in an embodiment of the present application, wherein the computer program product 800 includes a computer program / instruction 801, which, when executed by a processor, implements the firmware update method described in the embodiment.

[0164] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0165] Those skilled in the art will appreciate that the embodiments of the present application can be provided as methods, devices, or computer program products. Therefore, the present application can adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application can adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0166] The embodiments of the present application are described with reference to the flowcharts and / or block diagrams of the methods, terminal devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing terminal device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing terminal device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0167] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing terminal device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce a manufactured product including an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0168] These computer program instructions can also be loaded onto a computer or other programmable data processing terminal device so that a series of operating steps are executed on the computer or other programmable terminal device to produce a computer-implemented process, thereby providing instructions for executing on the computer or other programmable terminal device to implement the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0169] Although the preferred embodiments of the present application have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the present application.

[0170] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or terminal device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or terminal device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or terminal device including the elements.

[0171] Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for those skilled in the art, according to the idea of ​​the present application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A firmware update method, characterized in that: Applied to a computer system including a baseboard management controller, a plurality of link compensation modules and a conversion module, wherein the link compensation module is used to compensate for link loss during a high-speed serial computer extension protocol transmission process, the method comprising: In response to the firmware update operation, the baseboard management controller obtains the firmware to be updated, and sends an update signal of the firmware to be updated to the conversion module based on a high-speed serial computer expansion protocol; The conversion module converts the received update signal based on the high-speed serial computer expansion protocol into a plurality of asynchronous communication update signals corresponding to the update signal, and sends them to the respective asynchronous communication interfaces of the plurality of link compensation modules respectively, wherein the conversion module is respectively connected to the asynchronous communication interfaces of the plurality of link compensation modules, and the conversion module includes a PCIe to UART conversion chip; Any link compensation module updates the firmware to be updated in response to the received asynchronous communication update signal; When the firmware of any link compensation module is upgraded, in response to the firmware update operation for the target link compensation module, the baseboard management controller obtains the target update firmware, and based on the high-speed serial computer expansion protocol, sends the update signal of the target update firmware to the conversion module, the update signal of the target update firmware carries the module identification of the target link compensation module, the conversion module converts the update signal of the target update firmware into an asynchronous communication update signal corresponding to the update signal of the target update firmware, and sends the asynchronous communication update signal of the target update firmware to the target link compensation module according to the module identification of the target link compensation module, and the target link compensation module updates the target update firmware in response to the received asynchronous communication update signal.

2. The method according to claim 1, characterized in that: Any link compensation module updates the firmware to be updated in response to the received asynchronous communication update signal, including: After any link compensation module receives the asynchronous communication update signal, the processing unit in the link compensation module deletes the current firmware in its corresponding memory and writes the firmware to be updated into the memory.

3. The method according to any one of claims 1 to 2, characterized in that: After any link compensation module updates the firmware to be updated in response to the received asynchronous communication update signal, the method further includes: In response to the firmware update stop operation, the baseboard management controller sends a firmware update stop signal to the conversion module based on a high-speed serial computer expansion protocol; The conversion module converts the firmware update stop signal into a plurality of asynchronous communication update stop signals corresponding to the firmware update stop signal, and sends the plurality of asynchronous communication update stop signals to the plurality of link compensation modules respectively; Any link compensation module stops updating its own firmware to be updated in response to the received asynchronous communication update stop signal.

4. The method according to claim 1, characterized in that: After any link compensation module updates the firmware to be updated in response to the received asynchronous communication update signal, the method further includes: In response to the firmware update verification operation, the baseboard management controller sends a firmware update verification signal to the conversion module based on a high-speed serial computer extension protocol; The conversion module converts the firmware update verification signal into a plurality of asynchronous communication verification signals corresponding to the firmware update verification signal, and sends the plurality of asynchronous communication verification signals to the plurality of link compensation modules respectively; Any link compensation module generates a verification result corresponding to the firmware to be updated in response to the received asynchronous communication verification signal, and sends the verification result to the baseboard management controller through the conversion module.

5. The method according to claim 4, characterized in that Any link compensation module generates a verification result corresponding to the firmware to be updated in response to the received asynchronous communication verification signal, including: In response to the received asynchronous communication verification signal, the processing unit of any link compensation module obtains the updated firmware to be updated and generates a verification code corresponding to the updated firmware to be updated as the verification result according to a preset verification rule.

6. The method according to claim 5, characterized in that After any link compensation module generates a verification result corresponding to the firmware to be updated in response to the received asynchronous communication verification signal, and sends the verification result to the baseboard management controller through the conversion module, the method further includes: The baseboard management controller generates a verification code corresponding to the updated firmware to be updated according to a preset verification rule; When the baseboard management controller receives the verification result corresponding to any link compensation module, it determines the firmware update status of any link compensation module according to the verification code and the verification result corresponding to any link compensation module.

7. The method according to claim 6, characterized in that Determining the firmware update status of any link compensation module according to the verification check code and the verification result corresponding to any link compensation module includes: When the verification result corresponding to any link compensation module is consistent with the verification code, determining that the firmware update status of the link compensation module is a firmware update success; When the verification result corresponding to any link compensation module is inconsistent with the verification code, the firmware update status of the link compensation module is determined to be firmware update failure, and an update failure label corresponding to the firmware to be updated is added to the link compensation module.

8. The method according to claim 7, characterized in that After adding an update failure tag corresponding to the firmware to be updated to the link compensation module, the method further includes: The baseboard management controller sends a re-update signal of the firmware to be updated to the conversion module based on a high-speed serial computer extension protocol, wherein the re-update signal carries a module identifier of the link compensation module corresponding to the update failure tag; The conversion module converts the re-update signal into an asynchronous communication re-update signal corresponding to the re-update signal, and sends the asynchronous communication re-update signal to the link compensation module corresponding to the update failure label according to the module identifier of the link compensation module corresponding to the update failure label; The link compensation module corresponding to the update failure tag re-updates its own firmware to be updated in response to the received asynchronous communication re-update signal.

9. The method according to claim 8, characterized in that After the link compensation module corresponding to the update failure tag re-updates its own firmware to be updated in response to the received asynchronous communication re-update signal, the method further includes: The processing unit of the link compensation module corresponding to the update failure tag generates a verification code corresponding to the current firmware to be updated as the verification result according to a preset verification rule, and sends it to the baseboard management controller through the conversion module.

10. The method according to claim 1, characterized in that After any link compensation module updates the firmware to be updated in response to the received asynchronous communication update signal, the method further includes: The baseboard management controller sends a parameter debugging signal to the conversion module based on a high-speed serial computer expansion protocol, wherein the parameter debugging signal carries a target parameter and a test signal; The conversion module converts the parameter debugging signal into a plurality of asynchronous communication parameter debugging signals corresponding to the parameter debugging signal, and sends the plurality of asynchronous communication parameter debugging signals to the plurality of link compensation modules respectively; After responding to the asynchronous communication parameter debugging signal, any link compensation module sets the current parameter to the target parameter, generates a debugging result of the test signal, and sends the debugging result to the baseboard management controller through the conversion module; the debugging result includes enhanced strength.

11. A computer system, characterized in that: The computer system includes a baseboard management controller, multiple link compensation modules and a conversion module. The baseboard management controller communicates with the conversion module based on a high-speed serial computer expansion protocol. The multiple link compensation modules are each provided with an asynchronous communication interface. The conversion module is respectively connected to the asynchronous communication interfaces of the multiple link compensation modules. The link compensation module is used to compensate for the link loss in the transmission process of the high-speed serial computer expansion protocol. The computer system is used to execute the firmware update method described in any one of claims 1 to 10.

12. A computer device, characterized in that: include: At least one processor, and a memory, wherein the memory stores a computer program that can be run on the processor, wherein the processor executes the firmware update method according to any one of claims 1 to 10 when executing the computer program.

13. A non-volatile readable storage medium, characterized in that: The non-volatile readable storage medium stores a computer program, wherein the computer program, when executed by a processor, performs the firmware updating method according to any one of claims 1 to 10.

14. A computer program product comprising a computer program / instructions, characterized in that When the computer program / instruction is executed by a processor, the firmware updating method according to any one of claims 1 to 10 is implemented.

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