A method for upgrading FPGA firmware

Abstract

The present invention relates to the field of embedded devices and software technology, and in particular to a method for upgrading FPGA firmware. The method adopts an FPGA firmware upgrading system, and the system comprises a host computer, a processor unit, an off-chip storage unit, an FPGA unit, and a host computer. The method comprises the following steps: system power-on initialization; automatically reading a flag in an off-chip storage to determine whether the processor unit firmware needs to be upgraded; if the upgrade is required, automatically reading the firmware of the processor unit to be upgraded in the off-chip storage unit; entering a user application, clearing a flag in the off-chip storage unit that identifies the upgraded processor unit, and the processor unit is successfully upgraded; reading the FPGA firmware from the off-chip storage unit, configuring the FPGA unit, and the configuration is successful, and the system runs normally. With less chip configuration, the FPGA firmware is reconfigured each time the power is turned on, and the latest version of the firmware program is always kept running in the FPGA, thereby improving reliability. The circuit devices are simplified, the cost is reduced, and the volume is reduced.

Description

Technical Field

[0001] The present invention relates to the field of embedded device control and software technology, and in particular to a FPGA firmware upgrade method. Background Art

[0002] Usually, the control chip of the device contains DSP / ARM and FPGA. In order to facilitate the functional debugging and optimization and upgrade of the device, it is often necessary to upgrade the firmware of the internal control chip DSP / ARM and FPGA.

[0003] In the prior art, there are two main ways to upgrade firmware:

[0004] First, an external protocol chip, storage chip or configuration chip is needed to assist in the implementation, and the firmware upgrade for DSP / ARM and FPGA can be achieved through other communication ports such as serial port or network port + bootloader.

[0005] Secondly, the DSP / ARM and FPGA firmware upgrade methods based on two hardware designs involve two sets of hardware circuits. The two firmware upgrade units run independently and require the configuration of off-chip storage units and configuration chips (usually EPCS, etc.).

[0006] Whether it is one set of hardware circuits or two sets of hardware circuits, in most cases, protocol chips and storage chips need to be configured, and multiple chips may be configured, plus the peripheral circuits of the corresponding chips. The hardware circuit structure for implementing FPGA firmware upgrades is complex, the layout occupies a large area, and the volume is large. In addition, the protocol chips therein, such as EPCS chips, are expensive and costly.

[0007] Based on the problems in the prior art, the present invention provides an FPGA firmware upgrade method. Summary of the invention

[0008] The purpose of the present invention is to provide a FPGA firmware upgrade method to solve the technical problem of implementing FPGA firmware upgrade by hardware circuit in the prior art, which has complex circuit structure and high cost.

[0009] The technical solution of the present invention is: a method for upgrading FPGA firmware, which adopts an FPGA firmware upgrading system, wherein the FPGA firmware upgrading system comprises a host computer, a processor unit, an off-chip storage unit, and an FPGA unit; the host computer, the off-chip storage unit, and the FPGA unit are respectively electrically connected to the processor unit and perform unidirectional or bidirectional communication; the processor unit stores a firmware program, and the firmware program comprises a Bootloader program and a user application program; the method comprises the following steps:

[0010] System power-on initialization;

[0011] The Bootloader program automatically reads the flag bit in the off-chip storage unit that identifies the firmware of the processor unit to be upgraded, and determines whether the firmware of the processor unit needs to be upgraded;

[0012] If the processor unit firmware needs to be upgraded, the Bootloader program automatically reads the firmware of the processor unit to be upgraded in the off-chip storage unit;

[0013] Enter the application program in the processor unit, clear the flag bit in the off-chip storage unit that identifies the upgraded processor unit, and the processor unit is upgraded successfully;

[0014] Read the FPGA firmware from the off-chip storage unit and configure the FPGA unit;

[0015] The FPGA unit is configured successfully and the system runs normally.

[0016] Preferably, the FPGA unit uses an FPGA chip as the main chip, without other configuration chips, and no firmware program is stored in the FPGA unit. Each time the system is powered on and initialized, the firmware of the FPGA unit is read from the off-chip storage unit to reconfigure the FPGA unit.

[0017] Preferably, during normal operation of the system, the processor unit communicates with the host computer and receives a firmware upgrade instruction;

[0018] After the communication handshake is successful, the processor unit receives the processor unit firmware to be upgraded sent by the host computer and stores it in the off-chip storage unit;

[0019] The firmware of the processing unit to be upgraded stored in the off-chip storage unit is verified. After the verification is passed, the flag bit in the off-chip storage unit that identifies the upgraded processor unit is set, and the device is reset and powered on for initialization.

[0020] Preferably, during normal operation of the system, the processor unit communicates with the host computer, and if no instruction to upgrade the processor unit firmware is received, but an instruction to upgrade the FPGA unit firmware is received;

[0021] After the communication handshake is successful, the processor unit receives the firmware of the FPGA unit to be upgraded sent by the host computer and stores it in the off-chip storage unit;

[0022] The FPGA unit firmware stored in the off-chip storage unit is verified, and after the verification passes, the device is reset and powered on for initialization.

[0023] Preferably, if the processor unit firmware does not need to be upgraded, the user application in the processor unit is directly entered, the flag bit in the off-chip storage unit indicating the upgraded processor unit is cleared; the FPGA firmware is read from the off-chip storage unit, and the FPGA unit is configured.

[0024] Preferably, the off-chip storage unit adopts one of FLASH and EEPROM.

[0025] Preferably, the off-chip storage unit is divided into three areas according to the address range, area A stores the firmware to be upgraded of the processor unit, area B stores the firmware of the FPGA; area C is a flag bit used to identify the upgraded processor unit, and an identifier is stored internally.

[0026] Preferably, the processor unit adopts a DSP chip or an ARM chip.

[0027] Preferably, the communication mode between the host computer and the processor unit adopts one of RS232, RS485, USB, and EtherCAT.

[0028] Compared with the prior art, the advantages of the present invention are:

[0029] The present invention provides an FPGA firmware upgrade method. The method adopts an FPGA firmware upgrade system. After the device is powered on, the DSP / ARM first runs a Bootloader program and self-checks whether the DSP / ARM and the FPGA need to upgrade the firmware program. If the upgrade is required, the firmware program in the specified address of an off-chip storage unit is automatically loaded to the DSP / ARM or FPGA chip to implement the upgrade of the DSP / ARM and FPGA program. If the upgrade is not required, the method jumps to the normal operation of a user application program. During the operation of the user application program, if a firmware program file required for the DSP / ARM or FPGA update is received, the firmware program file is stored in the off-chip storage unit, the device is reset, and the device is powered on again for initialization and configuration to complete the upgrade.

[0030] A set of hardware circuits and an off-chip storage unit are used to upgrade the DSP / ARM software and FPGA software respectively through DSP / ARM software control. Regardless of whether an upgrade instruction is received, the FPGA firmware is reconfigured every time it is powered on, keeping the latest version of the firmware program running in the FPGA.

[0031] By using fewer chip hardware configurations, unified management of DSP / ARM and FPGA firmware is achieved, which simplifies the devices required for the hardware circuit, reduces costs, reduces size, and improves reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] The present invention will be further described below in conjunction with the accompanying drawings and embodiments:

[0033] Figure 1 A schematic diagram of the process of the FPGA firmware upgrade method of the present invention;

[0034] Figure 2 This is a functional block diagram of the FPGA firmware upgrade system of the present invention;

[0035] Figure 3 The figure is a schematic diagram of an embodiment of the FPGA firmware upgrade system of the present invention. DETAILED DESCRIPTION

[0036] The present invention is further described in detail below in conjunction with specific embodiments:

[0037] like Figure 1 As shown, the present invention provides an FPGA firmware upgrade method, which is performed using an FPGA firmware upgrade system.

[0038] Refer to the attached Figure 2 ,The FPGA firmware upgrade system includes a host computer, a processor unit, an off-chip storage unit, and an FPGA unit. The off-chip storage unit and the FPGA unit are electrically connected to the processor unit respectively and perform unidirectional or bidirectional communication.

[0039] The host computer is used to communicate with the processor unit. The user issues a firmware upgrade instruction through the host computer and sends the instruction to the processor unit. After successfully handshaking with the processor unit, the host computer sends the firmware to be upgraded to the processor unit.

[0040] The communication method between the host computer and the processor unit is not limited to the serial port method, but can also adopt one of RS232, RS485, USB, EtherCAT, WIFI, 4G / 5G, and Bluetooth communication methods.

[0041] The processor unit stores a firmware program, which includes a bootloader program and a user application program. The processor unit uses a processor DSP or an ARM processor (hereinafter referred to as "DSP / ARM").

[0042] DSP / ARM is used to communicate with the host computer, receive and analyze upgrade instructions, receive the firmware to be upgraded, and verify the integrity and accuracy of the firmware; it is used to communicate with the off-chip storage unit and store the received DSP / ARM and FPGA unit firmware in the off-chip storage unit; it is used to interact with the FPGA unit and is responsible for the upgrade of the FPGA firmware and the configuration of the FPGA firmware after each power-on (or reset).

[0043] The FPGA unit uses the FPGA chip as the main chip, without other configuration chips (the same as "FPGA" below).

[0044] FPGA and DSP / ARM communicate with each other through several signal lines. The FPGA unit does not store firmware programs. Each time the system is powered on and initialized, the DSP / ARM reads the firmware of the FPGA unit from the off-chip storage unit, reconfigures it, and runs the configured firmware.

[0045] The off-chip storage unit uses a non-volatile storage device, such as FLASH or EEPROM, to store DSP / ARM and FPGA firmware.

[0046] Taking into account the upgrade flag of DSP / ARM, the off-chip storage unit is divided into 3 areas or 5 areas according to the address range.

[0047] The off-chip storage unit is divided into three areas according to the address range. Area A stores the firmware to be upgraded of the processor unit, and area B stores the firmware of the FPGA. Area C is a flag used to identify the upgraded processor unit, and an identifier is stored internally.

[0048] Or, the off-chip storage unit is divided into 5 areas according to the address range, area A stores the current firmware of the processor unit, area B stores the firmware to be upgraded of the processor unit; area C stores the current firmware of the FPGA, area D stores the firmware to be upgraded of the FPGA, area E is a flag bit used to identify the upgraded processor unit, and an identifier is stored internally.

[0049] As attached Figure 3 As shown, a specific implementation of the FPGA firmware upgrade system is provided, wherein the processor unit adopts DSP / ARM, the off-chip storage unit adopts FLASH, and the FPGA unit adopts an FPGA chip.

[0050] Based on the FPGA firmware upgrade system provided above, a FPGA firmware upgrade method is provided. Figure 1 The specific implementation process of this method is as follows:

[0051] S1, system power-on initialization;

[0052] S2. The Bootloader program automatically reads the flag bit in the off-chip storage unit that identifies the firmware for upgrading the processor unit, and determines whether the firmware of the processor unit needs to be upgraded.

[0053] S3. If the processor unit firmware needs to be upgraded, the Bootloader program automatically reads the firmware of the processor unit to be upgraded in the off-chip storage unit; enters the application program in the processor unit, clears the flag bit in the off-chip storage unit that identifies the upgraded processor unit, and the processor unit is upgraded successfully.

[0054] S4. Read the FPGA firmware from the off-chip storage unit and configure the FPGA unit. The FPGA unit is configured successfully and the system operates normally.

[0055] If the processor unit firmware does not need to be upgraded, directly enter the user application in the processor unit, clear the flag in the off-chip storage unit that indicates the upgraded processor unit; read the FPGA firmware from the off-chip storage unit, configure the FPGA unit, the FPGA unit is configured successfully, and the system operates normally.

[0056] During the normal operation of the system, the processor unit communicates with the host computer and receives a firmware upgrade instruction. Then, the processor unit communicates and shakes hands with the host computer to prepare for firmware transmission.

[0057] After the communication handshake is successful, the processor unit receives the processor unit firmware to be upgraded sent by the host computer and stores it in the off-chip storage unit; the processor unit firmware to be upgraded stored in the off-chip storage unit is verified, and after the verification passes, the flag bit in the off-chip storage unit that identifies the upgraded processor unit is set, the device is reset, and S1 to S4 are repeated.

[0058] Similarly, during normal operation of the system, the processor unit communicates with the host computer. If the processor unit does not receive an instruction to upgrade the processor unit firmware, but receives an instruction to upgrade the FPGA unit firmware, after a successful communication handshake, the processor unit receives the firmware of the FPGA unit to be upgraded sent by the host computer and stores it in an off-chip storage unit; the FPGA unit firmware stored in the off-chip storage unit is verified, and after the verification passes, the device is reset and S1 to S4 are repeated.

[0059] If the system does not receive any upgrade instructions during normal operation, just keep running normally.

[0060] In summary, the present invention provides an FPGA firmware upgrade method, which is performed using an FPGA firmware upgrade system. After the device is powered on, the DSP / ARM first runs the Bootloader program and self-checks whether the DSP / ARM and FPGA need to upgrade the firmware program. If an upgrade is required, the firmware program in the specified address of the off-chip storage unit is automatically loaded to the DSP / ARM or FPGA chip to implement the upgrade of the DSP / ARM and FPGA program. If an upgrade is not required, the program is jumped to the normal operation of the user application. During the operation of the user application, if a firmware program file required for the DSP / ARM or FPGA update is received, it is stored in the off-chip storage unit, the device is reset, and it is powered on again for initialization and configuration to complete the upgrade.

[0061] The FPGA firmware upgrade system provided by the present invention includes a host computer, a processor unit, an off-chip storage unit, a firmware upgrade interface (a set of hardware circuits), and a firmware storage device (including but not limited to flash and eeprom), and implements upgrades of DSP / ARM software and FPGA software respectively through DSP / ARM software. Regardless of whether an upgrade instruction is received, the firmware of the FPGA is reconfigured each time the power is turned on, so that the latest version of the firmware program is always run in the FPGA.

[0062] By using fewer chip hardware configurations, unified management of DSP / ARM and FPGA firmware is achieved, which simplifies the devices required for the hardware circuit, reduces costs, reduces size, and improves reliability.

[0063] The above embodiments are only for illustrating the technical concept and features of the present invention, and their purpose is to enable people familiar with this technology to understand the content of the present invention and implement it accordingly, and they cannot be used to limit the scope of protection of the present invention. For those skilled in the art, it is obvious that the present invention is not limited to the details of the above exemplary embodiments, and the present invention can be implemented in other specific forms without departing from the spirit or basic features of the present invention. Therefore, no matter from which point of view, the embodiments should be regarded as exemplary and non-restrictive. The scope of the present invention is limited by the attached claims rather than the above description, and it is intended to include all changes within the meaning and scope of the equivalent elements of the claims in the present invention.

Claims

1. A method for upgrading FPGA firmware, characterized in that: The method adopts an FPGA firmware upgrade system, which includes a host computer, a processor unit, an off-chip storage unit, and an FPGA unit; the host computer, the off-chip storage unit, and the FPGA unit are respectively electrically connected to the processor unit and perform unidirectional or bidirectional communication, the processor unit stores a firmware program, and the firmware program includes a Bootloader program and a user application program; The processor unit adopts a processor DSP or ARM processor, and the DSP or ARM processor is used to communicate with the host computer, receive and analyze the upgrade instruction, receive the firmware to be upgraded, and verify the integrity and accuracy of the firmware; the DSP or ARM processor is used to communicate with the off-chip storage unit, and store the received firmware of the processor unit and the FPGA unit in the off-chip storage unit; the DSP or ARM processor is used to interact with the FPGA unit, and is responsible for the upgrade of the FPGA firmware through the DSP or ARM software, and configures the FPGA firmware after each power-on or reset; The method comprises the following steps: System power-on initialization; The Bootloader program automatically reads the flag bit in the off-chip storage unit that identifies the firmware of the processor unit to be upgraded, and determines whether the firmware of the processor unit needs to be upgraded; If the processor unit firmware needs to be upgraded, the Bootloader program automatically reads the firmware of the processor unit to be upgraded in the off-chip storage unit; Enter the user application in the processor unit, clear the flag bit in the off-chip storage unit that identifies the upgraded processor unit, and the processor unit is upgraded successfully; Read the FPGA firmware from the off-chip storage unit and configure the FPGA unit; The FPGA unit is configured successfully and the system runs normally; The FPGA unit uses an FPGA chip as the main chip, and has no other configuration chips. The FPGA unit does not store a firmware program. Each time the system is powered on and initialized, the firmware of the FPGA unit is read from an off-chip storage unit to reconfigure the FPGA unit. Among them, during the normal operation of the system, the processor unit communicates with the host computer and receives the firmware upgrade instruction; After the communication handshake is successful, the processor unit receives the processor unit firmware to be upgraded sent by the host computer and stores it in the off-chip storage unit; Verifying the firmware of the processing unit to be upgraded stored in the off-chip storage unit, and after the verification passes, setting a flag bit in the off-chip storage unit that identifies the upgraded processor unit, resetting the device, and powering on and initializing; During normal operation of the system, the processor unit communicates with the host computer. If the processor unit firmware upgrade instruction is not received, but the FPGA unit firmware upgrade instruction is received; After the communication handshake is successful, the processor unit receives the firmware of the FPGA unit to be upgraded sent by the host computer and stores it in the off-chip storage unit; The FPGA unit firmware stored in the off-chip storage unit is verified, and after the verification passes, the device is reset and powered on for initialization.

2. The FPGA firmware upgrade method according to claim 1, characterized in that: If the processor unit firmware does not need to be upgraded, the user application in the processor unit is directly entered, the flag bit in the off-chip storage unit indicating the processor unit upgrade is cleared, the FPGA firmware is read from the off-chip storage unit, and the FPGA unit is configured.

3. The FPGA firmware upgrade method according to claim 1, characterized in that: The off-chip storage unit adopts one of FLASH and EEPROM.

4. The FPGA firmware upgrade method according to claim 1, characterized in that: The off-chip storage unit is divided into three areas according to the address range. Area A stores the firmware to be upgraded of the processor unit, and area B stores the firmware of the FPGA; area C is a flag bit used to identify the upgraded processor unit, and an identifier is stored internally.

5. The FPGA firmware upgrade method according to claim 1, characterized in that: The communication mode between the host computer and the processor unit adopts one of RS232, RS485, USB and EtherCAT.

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