An LED chip and its manufacturing method

Abstract

An LED chip and its fabrication method are disclosed. The LED chip has an epitaxial structure located on one side of a substrate. The epitaxial structure includes at least a first type semiconductor layer, an active layer, and a second type semiconductor layer sequentially stacked along a first direction. The first direction is perpendicular to the substrate and points from the substrate to the epitaxial structure. A first transparent conductive layer and a second transparent conductive layer are sequentially stacked on the side of the second type semiconductor layer opposite to the active layer. The second transparent conductive layer has a patterned surface. Due to the presence of two transparent conductive layers, by adjusting the growth processes of the first and second transparent conductive layers, the first transparent conductive layer can achieve good ohmic contact, and the second transparent conductive layer can achieve high transmittance. Furthermore, the patterned surface on the second transparent conductive layer can improve light extraction efficiency. A method for fabricating the aforementioned LED chip is also provided.

Description

Technical Field

[0001] This invention relates to the field of light-emitting diode technology, and more specifically, to an LED chip and its manufacturing method. Background Technology

[0002] LED chips have been widely used in fields such as electronic communications and solid-state lighting due to their advantages of energy saving, environmental friendliness, long lifespan, and small size. However, the luminous efficiency of LED chips is still affected by internal quantum efficiency (IQE) and light extraction efficiency (LEE). Therefore, improving the IQE and LEE of LED chips is key to improving chip performance. In particular, because of the large difference in refractive index between the semiconductor material of LED chips and air, only a small portion of the light can be extracted, thus the LEE of LED chips remains limited.

[0003] Furthermore, in traditional LED structures, the current distribution below the LED electrodes is uneven. As the current increases, current congestion around the electrodes intensifies, leading to insufficient utilization of the active area and resulting in low light extraction efficiency of the LED chip. Current methods involve depositing a transparent conductive layer on a P-GaN layer; however, a single transparent conductive layer suffers from poor ohmic contact and low transmittance, making it difficult to improve the light extraction efficiency of the LED chip. To overcome the aforementioned shortcomings of the prior art, the inventors have specifically designed an LED chip with improved light extraction efficiency and its fabrication method, thus giving rise to this invention. Summary of the Invention

[0004] In view of this, the present invention provides an LED chip that can improve the light extraction efficiency of LED chips and a method for manufacturing the same.

[0005] To achieve the above objectives, the present invention adopts the following technical solution: an LED chip, comprising: a substrate; an epitaxial structure located on one side surface of the substrate; the epitaxial structure comprising at least a first type semiconductor layer, an active layer, and a second type semiconductor layer sequentially stacked along a first direction; the first direction being perpendicular to the substrate and pointing from the substrate to the epitaxial structure; a first transparent conductive layer and a second transparent conductive layer sequentially stacked on the side surface of the second type semiconductor layer opposite to the active layer; a second transparent conductive layer stacked on the first transparent conductive layer, wherein the surface of the second transparent conductive layer opposite to the active layer has a patterned surface; a first electrode electrically connected to the first type semiconductor layer; and a second electrode electrically connected to the second type semiconductor layer.

[0006] Furthermore, the first transparent conductive layer is fabricated using an electron beam evaporation method; the second transparent conductive layer is fabricated using a magnetron sputtering method.

[0007] Furthermore, the second type of semiconductor layer has a patterned surface.

[0008] Furthermore, the surface of the first transparent conductive layer facing away from the active layer is planar.

[0009] Furthermore, the patterned surface includes protrusions arranged in an array.

[0010] Furthermore, the array of protrusions is fabricated using nanoimprint technology.

[0011] The present invention also provides a method for manufacturing an LED chip, characterized by comprising the following steps: S01: providing a substrate; S02: growing an epitaxial structure on a surface of one side of the substrate; the epitaxial structure comprising at least a first type semiconductor layer, an active layer, and a second type semiconductor layer sequentially stacked along a first direction; the first direction being perpendicular to the substrate and pointing from the substrate to the epitaxial structure; S03: growing a first transparent conductive layer on the second type semiconductor layer; S04: growing a second transparent conductive layer on the first transparent conductive layer; fabricating a patterned surface on the second transparent conductive layer; S05: fabricating a first electrode electrically connected to the first type semiconductor layer; fabricating a second electrode electrically connected to the second type semiconductor layer.

[0012] Further, in step S03, the first transparent conductive layer is grown using electron beam evaporation; in step S04, the second transparent conductive layer is grown using magnetron sputtering.

[0013] Furthermore, after step S02 and before step S03, a patterned surface is formed on the surface of the second type semiconductor layer facing away from the substrate.

[0014] Further, step S03 includes: growing a pre-laid transparent conductive layer on the second type semiconductor layer, wherein the pre-laid transparent conductive layer has protrusions and recesses corresponding to the patterned surface on the second type semiconductor layer; and processing the surface of the pre-laid transparent conductive layer away from the active layer into a plane to form the first transparent conductive layer with a plane surface away from the active layer.

[0015] Further, processing the surface of the pre-laid transparent conductive layer away from the active layer into a planar surface specifically includes: a: applying a photoresist layer to the surface of the pre-laid transparent conductive layer; b: patterning the photoresist layer, retaining only the photoresist layer located on the protrusions of the pre-laid transparent conductive layer; c: growing another transparent conductive layer with the same thickness as the protrusions; d: removing the photoresist layer and the transparent conductive layer located on the protrusions to obtain the first transparent conductive layer with a planar surface away from the active layer. Compared with the prior art, the technical solution provided by the present invention has at least the following advantages:

[0016] This invention provides an LED chip, comprising: a substrate; an epitaxial structure located on one side surface of the substrate; the epitaxial structure comprising at least a first type semiconductor layer, an active layer, and a second type semiconductor layer sequentially stacked along a first direction; the first direction being perpendicular to the substrate and pointing from the substrate to the epitaxial structure; a first transparent conductive layer and a second transparent conductive layer sequentially stacked on the side surface of the second type semiconductor layer opposite to the active layer; wherein the second transparent conductive layer has a patterned surface; a first electrode electrically connected to the first type semiconductor layer; and a second electrode electrically connected to the second type semiconductor layer. Due to the presence of two transparent conductive layers, the growth processes of the first and second transparent conductive layers can be adjusted to ensure good ohmic contact in the first transparent conductive layer and high transmittance in the second transparent conductive layer. Since the refractive index of the second transparent conductive layer is much greater than that of air, the angle at which light refracts from the second transparent conductive layer into air is limited, reducing the light extraction efficiency. This application improves the light extraction efficiency of the LED chip by providing a patterned surface on the second transparent conductive layer, thereby increasing the light scattering angle.

[0017] Furthermore, the first transparent conductive layer is fabricated using electron beam evaporation, which provides good ohmic contact; the second transparent conductive layer is fabricated using magnetron sputtering and has a patterned surface, which provides high transmittance.

[0018] Furthermore, the surface of the second semiconductor layer facing away from the substrate has a patterned surface, which can increase the critical angle for light output to the first transparent conductive layer, allowing more light to be output to the first and second transparent conductive layers. In conjunction with the patterned surface on the second transparent conductive layer, the light extraction efficiency of the LED chip is improved.

[0019] Furthermore, the surface of the first transparent conductive layer facing away from the active layer is planar, which is beneficial for the first transparent conductive layer to form a good ohmic contact.

[0020] Furthermore, the present invention provides a method for manufacturing an LED chip, which is used to manufacture the LED chip described in any of the above claims, and thus has the beneficial effects described in any of the above claims for LED chips. Attached Figure Description

[0021] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0022] Figure 1This is a schematic diagram of the LED chip structure;

[0023] Figure 2 -10 is a schematic diagram of the process in the manufacturing method of LED chips.

[0024] Figure label:

[0025] Substrate 1; First type semiconductor layer 2; Active layer 3; Second type semiconductor layer 4; First transparent conductive layer 5; Second transparent conductive layer 6; First electrode 7; Second electrode 8; Arrayed protrusions 9; Pre-laid transparent conductive layer 10; Protrusion 101; Recess 102; Passivation layer 20; Electrode hole 30; First direction A. Detailed Implementation

[0026] To make the content of this invention clearer, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0027] Many specific details are set forth in the following description in order to provide a full understanding of this application. However, this application may also be implemented in other ways different from those described herein. Those skilled in the art can make similar extensions without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.

[0028] Secondly, this application provides a detailed description in conjunction with schematic diagrams. When detailing the embodiments of this application, for ease of explanation, the cross-sectional views illustrating the device structure may be partially enlarged, not adhering to the usual scale. Furthermore, the schematic diagrams are merely examples and should not limit the scope of protection of this application. In addition, actual fabrication should include three-dimensional spatial dimensions of length, width, and depth.

[0029] like Figure 1 As shown, an LED chip of the present invention includes:

[0030] Substrate 1. The substrate may be a sapphire substrate, a silicon substrate, or a silicon nitride substrate, etc., and is not specifically limited in this embodiment.

[0031] An epitaxial structure located on one side surface of substrate 1 includes at least a first-type semiconductor layer 2, an active layer 3, and a second-type semiconductor layer 4 sequentially stacked along a first direction A; the first direction A is perpendicular to substrate 1 and points from substrate 1 to the epitaxial structure. One of the first-type semiconductor layer 2 and the second-type semiconductor layer 4 is an N-type semiconductor layer, and the other is a P-type semiconductor layer; in this application, the example of the first-type semiconductor layer 2 being an N-type semiconductor layer and the second-type semiconductor layer 4 being a P-type semiconductor layer is used for illustration.

[0032] A first transparent conductive layer 5 and a second transparent conductive layer 6 are sequentially stacked on the surface of the second type semiconductor 4 layer facing away from the active layer 3; wherein, as shown in the figure... Figure 8 As shown, the second transparent conductive layer 6 has a patterned surface. The materials of the first transparent conductive layer 5 and the second transparent conductive layer 6 include, but are not limited to, indium tin oxide.

[0033] The first electrode 7 is electrically connected to the first type semiconductor layer 2.

[0034] The second electrode 8 is electrically connected to the second type semiconductor layer 4.

[0035] Because a double-layer transparent conductive layer is used, the growth processes of the first transparent conductive layer 5 and the second transparent conductive layer 6 can be adjusted separately to ensure that the first transparent conductive layer 5 has good ohmic contact and the second transparent conductive layer 6 has high transmittance. However, since the refractive index of the second transparent conductive layer 6 is much greater than that of air, the angle at which light is refracted from the second transparent conductive layer into the air is limited, reducing the light extraction efficiency. This application improves the light extraction efficiency of the LED chip by setting a patterned surface on the second transparent conductive layer to increase the light scattering angle.

[0036] In a preferred embodiment, the first transparent conductive layer 5 is fabricated by electron beam evaporation; the second transparent conductive layer 6 is fabricated by magnetron sputtering.

[0037] The first transparent conductive layer 5 is fabricated using electron beam evaporation, which provides good ohmic contact; the second transparent conductive layer 6 is fabricated using magnetron sputtering and has a patterned surface, which provides high transmittance.

[0038] In a preferred embodiment, such as Figure 1 , 4 As shown, the second type semiconductor layer 4 has a patterned surface. This configuration can increase the critical angle for light output to the first transparent conductive layer 5, allowing more light to be output to the first transparent conductive layer 5 and the second transparent conductive layer 6. In conjunction with the patterned surface on the second transparent conductive layer 6, the light extraction efficiency of the LED chip is improved.

[0039] In a preferred embodiment, such as Figure 1 As shown, the surface of the first transparent conductive layer 5 facing away from the active layer 3 is planar, which is conducive to the formation of good ohmic contact in the first transparent conductive layer 5.

[0040] In a preferred embodiment, such as Figure 1 , 4 As shown in Figures 8 and 9, the patterned surface includes protrusions 9 arranged in an array.

[0041] In a preferred embodiment, the arrayed protrusions 9 are fabricated using nanoimprint technology.

[0042] In a preferred embodiment, the thickness of the first transparent conductive layer 5 is 500-2000 angstroms, and the thickness of the second transparent conductive layer 6 is 500-2000 angstroms.

[0043] In a preferred embodiment, such as Figure 9 , 10 As shown, the epitaxial structure has an electrode hole 30 penetrating the first transparent conductive layer 5 and the second transparent conductive layer 6. The electrode hole 30 exposes the second type semiconductor layer 4, and the second electrode 8 extends into the electrode hole 30 to make electrical contact with the second type semiconductor layer 4, the first transparent conductive layer 5, and the second transparent conductive layer 6. In other embodiments, the second electrode 8 can also be directly stacked on the surface of the second transparent conductive layer 6 to achieve electrical contact with the second type semiconductor layer 4.

[0044] In a preferred embodiment, such as Figure 1 As shown, the epitaxial structure also includes a passivation layer 20. In this application, the passivation layer 20 covers the exposed surface of the second transparent conductive layer 6, the sidewalls and partially exposed surface of the second electrode 8, the sidewalls and partially exposed surface of the first electrode 7, and the exposed sidewalls of the epitaxial structure located between the first electrode 7 and the second electrode 8. The material of the passivation layer 20 includes, but is not limited to, silicon oxide.

[0045] This invention also provides a method for manufacturing an LED chip, comprising the following steps:

[0046] S01: Provide a substrate 1;

[0047] S02: As Figure 2 As shown, an epitaxial structure is grown on the surface of one side of the substrate 1; the epitaxial structure includes at least a first type semiconductor layer 2, an active layer 3 and a second type semiconductor layer 4 stacked sequentially along a first direction A; the first direction A is perpendicular to the substrate 1 and points from the substrate 1 to the epitaxial structure.

[0048] In this application, a horizontally structured LED chip is used as an example. Therefore, in step S02, as follows: Figure 3As shown, after the epitaxial structure is grown, photoresist needs to be uniformly applied to the surface of the second type semiconductor layer 4 away from the substrate 1. After exposure and development, the pattern is exposed. Inductively coupled plasma etching (ICP) is used to etch the areas of the second type semiconductor layer 4 away from the substrate 1 that are not covered by photoresist, so that the N-type semiconductor layer is exposed. The etching depth is 0.5-2.5μm. The etching gases are chlorine (Cl2), boron trichloride (BCl3), and argon (Ar). After etching is completed, the remaining photoresist is removed.

[0049] S03: As Figure 7 As shown, a first transparent conductive layer 5 is grown on the second type semiconductor layer 4;

[0050] S04: As Figure 8 As shown, a second transparent conductive layer 6 is grown on the first transparent conductive layer 5; a patterned surface is formed on the second transparent conductive layer 6.

[0051] S05: As Figure 10 As shown, a first electrode 7 electrically connected to the first type semiconductor layer 2 is fabricated; a second electrode 8 electrically connected to the second type semiconductor layer 4 is fabricated. Specifically, photoresist is applied to the surface of the LED chip facing away from the substrate, and the shapes of the first electrode 7 and the second electrode 8 are photolithographically etched. Then, the first electrode 7 and the second electrode 8 are deposited using metal evaporation. Next, a blue film is used to remove the excess metal layer on the epitaxial layer surface, and then the photoresist is removed, completing the fabrication of the first electrode 7 and the second electrode 8.

[0052] In a preferred embodiment, in step S03, a first transparent conductive layer 5 is grown by electron beam evaporation; and in step S04, a second transparent conductive layer 6 is grown by magnetron sputtering.

[0053] In a preferred embodiment, such as Figure 4 As shown, after step S02 and before step S03, the process further includes: S021: fabricating a patterned surface in the second type semiconductor layer 4.

[0054] Furthermore, the surface of the first transparent conductive layer 5 facing away from the active layer 3 is made into a plane. This arrangement facilitates the formation of good ohmic contact in the first transparent conductive layer 5. Specifically, as shown... Figure 5 As shown, step S03 includes: growing a pre-laid transparent conductive layer 10 on the second type semiconductor layer 4, wherein the pre-laid transparent conductive layer 10 has protrusions 101 and recesses 102 corresponding to the patterned surfaces on the second type semiconductor layer 4; as shown Figure 7 As shown, the surface of the pre-laid transparent conductive layer 10 facing away from the active layer 3 is processed into a plane to form the first transparent conductive layer 5, which is a plane facing away from the active layer 3.

[0055] In a preferred embodiment, processing the surface of the pre-laid transparent conductive layer 10 away from the active layer 3 into a planar shape specifically includes:

[0056] a: as Figure 5 As shown, a photoresist layer is coated on the surface of the pre-laid transparent conductive layer 10;

[0057] b: Pattern the photoresist layer, retaining only the photoresist layer located on the protrusion 101 of the pre-laid transparent conductive layer 10. Figure 5 (The black portion on the surface of the central convex part 101);

[0058] c: such as Figure 6 As shown, a transparent conductive layer with the same thickness as the protrusion 101 is regrown; the thickness of the protrusion 101 refers to its thickness in the first direction A.

[0059] d: such as Figure 7 As shown, the photoresist layer and transparent conductive layer located on the protrusion 101 are removed to obtain a first transparent conductive layer 5 whose surface is planar away from the active layer 3. For example, a blue film can be used to peel off the photoresist layer and transparent conductive layer on the protrusion 101.

[0060] In a preferred embodiment, such as Figure 1 , 4 As shown in Figures 8 and 9, the patterned surface includes protrusions 9 arranged in an array.

[0061] In a preferred embodiment, the arrayed protrusions 9 are fabricated using nanoimprint lithography. Specifically, in step S021, a layer of nanoimprint adhesive is first coated on the surface of the second type semiconductor layer 4 facing away from the substrate 1. The arrayed protrusion pattern on the Si substrate is transferred to the second type semiconductor layer 4 using nanoimprint lithography. Then, an etching process is used to fabricate the arrayed protrusions 9 on the surface of the second type semiconductor layer 4 facing away from the substrate 1. In step S04, a layer of nanoimprint adhesive is first coated on the surface of the second transparent conductive layer 6 facing away from the active layer 3. The substantially arrayed protrusion pattern of Si is transferred to the second transparent conductive layer 6 using nanoimprint lithography. Then, an etching process is used to fabricate the arrayed protrusions 9 on the surface of the second transparent conductive layer 6 facing away from the active layer 3.

[0062] In a preferred embodiment, such as Figure 9 , 10As shown, in step S05, when fabricating the second electrode 8, the first transparent conductive layer 5 and the second transparent conductive layer 6 are etched to form an electrode hole 30 exposing the second type semiconductor layer 4. The second electrode 8 extends into the electrode hole 30 and makes electrical contact with the second type semiconductor layer 4, the first transparent conductive layer 5, and the second transparent conductive layer 6. Preferably, the electrode hole 30 can be fabricated using a wet etching process. Further, after fabricating the electrode hole 30, the first transparent conductive layer 5 and the second transparent conductive layer 6 are alloyed.

[0063] In a preferred embodiment, the method further includes step S06: fabricating a passivation layer 20. In this application, the passivation layer 20 covers the exposed surface of the second transparent conductive layer 6, the sidewalls and partially exposed surface of the second electrode 8, the sidewalls and partially exposed surface of the first electrode 7, and the exposed sidewalls of the epitaxial structure located between the first electrode 7 and the second electrode 8. Preferably, a passivation layer can be deposited on the surface of the LED chip away from the substrate using a PECVD method, and the passivation layer pattern can be fabricated using photolithography and dry etching methods, followed by a resist removal process to obtain the desired result. Figure 1 The structure shown.

[0064] The present invention provides a method for manufacturing an LED chip, which is used to manufacture the LED chip described in any of the above claims, and thus has the beneficial effects described in any of the above claims for LED chips.

[0065] Those skilled in the art should understand that, in the disclosure of this invention, the terms "lateral", "longitudinal", "upper", "lower", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, the above terms should not be construed as limiting this invention.

[0066] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0067] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. An LED chip, characterized in that, include: Substrate; An epitaxial structure located on one side surface of the substrate; the epitaxial structure includes at least a first type semiconductor layer, an active layer, and a second type semiconductor layer sequentially stacked along a first direction; the first direction is perpendicular to the substrate and extends from the substrate toward the epitaxial structure; A first transparent conductive layer and a second transparent conductive layer are sequentially stacked on the side surface of the second type semiconductor layer opposite to the active layer; wherein, the second transparent conductive layer has a patterned surface; A first electrode electrically connected to the first type of semiconductor layer; The second electrode is electrically connected to the second type of semiconductor layer; The first transparent conductive layer is fabricated using electron beam evaporation; the second transparent conductive layer is fabricated using magnetron sputtering. The second type of semiconductor layer has a patterned surface; The surface of the first transparent conductive layer facing away from the active layer is planar.

2. The LED chip as described in claim 1, characterized in that, The patterned surface includes protrusions arranged in an array.

3. An LED chip as described in claim 2, characterized in that, The array of protrusions was fabricated using nanoimprint lithography.

4. A method for manufacturing an LED chip, characterized in that, Includes the following steps: S01: Provide a substrate; S02: An epitaxial structure is grown on the surface of one side of the substrate; the epitaxial structure includes at least a first type semiconductor layer, an active layer, and a second type semiconductor layer sequentially stacked along a first direction; the first direction is perpendicular to the substrate and extends from the substrate toward the epitaxial structure; S03: Grow a first transparent conductive layer on the second type semiconductor layer; S04: Grow a second transparent conductive layer on the first transparent conductive layer; fabricate a patterned surface on the second transparent conductive layer; S05: Fabricate a first electrode electrically connected to the first type of semiconductor layer; fabricate a second electrode electrically connected to the second type of semiconductor layer; In step S03, the first transparent conductive layer is grown using electron beam evaporation. In step S04, the second transparent conductive layer is grown using magnetron sputtering. The process further includes, after step S02 and before step S03: fabricating a patterned surface on the second type semiconductor layer; Step S03 includes: growing a pre-laid transparent conductive layer on the second type semiconductor layer, wherein the pre-laid transparent conductive layer has protrusions and recesses corresponding to the patterned surface on the second type semiconductor layer; The surface of the pre-laid transparent conductive layer facing away from the active layer is processed into a plane to form the first transparent conductive layer with a plane surface facing away from the active layer.

5. The method for manufacturing an LED chip as described in claim 4, characterized in that, Processing the surface of the pre-laid transparent conductive layer away from the active layer into a plane specifically includes: a: Apply a photoresist layer to the surface of the pre-laid transparent conductive layer; b: Pattern the photoresist layer, retaining only the photoresist layer located on the protrusion of the pre-laid transparent conductive layer; c: Regenerate a transparent conductive layer with the same thickness as the protrusion; d: Remove the photoresist layer and transparent conductive layer located on the protrusion to obtain the first transparent conductive layer with a planar surface facing away from the active layer.

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