Virtual machine hot migration method and device

Abstract

The embodiment of the present disclosure provides a method and device for hot migration of a virtual machine, the method comprising: in response to a hot migration operation of a virtual machine on a client side, adjusting an interception switch for intercepting a sleep instruction to an on state, the sleep instruction being used to switch a virtual central processing unit VCPU thread running in the virtual machine to a sleep state on the client side; if a sleep instruction for a target VCPU thread is received, intercepting the sleep instruction; wherein the target VCPU thread is any one of a plurality of VCPU threads running in the virtual machine; exiting the target VCPU thread from the client side to the host side, switching the target VCPU thread to a sleep state on the host side; and controlling the hot migration thread to occupy the CPU resources of the target VCPU thread through a scheduler on the host side to perform hot migration of the virtual machine. The present application can prevent the migration thread from affecting the performance of the virtual machine.

Description

Technical Field

[0001] The present disclosure relates to the field of cloud computing technology, and more particularly to a method and device for hot migration of a virtual machine. Background Art

[0002] Hot migration of virtual machines (VMs) is a very important operation and maintenance function in cloud computing. Hot migration refers to migrating a VM from one host to another host for operation, and the user business is unaware of the migration process (the VM does not need to be stopped). The principle of hot migration is to dynamically copy the running memory and device status of the VM to another host, so that the VM can run normally on the other host.

[0003] During the hot migration process, one or more migration threads will be started to continuously copy the VM's memory data to the destination host. Therefore, extra CPU resources will be used to run the migration threads during the hot migration process. Currently, with the emergence of DPU technology, the host does not need to reserve additional CPU resources, and all CPUs on the host will be allocated to the VM.

[0004] The inventors have discovered that the prior art has at least the following technical problems: when all CPUs on the host are allocated to VMs, from the perspective of the host, all VMs are 100% in operation. If a hot migration operation is performed on the VM at this time, the migration thread can only seize the CPU resources of the VM, thereby causing the performance of the VM to deteriorate. Summary of the invention

[0005] The embodiments of the present disclosure provide a method and device for hot migration of a virtual machine, which can prevent the migration thread from affecting the performance of the virtual machine.

[0006] In a first aspect, an embodiment of the present disclosure provides a method for hot migration of a virtual machine, comprising:

[0007] In response to a hot migration operation for a virtual machine on a client side, adjusting an interception switch for intercepting a sleep instruction to an on state, wherein the sleep instruction is used to switch a virtual central processing unit (VCPU) thread running in the virtual machine on the client side to a sleep state;

[0008] If a sleep instruction for a target VCPU thread is received, the sleep instruction is intercepted; wherein the target VCPU thread is any one of the multiple VCPU threads running in the virtual machine;

[0009] The target VCPU thread is exited from the client side to the host side, the target VCPU thread is switched to a dormant state on the host side, and the hot migration thread is controlled by the scheduler on the host side to occupy the CPU resources of the target VCPU thread to perform hot migration of the virtual machine.

[0010] In a second aspect, an embodiment of the present disclosure provides a hot migration device for a virtual machine, including:

[0011] An adjustment unit, configured to adjust an interception switch for intercepting a sleep instruction to an on state in response to a hot migration operation for a virtual machine on a client side, wherein the sleep instruction is configured to switch a virtual central processing unit (VCPU) thread running in the virtual machine on the client side to a sleep state;

[0012] An interception unit, configured to intercept a sleep instruction for a target VCPU thread if a sleep instruction for the target VCPU thread is received; wherein the target VCPU thread is any one of the multiple VCPU threads running in the virtual machine;

[0013] The hot migration unit is used to exit the target VCPU thread from the client side to the host side, switch the target VCPU thread to a sleep state on the host side, and control the hot migration thread to occupy the CPU resources of the target VCPU thread through the scheduler on the host side to perform hot migration of the virtual machine.

[0014] In a third aspect, an embodiment of the present disclosure provides an electronic device, including: a processor and a memory;

[0015] The memory stores computer-executable instructions;

[0016] The processor executes the computer-executable instructions stored in the memory, so that the at least one processor executes the hot migration method of the virtual machine as described in the first aspect and various possible designs of the first aspect.

[0017] In a fourth aspect, an embodiment of the present disclosure provides a computer-readable storage medium, in which computer execution instructions are stored. When a processor executes the computer execution instructions, the hot migration method of the virtual machine described in the first aspect and various possible designs of the first aspect is implemented.

[0018] In a fifth aspect, an embodiment of the present disclosure provides a computer program product, including a computer program, which, when executed by a processor, implements the hot migration method of a virtual machine as described in the first aspect and various possible designs of the first aspect.

[0019] The hot migration method and device of a virtual machine provided in this embodiment include: in response to the hot migration operation of the virtual machine on the client side, adjusting the interception switch for intercepting the sleep instruction to the on state, the sleep instruction is used to switch the virtual central processing unit VCPU thread running in the virtual machine to the sleep state on the client side; if the sleep instruction for the target VCPU thread is received, the sleep instruction is intercepted; wherein the target VCPU thread is any one of the multiple VCPU threads running in the virtual machine; the target VCPU thread is exited from the client side to the host side, the target VCPU thread is switched to the sleep state on the host side, and the hot migration thread is controlled by the scheduler on the host side to occupy the CPU resources of the target VCPU thread to perform the hot migration of the virtual machine. In this technical scheme, when the hot migration operation is performed on the virtual machine, the sleep instruction is intercepted by the interception switch, and the idle target VCPU thread is exited from the client side to the host side, and the target VCPU thread is switched to the sleep state on the host side, freeing up the CPU resources of the target VCPU thread for hot migration of the virtual machine, thereby avoiding the hot migration thread from preempting the CPU resources of the VCPU thread of the virtual machine, thereby improving the performance of the virtual machine. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the embodiments of the present disclosure or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0021] Figure 1 The process of the hot migration method of the virtual machine provided in the embodiment of the present disclosure is Figure 1 ;

[0022] Figure 2 The process of the hot migration method of the virtual machine provided in the embodiment of the present disclosure is Figure 2 ;

[0023] Figure 3 Schematic diagram of a hot migration method for a virtual machine provided in an embodiment of the present disclosure Figure 1 ;

[0024] Figure 4 Schematic diagram of a hot migration method for a virtual machine provided in an embodiment of the present disclosure Figure 2 ;

[0025] Figure 5 A schematic diagram of the structure of a hot migration device for a virtual machine provided in an embodiment of the present disclosure;

[0026] Figure 6A schematic diagram of the structure of an electronic device provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0027] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution in the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0028] Hot migration of virtual machines (VMs) is a very important operation and maintenance function in cloud computing. Hot migration refers to migrating a VM from one host to another host for operation, and the user business is unaware of the migration process (the VM does not need to be stopped). The principle of hot migration is to dynamically copy the running memory and device status of the VM to another host, so that the VM can run normally on the other host.

[0029] During the hot migration process, one or more migration threads will be started to continuously copy the VM's memory data to the destination host. Therefore, extra CPU resources will be used to run the migration threads during the hot migration process. Currently, with the emergence of DPU technology, the host does not need to reserve additional CPU resources, and all CPUs on the host will be allocated to the VM.

[0030] The inventors have discovered that the prior art has at least the following technical problems: when all CPUs on the host are allocated to VMs, from the perspective of the host, all VMs are 100% in operation. If a hot migration operation is performed on the VM at this time, the migration thread can only seize the CPU resources of the VM, thereby causing the performance of the VM to deteriorate.

[0031] It should be noted that when the host is in an idle state (no load), the host can execute the HLT instruction or the MWAIT instruction to put the host's CPU in a low-power state. When there is a task to be executed, the CPU will be awakened to execute the task program. In the virtualization scenario, the VM also has an idle state. At this time, the VM can execute the HLT instruction or the MWAIT instruction to put the VCPU in the VM in a low-power state. In addition, in order to improve the performance of the VM, the VM is allowed to execute the HLT / MWAIT instruction without exiting, so that the VM overhead is relatively low. In this case, regardless of whether the VM is in an idle state, the VM's VCPU thread is always in a running state from the host side, so the VCPU thread will occupy 100% of the CPU to run.

[0032] In view of the technical problems in the prior art, the inventor's technical conception is as follows: an interception switch for intercepting sleep instructions is configured in the virtual machine in advance. When there is a hot migration thread, the interception switch is turned on, and the sleep instruction is intercepted by the interception switch. The idle target VCPU thread is withdrawn from the client side (i.e., the Guest side) to the host side (i.e., the Host side), and the target VCPU thread is switched to a sleep state on the Host side, thereby freeing up the CPU resources of the target VCPU thread for hot migration of the virtual machine.

[0033] Accordingly, the specific steps may include: first, in response to the hot migration operation of the virtual machine on the client side, the interception switch for intercepting the sleep instruction is adjusted to the on state, and the sleep instruction is used to switch the virtual central processing unit VCPU thread running in the virtual machine to the sleep state on the client side. Then, if a sleep instruction for the target VCPU thread is received, the sleep instruction is intercepted; wherein the target VCPU thread is any one of the multiple VCPU threads running in the virtual machine; the target VCPU thread is exited from the client side to the host side, and the target VCPU thread is switched to the sleep state on the host side to give up the CPU resources of the target VCPU thread. Finally, the hot migration thread is started through the scheduler on the host side, and the CPU resources given up by the target VCPU thread are used to hot migrate the virtual machine through the hot migration thread.

[0034] In this technical solution, when a virtual machine is hot migrated, the sleep instruction is intercepted by an interception switch, and the idle target VCPU thread is withdrawn from the client side to the host side, and the target VCPU thread is switched to a sleep state on the host side, freeing up the CPU resources of the target VCPU thread for hot migration of the virtual machine. Therefore, the hot migration thread is prevented from preempting the CPU resources of the VCPU thread of the virtual machine, thereby improving the performance of the virtual machine.

[0035] The following is a specific implementation process of the hot migration method and device of the virtual machine involved in the embodiment of the present disclosure, and some examples are only for example and not for limitation. The execution subject of the hot migration method of the virtual machine involved in the embodiment of the present disclosure is an electronic device, which can be a terminal, a server, etc.

[0036] Figure 1 A schematic diagram of a hot migration method for a virtual machine provided in an embodiment of the present disclosure Figure 1 ,like Figure 1 As shown, the hot migration method of the virtual machine may include:

[0037] S101. In response to a hot migration operation for a virtual machine on a client side, an interception switch for intercepting a sleep instruction is adjusted to an on state, where the sleep instruction is used to switch a virtual central processing unit (VCPU) thread running in the virtual machine to a sleep state on the client side.

[0038] In the embodiment of the present disclosure, an interception switch may be configured in the virtual machine. When the interception switch is turned on, the sleep instruction may be intercepted. When the interception switch is turned off, the sleep instruction will not be intercepted.

[0039] The sleep instructions include HLT (processor halt) sleep instructions and MWAIT (processor wait) sleep instructions.

[0040] First, let's introduce the functions of the HLT sleep instruction and the MWAIT sleep instruction. These sleep instructions are used when the virtual machine is in the idle state. By executing these sleep instructions, the VCPU thread of the virtual machine is in an idle state (or enters a low power state). These sleep instructions can be called by the idle process (the corresponding process in the Linux system is the swapper process). Generally speaking, if the Linux system supports the MWAIT sleep instruction, the idle process will execute the MWAIT sleep instruction by default to enter the idle state, otherwise the HLT sleep instruction will be used to enter the idle state.

[0041] Secondly, there are some differences in the use of HLT sleep instruction and MWAIT sleep instruction. HLT sleep instruction will only make VCPU thread enter C1 state, while MWAIT instruction will make VCPU thread enter deeper Cx (C2 to C6) state. The way to wake up the idle process is also different. Among them, HLT sleep instruction can only wake up VCPU thread in idle state through interruption, while MWAIT instruction can wake up VCPU thread in idle state through interruption, and can also wake up VCPU thread in idle state by writing to the memory monitored by monitor.

[0042] Among them, waking up the VCPU thread in the idle state by writing the memory monitored by the monitor can reduce one interruption. This is also the reason why the idle process executes the MWAIT sleep instruction by default to enter the idle state.

[0043] S102: If a sleep instruction for a target VCPU thread is received, the sleep instruction is intercepted; wherein the target VCPU thread is any VCPU thread among a plurality of VCPU threads running in the virtual machine.

[0044] In the embodiment of the present disclosure, the HLT sleep instruction and the MWAIT sleep instruction may be intercepted by turning on the interception switch.

[0045] S103, exit the target VCPU thread from the client side to the host side, switch the target VCPU thread to a sleep state on the host side, and control the hot migration thread to occupy the CPU resources of the target VCPU thread to perform hot migration of the virtual machine through the scheduler on the host side.

[0046] In the disclosed embodiment, the target VCPU thread is exited from the client side to the host side in order to switch the target VCPU thread to a sleep state on the host side, thereby releasing the CPU resources of the target VCPU thread for hot migration of the virtual machine.

[0047] In the disclosed embodiment, a hot migration thread is started by a scheduler on the host side. The hot migration thread runs on the host side and uses the CPU resources waived by the target VCPU thread.

[0048] The embodiment of the present disclosure provides a method for hot migration of a virtual machine: in response to a hot migration operation of a virtual machine on a client side, an interception switch for intercepting a sleep instruction is adjusted to an on state, and the sleep instruction is used to switch a virtual central processing unit VCPU thread running in the virtual machine to a sleep state on the client side; if a sleep instruction for a target VCPU thread is received, the sleep instruction is intercepted; wherein the target VCPU thread is any one of a plurality of VCPU threads running in the virtual machine; the target VCPU thread is exited from the client side to the host side, the target VCPU thread is switched to a sleep state on the host side, and the hot migration thread is controlled by a scheduler on the host side to occupy the CPU resources of the target VCPU thread to perform hot migration of the virtual machine. In the technical scheme, when a hot migration operation is performed on the virtual machine, the sleep instruction is intercepted by the interception switch, and the idle target VCPU thread is exited from the client side to the host side, and the target VCPU thread is switched to a sleep state on the host side, freeing up the CPU resources of the target VCPU thread for hot migration of the virtual machine, thereby avoiding the hot migration thread from preempting the CPU resources of the VCPU thread of the virtual machine, thereby improving the performance of the virtual machine.

[0049] Furthermore, when the VCPU thread has a task to execute, it is necessary to wake up the VCPU thread and return the VCPU thread from the host side to the client side to execute the task. The main idea of ​​the solution of the present invention is: when the VM performs hot migration, it is only necessary to let the VCPU in the idle state actively give up the CPU resources for the migration thread to run. When the VCPU thread needs to run, it can preempt the migration thread. In this way, in the full sales scenario, the migration thread will not preempt the VCPU thread for CPU resources, thereby ensuring that the performance of the VM is not affected.

[0050] The key point to be solved in this solution is: How to make the VCPU thread actively give up CPU resources in the idle state while ensuring the normal function of the VM?

[0051] Because the HLT sleep instruction and the MWAIT sleep instruction have different ways of waking up the idle process. Among them, the HLT sleep instruction can only wake up the VCPU thread in the idle state through an interrupt, while the MWAIT instruction can wake up the VCPU thread in the idle state through an interrupt, and can also wake up the VCPU thread in the idle state by writing the memory monitored by the monitor. Therefore. Two different solutions are provided for the Guest to use the two different instructions HLT / MWAIT.

[0052] The first solution: When the Guest uses the HLT instruction to idle, this situation is easier to handle. Just set the HLT instruction to be intercepted before the migration starts. In this way, when the Guest is in the idle state, executing the HLT instruction will exit to the host side. At this time, the VCPU thread on the host side is set to the sleep state, and the host scheduler will schedule the migration thread for execution. When the Guest changes from the idle state to the running state, an interrupt will be sent to the corresponding VCPU thread. At this time, the host scheduler will wake up the VCPU thread in the sleep state and directly preempt the running migration thread.

[0053] The second solution: When using the MWAIT instruction for the Guest, the MWAIT instruction is also intercepted before migration to allow the VCPU thread to exit to the host side. If the VCPU thread is awakened by an interrupt, the implementation idea is the same as HLT.

[0054] However, when the VCPU thread in the idle state is awakened by writing to the memory monitored by the monitor, the host side cannot perceive it. Therefore, there is no way to wake up the VCPU thread on the host side, which causes the VCPU thread to fail to run normally as expected.

[0055] In view of this difficulty, the solution of the present invention is as follows: when the VCPU thread executes the MWAIT instruction to exit to the host side to give up CPU resources, a timer is created at this time, and the expiration time of the timer can be set to a fixed time (for example: 1ms, 2ms, 4ms, etc.). In this way, when the timer expires, a timer interrupt will be sent to the VCPU thread, and the VCPU thread will be awakened by the timer interrupt. After that, the VCPU thread can enter the Guest mode from the host side.

[0056] Figure 2 A schematic diagram of a hot migration method for a virtual machine provided in an embodiment of the present disclosure Figure 2 In the embodiment of the present disclosure, the MWAIT sleep instruction is taken as an example to illustrate the method of waking up the VCPU thread through a timer interrupt. Figure 2 As shown, the hot migration method of the virtual machine may also include:

[0057] S201. Create a timer corresponding to the target VCPU thread and set the timer's expiration time.

[0058] In the embodiment of the present disclosure, when the target VCPU thread executes the MWAIT instruction to exit to the host side to give up CPU resources, a timer is created. The timer expiration time of the timer can be set to a fixed time. For example: 1ms, 2ms, 4ms, etc. In the embodiment of the present disclosure, the value of the timer expiration time is not specifically limited and can be set and modified as needed.

[0059] For example, Figure 3 As shown, when the MWAIT instruction is received, the target VCPU thread exits from the Guest mode to the host side. At this time, a timer is created and started. The timer can be an hrtimer (high-precision timer).

[0060] S202: In response to the current time reaching the timing expiration time of the timer, an interrupt instruction is sent to the target VCPU thread through the timer.

[0061] For example, Figure 4 As shown, the timing expiration time is 1 ms or 4 ms. In response to the current time reaching the timing expiration time (1 ms or 4 ms) of the timer, an interrupt instruction is sent to the target VCPU thread through the timer.

[0062] S203. Stop the hot migration thread through the scheduler on the host side, and switch the target VCPU thread in the dormant state to the working state through an interrupt instruction, and return the target VCPU thread from the host side to the client side.

[0063] In the disclosed embodiment, the target VCPU thread in the dormant state can be awakened by an interrupt instruction, and the running migration thread is directly preempted by the scheduler on the host side (that is, the hot migration thread is stopped by the scheduler on the host side). At this time, the target VCPU thread enters the guest mode from the host side.

[0064] For example, Figure 3 As shown, after an interrupt instruction is sent to a target VCPU thread through a timer, the timer corresponding to the target VCPU thread may be canceled or deleted.

[0065] In the disclosed embodiment, since an interrupt instruction is sent to the target VCPU thread through a timer, the target VCPU thread can be awakened, allowing the target VCPU thread to enter the Guest mode from the host side, thereby avoiding the technical problem that the host side cannot perceive the inability to wake up the target VCPU thread when the VCPU thread in the idle state is awakened by writing to the memory monitored by the monitor.

[0066] Furthermore, after waking up the target VCPU thread through the timer, if the target VCPU thread may have a task to be processed, it may not have a task. Accordingly, after returning the target VCPU thread from the host side to the client side, the method further includes: determining whether the target VCPU thread has a task to be executed; if so, executing the task through the target VCPU thread; if not, sending an MWAIT sleep instruction to the target VCPU thread.

[0067] For example, Figure 3 As shown, through the do-idle instruction, it is determined whether the target VCPU thread needs to execute the task. If not, the MWAIT sleep instruction is sent to the target VCPU thread. At this time, continue to execute steps 102 to 104.

[0068] In the disclosed embodiment, when the target VCPU thread does not need to execute a task, the CPU resources of the target VCPU thread can be released again, thereby improving the processing efficiency of the hot migration thread.

[0069] Further, if it is determined that the target VCPU thread needs to execute a task, it can be determined whether to suspend the target VCPU thread through the scheduler on the host side according to the time of executing the task, so as to avoid the hot migration thread having no available CPU resources for a long time. The following two situations are used to illustrate the situation where tasks need to be executed.

[0070] In the first case, if the task is completed by executing the target VCPU thread and the execution time is less than the first preset time, an MWAIT sleep instruction is sent to the target VCPU thread.

[0071] In the embodiment of the present disclosure, there is no specific limitation on the value of the first preset duration, and it can be set and modified as needed.

[0072] For example, Figure 4 As shown, the first preset duration is 13ms. If the task is completed by the target VCPU thread and the execution duration is 5ms, which is less than 13ms, then the MWAIT sleep instruction is sent to the target VCPU thread to release the CPU resources for the migration thread to use again.

[0073] In the second case, if the target VCPU thread has not completed the task, but the execution time has reached the first preset time, the host-side scheduler will suspend the target VCPU thread and start the hot migration thread. If the hot migration task has not been completed by the hot migration thread, but the execution time has reached the second preset time, the host-side scheduler will suspend the hot migration thread and start the target VCPU thread; the host-side scheduler will alternately suspend the hot migration thread and the target VCPU thread until the hot migration thread or the target VCPU thread completes the task.

[0074] In the embodiment of the present disclosure, the value of the second preset time length is not specifically limited and can be set and modified as needed.

[0075] For example, Figure 4 As shown, the first preset duration is 13ms and the second preset duration is 13ms. If the task is not completed by the target VCPU thread, but the execution duration reaches 13ms, then the target VCPU thread is paused by the scheduler on the host side and the hot migration thread is started.

[0076] If the hot migration thread has not completed the hot migration task, but the execution time reaches 13ms, then the hot migration thread is suspended through the scheduler on the host side, and the target VCPU thread is started.

[0077] The hot migration thread and the target VCPU thread are alternately suspended by the scheduler on the host side until one of the threads ends.

[0078] In the disclosed embodiment, the CPU utilization rate of the migration thread = 100% - the actual utilization rate of the VCPU. Thus, during the low-peak period of the VCPU thread's business (i.e., the CPU utilization rate is not high), the migration thread can make full use of the idle CPU resources of the VCPU thread, thereby improving the VM migration efficiency and causing almost no noticeable jitter to the VM's performance during the VM migration process.

[0079] Further, such as Figure 3As shown, the sleep instruction is a processor pause HLT sleep instruction or a MWAIT sleep instruction; at this time, an interrupt instruction can be sent to the target VCPU thread through the output memory management unit IOMMU or other VCPU threads can send an interrupt instruction to the target VCPU thread to wake up the target VCPU thread. Accordingly, the method also includes:

[0080] If an IOMMU (I / O Memory Management Unit) sends an interrupt instruction to the target VCPU thread or other VCPU threads send an interrupt instruction to the target VCPU thread, the hot migration thread is stopped through the scheduler on the host side; the target VCPU thread in the dormant state is switched to the working state through the interrupt instruction, and the target VCPU thread is returned from the host side to the client side.

[0081] The interrupt instruction sent to the target VCPU thread through other VCPU threads may be an IPI (Inter-Processor Interrupt).

[0082] It should be noted that in the embodiment of the present disclosure, when the hot migration is completed, the interception switch can be turned off. At this time, the interception switch does not intercept the sleep instruction, and the VCPU thread does not exit to the host side, but directly switches the VCPU thread running in the virtual machine to a sleep state on the client side.

[0083] Accordingly, the method further includes: in response to completion of hot migration of the virtual machine through the hot migration thread, adjusting an interception switch for intercepting the sleep instruction to a closed state.

[0084] In the disclosed embodiment, the interception switch can be flexibly turned on or off according to the execution status of the hot migration thread, thereby controlling whether the VCPU thread frees up idle CPU resources.

[0085] Figure 5 A schematic diagram of the structure of a hot migration device for a virtual machine provided in an embodiment of the present disclosure, such as Figure 5 As shown, the hot migration device of the virtual machine includes:

[0086] An adjustment unit 501 is used to adjust an interception switch for intercepting a sleep instruction to an on state in response to a hot migration operation for a virtual machine on a client side, wherein the sleep instruction is used to switch a virtual central processing unit VCPU thread running in the virtual machine on the client side to a sleep state;

[0087] The interception unit 502 is configured to intercept the sleep instruction for the target VCPU thread if a sleep instruction for the target VCPU thread is received; wherein the target VCPU thread is any one of the multiple VCPU threads running in the virtual machine;

[0088] The switching unit 503 is used to exit the target VCPU thread from the client side to the host side, switch the target VCPU thread to a sleep state on the host side, and control the hot migration thread to occupy the CPU resources of the target VCPU thread through the scheduler on the host side to perform hot migration of the virtual machine.

[0089] According to one or more embodiments of the present disclosure, the sleep instruction is a processor waiting for an MWAIT sleep instruction; the device also includes: a switching unit, the switching unit is used to create a timer corresponding to the target VCPU thread and set a timer expiration time of the timer; in response to the current time reaching the timer expiration time of the timer, an interrupt instruction is sent to the target VCPU thread through the timer; the hot migration thread is stopped through the scheduler on the host side, and the target VCPU thread in the sleep state is switched to the working state through the interrupt instruction, and the target VCPU thread is returned from the host side to the client side.

[0090] According to one or more embodiments of the present disclosure, the device also includes: a determination unit, which is used to determine whether the target VCPU thread has a task that needs to be executed; if so, execute the task through the target VCPU thread; if not, send an MWAIT sleep instruction to the target VCPU thread.

[0091] According to one or more embodiments of the present disclosure, the device also includes: a scheduling unit, the scheduling unit being used to send an MWAIT sleep instruction to the target VCPU thread if the task is completed through the target VCPU thread and the execution time is less than a first preset time; or, if the task is not completed through the target VCPU thread, but the execution time reaches the first preset time, pausing the target VCPU thread through the scheduler on the host side and starting the hot migration thread; if the hot migration task is not completed through the hot migration thread, but the execution time reaches a second preset time, pausing the hot migration thread through the scheduler on the host side and starting the target VCPU thread; alternately pausing the hot migration thread and the target VCPU thread through the scheduler on the host side until the task execution of the hot migration thread is completed or the task execution of the target VCPU thread is completed.

[0092] According to one or more embodiments of the present disclosure, the sleep instruction is a processor pause HLT sleep instruction or an MWAIT sleep instruction; the device also includes: a switching unit, the switching unit is used to stop the hot migration thread through the scheduler on the host side if it receives an interrupt instruction sent by the input-output memory management unit IOMMU to the target VCPU thread or other VCPU threads send an interrupt instruction to the target VCPU thread; the target VCPU thread in the sleep state is switched to the working state through the interrupt instruction, and the target VCPU thread is returned from the host side to the client side.

[0093] According to one or more embodiments of the present disclosure, the device further includes: an adjustment unit, configured to adjust an interception switch for intercepting sleep instructions to a closed state in response to completion of hot migration of the virtual machine by the hot migration thread.

[0094] refer to Figure 6 , which shows a schematic diagram of the structure of an electronic device 600 suitable for implementing the embodiment of the present disclosure, and the electronic device 600 may be a terminal device or a server. The terminal device may include but is not limited to mobile terminals such as mobile phones, laptop computers, digital broadcast receivers, personal digital assistants (PDAs), tablet computers (Portable Android Devices, PADs), portable multimedia players (PMPs), vehicle terminals (such as vehicle navigation terminals), etc., and fixed terminals such as digital TVs, desktop computers, etc. Figure 6 The electronic device shown is only an example and should not bring any limitation to the functions and scope of use of the embodiments of the present disclosure.

[0095] like Figure 6 As shown, the electronic device 600 may include a processing device (e.g., a central processing unit, a graphics processing unit, etc.) 601, which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 602 or a program loaded from a storage device 608 to a random access memory (RAM) 603. Various programs and data required for the operation of the electronic device 600 are also stored in the RAM 603. The processing device 601, the ROM 602, and the RAM 603 are connected to each other via a bus 604. An input / output (I / O) interface 605 is also connected to the bus 604.

[0096] Typically, the following devices may be connected to the I / O interface 605: input devices 606 including, for example, a touch screen, a touch pad, a keyboard, a mouse, a camera, a microphone, an accelerometer, a gyroscope, etc.; output devices 607 including, for example, a liquid crystal display (LCD), a speaker, a vibrator, etc.; storage devices 608 including, for example, a magnetic tape, a hard disk, etc.; and communication devices 609. The communication device 609 may allow the electronic device 600 to communicate with other devices wirelessly or by wire to exchange data. Although Figure 6 The electronic device 600 is shown with various devices, but it should be understood that it is not required to implement or possess all the devices shown. More or fewer devices may be implemented or possessed instead.

[0097] In particular, according to an embodiment of the present disclosure, the process described above with reference to the flowchart can be implemented as a computer software program. For example, an embodiment of the present disclosure includes a computer program product, which includes a computer program carried on a computer-readable medium, and the computer program contains program code for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from a network through a communication device 609, or installed from a storage device 608, or installed from a ROM 602. When the computer program is executed by the processing device 601, the above-mentioned functions defined in the method of the embodiment of the present disclosure are executed.

[0098] It should be noted that the computer-readable medium disclosed above may be a computer-readable signal medium or a computer-readable storage medium or any combination of the above two. The computer-readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or device, or any combination of the above. More specific examples of computer-readable storage media may include, but are not limited to: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In the present disclosure, a computer-readable storage medium may be any tangible medium containing or storing a program that may be used by or in combination with an instruction execution system, device or device. In the present disclosure, a computer-readable signal medium may include a data signal propagated in a baseband or as part of a carrier wave, in which a computer-readable program code is carried. This propagated data signal may take a variety of forms, including but not limited to an electromagnetic signal, an optical signal, or any suitable combination of the above. The computer readable signal medium may also be any computer readable medium other than a computer readable storage medium, which may send, propagate or transmit a program for use by or in conjunction with an instruction execution system, apparatus or device. The program code contained on the computer readable medium may be transmitted using any suitable medium, including but not limited to: wires, optical cables, RF (radio frequency), etc., or any suitable combination of the above.

[0099] The computer-readable medium may be included in the electronic device, or may exist independently without being incorporated into the electronic device.

[0100] The computer-readable medium carries one or more programs. When the one or more programs are executed by the electronic device, the electronic device executes the method shown in the above embodiment.

[0101] Computer program code for performing the operations of the present disclosure may be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages, such as Java, Smalltalk, C++, and conventional procedural programming languages, such as "C" or similar programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer, as an independent software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0102] The flow chart and block diagram in the accompanying drawings illustrate the possible architecture, function and operation of the system, method and computer program product according to various embodiments of the present disclosure. In this regard, each square box in the flow chart or block diagram can represent a module, a program segment or a part of a code, and the module, the program segment or a part of the code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some implementations as replacements, the functions marked in the square box can also occur in a sequence different from that marked in the accompanying drawings. For example, two square boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each square box in the block diagram and / or flow chart, and the combination of the square boxes in the block diagram and / or flow chart can be implemented with a dedicated hardware-based system that performs a specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0103] The units involved in the embodiments described in the present disclosure may be implemented by software or hardware. The name of a unit does not limit the unit itself in some cases. For example, the first acquisition unit may also be described as a "unit for acquiring at least two Internet Protocol addresses".

[0104] The functions described above herein may be performed at least in part by one or more hardware logic components. For example, without limitation, exemplary types of hardware logic components that may be used include: field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chips (SOCs), complex programmable logic devices (CPLDs), and the like.

[0105] In the context of the present disclosure, a machine-readable medium may be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, device, or equipment. A machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, device, or equipment, or any suitable combination of the foregoing. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0106] In a first aspect, according to one or more embodiments of the present disclosure, a method for hot migration of a virtual machine is provided, comprising:

[0107] In response to a hot migration operation for a virtual machine on a client side, adjusting an interception switch for intercepting a sleep instruction to an on state, wherein the sleep instruction is used to switch a virtual central processing unit (VCPU) thread running in the virtual machine on the client side to a sleep state;

[0108] If a sleep instruction for a target VCPU thread is received, the sleep instruction is intercepted; wherein the target VCPU thread is any one of the multiple VCPU threads running in the virtual machine;

[0109] The target VCPU thread is exited from the client side to the host side, the target VCPU thread is switched to a dormant state on the host side, and the hot migration thread is controlled by the scheduler on the host side to occupy the CPU resources of the target VCPU thread to perform hot migration of the virtual machine.

[0110] According to one or more embodiments of the present disclosure, the sleep instruction is a processor waiting for an MWAIT sleep instruction; the method also includes: creating a timer corresponding to the target VCPU thread and setting a timer expiration time of the timer; in response to the current time reaching the timer expiration time of the timer, sending an interrupt instruction to the target VCPU thread through the timer; stopping the hot migration thread through the scheduler on the host side, and switching the target VCPU thread in a sleep state to a working state through the interrupt instruction, and returning the target VCPU thread from the host side to the client side.

[0111] According to one or more embodiments of the present disclosure, after returning the target VCPU thread from the host side to the client side, the method further includes: determining whether the target VCPU thread has a task that needs to be executed; if so, executing the task through the target VCPU thread; if not, sending an MWAIT sleep instruction to the target VCPU thread.

[0112] According to one or more embodiments of the present disclosure, the method also includes: if the task is completed through the target VCPU thread and the execution time is less than a first preset time, sending an MWAIT sleep instruction to the target VCPU thread; or, if the task is not completed through the target VCPU thread, but the execution time reaches the first preset time, pausing the target VCPU thread through the scheduler on the host side, and starting the hot migration thread; if the hot migration task is not completed through the hot migration thread, but the execution time reaches a second preset time, pausing the hot migration thread through the scheduler on the host side, and starting the target VCPU thread; alternately pausing the hot migration thread and the target VCPU thread through the scheduler on the host side until the task execution of the hot migration thread is completed or the task execution of the target VCPU thread is completed.

[0113] According to one or more embodiments of the present disclosure, the sleep instruction is a processor pause HLT sleep instruction or an MWAIT sleep instruction; the method also includes: if an input-output memory management unit IOMMU sends an interrupt instruction to the target VCPU thread or other VCPU threads send an interrupt instruction to the target VCPU thread, the hot migration thread is stopped by the scheduler on the host side; the target VCPU thread in the sleep state is switched to the working state through the interrupt instruction, and the target VCPU thread is returned from the host side to the client side.

[0114] According to one or more embodiments of the present disclosure, the method further includes: in response to completion of hot migration of the virtual machine by the hot migration thread, adjusting an interception switch for intercepting sleep instructions to a closed state.

[0115] In a second aspect, according to one or more embodiments of the present disclosure, a hot migration device for a virtual machine is provided, comprising:

[0116] An adjustment unit, configured to adjust an interception switch for intercepting a sleep instruction to an on state in response to a hot migration operation for a virtual machine on a client side, wherein the sleep instruction is configured to switch a virtual central processing unit (VCPU) thread running in the virtual machine on the client side to a sleep state;

[0117] An interception unit, configured to intercept a sleep instruction for a target VCPU thread if a sleep instruction for the target VCPU thread is received; wherein the target VCPU thread is any one of the multiple VCPU threads running in the virtual machine;

[0118] The hot migration unit is used to exit the target VCPU thread from the client side to the host side, switch the target VCPU thread to a sleep state on the host side, and control the hot migration thread to occupy the CPU resources of the target VCPU thread through the scheduler on the host side to perform hot migration of the virtual machine.

[0119] According to one or more embodiments of the present disclosure, the sleep instruction is a processor waiting for an MWAIT sleep instruction; the device also includes: a switching unit, the switching unit is used to create a timer corresponding to the target VCPU thread and set a timer expiration time of the timer; in response to the current time reaching the timer expiration time of the timer, an interrupt instruction is sent to the target VCPU thread through the timer; the hot migration thread is stopped through the scheduler on the host side, and the target VCPU thread in the sleep state is switched to the working state through the interrupt instruction, and the target VCPU thread is returned from the host side to the client side.

[0120] According to one or more embodiments of the present disclosure, the device also includes: a determination unit, which is used to determine whether the target VCPU thread has a task that needs to be executed; if so, execute the task through the target VCPU thread; if not, send an MWAIT sleep instruction to the target VCPU thread.

[0121] According to one or more embodiments of the present disclosure, the device also includes: a scheduling unit, the scheduling unit being used to send an MWAIT sleep instruction to the target VCPU thread if the task is completed through the target VCPU thread and the execution time is less than a first preset time; or, if the task is not completed through the target VCPU thread, but the execution time reaches the first preset time, pausing the target VCPU thread through the scheduler on the host side and starting the hot migration thread; if the hot migration task is not completed through the hot migration thread, but the execution time reaches a second preset time, pausing the hot migration thread through the scheduler on the host side and starting the target VCPU thread; alternately pausing the hot migration thread and the target VCPU thread through the scheduler on the host side until the task execution of the hot migration thread is completed or the task execution of the target VCPU thread is completed.

[0122] According to one or more embodiments of the present disclosure, the sleep instruction is a processor pause HLT sleep instruction or an MWAIT sleep instruction; the device also includes: a switching unit, the switching unit is used to stop the hot migration thread through the scheduler on the host side if it receives an interrupt instruction sent by the input-output memory management unit IOMMU to the target VCPU thread or other VCPU threads send an interrupt instruction to the target VCPU thread; the target VCPU thread in the sleep state is switched to the working state through the interrupt instruction, and the target VCPU thread is returned from the host side to the client side.

[0123] According to one or more embodiments of the present disclosure, the device further includes: an adjustment unit, configured to adjust an interception switch for intercepting sleep instructions to a closed state in response to completion of hot migration of the virtual machine by the hot migration thread.

[0124] In a third aspect, according to one or more embodiments of the present disclosure, there is provided an electronic device, comprising: at least one processor and a memory;

[0125] The memory stores computer-executable instructions;

[0126] The at least one processor executes the computer-executable instructions stored in the memory, so that the at least one processor executes the hot migration method of the virtual machine as described in the first aspect and various possible designs of the first aspect.

[0127] In a fourth aspect, according to one or more embodiments of the present disclosure, a computer-readable storage medium is provided, wherein the computer-readable storage medium stores computer execution instructions. When a processor executes the computer execution instructions, the hot migration method of the virtual machine described in the first aspect and various possible designs of the first aspect is implemented.

[0128] In a fifth aspect, according to one or more embodiments of the present disclosure, a computer program product is provided, including a computer program, wherein when the computer program is executed by a processor, the hot migration method of the virtual machine described in the first aspect and various possible designs of the first aspect is implemented.

[0129] The above description is only a preferred embodiment of the present disclosure and an explanation of the technical principles used. Those skilled in the art should understand that the scope of disclosure involved in the present disclosure is not limited to the technical solutions formed by a specific combination of the above technical features, but should also cover other technical solutions formed by any combination of the above technical features or their equivalent features without departing from the above disclosed concept. For example, the above features are replaced with the technical features with similar functions disclosed in the present disclosure (but not limited to) by each other to form a technical solution.

[0130] In addition, although each operation is described in a specific order, this should not be understood as requiring these operations to be performed in the specific order shown or in a sequential order. Under certain circumstances, multitasking and parallel processing may be advantageous. Similarly, although some specific implementation details are included in the above discussion, these should not be interpreted as limiting the scope of the present disclosure. Some features described in the context of a separate embodiment can also be implemented in a single embodiment in combination. On the contrary, the various features described in the context of a single embodiment can also be implemented in multiple embodiments individually or in any suitable sub-combination mode.

[0131] Although the subject matter has been described in language specific to structural features and / or methodological logical actions, it should be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or actions described above. On the contrary, the specific features and actions described above are merely example forms of implementing the claims.

Claims

1. A method for hot migration of a virtual machine, characterized in that: include: In response to a hot migration operation for a virtual machine on a client side, adjusting an interception switch for intercepting a sleep instruction to an on state, wherein the sleep instruction is used to switch a virtual central processing unit (VCPU) thread running in the virtual machine on the client side to a sleep state; If a sleep instruction for a target VCPU thread is received, the sleep instruction is intercepted; wherein the target VCPU thread is any one of the multiple VCPU threads running in the virtual machine; The target VCPU thread is exited from the client side to the host side, the target VCPU thread is switched to a dormant state on the host side, and the hot migration thread is controlled by the scheduler on the host side to occupy the CPU resources of the target VCPU thread to perform hot migration of the virtual machine.

2. The method according to claim 1, characterized in that The sleep instruction is a processor waiting for an MWAIT sleep instruction; the method further includes: Create a timer corresponding to the target VCPU thread and set the timer expiration time; In response to the current time reaching the timing expiration time of the timer, sending an interrupt instruction to the target VCPU thread through the timer; The hot migration thread is stopped by the scheduler on the host side, and the target VCPU thread in the dormant state is switched to the working state through the interrupt instruction, and the target VCPU thread is returned from the host side to the client side.

3. The method according to claim 2, characterized in that After returning the target VCPU thread from the host side to the client side, the method further includes: Determine whether the target VCPU thread has a task to be executed; If it exists, the task is executed through the target VCPU thread; if it does not exist, an MWAIT sleep instruction is sent to the target VCPU thread.

4. The method according to claim 3, characterized in that: The method further comprises: If the task is completed by the target VCPU thread and the execution time is less than the first preset time, sending an MWAIT sleep instruction to the target VCPU thread; or, If the task is not completed by the target VCPU thread, but the execution time reaches the first preset time, the target VCPU thread is suspended by the scheduler on the host side, and the hot migration thread is started; if the hot migration task is not completed by the hot migration thread, but the execution time reaches the second preset time, the hot migration thread is suspended by the scheduler on the host side, and the target VCPU thread is started; the hot migration thread and the target VCPU thread are alternately suspended by the scheduler on the host side until the task execution of the hot migration thread is completed or the task execution of the target VCPU thread is completed.

5. The method according to claim 1, characterized in that The sleep instruction is a processor pause HLT sleep instruction or a MWAIT sleep instruction; the method further includes: If an input / output memory management unit IOMMU sends an interrupt instruction to the target VCPU thread or another VCPU thread sends an interrupt instruction to the target VCPU thread, the hot migration thread is stopped by the scheduler on the host side; The target VCPU thread in the dormant state is switched to the working state through the interrupt instruction, and the target VCPU thread is returned from the host side to the client side.

6. The method according to any one of claims 1 to 5, characterized in that: The method further comprises: In response to completion of hot migration of the virtual machine through the hot migration thread, an interception switch for intercepting the sleep instruction is adjusted to a closed state.

7. A hot migration device for a virtual machine, characterized in that: include: An adjustment unit, configured to adjust an interception switch for intercepting a sleep instruction to an on state in response to a hot migration operation for a virtual machine on a client side, wherein the sleep instruction is configured to switch a virtual central processing unit (VCPU) thread running in the virtual machine on the client side to a sleep state; An interception unit, configured to intercept a sleep instruction for a target VCPU thread if a sleep instruction for the target VCPU thread is received; wherein the target VCPU thread is any one of the multiple VCPU threads running in the virtual machine; The hot migration unit is used to exit the target VCPU thread from the client side to the host side, switch the target VCPU thread to a sleep state on the host side, and control the hot migration thread to occupy the CPU resources of the target VCPU thread through the scheduler on the host side to perform hot migration of the virtual machine.

8. An electronic device, characterized in that: include: Processor and memory; The memory stores computer-executable instructions; The processor executes the computer-executable instructions stored in the memory, so that the processor executes the hot migration method of the virtual machine according to any one of claims 1 to 6.

9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer-executable instructions, and when the processor executes the computer-executable instructions, the hot migration method of the virtual machine according to any one of claims 1 to 6 is implemented.

10. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the hot migration method of a virtual machine as claimed in any one of claims 1 to 6 is implemented.

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