A gallium-aluminum-arsenic epitaxial alloy and its preparation method

By using gallium-arsenyl epitaxial alloy and its high-density oxide layer structure in infrared chips, the complex problems of electrical parameters and preparation processes of traditional infrared chips are solved, and the yield of high-bright infrared chips is improved and the market demand is met.

CN118745572BActive Publication Date: 2025-03-18SHENZHEN ORIENT COMPONENTS CO LTD
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Patent Information

Application Number
CN202410883945.6
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-07-03
Publication Date
2025-03-18
Estimated Expiration
2044-07-03

AI Technical Summary

Technical Problem

The electrical parameters of traditional infrared chips are difficult to meet the needs of the high-brightness infrared chip market, and their preparation process is complex and the yield is difficult to improve.

Method used

Using a structure based on gallium aluminum arsenic epitaxial alloy, the contact between gallium aluminum arsenic epitaxial and metal layer is improved through a high-density oxide layer, forming excellent bonding performance between metal and gallium aluminum arsenic material, improving ohmic contact quality and reducing the risk of electrode shedding.

Benefits of technology

It effectively improves the yield of high-bright infrared chips, and can adjust the effect of forward voltage misalignment according to demand to meet the demand of the high-bright infrared chip market.

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Abstract

The present invention relates to a gallium aluminum arsenic epitaxial alloy and a preparation method thereof, comprising: a gallium aluminum arsenic epitaxial layer; a first oxide layer, the first oxide layer comprising a plurality of first windows and first bumps formed by one-time photolithography, the first windows and the first bumps being spaced apart; a first metal layer; a second oxide layer, the second oxide layer comprising a plurality of second windows and second bumps formed by secondary photolithography, the second windows and the second bumps being spaced apart, the first windows and the second windows being staggered in a vertical direction; and a second metal layer. An alloy method based on gallium aluminum arsenic epitaxial alloy is used to improve the contact between gallium aluminum arsenic epitaxial and metal layer through a high-density oxide layer, which has excellent bonding performance between metal and gallium aluminum arsenic material, improves the ohmic contact between the metal layer and the epitaxial layer, and reduces the risk of electrode detachment.
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Description

Technical Field

[0001] The present invention belongs to the field of optoelectronic technology, and in particular relates to a gallium-aluminum-arsenic epitaxial alloy and a preparation method thereof. Background Art

[0002] With the advancement of technology, infrared chips are increasingly used in artificial intelligence, optical communications, and other fields. However, the electrical parameters of infrared chips are increasingly required, and traditional infrared chips are gradually unable to meet the current market demand. In this context, the market share of high-brightness infrared chips is gradually increasing, but their preparation process is relatively complex and the yield is difficult to improve. Summary of the invention

[0003] The present invention provides a gallium-aluminum-arsenic epitaxial alloy, aiming to solve at least one of the technical problems existing in the prior art.

[0004] The technical solution of the present invention is a gallium-aluminum-arsenic epitaxial alloy, comprising:

[0005] Gallium aluminum arsenide epitaxial layer;

[0006] A first oxide layer, wherein the first oxide layer is disposed above the GaAlAs epitaxial layer, the first oxide layer comprises a plurality of first windows and first bumps formed by one-time photolithography, and the first windows and the first bumps are spaced apart from each other;

[0007] a first metal layer, the first metal layer being disposed above the first oxide layer;

[0008] a second oxide layer, the second oxide layer being disposed above the first metal layer, the second oxide layer comprising a plurality of second windows and second bumps formed by secondary photolithography, the second windows and the second bumps being spaced apart, and the first windows and the second windows being staggered in a vertical direction;

[0009] A second metal layer is disposed above the first oxide layer.

[0010] Furthermore, the material of the first oxide layer is silicon dioxide, and the thickness of the first oxide layer is 1000-2800 angstroms.

[0011] Furthermore, the first metal layer includes a gold-beryllium alloy and gold, and the gold-beryllium alloy and gold are sequentially stacked on the first oxide layer by evaporation.

[0012] Furthermore, the thickness of the gold-beryllium alloy in the first metal layer is 100-800 angstroms, and the thickness of gold in the first metal layer is 3000-8000 angstroms.

[0013] Furthermore, the material of the second oxide layer is silicon dioxide, and the thickness of the second oxide layer is 1500-3500 angstroms.

[0014] Furthermore, the second metal layer includes titanium and gold, and titanium and gold are sequentially stacked on the second oxide layer by evaporation.

[0015] Furthermore, the thickness of titanium in the second metal layer is 100-500 angstroms, and the thickness of gold in the second metal layer is 5000-10000 angstroms.

[0016] Furthermore, the present invention also proposes a method for preparing a gallium-aluminum-arsenic epitaxial alloy, which is used to prepare the gallium-aluminum-arsenic epitaxial alloy, and the method comprises the following steps:

[0017] S100, after cleaning the GaAlAs epitaxial wafer, prepare a first oxide layer on the GaAlAs epitaxial layer based on a plasma enhanced chemical vapor deposition (PECVD) method, and perform a photolithography to form first windows and first bumps that are spaced apart;

[0018] S200, sequentially evaporating a gold-beryllium alloy and gold on the first oxide layer to form a first metal layer;

[0019] S300, after generating the first metal layer, preparing a second oxide layer on the first metal layer based on a plasma enhanced chemical vapor deposition (PECVD) method, and performing secondary photolithography to form second windows and second bumps distributed at intervals, wherein the second windows are staggered with the first windows in a vertical direction;

[0020] S400, sequentially evaporating titanium and gold on the second oxide layer to form a second metal layer.

[0021] Further, step S200 includes:

[0022] S210, cleaning the wafer after photolithography;

[0023] S220, placing the cleaned wafer in an alloy furnace with a nitrogen flux of 0.3-0.8 liters / minute for 18-25 minutes, wherein the alloy furnace includes a high temperature zone and a low temperature zone, the temperature of the high temperature zone is 500°C-600°C, and the temperature of the low temperature zone is 400°C-500°C. During the evaporation process, ensure that the wafer is in the high temperature zone for most of the time. If the actual temperature of the wafer exceeds the set temperature of the high temperature zone, move the wafer to the low temperature zone and reduce the temperature of the high temperature zone at the same time. When the temperature of the high temperature zone drops to the set temperature range, move the wafer from the low temperature zone to the high temperature zone;

[0024] S230, after the evaporation is completed, the wafer is taken out after being cooled to room temperature.

[0025] Further, step S400 includes:

[0026] S410, cleaning the wafer after secondary photolithography;

[0027] S420, placing the cleaned wafer in an alloy furnace with a nitrogen flow rate of 0.3-0.8 liters / minute for 24-36 minutes, wherein the temperature of the high temperature zone in the alloy furnace is 430-520°C, and the temperature of the low temperature zone is 310°C-430°C, first evaporating in the high temperature zone for 8-12 minutes, then moving the wafer to the low temperature zone for evaporating for 8-12 minutes, and finally moving the wafer to the high temperature zone for evaporating again for 8-12 minutes. If the actual temperature of the wafer exceeds the set temperature range of the high temperature zone, move the wafer to the low temperature zone, and at the same time reduce the temperature of the high temperature zone. When the temperature of the high temperature zone drops to the set temperature range, move the wafer from the low temperature zone to the high temperature zone;

[0028] S430, after the evaporation is completed, the wafer is taken out after being cooled to room temperature.

[0029] The beneficial effects of the present invention are as follows:

[0030] In the present application, the alloy method based on gallium aluminum arsenic epitaxial alloy to improve the contact between gallium aluminum arsenic epitaxy and the metal layer through a high-density oxide layer has excellent bonding performance between metal and gallium aluminum arsenic materials, improves the ohmic contact between the metal layer and the epitaxial layer, reduces the risk of electrode detachment, effectively improves the yield of high-brightness infrared chips, and can adjust the effect of forward voltage dislocation according to needs. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 It is a schematic diagram of the structure based on gallium aluminum arsenic epitaxial alloy according to the present invention.

[0032] Figure 2 It is a schematic flow chart of the preparation method based on gallium aluminum arsenic epitaxial alloy according to the present invention.

[0033] Figure 3 It is a flow chart of the method for preparing the first metal layer in the gallium aluminum arsenic epitaxial alloy according to the present invention.

[0034] Figure 4 It is a flow chart of the method for preparing the first metal layer in the gallium aluminum arsenic epitaxial alloy according to the present invention.

[0035] In the above figure, 100, GaAlAs epitaxial layer; 200, first oxide layer; 210, first window; 220, first bump; 300, first metal layer; 400, second oxide layer; 410, second window; 420, second bump; 500, second metal layer. DETAILED DESCRIPTION

[0036] The following will be combined with the embodiments and drawings to clearly and completely describe the concept, specific structure and technical effects of the present invention, so as to fully understand the purpose, scheme and effect of the present invention. It should be noted that the embodiments and features in the embodiments of this application can be combined with each other without conflict.

[0037] It should be noted that, unless otherwise specified, when a feature is referred to as being "fixed" or "connected" to another feature, it may be directly fixed or connected to the other feature, or it may be indirectly fixed or connected to the other feature. In addition, the descriptions of up, down, left, right, top, bottom, etc. used in the present invention are only relative to the relative positional relationship of the components of the present invention in the drawings.

[0038] In addition, unless otherwise defined, all technical and scientific terms used herein have the same meaning as those generally understood by those skilled in the art. The terms used in this specification are only for describing specific embodiments, not for limiting the present invention. The term "and / or" used herein includes any combination of one or more related listed items.

[0039] It should be understood that, although the terms first, second, third, etc. may be used to describe various elements in the present disclosure, these elements should not be limited to these terms. These terms are only used to distinguish elements of the same type from each other. For example, without departing from the scope of the present disclosure, the first element may also be referred to as the second element, and similarly, the second element may also be referred to as the first element.

[0040] Reference Figures 1 to 4 In some embodiments, according to a gallium aluminum arsenic based epitaxial alloy of the present invention, reference Figure 1 ,include:

[0041] Gallium aluminum arsenide epitaxial layer 100;

[0042] A first oxide layer 200, wherein the first oxide layer 200 is disposed above the GaAlAs epitaxial layer 100, and the first oxide layer 200 includes a plurality of first windows 210 and first bumps 220 formed by one-time photolithography, and the first windows 210 and the first bumps 220 are spaced apart from each other;

[0043] A first metal layer 300, wherein the first metal layer 300 is disposed above the first oxide layer 200;

[0044] A second oxide layer 400, wherein the second oxide layer 400 is disposed above the first metal layer 300, and the second oxide layer 400 includes a plurality of second windows 410 and second bumps 420 formed by secondary photolithography, wherein the second windows 410 and the second bumps 420 are spaced apart from each other, and the first windows 210 and the second windows 410 are staggered in a vertical direction;

[0045] The second metal layer 500 is disposed above the first oxide layer 200 .

[0046] The beneficial effects of the present invention are as follows:

[0047] In the present application, the alloy method based on gallium aluminum arsenic epitaxial alloy to improve the contact between gallium aluminum arsenic epitaxy and the metal layer through a high-density oxide layer has excellent bonding performance between metal and gallium aluminum arsenic materials, improves the ohmic contact between the metal layer and the epitaxial layer, reduces the risk of electrode detachment, effectively improves the yield of high-brightness infrared chips, and can adjust the effect of forward voltage dislocation according to needs.

[0048] Further, refer to Figure 1 The material of the first oxide layer 200 is silicon dioxide, and the thickness of the first oxide layer 200 is 1000-2800 angstroms.

[0049] Further, refer to Figure 1 The first metal layer 300 includes a gold-beryllium alloy and gold, and the gold-beryllium alloy and gold are sequentially stacked on the first oxide layer 200 by evaporation.

[0050] Further, refer to Figure 1 The thickness of the gold-beryllium alloy in the first metal layer 300 is 100-800 angstroms, and the thickness of gold in the first metal layer 300 is 3000-8000 angstroms.

[0051] Further, refer to Figure 1 The material of the second oxide layer 400 is silicon dioxide, and the thickness of the second oxide layer 400 is 1500-3500 angstroms.

[0052] Further, refer to Figure 1 The second metal layer 500 includes titanium and gold, and titanium and gold are sequentially stacked on the second oxide layer 400 by evaporation.

[0053] Further, refer to Figure 1 , the thickness of titanium in the second metal layer 500 is 100-500 angstroms, and the thickness of gold in the second metal layer 500 is 5000-10000 angstroms.

[0054] Further, refer to Figures 2 to 4The present invention also proposes a method for preparing a gallium-aluminum-arsenic epitaxial alloy, which is used to prepare the gallium-aluminum-arsenic epitaxial alloy. Figure 2 , the method comprises the following steps:

[0055] S100, after cleaning the GaAlAs epitaxial wafer, a first oxide layer 200 is prepared on the GaAlAs epitaxial layer 100 based on a plasma enhanced chemical vapor deposition (PECVD) method, and a photolithography is performed to form first windows 210 and first bumps 220 that are spaced apart;

[0056] S200, sequentially evaporating a gold-beryllium alloy and gold on the first oxide layer 200 to form a first metal layer 300;

[0057] S300, after the first metal layer 300 is generated, a second oxide layer 400 is prepared on the first metal layer 300 based on a plasma enhanced chemical vapor deposition (PECVD) method, and secondary photolithography is performed to form second windows 410 and second bumps 420 distributed at intervals, wherein the second windows 410 and the first windows 210 are staggered in a vertical direction;

[0058] S400 , sequentially evaporating titanium and gold on the second oxide layer 400 to form a second metal layer 500 .

[0059] Further, refer to Figure 3 , step S200 includes:

[0060] S210, cleaning the wafer after photolithography;

[0061] S220, placing the cleaned wafer in an alloy furnace with a nitrogen flux of 0.3-0.8 liters / minute for 18-25 minutes, wherein the alloy furnace includes a high temperature zone and a low temperature zone, the temperature of the high temperature zone is 500°C-600°C, and the temperature of the low temperature zone is 400°C-500°C. During the evaporation process, ensure that the wafer is in the high temperature zone for most of the time. If the actual temperature of the wafer exceeds the set temperature of the high temperature zone, move the wafer to the low temperature zone and reduce the temperature of the high temperature zone at the same time. When the temperature of the high temperature zone drops to the set temperature range, move the wafer from the low temperature zone to the high temperature zone;

[0062] S230, after the evaporation is completed, the wafer is taken out after being cooled to room temperature.

[0063] Further, refer to Figure 4 , step S400 includes:

[0064] S410, cleaning the wafer after secondary photolithography;

[0065] S420, placing the cleaned wafer in an alloy furnace with a nitrogen flow rate of 0.3-0.8 liters / minute for 24-36 minutes, wherein the temperature of the high temperature zone in the alloy furnace is 430-520°C, and the temperature of the low temperature zone is 310°C-430°C, first evaporating in the high temperature zone for 8-12 minutes, then moving the wafer to the low temperature zone for evaporating for 8-12 minutes, and finally moving the wafer to the high temperature zone for evaporating again for 8-12 minutes. If the actual temperature of the wafer exceeds the set temperature range of the high temperature zone, move the wafer to the low temperature zone, and at the same time reduce the temperature of the high temperature zone. When the temperature of the high temperature zone drops to the set temperature range, move the wafer from the low temperature zone to the high temperature zone;

[0066] S430, after the evaporation is completed, the wafer is taken out after being cooled to room temperature.

[0067] The above is only a preferred embodiment of the present invention. The present invention is not limited to the above implementation. As long as the technical effect of the present invention is achieved by the same means, any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present disclosure shall be included in the scope of protection of the present disclosure. All should belong to the protection scope of the present invention. Within the protection scope of the present invention, its technical scheme and / or implementation method can have various modifications and changes.

Claims

1. A gallium-aluminum-arsenic epitaxial alloy, characterized in that: include: Gallium aluminum arsenide epitaxial layer (100); A first oxide layer (200), the first oxide layer (200) being arranged above the gallium aluminum arsenide epitaxial layer (100), the first oxide layer (200) comprising a plurality of first windows (210) and first bumps (220) formed by one-time photolithography, the first windows (210) and the first bumps (220) being distributed at intervals; A first metal layer (300), the first metal layer (300) being arranged above the first oxide layer (200); The first metal layer (300) comprises a gold-beryllium alloy and gold, and the gold-beryllium alloy and gold are sequentially stacked on the first oxide layer (200) by means of evaporation; The thickness of the gold-beryllium alloy in the first metal layer (300) is 100-800 angstroms, and the thickness of gold in the first metal layer (300) is 3000-8000 angstroms; a second oxide layer (400), the second oxide layer (400) being arranged above the first metal layer (300), the second oxide layer (400) comprising a plurality of second windows (410) and second bumps (420) formed by secondary photolithography, the second windows (410) and the second bumps (420) being arranged at intervals, and the first windows (210) and the second windows (410) being arranged in a staggered manner in a vertical direction; a second metal layer (500), the second metal layer (500) being arranged above the first oxide layer (200); The second metal layer (500) comprises titanium and gold, and the titanium and gold are sequentially stacked on the second oxide layer (400) by means of evaporation; The thickness of titanium in the second metal layer (500) is 100-500 angstroms, and the thickness of gold in the second metal layer (500) is 5000-10000 angstroms.

2. The gallium aluminum arsenide epitaxial alloy according to claim 1, characterized in that: The material of the first oxide layer (200) is silicon dioxide, and the thickness of the first oxide layer (200) is 1000-2800 angstroms.

3. The gallium aluminum arsenide based epitaxial alloy according to claim 1, characterized in that: The material of the second oxide layer (400) is silicon dioxide, and the thickness of the second oxide layer (400) is 1500-3500 angstroms.

4. A method for preparing a gallium-aluminum-arsenic epitaxial alloy, used to prepare a gallium-aluminum-arsenic epitaxial alloy as claimed in any one of claims 1 to 3, characterized in that: The method comprises the following steps: S100, after cleaning the gallium aluminum arsenide epitaxial wafer, preparing a first oxide layer (200) on the gallium aluminum arsenide epitaxial layer (100) based on a plasma enhanced chemical vapor deposition (PECVD) method, and performing a photolithography process to form first windows (210) and first bumps (220) distributed at intervals; S200, sequentially evaporating a gold-beryllium alloy and gold on the first oxide layer (200) to form a first metal layer (300); S300, after generating the first metal layer (300), preparing a second oxide layer (400) on the first metal layer (300) based on a plasma enhanced chemical vapor deposition (PECVD) method, and performing secondary photolithography to form second windows (410) and second bumps (420) that are spaced apart, wherein the second windows (410) and the first windows (210) are arranged in a staggered manner in a vertical direction; S400 , sequentially evaporating titanium and gold on the second oxide layer ( 400 ) to form a second metal layer ( 500 ).

5. The method for preparing gallium-aluminum-arsenic epitaxial alloy according to claim 4, characterized in that: Step S200 includes: S210, cleaning the wafer after photolithography; S220, placing the cleaned wafer in an alloy furnace with a nitrogen flux of 0.3-0.8 liters / minute for 18-25 minutes, wherein the alloy furnace includes a high temperature zone and a low temperature zone, the temperature of the high temperature zone is 500°C-600°C, and the temperature of the low temperature zone is 400°C-500°C. During the evaporation process, ensure that the wafer is in the high temperature zone for most of the time. If the actual temperature of the wafer exceeds the set temperature of the high temperature zone, move the wafer to the low temperature zone and reduce the temperature of the high temperature zone at the same time. When the temperature of the high temperature zone drops to the set temperature range, move the wafer from the low temperature zone to the high temperature zone; S230, after the evaporation is completed, the wafer is taken out after being cooled to room temperature.

6. The method for preparing gallium-aluminum-arsenic epitaxial alloy according to claim 4, characterized in that: Step S400 includes: S410, cleaning the wafer after secondary photolithography; S420, placing the cleaned wafer in an alloy furnace with a nitrogen flow rate of 0.3-0.8 liters / minute for 24-36 minutes, wherein the temperature of the high temperature zone in the alloy furnace is 430-520°C, and the temperature of the low temperature zone is 310°C-430°C, first evaporating in the high temperature zone for 8-12 minutes, then moving the wafer to the low temperature zone for evaporating for 8-12 minutes, and finally moving the wafer to the high temperature zone for evaporating again for 8-12 minutes. If the actual temperature of the wafer exceeds the set temperature range of the high temperature zone, move the wafer to the low temperature zone, and at the same time reduce the temperature of the high temperature zone. When the temperature of the high temperature zone drops to the set temperature range, move the wafer from the low temperature zone to the high temperature zone; S430, after the evaporation is completed, the wafer is taken out after being cooled to room temperature.

Citation Information

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