A low noise self-biased bandgap reference circuit

Abstract

The application relates to a low-noise self-biased bandgap reference circuit and belongs to the integrated circuit field. A direct-current offset elimination technology suitable for a low-power consumption scene is provided, the influence of a traditional bandgap structure resistor network on an offset voltage is weakened; meanwhile, a novel voltage self-adjusting technology based on a flip voltage follower is provided, the voltage self-adjusting technology has super-high power supply rejection ratio and low noise performance while realizing a small area. The application realizes a bandgap reference circuit with super-high power supply rejection ratio, low noise and low power consumption, can be applied to scenes with high requirements on reference voltage stability, and becomes an effective reference circuit solution.

Description

TECHNICAL FIELD

[0001] The present application belongs to the field of integrated circuits, and particularly relates to a low-noise self-biased bandgap reference circuit. BACKGROUND

[0002] The bandgap reference circuit can generate a reference voltage signal which is almost independent of power supply and temperature, and is an important component in advanced integrated circuits. In order to meet the needs of modern integrated circuit design, it is crucial to design a bandgap reference circuit with low noise, high power supply rejection ratio and low power consumption. Especially in the application scenarios of radio frequency circuits and wireless sensor chips, the reference voltage provided by the bandgap reference is required to have higher power supply noise rejection capability.

[0003] Currently, the research focus of the bandgap reference circuit mainly concentrates on high power supply rejection ratio, low noise, low power consumption, high precision and the like. One research proposes a bandgap reference circuit with high power supply rejection ratio and low temperature drift, which is realized by a voltage self-adjusting technology combined with curvature compensation. However, the area and power consumption of the circuit are limited, and the circuit cannot be applied to low noise scenarios. Another research proposes an ultra-low power bandgap reference circuit without a resistor network, which generates a temperature-positive voltage by a differential pair, and combines the negative temperature coefficient of a bipolar transistor for temperature compensation. Although the circuit has the characteristics of low cost, the power supply rejection performance is not ideal and the output noise is large. Still another research proposes a low-noise high-power-supply-rejection bandgap reference circuit using 14nm FinFET, which realizes high performance by chopper technology and long channel design method. However, the circuit has large static current, which will generate additional system power consumption. SUMMARY

[0004] The present application aims to solve the problem of trade-off between power consumption and noise of the bandgap reference circuit, and provides a low-noise self-biased bandgap reference circuit. A direct current offset elimination technology suitable for low power consumption scenarios is proposed, which reduces the influence of the resistor network of the bandgap structure on the offset voltage. At the same time, a new voltage self-adjusting technology based on the flip voltage follower is proposed, which realizes small area while having ultra-high power supply rejection ratio and low noise performance.

[0005] To achieve the above-mentioned purpose, the technical scheme of the present application is as follows: a low-noise self-biased bandgap reference circuit, a direct current offset elimination technology is proposed, which reduces the influence of the resistor network of the bandgap structure on the offset voltage. A voltage self-adjusting technology based on the flip voltage follower is proposed, which realizes high power supply rejection ratio, low power consumption and low noise performance.

[0006] In an embodiment of the present application, the circuit comprises a voltage self-adjusting module, a start-up circuit, a self-biased current generating circuit, a self-biased transconductance operational amplifier and a main loop connected in sequence.

[0007] In an embodiment of the present application,

[0008] The voltage self-regulation module adopts a self-bias structure based on a flip voltage follower to generate a stable second-level power supply for the entire low-noise self-bias bandgap reference circuit, eliminate noise from the power supply through a voltage self-regulation technology based on a flip voltage follower, and improve the noise of the second-level power supply to the output VREF in combination with a self-bias transconductance operational amplifier to achieve high power supply rejection ratio and low noise performance.

[0009] The start-up circuit is used to ensure normal start-up of the entire low-noise self-bias bandgap reference circuit.

[0010] The self-bias current generation circuit is used to provide a bias current.

[0011] The self-bias transconductance operational amplifier is used to provide a transconductance and improve the operational amplifier gain.

[0012] The main loop reduces the influence of the bandgap structure resistor network on the offset voltage through a direct current offset elimination technology.

[0013] In an embodiment of the present application, the voltage self-regulation module is composed of a transistor M1, a transistor M2, a bipolar transistor Q1, a transistor M5, and a resistor R1, the source of the M1 is connected to a power input VIN, the gate of the M1 is connected to the drain of the M5 and the collector of the Q1, the drain of the M1 is connected to the source of the M5 and the source of the M2 and serves as the output of the voltage self-regulation module, the gate of the M2 is connected to the main loop, the drain of the M2 is connected to the emitter of the Q1 and the GND through the R1, the gate of the M5 is connected to the start-up circuit and the self-bias current generation circuit, and the base of the Q1 is connected to the start-up circuit, the self-bias current generation circuit, the self-bias transconductance operational amplifier, and the main loop.

[0014] In an embodiment of the present application, the start-up circuit includes a transistor M3, a transistor M4, a transistor M6, a transistor M8, a resistor R2, and a resistor R3, the source of the M3 is connected to the GND, the gate of the M3 is connected to the GND through the R3, the gate of the M3 is also connected to the drain of the M6, the drain of the M3 is connected to the source of the M4, the drain of the M4 is connected to one end of the R2 and the gate of the M8, the gate of the M4 is connected to the base of the Q1, the source of the M6 is connected to the other end of the R2 and the drain of the M8 and serves as the output of the start-up circuit, the gate of the M6 is connected to the gate of the M5, and the source of the M8 is connected to the self-bias transconductance operational amplifier.

[0015] In an embodiment of the present application, the self-bias current generating circuit comprises transistor M7, transistor M9, transistor M10, transistor M15, resistor R4, bipolar transistor Q4; the gate of M7, the drain of M7 and the gate of M5 are connected, the source of M7 is the output of the self-bias current generating circuit, the drain of M7 is also connected to the source of M9, the gate of M9 and the gate of M10, the drain of M10, the drain of M15 are connected, the gate of M9 is also connected to the self-bias transconductance amplifier, the drain of M9 and the source of M10 are connected, the source of M15 and the collector of Q2 are connected, the gate of M15 and the base of Q1 are connected, the emitter of Q2 is connected to GND through R4, and the base of Q2 is connected to the main loop.

[0016] In an embodiment of the present application, the self-bias transconductance amplifier is composed of transistor M11, transistor M12, transistor M13, transistor M14, transistor M16, transistor M17, bipolar transistor Q3, bipolar transistor Q4; the source of M11 and the drain of M13 are connected, the drain of M11 and the drain of M16, the gate of M13, the gate of M14 are connected, the gate of M11 and the gate of M12, the drain of M9, the source of M10 are connected, the source of M12 and the drain of M14 are connected, the drain of M12 is connected to the drain of M17, as the output of the self-bias transconductance amplifier, and connected to the main loop, the source of M13 and the source of M14 are connected, the source of M16 and the collector of Q3 are connected, the gate of M16 and the gate of M17 are connected to the base of Q1, the source of M17 is connected to the collector of Q4, the emitter of Q3 is connected to GND, the base of Q3 is connected to the main loop, the emitter of Q4 is connected to GND, and the base of Q4 is connected to the main loop.

[0017] In an embodiment of the present application, the main loop is composed of bipolar transistor Q5, bipolar transistor Q6, transistor M18, resistor R5, resistor R6, resistor R7, resistor R8; the base of Q5 and the base of Q2, one end of R5, one end of R6, one end of R8 are connected, the collector of Q5 and the other end of R5, the base of Q3, the base of Q6 are connected, the emitter of Q5 and the emitter of Q6 are connected to GND through R7, the collector of Q6 and the other end of R6, the base of Q4 are connected, the other end of R8 and the source of M18, the base of Q1 are connected, and as the output VREF of the whole low-noise self-bias bandgap reference circuit, the gate of M18 and the gate of M2, the drain of M12 are connected, and the drain of M18 is the input of the main loop.

[0018] In an embodiment of the present application, it further comprises resistor R9 and capacitor C3 to form an RC compensation network connected to the gate of M18.

[0019] In an embodiment of the present application, the gate of M1 is also connected to GND through capacitor C1.

[0020] Compared with the prior art, the application has the following beneficial effects: the application realizes a band gap reference circuit with ultra-high power supply rejection ratio, low noise and low power consumption, and can be applied to a scene with high requirement for reference voltage stability, thereby becoming an effective reference circuit solution. BRIEF DESCRIPTION OF DRAWINGS

[0021] Figure 1 A low-noise self-biased band gap reference circuit of the application.

[0022] Figure 2 Power supply rejection ratios under different adjustments.

[0023] Figure 3 A 200-point Monte Carlo simulation diagram of the power supply rejection ratio.

[0024] Figure 4 Output noises under different conditions.

[0025] Figure 5 Power-on simulation diagrams under different conditions. DETAILED DESCRIPTION

[0026] The technical solutions of the application will be specifically described below with reference to the drawings.

[0027] The application is a low-noise self-biased band gap reference circuit, which proposes a direct-current offset elimination technology to weaken the influence of a band gap structure resistor network on an offset voltage, and proposes a voltage self-adjustment technology based on a flip voltage follower to realize high power supply rejection ratio, low power consumption and low noise performance. The circuit comprises a voltage self-adjustment module, a start-up circuit, a self-biased current generation circuit, a self-biased transconductance operational amplifier and a main loop connected in sequence.

[0028] The following is a specific implementation example of the application.

[0029] The application is a low-noise self-biased band gap reference circuit as shown in Figure 1 The entire band gap reference circuit mainly comprises a voltage self-adjustment module, a start-up circuit, a self-biased current generation circuit, a self-biased transconductance operational amplifier and a main loop.

[0030] The main loop is composed of Q5, Q6, M18 and R5-R8, wherein the bipolar transistors Q5 and Q6 adopt a cross-coupled mutual bias structure, and R6:R5=M. If Q6:Q5=N, the feedback coefficient of the negative feedback loop formed by the self-biased transconductance operational amplifier to M18 is defined as F. At this time, F=ln 2(MN)+(M-1 / M)ln(MN), so the feedback depth can be enhanced by increasing the values of M and N, which effectively reduces the offset voltage of the op-amp and the noise of the system. Meanwhile, it is noted that the feedback coefficient F at this time is almost irrelevant to the size of the resistance itself, so increasing the resistance network to reduce the power consumption of the bandgap reference circuit will not affect the size of the offset voltage of the self-biased transconductance operational amplifier. The proposed structure of the circuit effectively solves the trade-off problem between the power consumption and the offset voltage of the traditional bandgap reference circuit, and still has smaller noise in the low-power consumption scenario.

[0031] To further reduce the power consumption and system area cost, the proposed self-biased current generation circuit and the voltage self-adjustment module both adopt a self-biased structure, and the current mirror structure formed by the main loop is used to provide a power-independent bias for both. The self-biased transconductance amplifier is composed of M11-M14, M16, M17, Q3 and Q4, and the differential pair uses NPN to obtain stronger temperature adaptability and higher gain. M11, M12, M16 and M17 all work in the sub-threshold region to obtain greater transconductance and improve the gain of the op-amp. For the stability problem of the main loop, the RC compensation network composed of R9 and C3 is used to solve it. The left half-plane zero point formed by the compensation network eliminates the output secondary pole, and the main pole is moved to the gate of M18 to ensure sufficient phase margin. The designed start-up circuit includes M3, M4, M6, M8, R2 and R3. At the initial stage of power-up, the gate of M3 is at a low level, at which time the branch of M3 is not conductive and has no current, so that the gate and drain of M8 are kept at a high level, at which time M8 is instantaneously conductive to inject a transient current into the output branch of the op-amp, eliminating the degenerate point and ensuring normal startup of the circuit. After the circuit is normally working, the gate of M3 is at a higher level, at which time the M3 branch has a current to generate a large voltage drop across the large resistor R2, so that M8 is turned off, and the circuit runs normally without current leakage. M6 is designed to work in the linear region to ensure lower power consumption.

[0032] The designed voltage self-adjustment module is composed of M1, M2, Q1, M5 and R1, and the circuit is based on the self-biased structure of the inverting voltage follower, which greatly reduces the output resistance of node VDDA by using a two-stage common-gate amplifier to generate a stable second-level power supply for the bandgap reference circuit. Considering the stability problem of the loop, only capacitor C1 is used for loop compensation, at which time the main pole exists at the gate of M1 and the secondary pole exists at the drain of M2, ensuring the phase margin of the loop. The designed bandgap reference circuit eliminates the noise from the power supply by using the voltage self-adjustment scheme, and at the same time, it improves the noise from the second-level power supply to the output VREF by using the self-biased transconductance operational amplifier with high gain and low offset, achieving ultra-high power supply rejection performance and ultra-low noise.

[0033] Figure 2The simulation results of the proposed bandgap reference circuit in different process corners, power supply voltage and temperature conditions are shown. The power supply rejection ratio (PSRR) is -184dB in TT process corner and 1HZ condition, and still -50dB in 1MHZ. The low frequency PSRR is no more than -120dB in different conditions, and the circuit has good PSRR performance. Figure 3 The Monte Carlo simulation results of the PSRR considering mismatch are shown. The PSRR considering mismatch can still guarantee good performance, and the working points of the circuit are normal. Figure 4 The output noise of the bandgap reference circuit is shown. The output noise is 0.94μV in TT process corner and 1HZ. The output noise is no more than 1μV in different conditions and 1HZ. The circuit has good performance of low noise. Figure 5 The simulation results of the power-up transient in different conditions are shown. The proposed bandgap reference circuit has good power-up characteristics and stability.

[0034] The above is the preferred embodiment of the present application. Any changes made according to the technical solutions of the present application, as long as the generated function does not exceed the scope of the technical solutions of the present application, belong to the protection scope of the present application.

Claims

1. A low noise self-biased bandgap reference circuit, characterized by, The circuit comprises a voltage self-regulation module, a starting circuit, a self-bias current generation circuit, a self-bias transconductance operational amplifier and a main loop connected in sequence; The voltage self-regulation module adopts a self-bias structure based on a flip voltage follower to generate a stable second-stage power supply for the entire low-noise self-bias bandgap reference circuit, eliminate noise from the power supply through a voltage self-regulation technology based on the flip voltage follower, and improve the noise of the second-stage power supply to the output VREF in combination with the self-bias transconductance operational amplifier to achieve high power supply rejection ratio and low noise performance; The starting circuit is used to ensure normal starting of the entire low-noise self-bias bandgap reference circuit; The self-bias current generation circuit is used to provide a bias current; The self-bias transconductance operational amplifier is used to provide a transconductance and improve the operational amplifier gain; The main loop reduces the influence of the bandgap structure resistor network on the offset voltage through a DC offset elimination technology. The voltage self-regulation module is composed of a transistor M1, a transistor M2, a bipolar transistor Q1, a transistor M5 and a resistor R1. The self-bias current generation circuit comprises a transistor M7, a transistor M9, a transistor M10, a transistor M15, a resistor R4 and a bipolar transistor Q2. The self-bias transconductance amplifier is composed of a transistor M11, a transistor M12, a transistor M13, a transistor M14, a transistor M16, a transistor M17, a bipolar transistor Q3 and a bipolar transistor Q4; the source of M11 is connected with the drain of M13, the drain of M11 is connected with the drain of M16, the gate of M13 and the gate of M14, the gate of M11 is connected with the gate of M12, the drain of M9 and the source of M10, the source of M12 is connected with the drain of M14, the drain of M12 is connected with the drain of M17 as the output of the self-bias transconductance amplifier and the main loop, the source of M13 is connected with the source of M14, the source of M16 is connected with the collector of Q3, the gate of M16 and the gate of M17 are connected with the base of Q1, the source of M17 is connected with the collector of Q4, the emitter of Q3 is connected with GND, the base of Q3 is connected with the main loop, the emitter of Q4 is connected with GND, and the base of Q4 is connected with the main loop; the main loop is composed of a bipolar transistor Q5, a bipolar transistor Q6, a transistor M18, a resistor R5, a resistor R6, a resistor R7 and a resistor R8; the base of Q5 is connected with the base of Q2, one end of R5, one end of R6 and one end of R8, the collector of Q5 is connected with the other end of R5, the base of Q3 and the base of Q6, the emitter of Q5 and the emitter of Q6 are connected with GND through R7, the collector of Q6 is connected with the other end of R6 and the base of Q4, the other end of R8 is connected with the source of M18 and the base of Q1 and serves as the output VREF of the entire low-noise self-bias bandgap reference circuit, the gate of M18 is connected with the gate of M2 and the drain of M12, and the drain of M18 serves as the input of the main loop.

2. A low noise self-biased bandgap reference circuit according to claim 1, wherein, The source of M1 is connected with the power input VIN, the gate of M1 is connected with the drain of M5 and the collector of Q1, the drain of M1 is connected with the source of M5 and the source of M2 and serves as the output of the voltage self-regulating module, the gate of M2 is connected with the main loop, the drain of M2 is connected with the emitter of Q1 and GND through R1, the gate of M5 is connected with the start-up circuit and the self-bias current generating circuit, and the base of Q1 is connected with the start-up circuit, the self-bias current generating circuit, the self-bias transconductance operational amplifier and the main loop.

3. A low noise self-biased bandgap reference circuit according to claim 2, wherein, The start-up circuit comprises transistors M3, M4, M6, M8, resistors R2 and R3, the source of M3 is connected with GND, the gate of M3 is connected with GND through R3, the gate of M3 is also connected with the drain of M6, the drain of M3 is connected with the source of M4, the drain of M4 is connected with one end of R2 and the gate of M8, the gate of M4 is connected with the base of Q1, the source of M6 is connected with the other end of R2 and the drain of M8 and serves as the output of the start-up circuit, the gate of M6 is connected with the gate of M5, and the source of M8 is connected with the self-bias transconductance operational amplifier.

4. A low noise self-biased bandgap reference circuit as claimed in claim 3, characterized in that, The gate of M7 and the drain of M7 are connected with the gate of M5, the source of M7 serves as the output of the self-bias current generating circuit, the drain of M7 is also connected with the source of M9 and the self-bias transconductance operational amplifier, the gate of M9 is connected with the gate of M10, the drain of M10 and the drain of M15, the gate of M9 is also connected with the self-bias transconductance amplifier, the drain of M9 is connected with the source of M10, the source of M15 is connected with the collector of Q2, the gate of M15 is connected with the base of Q1, the emitter of Q2 is connected with GND through R4, and the base of Q2 is connected with the main loop.

5. A low noise self-biased bandgap reference circuit as claimed in claim 1, wherein, The RC compensation network comprising resistor R9 and capacitor C3 is connected with the gate of M18.

6. A low noise self-biased bandgap reference circuit as claimed in claim 2, characterized in that, The gate of M1 is also connected with GND through capacitor C1.

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