Double pulse wave generation method, device, electronic equipment and storage medium

Abstract

The present application discloses a double-pulse wave generation method, device, electronic device and storage medium, which relate to the field of pulse generation technology and are applied to a double-pulse wave generation subsystem under a wave generation system. The double-pulse wave generation subsystem is used to perform a double-pulse test. The double-pulse wave generation subsystem at least includes a timer. The method includes: receiving a test pulse duration of the double-pulse test and a test interval duration of the double-pulse test; determining a pulse interval of a double-pulse signal according to the test interval duration and a performance indicator of the timer; and generating a double-pulse signal based on the test pulse duration and the pulse interval, thereby achieving an effect of generating a controllable double pulse in an existing wave generation device.

Description

Technical Field

[0001] The present application relates to the field of pulse generation technology, and in particular to a double pulse generation method, device, electronic device and storage medium. Background Art

[0002] At present, the electric drive industry has a growing demand for power modules. However, to determine whether the IGBT (Insulated Gate Bipolar Transistor) device in the power module meets the product requirements, it is necessary to check the IGBT specification and conduct double pulse tests under different working conditions. The double pulse test requires dedicated double pulse wave generating equipment and test environment. When preparing these environments and equipment, the double pulse test process is complicated and has poor versatility.

[0003] Therefore, how to generate controllable double pulses in existing wave generating devices is a problem that urgently needs to be solved. Summary of the invention

[0004] The main purpose of the present application is to provide a dual-pulse wave generation method, device, electronic device and storage medium, aiming to solve the technical problem of how to generate high-precision dual pulses in existing wave generation devices.

[0005] To achieve the above-mentioned purpose, the present application proposes a double-pulse wave generation method, which is applied to a double-pulse wave generation subsystem under a wave generation system. The double-pulse wave generation subsystem is used to perform a double-pulse test. The double-pulse wave generation subsystem at least includes a timer. The method includes:

[0006] Receiving a test pulse duration of the double pulse test and a test interval duration of the double pulse test;

[0007] Determining the pulse interval of the double pulse signal according to the test interval duration and the performance indicator of the timer;

[0008] A double pulse signal is generated based on the test pulse duration and the pulse interval.

[0009] In one embodiment, the dual pulse wave generating subsystem further comprises a pin, the test pulse duration comprises a first pulse duration and a second pulse duration, and the dual pulse signal comprises a first pulse signal and a second pulse signal;

[0010] The step of generating a double pulse signal based on the test pulse duration and the pulse interval comprises:

[0011] Sending a first operation signal to the pin based on the first pulse duration, so as to generate the first pulse signal through the pin and last for the first pulse duration;

[0012] When it is monitored that the first pulse signal has been generated, after delaying the pulse interval, a second operation signal is sent to the pin based on the second pulse duration to generate the second pulse signal through the pin and continue for the second pulse duration.

[0013] In one embodiment, the timer is configured with registers and delay tasks, the performance indicators include clock frequency, the minimum time division of the delay task and the timestamp of the register, wherein the timestamp is used to record the time information when the delay function is read, the time information when the delay function is read and completed, the time information when the pin operation function is read, and the time information when the pin operation function is executed and completed, the delay function is used to execute the delay task, and the pin operation function is used to execute the task of generating a pulse signal through the pin;

[0014] The step of determining the pulse interval of the double pulse signal according to the test interval duration and the performance indicator of the timer comprises:

[0015] Obtaining the clock frequency of the timer and the minimum time division of the delay task, and determining the unit period of the timestamp according to the clock frequency;

[0016] Divide the minimum time division by the unit period to obtain the timestamp width of the delayed task;

[0017] The timestamp width is multiplied by the interval duration to obtain a candidate pulse interval, and the candidate pulse interval is calibrated according to the timestamp to obtain the pulse interval.

[0018] In one embodiment, the timestamp includes a first timestamp, a second timestamp, a third timestamp and a fourth timestamp, and the step of calibrating the candidate pulse interval according to the timestamps to obtain the pulse interval includes:

[0019] Acquire, by means of the timer, the first timestamp when the double-pulse transmitting subsystem starts reading the delay function, and the second timestamp when the reading of the delay function is completed;

[0020] Subtract the first timestamp from the second timestamp to obtain a delay function reading timestamp width, and multiply the delay function reading timestamp width by the unit period to obtain a delay function reading duration;

[0021] Acquire, by means of the timer, the third timestamp when the double pulse transmitting subsystem starts to read the pin operation function, and the fourth timestamp when the pin operation function is completed;

[0022] Subtract the third timestamp from the fourth timestamp to obtain a pin operation timestamp width, and multiply the pin operation timestamp width by the unit period to obtain a pin operation duration;

[0023] Adding the delay function reading duration and the pin operation duration to obtain an error duration, and then dividing the error duration by the unit period to obtain a calibration duration;

[0024] The pulse interval is obtained by subtracting the calibration duration from the candidate pulse interval.

[0025] In one embodiment, the configuration parameters of the dual pulse transmission subsystem include at least pin operating parameters and the clock frequency of the timer, wherein the clock frequency is positively correlated with the sampling frequency of the dual pulse signal, and after the step of receiving the test pulse duration and the test interval duration, the step further includes:

[0026] The working parameters of the pin are configured as a push-pull output mode so that the pin can generate a double pulse signal;

[0027] The first pre-scaling factor of the system clock and / or the second pre-scaling factor of the timer are reduced to increase the clock frequency.

[0028] In one embodiment, the wave generation system includes a main program for generating a single pulse signal, and the method further includes:

[0029] Upon receiving the test pulse duration and the test interval duration, and the main program is in the process of generating a single pulse signal, a first interrupt request is sent to the main program to forcibly interrupt the main program, and the step of determining the pulse interval of the double pulse signal according to the test interval duration and the performance indicator of the timer is performed;

[0030] During the double pulse test, if a second interrupt request issued by the main program is received, the second interrupt request is masked; after the double pulse test is completed, the second interrupt request is executed.

[0031] In one embodiment, the step of controlling the timer to send a second operation signal to the pin based on the second pulse duration after delaying the pulse interval comprises:

[0032] When it is detected that the first pulse has been generated, the timer starts timing;

[0033] When the timing duration of the timer reaches the pulse interval, a second operation signal is triggered to be sent to the pin based on the second pulse duration.

[0034] In addition, to achieve the above-mentioned purpose, the present application also proposes a dual-pulse wave generating device, which is applied to a dual-pulse wave generating subsystem under a wave generating system, wherein the dual-pulse wave generating subsystem is used to perform a dual-pulse test, wherein the dual-pulse wave generating subsystem at least includes a timer, and the dual-pulse wave generating device includes:

[0035] A receiving module, used for receiving a test pulse duration of the double pulse test and a test interval duration of the double pulse test;

[0036] A delay module, used to determine the pulse interval of the double pulse signal according to the test interval length and the performance index of the timer;

[0037] The wave generating module is used to generate a double pulse signal based on the test pulse duration and the pulse interval.

[0038] In addition, to achieve the above-mentioned purpose, the present application also proposes an electronic device, which includes: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the computer program is configured to implement the steps of the double-pulse wave generation method as described above.

[0039] In addition, to achieve the above-mentioned purpose, the present application also proposes a storage medium, which is a computer-readable storage medium, and stores a computer program on the storage medium. When the computer program is executed by a processor, the steps of the double-pulse wave generation method described above are implemented.

[0040] In addition, to achieve the above-mentioned purpose, the present application also provides a computer program product, which includes a computer program. When the computer program is executed by a processor, the steps of the double-pulse wave generation method described above are implemented.

[0041] The present application proposes a dual-pulse wave generation method, which is applied to a dual-pulse wave generation subsystem under a wave generation system, wherein the dual-pulse wave generation subsystem is used to perform a dual-pulse test, and obtains a data basis for the dual-pulse test by receiving a test pulse duration and a test interval duration of the dual-pulse test, thereby receiving test data; determining a pulse interval of a dual-pulse signal according to the test interval duration and a performance indicator of the timer, thereby accurately determining the pulse interval of the dual-pulse signal by combining an input test pulse interval and an existing timer; generating a dual-pulse signal based on the test pulse duration and the pulse interval, thereby generating a dual-pulse signal by using the received test pulse duration and the determined pulse interval, thereby achieving high controllability of the pulse width and pulse interval in the dual-pulse test.

[0042] In summary, the present application determines the accurate pulse interval by comprehensively considering the received test interval duration and the performance indicators of the timer in the existing wave generating device in the existing wave generating device, and generates a controllable double pulse signal based on the received test pulse duration and the determined pulse interval, thereby achieving the effect of generating a controllable double pulse in the existing wave generating device. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0044] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0045] Figure 1 A schematic diagram of a process flow provided for the first embodiment of the double pulse wave generation method of the present application;

[0046] Figure 2 A schematic diagram of the process flow provided for the second embodiment of the double pulse wave generation method of the present application;

[0047] Figure 3 A schematic diagram of a process flow provided for the third embodiment of the double pulse wave generation method of the present application;

[0048] Figure 4 A brief flowchart of the double-pulse wave generation method provided in Example 3 of the present application;

[0049] Figure 5 A program design flow chart provided for the double pulse wave generation method of this application;

[0050] Figure 6 A flow chart of the test procedure provided for the double pulse wave generation method of this application;

[0051] Figure 7 This is a schematic diagram of the module structure of the double-pulse wave generating device according to an embodiment of the present application;

[0052] Figure 8 Schematic diagram of the device structure of the hardware operating environment involved in the double pulse wave generating method in the embodiment of the present application.

[0053] The purpose, features and advantages of this application will be further described in conjunction with the embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0054] It should be understood that the specific embodiments described herein are only used to explain the technical solutions of the present application and are not used to limit the present application.

[0055] In order to better understand the technical solution of the present application, a detailed description will be given below in conjunction with the accompanying drawings and specific implementation methods.

[0056] The main solution of the embodiment of the present application is: receiving the test pulse duration of the double pulse test and the test interval duration of the double pulse test; determining the pulse interval of the double pulse signal according to the test interval duration and the performance index of the timer; and generating a double pulse signal based on the test pulse duration and the pulse interval.

[0057] At present, the double pulse test of IGBT devices requires special double pulse wave generating equipment and test environment, and the preparation of these environments and equipment will encounter the problem that the double pulse test process is complicated and has poor versatility. Therefore, how to generate controllable double pulses in existing wave generating equipment is a problem that needs to be solved urgently.

[0058] The present application provides a solution, which determines the accurate pulse interval in the existing wave generating device by comprehensively considering the received test interval duration and the performance index of the timer in the existing wave generating device, and generates a controllable double pulse signal based on the received test pulse duration and the determined pulse interval, thereby achieving the effect of generating a controllable double pulse in the existing wave generating device.

[0059] It should be noted that the execution subject of this embodiment may be a computing service device with data processing, network communication and program running functions, such as a tablet computer, a personal computer, a mobile phone, etc., or an electronic device capable of realizing the above functions, etc. The following takes an electronic device as an example to illustrate this embodiment and the following embodiments.

[0060] Based on this, the present application embodiment provides a double pulse wave method, referring to Figure 1 , Figure 1 This is a flow chart of the first embodiment of the double pulse generating method of the present application.

[0061] In this embodiment, a double pulse wave generating subsystem is applied to the wave generating system, and the double pulse wave generating subsystem is used to perform a double pulse test, and the double pulse wave generating subsystem at least includes a timer;

[0062] It should be noted that the timer is a hardware component located in the MCU (Microcontroller Unit) for measuring time intervals, generating time delays, controlling pulse width modulation signals, capturing the time when an event occurs, and performing counting operations.

[0063] The double pulse wave generation method comprises steps S10 to S30:

[0064] Step S10, receiving the test pulse duration of the double pulse test and the test interval duration of the double pulse test;

[0065] It should be noted that the test pulse duration is customized for double pulse testing, which is the pulse width data of a single pulse signal; the interval duration is customized for double pulse testing, which is the delay time length between the two pulse signals in the double pulse signal.

[0066] It is understandable that, since it is currently impossible to use existing wave generating equipment to perform double pulse testing, performing step S10 can provide an effective double pulse generation environment for performing double pulse testing in existing wave generating equipment.

[0067] Step S20, determining the pulse interval of the double pulse signal according to the test interval duration and the performance indicator of the timer;

[0068] It should be noted that the performance indicator refers to the performance parameter in the timer, which may include clock frequency, minimum time division of the configuration task, timestamp of the register, etc. This embodiment does not specifically limit the type of performance indicator.

[0069] It is understandable that since the traditional method of determining the pulse interval of the dual pulse signal may be affected by the optimization of the system compiler, such as executing instructions "__nop()", "__asm__volatile("nop":::"memory")", etc. through the MCU to determine the pulse interval of the dual pulse signal may be affected by the optimization of the system compiler, performing step S20 can avoid being affected by the optimization of the system compiler when determining the pulse interval, thereby improving the accuracy of the acquired pulse interval.

[0070] In a feasible implementation manner, the timer is configured with registers and delay tasks, the performance indicators include clock frequency, the minimum time division of the delay task and the timestamp of the register, wherein the timestamp is used to record the time information when the delay function is read, the time information when the delay function is read and completed, the time information when the pin operation function is read, and the time information when the pin operation function is executed and completed, the delay function is used to execute the delay task, and the pin operation function is used to execute the task of generating a pulse signal through the pin;

[0071] It should be noted that the delay task is a minimum time unit task configured in the timer to start timing after the first pulse signal in the double pulse signal occurs, and trigger the second pulse signal in the double pulse signal after the timing reaches the target duration. The delay task can control the time interval between the first pulse signal and the second pulse signal in the double pulse signal.

[0072] In addition, it should be noted that the clock frequency refers to the frequency of the clock signal used when the timer counts, and the frequency of the clock signal determines the minimum time interval that the timer can measure; the minimum time division refers to the minimum time unit of the delay task in the time dimension that is pre-configured when executing the delay task; the timestamp refers to the time unit reference data recorded in the register when reading the delay function, reading and completing the delay function, reading the pin operation function, and executing and completing the pin operation function.

[0073] Step S20 may include steps S21 to S23:

[0074] Step S21, obtaining the clock frequency of the timer and the minimum time division of the delay task, and determining the unit period of the timestamp according to the clock frequency;

[0075] It should be noted that the unit period is the length of time it takes for the timestamp to change once. The unit period of the register timestamp in the timer can be obtained by taking the inverse of the clock frequency of the timer.

[0076] Step S22, obtaining the timestamp width of the delayed task by dividing the minimum time division by the unit period;

[0077] It should be noted that the timestamp width refers to the number of timestamps changed when executing a delayed task.

[0078] Step S23: multiply the timestamp width by the interval duration to obtain a candidate pulse interval, and calibrate the candidate pulse interval according to the timestamp to obtain the pulse interval.

[0079] It should be noted that the candidate pulse interval is a pulse interval time length directly determined based on the received interval duration.

[0080] It is understandable that, since the accuracy of the candidate pulse interval directly determined based on the received interval duration is low, step S23 is performed to improve the accuracy of the time interval between the two pulse signals in the generated double pulse signal by calibrating the candidate pulse interval.

[0081] Exemplarily, when the received interval duration is delayTime, the clock frequency f of the timer and the minimum time division of the timer's delay task 1μs are obtained, and the unit period T1 of the timestamp in the register is obtained by taking the inverse of the clock frequency, that is, T1=1 / f. Then, by dividing the minimum time division by the unit period, the timestamp width N of the delay task is obtained, that is, N=1μs / T1. Finally, by multiplying the timestamp width by the interval duration delayTime, the candidate pulse interval delayTime*N is obtained, and the candidate pulse interval is calibrated according to the timestamp of the register to obtain the pulse interval.

[0082] In this implementation, the delayed time interval between the two pulse signals in the double pulse signal is determined by comprehensively considering the received interval duration, the clock frequency of the timer, the minimum time division of the delay task, and the timestamp of the register, thereby avoiding the problem of low accuracy of the obtained time interval and realizing the determination of the precise delayed time interval between the two pulse signals in the double pulse signal.

[0083] In a feasible implementation manner, the timestamp includes a first timestamp, a second timestamp, a third timestamp and a fourth timestamp, and the step of calibrating the candidate pulse interval according to the timestamps to obtain the pulse interval in step S23 may include steps S201 to S206:

[0084] Step S201, obtaining, by means of the timer, the first timestamp of the double pulse transmitting subsystem when it starts to read the delay function, and the second timestamp of the double pulse transmitting subsystem when it completes reading the delay function;

[0085] It is understandable that, since different systems have different delay function reading performances, and the time consumed to read the delay function will cause deviations in pulse interval determination, step S201 is performed to provide valid data for obtaining the time consumed by the system to read the delay function.

[0086] Step S202, subtracting the first timestamp from the second timestamp to obtain a delay function reading timestamp width, and multiplying the delay function reading timestamp width by the unit period to obtain a delay function reading duration;

[0087] It should be noted that the delay function reading duration refers to the length of time consumed by the system to read the delay function.

[0088] It is understandable that, since the time consumed by the system to read the delay function is one of the factors causing the pulse interval deviation, performing step S202 provides an effective method for determining the time consumed by the system to read the delay function.

[0089] Step S203, obtaining, by means of the timer, the third timestamp of the double pulse transmitting subsystem when it starts to read the pin operation function, and the fourth timestamp of the double pulse transmitting subsystem when it completes the execution of the pin operation function;

[0090] It is understandable that since the performance of pulse signals generated by different systems is different, the time consumed by the pin operation function to generate a pulse signal through the pin will cause errors in determining the pulse interval, so step S203 is performed to provide valid data for obtaining the time consumed to execute the pin operation function.

[0091] Step S204, subtracting the third timestamp from the fourth timestamp to obtain a pin operation timestamp width, and multiplying the pin operation timestamp width by the unit period to obtain a pin operation duration;

[0092] It should be noted that the pin operation duration refers to the length of time it takes for the system to read the pin operation function and for the system to complete the execution of the pin operation function.

[0093] It is understandable that, since the time consumed for reading and executing the pin control function is one of the factors causing the pulse interval deviation, performing step S204 provides an effective method for determining the time consumed for the system to read and execute the pin control function.

[0094] Step S205, adding the delay function reading duration and the pin operation duration to obtain an error duration, and then dividing the error duration by the unit period to obtain a calibration duration;

[0095] It should be noted that the error duration refers to the extra time consumed due to performance limitations and not taken into account by the candidate pulse interval; the calibration duration refers to the time used to calibrate the candidate pulse interval.

[0096] It is understandable that since the candidate pulse interval needs to be calibrated according to the time consumed by the system to read the delay function and the time consumed by the system to execute the pin operation function, step S205 is performed to provide an effective method for obtaining the calibration time for calibrating the candidate pulse interval.

[0097] Step S206, obtaining the pulse interval by subtracting the calibration duration from the candidate pulse interval.

[0098] It is understandable that due to objective factors of system performance, additional time will be consumed in determining the pulse interval, so step S206 is performed to calibrate the candidate pulse interval by subtracting the calibration time from the candidate pulse interval, thereby improving the accuracy of the pulse interval between the two pulse signals in the generated double pulse signal.

[0099] Exemplarily, when the unit period of the timestamp in the register is T1 and the candidate pulse interval is delayTime*N, the first timestamp of the system before reading the delay function, i.e., count stamp 1, and the second timestamp of the system when reading the delay function, i.e., count stamp 2, are obtained through the timer. Then, the first timestamp is subtracted from the second timestamp to obtain the delay function reading timestamp width, i.e., count stamp 2-count stamp 1, and the delay function reading timestamp width is multiplied by the unit period T1 to obtain the delay function reading duration T2, where T2=(countstamp 2-count stamp 1)*T1. The third timestamp, count stamp 3, before the system reads the pin control function is obtained through the timer, and the fourth timestamp, count stamp 4, when the system completes the execution of the pin control function is obtained. Then, the third timestamp is subtracted from the fourth timestamp to obtain the pin operation timestamp width, count stamp4-count stamp 3, and the pin operation timestamp width is multiplied by the unit period T1 to obtain the delay function reading duration T3, where T3 = (count stamp 4-count stamp 3)*T1. Then, the delay function reading duration T2 and the pin operation duration T3 are added to obtain the error duration, i.e., T2+T3, and then the calibration duration (T2+T3) / T1 is obtained by dividing the error duration by the unit period T1. Finally, the pulse interval, i.e., Tinterval, is obtained by subtracting the calibration duration from the candidate pulse interval delayTime*N, where Tinterval = delayTime*N-(T2+T3) / T1.

[0100] In this embodiment, the time stamp information in the register is obtained to determine the time error caused by the extra time consumed by the system when determining the pulse interval because of reading the delay function and reading and executing the pin control function. The candidate pulse interval is calibrated based on the time error, thereby improving the accuracy of the pulse interval between the two pulse signals in the generated double pulse signal.

[0101] Step S30, generating a double pulse signal based on the test pulse duration and the pulse interval.

[0102] In a feasible implementation manner, the dual pulse wave generating subsystem further includes a pin, the test pulse duration includes a first pulse duration and a second pulse duration, and the dual pulse signal includes a first pulse signal and a second pulse signal;

[0103] It should be noted that the pin is a GPIO (General-purpose input / output) pin used to generate a pulse signal. The first pulse signal refers to the pulse signal that occurs earlier in timing in the double pulse signal that occurs, and the second pulse refers to the pulse signal that occurs later in timing in the double pulse signal that occurs.

[0104] Step S30 may include steps S31 to S32:

[0105] Step S31, sending a first operation signal to the pin based on the first pulse duration, so as to generate the first pulse signal through the pin and last for the first pulse duration;

[0106] It should be noted that the first operation signal is a signal used to trigger the pin to generate a first pulse signal for a specific duration.

[0107] It is understandable that, since there is currently a lack of a method that can control the pulse width of the first pulse signal in the generated double pulse signal by configuring the software of the existing wave generating device, step S31 is performed to provide an effective method for controlling the pulse width of the first pulse signal in the generated double pulse signal.

[0108] Step S32, when it is monitored that the first pulse signal has been generated, after delaying the pulse interval, a second operation signal is sent to the pin based on the second pulse duration to generate the second pulse signal through the pin and continue for the second pulse duration.

[0109] It should be noted that the second operation signal is a signal used to trigger the pin to generate the second pulse signal for a specific duration.

[0110] It is understandable that, since there is currently a lack of a method that can control the pulse width of the second pulse signal in the generated double pulse signal by configuring the software of the existing wave generating device, step S32 is performed to provide an effective method for controlling the pulse width of the second pulse signal in the generated double pulse signal.

[0111] In this embodiment, the width of each pulse signal in the generated double pulse signal is controlled by receiving a customized test pulse duration for double pulse testing based on software of an existing wave generating device, thereby avoiding the problem that the pulse width of each pulse signal in the double pulse signal cannot be controlled by the existing wave generating device, and improving the controllability of the pulse width of a single pulse signal when a double pulse signal occurs.

[0112] In this embodiment, the accurate pulse interval is determined by comprehensively considering the received test interval duration and the performance index of the timer in the existing wave generating device in the existing wave generating device, and a controllable double pulse signal is generated based on the received test pulse duration and the determined pulse interval, thereby achieving the effect of generating a controllable double pulse in the existing wave generating device.

[0113] In a feasible implementation manner, the step of sending the second operation signal to the pin based on the second pulse duration after delaying the pulse interval in step S32 may include steps S301 to S302:

[0114] Step S301, when it is detected that the first pulse has been generated, the timer starts timing;

[0115] It is understandable that due to the current lack of a method to control the pulse interval between two pulse signals in a double pulse signal through a timer, step S301 is performed, and the timer starts timing after the first pulse signal is generated, providing effective timing data for controlling the pulse interval.

[0116] Step S302: When the timing duration of the timer reaches the pulse interval, trigger sending a second operation signal to the pin based on the second pulse duration.

[0117] It is understandable that since there is currently a lack of a method to control the generation of a second pulse signal based on the timing duration of a timer, step S302 is performed to provide an effective method for controlling the generation of a second pulse signal by triggering the generation of a second pulse signal when the timing duration of the timer reaches the pulse interval.

[0118] In this implementation, the pulse interval between the two pulse signals in the double pulse signal is controlled by the timing operation of the timer, which provides a method for accurately controlling the pulse interval by using a timer.

[0119] Based on the first embodiment of the present application, in the second embodiment of the present application, the same or similar contents as those in the above-mentioned embodiment 1 can be referred to the above introduction, and will not be repeated in the following. Figure 2 , Figure 2 This is a flow chart of the second embodiment of the double pulse generating method of the present application.

[0120] The configuration parameters of the dual pulse wave subsystem at least include pin operating parameters and the clock frequency of the timer, wherein the clock frequency is positively correlated with the sampling frequency of the dual pulse signal;

[0121] It should be noted that the configuration parameters refer to the system parameters that need to be configured for the dual-pulse transmission subsystem to generate dual-pulse signals normally; the pin operating parameters refer to the setting parameters used to control the pin's level state, driving capability and other related characteristics; the timer's clock frequency refers to the frequency of the clock signal used when the timer counts, and the clock frequency determines the minimum time interval that the timer can measure.

[0122] After step S10, the double pulse wave generating method further includes steps S01-S02:

[0123] Step S01, configuring the working parameters of the pin to a push-pull output mode so that the pin can generate a double pulse signal;

[0124] It should be noted that the push-pull output mode refers to an output mode of an electronic circuit. In this push-pull output mode, the pin is provided with sufficient current to generate a pulse.

[0125] Exemplarily, the working parameters of the pin are configured as a push-pull output mode, and the push-pull output mode is configured with the strongest driving performance of the dual pulse generating subsystem to shorten the occurrence time of the dual pulse signal and improve the generation efficiency of the dual pulse signal.

[0126] Step S02: reducing the first pre-scaling factor of the system clock and / or the second pre-scaling factor of the timer to increase the clock frequency.

[0127] It should be noted that the system clock is the core clock of the MCU or processor, which is used to drive all internal operations and peripherals; the first pre-division coefficient refers to a parameter in the MCU or processor used to reduce the system clock frequency. In order to adapt to different needs, the system clock can be divided by setting different first pre-division coefficients, thereby reducing the system clock frequency. When the first pre-division coefficient is set to zero, it means that the system clock is not divided, that is, the system clock still runs at the maximum frequency, and the first pre-division coefficient is negatively correlated with the system clock frequency; the second pre-division coefficient is a parameter used to control the timer clock frequency. The timer clock can be divided by setting different second pre-division coefficients, thereby reducing the timer clock frequency. When the second pre-division coefficient is set to zero, it means that the timer clock frequency is not divided, that is, the timer clock frequency still runs at the maximum clock frequency, and the second pre-division coefficient is negatively correlated with the timer clock frequency.

[0128] It is understandable that, since the sampling frequency of the double pulse signal required to be generated during the double pulse test is as high as possible, step S02 is performed to increase the clock frequency of the timer to improve the sampling frequency of the double pulse signal used for the double pulse test.

[0129] In this embodiment, by configuring the corresponding pin working mode and pre-division coefficient before the pulse is generated, the generation efficiency and sampling frequency of the double pulse signal during the double pulse test are improved, so that the double pulse signal can be generated more efficiently and accurately.

[0130] Based on the first embodiment of the present application, in the third embodiment of the present application, the same or similar contents as those in the above-mentioned embodiment 1 can be referred to the above introduction, and will not be repeated in the following. Figure 3 , Figure 3 This is a flow chart of the third embodiment of the double-pulse wave generating method of the present application.

[0131] The wave generation system includes a main program for generating a single pulse signal, and the method may further include steps S101 to S102:

[0132] Step S101, upon receiving the test pulse duration and the test interval duration, and the main program is in the process of generating a single pulse signal, a first interrupt request is sent to the main program to forcibly interrupt the main program, and the step of determining the pulse interval of the double pulse signal according to the test interval duration and the performance index of the timer is executed;

[0133] It should be noted that the first interrupt request is a signal for requesting the interrupt main program to generate a single pulse signal.

[0134] It is understandable that, since it is currently impossible to implement double pulse testing at any time in existing wave generating equipment, step S101 is performed to configure the double pulse test with the highest task interrupt priority so that the double pulse test can interrupt the occurrence of a single pulse signal in the main program at any time.

[0135] Step S102, during the double pulse test, if a second interrupt request issued by the main program is received, the second interrupt request is masked; after the double pulse test is completed, the second interrupt request is executed.

[0136] It is understandable that since the double pulse test process may be disturbed by the main program, performing step S102 can avoid the double pulse test process being interrupted by the main program, thereby ensuring that the double pulse test process will not be interrupted by the main program generating a single pulse signal.

[0137] In this embodiment, by enabling the double pulse test to interrupt the main program to generate a single pulse signal, and the main program cannot interrupt the double pulse test process, the effect of ensuring that the double pulse test process can be executed quickly and smoothly is achieved.

[0138] For example, to help understand the implementation process of the double pulse wave generation method obtained by combining this embodiment with the above-mentioned embodiment 1, please refer to Figure 4 , Figure 4 A brief schematic flow chart of a double pulse wave generation method is provided, specifically:

[0139] A branch program for double pulse testing is created based on the program code of the existing wave generating device. First, the parameters are configured, that is, the pre-scaling coefficient of the system clock and / or timer, and the pin working parameters are configured, and then the input pulse duration and interval duration, that is, the test pulse duration and the test interval duration are received, and a first pulse signal is generated through a pin based on the first pulse duration in the pulse duration, and then the pulse interval is determined based on the interval duration and the performance index of the timer in the existing wave generating device, and the pulse interval is controlled by the timer, and then a second pulse signal is generated through a pin based on the second pulse duration in the pulse duration, so as to complete the generation of a controllable double pulse signal in the existing wave generating device.

[0140] For example, please refer to Figure 5 First, create a double pulse branch, that is, a branch program for double pulse testing, and then write a double pulse code. In the code, the PIN pin that generates the double pulse is initialized first, and then the delay function and double pulse timing are designed to complete the writing of the double pulse code. The written code for implementing the double pulse wave generation method is compiled, and a HEX file is generated after the compilation is completed, and the HEX file is burned on the control board where the wave generation system is located. The pulse interval between the two pulse signals in the double pulse signal and the occurrence of the double pulse signal in each pin are controlled by the host computer. After the pulse interval verification is completed, the driver board is connected first and then the power unit is connected to test the IGBT performance through an oscilloscope.

[0141] For further information, please refer to Figure 6 After the user has connected the control board and the power unit, the test process is monitored by an oscilloscope. The test process first involves software burning, that is, writing the program that records the dual-pulse wave-generating method into the original code in the control board, and controlling the MCU by connecting to the host computer. The host computer sets the first pulse duration, the interval duration, and the second pulse duration. The power unit is connected to the oscilloscope and configured as a channel edge trigger. The host computer controls the wave-generating PIN pin, that is, the pin generates a dual pulse signal, and the test is judged by checking the IGBT performance results displayed on the oscilloscope. The test is considered qualified when the error between the test pulse duration and the test interval duration set by the host computer and the actual pulse duration and the actual interval duration emitted by the MCU pin is less than 0.1μs.

[0142] It should be noted that the above examples are only used to understand the present application and do not constitute a limitation on the dual-pulse method of the present application. More simple transformations based on this technical concept are all within the protection scope of the present application.

[0143] This application also provides a dual pulse wave generating device, please refer to Figure 5 The dual-pulse wave generating device is applied to the dual-pulse wave generating subsystem under the wave generating system. The dual-pulse wave generating subsystem is used to perform a dual-pulse test. The dual-pulse wave generating subsystem at least includes a timer. The dual-pulse wave generating device includes:

[0144] A receiving module 10, configured to receive a test pulse duration of the double pulse test and a test interval duration of the double pulse test;

[0145] The delay module 20 is used to determine the pulse interval of the double pulse signal according to the test interval length and the performance index of the timer;

[0146] The wave generating module 30 is used to generate a double pulse signal based on the test pulse duration and the pulse interval.

[0147] The double pulse wave generating subsystem further comprises a pin, the test pulse duration comprises a first pulse duration and a second pulse duration, and the double pulse signal comprises a first pulse signal and a second pulse signal;

[0148] The wave generating module 30 is also used for:

[0149] Sending a first operation signal to the pin based on the first pulse duration, so as to generate the first pulse signal through the pin and last for the first pulse duration;

[0150] When it is monitored that the first pulse signal has been generated, after delaying the pulse interval, a second operation signal is sent to the pin based on the second pulse duration to generate the second pulse signal through the pin and continue for the second pulse duration.

[0151] The timer is configured with registers and delay tasks, and the performance indicators include clock frequency, minimum time division of the delay task and timestamp of the register, wherein the timestamp is used to record time information when reading the delay function, time information when reading and completing the delay function, time information when reading the pin operation function, and time information when executing and completing the pin operation function, the delay function is used to execute the delay task, and the pin operation function is used to execute the task of generating a pulse signal through the pin;

[0152] The delay module 20 is also used for:

[0153] Obtaining the clock frequency of the timer and the minimum time division of the delay task, and determining the unit period of the timestamp according to the clock frequency;

[0154] Divide the minimum time division by the unit period to obtain the timestamp width of the delayed task;

[0155] The timestamp width is multiplied by the interval duration to obtain a candidate pulse interval, and the candidate pulse interval is calibrated according to the timestamp to obtain the pulse interval.

[0156] The timestamp includes a first timestamp, a second timestamp, a third timestamp and a fourth timestamp, and the delay module 20 is further used for:

[0157] Acquire, by means of the timer, the first timestamp when the double-pulse transmitting subsystem starts reading the delay function, and the second timestamp when the reading of the delay function is completed;

[0158] Subtract the first timestamp from the second timestamp to obtain a delay function reading timestamp width, and multiply the delay function reading timestamp width by the unit period to obtain a delay function reading duration;

[0159] Acquire, by means of the timer, the third timestamp when the double pulse transmitting subsystem starts to read the pin operation function, and the fourth timestamp when the pin operation function is completed;

[0160] Subtract the third timestamp from the fourth timestamp to obtain a pin operation timestamp width, and multiply the pin operation timestamp width by the unit period to obtain a pin operation duration;

[0161] Adding the delay function reading duration and the pin operation duration to obtain an error duration, and then dividing the error duration by the unit period to obtain a calibration duration;

[0162] The pulse interval is obtained by subtracting the calibration duration from the candidate pulse interval.

[0163] The configuration parameters of the dual pulse transmission subsystem at least include pin operating parameters and the clock frequency of the timer, wherein the clock frequency is positively correlated with the sampling frequency of the dual pulse signal, and the receiving module 10 is further used for:

[0164] The working parameters of the pin are configured as a push-pull output mode so that the pin can generate a double pulse signal;

[0165] The first pre-scaling factor of the system clock and / or the second pre-scaling factor of the timer are reduced to increase the clock frequency.

[0166] The double pulse wave generating device is also used for:

[0167] Upon receiving the test pulse duration and the test interval duration, and the main program is in the process of generating a single pulse signal, a first interrupt request is sent to the main program to forcibly interrupt the main program, and the step of determining the pulse interval of the double pulse signal according to the test interval duration and the performance indicator of the timer is performed;

[0168] During the double pulse test, if a second interrupt request issued by the main program is received, the second interrupt request is masked; after the double pulse test is completed, the second interrupt request is executed.

[0169] The wave generating module 30 is also used for:

[0170] When it is detected that the first pulse has been generated, the timer starts timing;

[0171] When the timing duration of the timer reaches the pulse interval, a second operation signal is triggered to be sent to the pin based on the second pulse duration.

[0172] The dual-pulse wave generating device provided by the present application adopts the dual-pulse wave generating method in the above-mentioned embodiment, and can solve the technical problem of how to generate controllable dual pulses in the existing wave generating equipment. Compared with the prior art, the beneficial effects of the dual-pulse wave generating device provided by the present application are the same as the beneficial effects of the dual-pulse wave generating method provided by the above-mentioned embodiment, and the other technical features in the dual-pulse wave generating device are the same as the features disclosed in the above-mentioned embodiment method, which will not be described in detail here.

[0173] The present application provides an electronic device, which includes: at least one processor; and a memory connected to the at least one processor in communication; wherein the memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the double-pulse wave generation method in the above-mentioned embodiment 1.

[0174] Reference below Figure 6, which shows a schematic diagram of the structure of an electronic device suitable for implementing the embodiments of the present application. The electronic devices in the embodiments of the present application may include but are not limited to mobile terminals such as mobile phones, laptop computers, digital broadcast receivers, PDAs (Personal Digital Assistants), PADs (Portable Application Descriptions), PMPs (Portable Media Players), vehicle-mounted terminals (such as vehicle-mounted navigation terminals), etc., and fixed terminals such as digital TVs, desktop computers, etc. Figure 6 The electronic device shown is merely an example and should not bring any limitation to the functions and scope of use of the embodiments of the present application.

[0175] like Figure 6 As shown, the electronic device may include a processing device 1001 (e.g., a central processing unit, a graphics processor, etc.), which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM: Read Only Memory) 1002 or a program loaded from a storage device 1003 to a random access memory (RAM: Random Access Memory) 1004. In RAM1004, various programs and data required for the operation of the electronic device are also stored. The processing device 1001, ROM1002, and RAM1004 are connected to each other through a bus 1005. An input / output (I / O) interface 1006 is also connected to the bus. Generally, the following systems can be connected to the I / O interface 1006: an input device 1007 including, for example, a touch screen, a touch pad, a keyboard, a mouse, an image sensor, a microphone, an accelerometer, a gyroscope, etc.; an output device 1008 including, for example, a liquid crystal display (LCD: Liquid Crystal Display), a speaker, a vibrator, etc.; a storage device 1003 including, for example, a magnetic tape, a hard disk, etc.; and a communication device 1009. The communication device 1009 can allow the electronic device to communicate with other devices wirelessly or by wire to exchange data. Although the figure shows an electronic device with various systems, it should be understood that it is not required to implement or have all the systems shown. More or fewer systems can be implemented or have alternatively.

[0176] In particular, according to the embodiments disclosed in the present application, the process described above with reference to the flowchart can be implemented as a computer software program. For example, the embodiments disclosed in the present application include a computer program product, which includes a computer program carried on a computer-readable medium, and the computer program includes a program code for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from a network through a communication device, or installed from a storage device 1003, or installed from a ROM 1002. When the computer program is executed by the processing device 1001, the above-mentioned functions defined in the method of the embodiment disclosed in the present application are executed.

[0177] The electronic device provided by the present application adopts the double pulse wave generation method in the above embodiment, which can solve the technical problem of how to generate controllable double pulses in the existing wave generation device. Compared with the prior art, the beneficial effects of the electronic device provided by the present application are the same as the beneficial effects of the double pulse wave generation method provided by the above embodiment, and other technical features in the electronic device are the same as the features disclosed in the method of the previous embodiment, which will not be repeated here.

[0178] It should be understood that the various parts disclosed in this application can be implemented by hardware, software, firmware or a combination thereof. In the description of the above embodiments, specific features, structures, materials or characteristics can be combined in any one or more embodiments or examples in a suitable manner.

[0179] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

[0180] The present application provides a computer-readable storage medium having computer-readable program instructions (ie, computer programs) stored thereon, and the computer-readable program instructions are used to execute the double-pulse wave generation method in the above-mentioned embodiment.

[0181] The computer-readable storage medium provided in the present application may be, for example, a USB flash drive, but is not limited to electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, systems or devices, or any combination of the above. More specific examples of computer-readable storage media may include, but are not limited to: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In this embodiment, the computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in combination with an instruction execution system, system or device. The program code contained on the computer-readable storage medium may be transmitted using any appropriate medium, including but not limited to: wires, optical cables, RF (Radio Frequency), etc., or any suitable combination of the above.

[0182] The computer-readable storage medium may be included in the electronic device, or may exist independently without being installed in the electronic device.

[0183] The above-mentioned computer-readable storage medium carries one or more programs. When the above-mentioned one or more programs are executed by an electronic device, the electronic device: receives the test pulse duration of the double pulse test and the test interval duration of the double pulse test; determines the pulse interval of the double pulse signal according to the test interval duration and the performance index of the timer; and generates a double pulse signal based on the test pulse duration and the pulse interval.

[0184] Computer program code for performing the operations of the present application may be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, C++, and conventional procedural programming languages ​​such as "C" or similar programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer, as a separate software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0185] The flow chart and block diagram in the accompanying drawings illustrate the possible architecture, function and operation of the system, method and computer program product according to various embodiments of the present application. In this regard, each square box in the flow chart or block diagram can represent a module, a program segment or a part of a code, and the module, the program segment or a part of the code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the square box can also occur in a sequence different from that marked in the accompanying drawings. For example, two square boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each square box in the block diagram and / or flow chart, and the combination of the square boxes in the block diagram and / or flow chart can be implemented with a dedicated hardware-based system that performs a specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0186] The modules involved in the embodiments described in this application may be implemented by software or hardware, wherein the name of the module does not constitute a limitation on the unit itself in some cases.

[0187] The readable storage medium provided by the present application is a computer-readable storage medium, which stores computer-readable program instructions (i.e., computer programs) for executing the above-mentioned double-pulse wave generation method, and can solve the technical problem of how to generate controllable double pulses in existing wave generation equipment. Compared with the prior art, the beneficial effects of the computer-readable storage medium provided by the present application are the same as the beneficial effects of the double-pulse wave generation method provided by the above-mentioned embodiment, and will not be repeated here.

[0188] The present application also provides a computer program product, including a computer program, which implements the steps of the double-pulse wave generation method as described above when executed by a processor.

[0189] The computer program product provided by the present application can solve the technical problem of how to generate controllable double pulses in existing wave generating devices. Compared with the prior art, the beneficial effects of the computer program product provided by the present application are the same as the beneficial effects of the double pulse wave generating method provided by the above embodiment, which will not be described in detail here.

[0190] The above descriptions are only some embodiments of the present application, and are not intended to limit the patent scope of the present application. All equivalent structural changes made using the contents of the present application specification and drawings under the technical concept of the present application, or direct / indirect applications in other related technical fields are included in the patent protection scope of the present application.

Claims

1. A double pulse wave generation method, characterized in that: A double pulse wave generating subsystem is applied to a wave generating system, the double pulse wave generating subsystem is used to perform a double pulse test, the double pulse wave generating subsystem at least comprises a timer, the timer is configured with a register and a delay task, and the method comprises: Receiving a test pulse duration of the double pulse test and a test interval duration of the double pulse test; Obtain the clock frequency of the timer and the minimum time division of the delay task, and determine the unit period of the timestamp of the register according to the clock frequency, wherein the timestamp is used to record the time information when reading the delay function, the time information when reading the delay function, the time information when reading the pin operation function, and the time information when executing the pin operation function. The delay function is used to execute the delay task, and the pin operation function is used to execute the task of generating a pulse signal through the pin; Divide the minimum time division by the unit period to obtain the timestamp width of the delayed task; Multiplying the timestamp width by the interval duration to obtain a candidate pulse interval, and calibrating the candidate pulse interval according to the timestamp to obtain the pulse interval; A double pulse signal is generated based on the test pulse duration and the pulse interval.

2. The method according to claim 1, characterized in that The double pulse wave generating subsystem further comprises a pin, the test pulse duration comprises a first pulse duration and a second pulse duration, and the double pulse signal comprises a first pulse signal and a second pulse signal; The step of generating a double pulse signal based on the test pulse duration and the pulse interval comprises: Sending a first operation signal to the pin based on the first pulse duration, so as to generate the first pulse signal through the pin and last for the first pulse duration; When it is monitored that the first pulse signal has been generated, after delaying the pulse interval, a second operation signal is sent to the pin based on the second pulse duration to generate the second pulse signal through the pin and continue for the second pulse duration.

3. The method according to claim 1, characterized in that The timestamps include a first timestamp, a second timestamp, a third timestamp, and a fourth timestamp, and the step of calibrating the candidate pulse interval according to the timestamps to obtain the pulse interval includes: Acquire, by means of the timer, the first timestamp when the double-pulse transmitting subsystem starts reading the delay function, and the second timestamp when the reading of the delay function is completed; Subtract the first timestamp from the second timestamp to obtain a delay function reading timestamp width, and multiply the delay function reading timestamp width by the unit period to obtain a delay function reading duration; Acquire, by means of the timer, the third timestamp when the double pulse transmitting subsystem starts to read the pin operation function, and the fourth timestamp when the pin operation function is completed; Subtract the third timestamp from the fourth timestamp to obtain a pin operation timestamp width, and multiply the pin operation timestamp width by the unit period to obtain a pin operation duration; Adding the delay function reading duration and the pin operation duration to obtain an error duration, and then dividing the error duration by the unit period to obtain a calibration duration; The pulse interval is obtained by subtracting the calibration duration from the candidate pulse interval.

4. The method according to claim 2, characterized in that The configuration parameters of the dual pulse transmission subsystem at least include pin operating parameters and the clock frequency of the timer, wherein the clock frequency is positively correlated with the sampling frequency of the dual pulse signal, and after the step of receiving the test pulse duration and the test interval duration, the step further includes: The working parameters of the pin are configured as a push-pull output mode so that the pin can generate a double pulse signal; The first pre-scaling factor of the system clock and / or the second pre-scaling factor of the timer are reduced to increase the clock frequency.

5. The method according to claim 1, characterized in that The wave generating system includes a main program for generating a single pulse signal, and the method further includes: Upon receiving the test pulse duration and the test interval duration, and the main program is in the process of generating a single pulse signal, a first interrupt request is sent to the main program to forcibly interrupt the main program, and the steps of obtaining the clock frequency of the timer and the minimum time division of the delay task, and determining the unit period of the timestamp of the register according to the clock frequency are executed; During the double pulse test, if a second interrupt request issued by the main program is received, the second interrupt request is masked; after the double pulse test is completed, the second interrupt request is executed.

6. The method according to claim 2, characterized in that The step of controlling the timer to delay the pulse interval and sending the second operation signal to the pin based on the second pulse duration comprises: When it is detected that the first pulse has been generated, the timer starts timing; When the timing duration of the timer reaches the pulse interval, a second operation signal is triggered to be sent to the pin based on the second pulse duration.

7. A double pulse wave generating device, characterized in that: A double pulse wave generating subsystem applied to a wave generating system, the double pulse wave generating subsystem is used for performing a double pulse test, the double pulse wave generating subsystem at least comprises a timer, the timer is configured with a register and a delay task, and the device comprises: A receiving module, used for receiving a test pulse duration of the double pulse test and a test interval duration of the double pulse test; A delay module, used to obtain the clock frequency of the timer and the minimum time division of the delay task, and determine the unit period of the timestamp of the register according to the clock frequency, wherein the timestamp is used to record the time information when reading the delay function, the time information when reading the delay function, the time information when reading the pin operation function, and the time information when executing the pin operation function, the delay function is used to execute the delay task, and the pin operation function is used to execute the task of generating a pulse signal through the pin; the minimum time division is divided by the unit period to obtain the timestamp width of the delay task; the timestamp width is multiplied by the interval duration to obtain a candidate pulse interval, and the candidate pulse interval is calibrated according to the timestamp to obtain the pulse interval; The wave generating module is used to generate a double pulse signal based on the test pulse duration and the pulse interval.

8. An electronic device, characterized in that: The device comprises: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the computer program is configured to implement the steps of the double-pulse waving method according to any one of claims 1 to 6.

9. A storage medium, characterized in that: The storage medium is a computer-readable storage medium, and a computer program is stored on the storage medium. When the computer program is executed by a processor, the steps of the double-pulse wave generation method according to any one of claims 1 to 6 are implemented.

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