49 results about "Dual pulse" patented technology

The invention provides a double-pulse high-frequency switching power supply control method and system for precise electroplating, and relates to the field of electroplating, and the method comprises the steps: collecting area surface data through a three-dimensional scanner, and obtaining a three-dimensional model; extracting a high-curvature area grid according to the three-dimensional model, and calculating to obtain a surface concave-convex degree index; performing current field simulation, and calculating current density vector distribution; when the deviation of the current density vector distribution exceeds a preset deviation threshold value, pulse parameters are optimized through a genetic algorithm; selecting a pulse parameter which is most matched with the surface concave-convex degree index, and carrying out iterative calculation to obtain updated current density vector distribution; based on the difference between the updated current density vector distribution and the initial distribution, predicting a coating thickness value, and determining a preliminary evaluation index; and optimizing pulse parameters to obtain a final control scheme of uniform current distribution. According to the method, pulse parameters can be dynamically optimized according to the geometrical shape of the workpiece, and uniform current distribution and stable plating quality are realized.

The invention discloses a double-end photoelectric synapse element based on two-dimensional intrinsic ferroelectricity and TMDs Van der Waals heterojunction as well as a preparation method and application of the double-end photoelectric synapse element, and belongs to the technical field of photoelectric synapses. The element comprises a substrate layer, a channel layer and a packaging layer which are stacked in sequence, the channel layer is formed by stacking a single layer of two-dimensional TMDs and a two-dimensional intrinsic ferroelectric alpha-indium selenide layer; a source electrode is deposited on the TMDs, and a drain electrode is deposited on the alpha-indium selenide layer. The preparation method of the element comprises the following steps: cleaning the substrate layer, growing the single-layer two-dimensional TMDs through a CVD (chemical vapor deposition) method, and stacking the two-dimensional intrinsic ferroelectric alpha-indium selenide layer on the single-layer two-dimensional TMDs to obtain a precursor; the precursor is sequentially subjected to primary annealing, etching and electrode evaporation, and then is subjected to secondary annealing, so that the electrode is obtained. The element adopts photoelectric signal hybrid regulation and control, is used for preparing an artificial brain-like synapse device, and can effectively solve the problems of high power consumption and low dipulse dissimilation index in the prior art.

The invention discloses a double-pulse test protection circuit, relates to the field of power electronics, and is characterized in that a third switch, a current detection device and a control module are additionally arranged on the basis of an original double-pulse test circuit, and the purpose of the scheme is to collect the current value of a loop where an inductor is located through the current detection device; when the current value of the loop where the inductor is located is larger than a preset current threshold value (the current value of the loop is too high), the first switch is automatically switched off through the control module, and then the whole double-pulse test protection circuit is switched off. The current value in the double-pulse test protection circuit is not increased any more, and the reliability and safety of the scheme are ensured.

This invention discloses a method for enhancing and controlling the radiation of an LPP-EUV light source based on dual-pulse spatiotemporal co-constraint, belonging to the field of semiconductor manufacturing technology. This invention obtains a spatiotemporal reference by real-time monitoring of a liquid metal droplet, uses a pre-pulse laser to induce target material deformation into a fogged target cloud, and combines high-speed imaging and a hydrodynamic model to predict the time and coordinates of the target cloud's energy absorption peak. It dynamically adjusts the delay time and optical axis direction of the main pulse laser to achieve dual-pulse spatiotemporal co-constraint, and constructs a closed-loop control system through a recursive least squares algorithm with a dynamic forgetting factor. This invention effectively improves the extreme ultraviolet light conversion efficiency, controls the power fluctuation of the light source within ±0.5%, and extends the maintenance cycle of optical components by 2 times. It can be widely applied to next-generation high-power extreme ultraviolet lithography light source systems, meeting the application requirements of semiconductor miniaturization processes.

The invention relates to a double-pulse test method and a test circuit. The method comprises the following steps: providing a double-pulse test circuit; the double-pulse test circuit comprises an energy charging circuit and a resonance circuit, the resonance circuit is a half-bridge LC resonance circuit or a full-bridge LC resonance circuit, and the energy charging circuit comprises a power supply and a bus capacitor; the bus capacitor is charged through the power supply; in response to charging the bus capacitor to the target voltage, disconnecting the power supply from the bus capacitor and the resonant circuit; and applying a control voltage to the control ends of the upper bridge and the lower bridge in the resonant circuit, obtaining a gate-source voltage, a drain-source voltage and a drain-source current of each switching tube in the resonant circuit under the control voltage, and obtaining a test result according to the gate-source voltage, the drain-source voltage and the drain-source current. According to the invention, the characteristics of the MOS tube in the LLC converter during actual work can be analyzed. Based on the test result obtained by the method, an important reference basis can be provided for model selection of the primary MOS transistor of the LLC converter, and poor products caused by design errors and improper model selection are avoided.

The present application relates to the field of integrated circuit technology, and provides a pulse trigger type level shift circuit, which comprises a double pulse current generating circuit, a high-low level shift conversion holding circuit, a high voltage domain output shaping filter circuit and an RS flip-flop connected in sequence. The double pulse current generating circuit generates a short double pulse current signal in response to a jump edge of a low voltage domain input signal; the high-low level shift conversion holding circuit combines the current signal with the input signal to generate a complementary pulse voltage signal in a high voltage domain; the shaping filter circuit shapes and filters the pulse voltage; and the RS flip-flop finally latches the logic state and outputs a stable high voltage domain signal without glitches. The present application generates an extremely short pulse only when the signal jumps by means of pulse current trigger, eliminates the static current path, and has low static power consumption. Meanwhile, the pulse driving is used to realize fast level inversion under high voltage difference, and the input signal driving capability requirement is low, so that the high speed and low power consumption characteristics are taken into account.

This application discloses a double-pulse testing device and method for power semiconductors, belonging to the field of power semiconductor technology. The device includes: a global control module, used to generate a parameter package based on the test task and characteristic parameters of the target device when a double-pulse test is to be performed on a target device, send the parameter package to a target local execution module, and iteratively adjust the parameter package based on the double-pulse test results of the target device fed back by the target local execution module, while simultaneously sending the iteratively adjusted parameter package to the target local execution module until the double-pulse test results of the target device fed back by the target local execution module meet the test objective; and a target local execution module, used to perform double-pulse testing on the target device according to the parameter package issued by the global control module, and to feed back the double-pulse test results of the target device to the global control module. This device can improve the efficiency and accuracy of double-pulse testing of power semiconductors.

This invention discloses a design method for parallel current sharing of BOOST multiphase interleaved silicon carbide single transistors. It identifies key parasitic parameters by building a dual-pulse simulation platform, completes device layout in conjunction with the overall system structure, uses PCB symmetry and copper layer stacking to control parasitic parameter consistency, and forms a design closed loop through dual-pulse and steady-state thermal testing. This effectively solves the problem of poor current sharing in parallel silicon carbide single transistors. Furthermore, this method ensures balanced current distribution during switching transients and conduction steady states, eliminates current sharing failures caused by parasitic parameter mismatch, fully utilizes the performance of silicon carbide single transistors without requiring amplification device margins, flexibly adapts to the overall system layout, improves space utilization, optimizes system efficiency, reduces design costs and redundancy, and achieves a reliable, efficient, and highly adaptable design for parallel current sharing of BOOST multiphase interleaved silicon carbide single transistors.

The invention discloses a double-pulse gold-silver alloy electroplating system which comprises an annular EIS sensor module, a double-channel out-phase pulse power supply module, a fuzzy PID dynamic control module and a micro-injection compensation module. The annular EIS sensor module is annularly distributed along the inner wall of the electroplating bath, comprises an impedance spectrum detection electrode and an ion selection membrane, and is used for monitoring the concentration of Au2 + / Ag + in real time and detecting the impedance gradient of a deposited layer. The dual-channel out-phase pulse power supply module comprises six groups of independent temperature control pulse anode groups, and each group is connected with a dual-channel power supply comprising an Au channel and an Ag channel. The fuzzy PID dynamic control module receives the concentration deviation value and the impedance gradient data, and pulse power supply parameters are adjusted through a multivariable coupling algorithm. The micro-injection compensation module is arranged on the side wall of the tank body and comprises eight groups of micro-injection pumps, and liquid supplementing is triggered when the consumption difference value of the metal salt exceeds 5%. Accurate control over the gold-silver alloy electroplating process is achieved, and the quality and consistency of a plating layer are improved.

The invention discloses a power module stray inductance test method and test platform, and relates to the field of power module stray inductance test, the method comprises the following steps: 1, constructing a test circuit, connecting a power module to be tested and a test accompanying power module in series, and then connecting the power module to be tested and the test accompanying power module in parallel with a bus capacitor; step 2, configuring a test state, configuring an upper tube and a lower tube of the to-be-tested power module to be in a conducting state, configuring an upper tube of the accompanying test power module to be in a turn-off state, and applying a double-pulse signal to a control electrode of the lower tube of the accompanying test power module; 3, collecting test data, and collecting voltage Vds at two ends of the power module to be tested and the change rate of current flowing through the power module to be tested when the double-pulse signal controls the lower tube of the test accompanying power module to perform secondary conduction; 4, calculating a single-time stray feeling calculation value; and step 5, repeating the steps 2-4 for N times, and taking an average value of N single stray inductance calculation values obtained by N times of calculation as a power module stray inductance value obtained by measurement. The method improves the convenience and accuracy of the stray inductance test of the power module.

The utility model discloses a double-pulse test platform capable of preventing connection wires from falling off, and particularly relates to the technical field of double-pulse test platforms, which comprises an experiment table and a plurality of current clamps, and is characterized in that the right part of the upper end of the experiment table is fixedly connected with a control cabinet body, and the left part of the upper end of the experiment table is fixedly connected with an external inductor body; a plurality of bearing plates are fixedly connected to the middle of the upper end of the external inductor body in a linear array distribution mode, the current clamps and the bearing plates are movably installed in a one-to-one correspondence mode, and a plurality of anti-disengaging assemblies are arranged in the middle of the upper end of the external inductor body in a linear array distribution mode. Reset assemblies are symmetrically arranged on the left portion and the right portion of the upper side of each bearing plate, and limiting assemblies and clamping assemblies are symmetrically arranged on the left side and the right side of each reset assembly. According to the double-pulse test platform capable of preventing the connection wire from falling off, the anti-falling assembly is arranged, and after the current clamp is inserted into the slot arranged in the anti-falling assembly, the plug part of the current clamp is pressed.

The application provides a low-temperature double-pulse test platform and method, and relates to the technical field of power device testing.The platform comprises a refrigeration compressor, a cooling platform, an enclosure, an air extraction unit, a temperature acquisition unit, a parameter acquisition unit and a control unit.The control unit is used for acquiring surface temperature information of the power device to be tested, platform temperature information of the cooling platform and thermistor parameters under the action of a calibration pulse during the cooling process, determining the corrected equivalent junction temperature parameters of the power device to be tested, and controlling the double-pulse test loop to perform double-pulse testing when the corrected equivalent junction temperature parameters enter a target test temperature window.The method introduces a calibration pulse and thermistor parameters on the basis of a low-temperature environment, corrects and characterizes the actual thermal state of the power device to be tested, and controls the double-pulse testing time in combination with the target test temperature window, so as to improve the accuracy, consistency and repeatability of low-temperature double-pulse testing.

The invention particularly relates to a method and a system for estimating the minimum velocity increment of multi-circle double-pulse orbit transfer under J2 perturbation. The method comprises the following steps: uniformly representing origin-destination orbit states as six spring equinox elements taking flat longitude as a phase quantity; aiming at a transfer structure of a first pulse, middle drift and a second pulse, determining a limited transfer turn number search window by utilizing a flat longitude drift characteristic and a pulse capability; a closed equality constraint system with the total variable quantity = the first pulse variable quantity + the middle-section drift variable quantity + the second pulse variable quantity is constructed, and it is ensured that the track state is strictly closed; pulse is decomposed into tangential, normal and radial components for cooperative solution, and a phase closed loop is realized by updating a semi-diameter increment; and performing low-dimensional nonlinear optimization in a limited number of turns to quickly obtain minimum speed increment estimation. According to the method, the calculation efficiency is remarkably improved while the precision is guaranteed, and the method is suitable for large-scale sequence optimization in the near-earth orbit multi-target access task.

The invention provides a SiC MOSFET short-circuit protection circuit, which comprises a double-pulse circuit and a desaturation short-circuit protection circuit, and is characterized in that a driving chip detects the double-pulse circuit through the desaturation short-circuit protection circuit; whether the device breaks down or not is judged by judging whether the drain-source voltage of the device exceeds the set threshold voltage or not, misoperation of short-circuit protection in the switching process is effectively avoided by designing the blanking time, the charging speed of the blanking capacitor during the short-circuit fault is increased, the blanking time is remarkably shortened, the device can be turned off more quickly, and the SiC MOSFET is protected against damage. The method is especially suitable for SiC MOSFETs with higher short-circuit current and weaker short-circuit endurance capability.

The application belongs to the technical field of laser radar, and discloses a laser radar system and a velocity measurement method based on an unequal-arm interferometer, which comprises a laser, a light splitting module, an optical amplification module, a transmitting light path, a receiving light path, a filtering module, an unequal-arm interferometer, two-way detection modules and a main control module; the main control module is used for controlling the system timing, collecting first to fourth electric signals for data processing, calculating a first phase according to the first and second electric signals, calculating a second phase according to the third and fourth electric signals, and finally obtaining the velocity information of the target according to the difference between the first and second phases. Compared with the prior art, the application utilizes the unequal-arm interferometer to make the echo signal delay self-interference, can obtain the Doppler shift information of the target, and thus obtains the velocity of the target. The scheme does not need to transmit double-pulse signals, does not need to perform coherent detection and Fourier analysis, or sweep the echo signal, and thus reduces the complexity of the system.

The invention discloses a double-wire double-pulse MIG welding power supply system based on fractional calculus. The double-wire double-pulse MIG welding power supply system comprises a host power supply, a slave power supply, a DSP control module, a master wire arc load and a slave wire arc load. One end of the host power supply is connected with a three-phase AC power grid, and the other end is connected with the main wire arc load. One end of the slave power supply is connected with the three-phase alternating current power grid, and the other end is connected with the slave wire arc load; the host power supply and the slave power supply are respectively connected with the same DSP control module, and the DSP control module is integrated with a fractional calculus control module; and the fractional calculus control module outputs four paths of pulse width modulation (PWM) signals to respectively control on and off of a switching tube of the host power supply and a switching tube of the slave power supply, so that the system enters a double-pulse mode to work. Complex nonlinear and time-varying dynamic characteristics of a welding arc and a molten pool system can be described and matched more accurately.

A non-volatile memory device includes control circuitry configured to apply a first program voltage to a selected word line, wherein a first subset of memory cells of the selected word line corresponding to a first set of data states are inhibited from programming with the first program voltage, and wherein the first program voltage is applied to a second subset of memory cells corresponding to a second set of data states. The control circuitry is further configured to discharge a first voltage of the selected word line to a second voltage level corresponding to a second program voltage, such that the second program voltage is applied to at least the first subset of memory cells. The control circuitry is further configured to perform a verify operation to verify whether the first subset of memory cells and the second subset of memory cells have completed programming. A method of programming memory cells of a non-volatile memory is also disclosed.

The application discloses a high-voltage integrated circuit, comprising a Schmitt circuit, a filter, a level conversion circuit, a double-pulse generator, a single DMOS drive circuit and an output circuit; an input end of the Schmitt circuit is electrically connected with an input signal, an output end of the Schmitt circuit is electrically connected with an input end of the filter, an output end of the filter is electrically connected with an input end of the level conversion circuit, an output end of the level conversion circuit is electrically connected with an input end of the double-pulse generator, an output end of the double-pulse generator is electrically connected with an input end of the single DMOS drive circuit, and an output end of the single DMOS drive circuit is electrically connected with the output circuit; the single DMOS drive circuit is used for merging and frequency dividing two pulse signals from the double-pulse generator; the application aims to provide a high-voltage integrated circuit, which reduces mutual interference between DMOS tubes in the circuit by adopting the single DMOS drive circuit, and simultaneously reduces design space.

The application relates to a double-pulse test protection device and method for a SiC MOSFET, wherein the device is connected with an upper tube device and a lower tube device respectively; the upper tube device and the lower tube device are detected through the introduction of a turn-on detector and a turn-off detector; specifically, the turn-on detector is arranged at the source of the upper tube device, and the turn-off detector is arranged at the source of the lower tube device; dynamic parameters generated by the two devices are obtained under different test working conditions, and it is judged whether the dynamic parameters are within a safe threshold range, and then different processing measures are automatically executed according to different judgment results. The device has the advantages of high intelligence, high identification accuracy and high working reliability.

The utility model relates to the technical field of pulse power supplies, and discloses a control circuit of a pulse power supply, which comprises a pre-stage power supply, a positive pulse module, a negative pulse module and a pulse power supply control board, and is characterized in that the pre-stage power supply is respectively connected with a power supply input end of the positive pulse module and a power supply input end of the negative pulse module; the pulse power supply control board is respectively connected with the control end of the positive pulse module and the control end of the negative pulse module; the pulse power supply output end of the positive pulse module and the pulse power supply output end of the negative pulse module are connected in parallel with the two ends of a load. By controlling different on-off states of the positive pulse module and the negative pulse module, the high-precision high-speed pulse power supply can work in multiple modes of direct current, single pulse and positive and negative double pulses.

The application discloses a method and system for double-pulse test voltage and current waveform time sequence deviation calibration, which comprises signal interception, time domain coarse alignment, periodic oscillation section interception, spectrum decomposition and oscillation frequency phase analysis, and frequency domain fine alignment and waveform reconstruction. The method extracts the inherent phase relationship of the voltage and current oscillation waveform after the switch device is turned off, combines signal preprocessing and frequency domain calculation, and realizes fast and high-precision automatic time sequence alignment. Compared with the hardware method, the method is simple to operate, does not need to make any modification to the circuit in advance, does not affect the reliability of the test result, does not depend on specific probes or test fixtures, has strong universality, and can be realized through software.

The invention provides a grain refinement method based on double-pulse waveform fine modulation, and belongs to the technical field of welding. The method comprises the steps that different average currents are obtained by changing current base values of a strong pulse train and a weak pulse train, and different heat inputs in the welding process are formed; the maximum value of the current base value is limited according to the diameter of the welding wire; and through circulation of the strong pulse train and the weak pulse train, grains at the bottom of a weld pool formed in the welding process are refined. And through circulation of the strong pulse train and the weak pulse train, a stirring effect is generated on the bottom of a weld pool formed in the welding process, so that the growth process of grains is continuously broken, and grain refinement of the electric arc welding weld microstructure is not achieved.

This invention discloses a method and apparatus for sputtering deposition of optical thin films based on a dual-pulse source, belonging to the field of optical thin film manufacturing technology within optical manufacturing. This invention adjusts the corresponding deposition parameters for different substrates and targets to achieve the deposition and preparation of various optical thin films. The dual-pulse source consists of a main source and an auxiliary source. High-energy charged particles generated by the main pulse source bombard the target surface, undergoing cascade collisions within several atomic layers. Energy exchange occurs between the particles and the target. When the target atoms gain sufficient energy to overcome their atomic barriers, they leave the target surface and deposit on the substrate to form a thin film. High-energy particles generated by the auxiliary pulse source bombard the surface of the growing thin film. Film molecules gain greater kinetic energy through energy and momentum transfer with the high-energy particles, resulting in enhanced film adhesion and a denser surface arrangement. This invention can achieve the preparation of multiple types of optical thin films while also improving the filling density and performance of optical thin films.

The application discloses a double-pulse test method, and relates to the technical field of power module testing, and comprises the following steps: S1, a double-pulse test platform is built; S2, parameter setting; S3, double-pulse test is executed; S4, test parameters are derived; and S5, parameter verification. The double-pulse test method effectively reduces electromagnetic interference by optimizing the design of the test platform, ensures the accuracy of waveform and parameter measurement, quantitatively calculates the first pulse width and test inductance through a formula, guarantees that the test current accurately reaches a target value, lays a foundation for switch parameter extraction, and clearly defines test voltage increment criteria, waveform monitoring points and a verification process after driving parameter adjustment, thereby ensuring the consistency and reliability of test results. Finally, parameters such as switch loss, voltage peak and delay time are comprehensively extracted, which directly reflects the actual characteristics of the power module and provides key references for converter design, such as driving circuit optimization and heat dissipation design.

The utility model discloses a dynamic performance test circuit, system and module of a three-phase full-bridge MOS module. The dynamic performance test circuit is configured with a switch U1, a switch U2, a switch U3, a switch U4, a switch U5, a switch U6, an inductor L1 and an inductor L2. According to the dynamic performance test circuit, the switches U1-U6 are configured, a circuit loop used for a double-pulse test and a circuit loop used for a short-circuit test are constructed by controlling the on and off of the switches U1-U6, the double-pulse test and the short-circuit test can be carried out on the same circuit, and the test cost is effectively reduced.

This invention relates to a method and system for identifying reverse recovery conduction paths and predicting dynamic characteristics of SiC MOSFETs, belonging to the field of power semiconductor device testing and reliability analysis. The method includes: Step 1: Constructing a dual-pulse test circuit and acquiring waveform data; Step 2: Preprocessing the data; Step 3: Extracting feature parameters and constructing feature vectors; Step 4: Outputting the conduction path type and device degradation state; Step 5: Based on the conduction path type, combined with the total current decomposition relationship and the dynamic response characteristics of the device under different test conditions, establishing a conduction path decomposition model, and calculating the current proportions of the MOS channel conduction path, body diode conduction path, and Schottky diode conduction path; Step 6: Predicting reverse recovery parameters; Step 7: Assessing device status, predicting remaining lifetime, and assessing failure risk. This invention automates the processing of dual-pulse test data and, for the first time, achieves quantitative identification of conduction paths.

The utility model belongs to the field of inverter circuits, and comprises a double-pulse and short-circuit test device of an NPC T type three-level circuit, which is used for carrying out half-bus voltage double-pulse and short-circuit test on a first IGBT tube Q1 or a second IGBT tube Q2 in a test circuit of the NPC T type three-level circuit. Comprising a third selection device S3 which is arranged in parallel between two ends of a third IGBT tube Q3 and a fourth IGBT tube Q4 which are connected in sequence in a test circuit of the NPC T type three-level circuit; and the half-bus voltage double-pulse test module is used for selectively performing half-bus voltage double-pulse test and short-circuit test on the first IGBT tube Q1 or the second IGBT tube Q2. The method is used for avoiding too long time consumption in the test process, so that the test process can be quickly switched.

The invention discloses double-pulse confinement ion flow deposition equipment, and relates to the field of atomic-scale manufacturing, and the equipment comprises a cathode target material, a pulse trigger power supply, a magnetic filtering pipeline, a vacuum chamber, a beam taking device, an ion regulator and a deposition target disc; the pulse trigger power supply is connected with the cathode target material; the cathode target material is arranged at one end of the magnetic filtering pipeline; the other end of the magnetic filtering pipeline is communicated with the vacuum chamber; the beam taking device, the ion regulator and the deposition target disc are sequentially arranged in the vacuum cavity in the plasma beam spot transmission direction. The pulse trigger power supply is used for providing pulses for the cathode target material so as to generate plasma beam spots; the magnetic filtering pipeline is used for filtering plasma beam spots; the beam taking device is used for adjusting the direction of the filtered plasma beam spot; the ion regulator is used for carrying out energy and flux regulation on the plasma beam spot after the direction is regulated; and the deposition target disc is used for depositing the adjusted plasma beam spots. According to the invention, precise and stable control of atomic-scale manufacturing can be realized.

The utility model relates to a Si IGBT and SiC Mosfet hybrid parallel double-pulse test circuit, which comprises a test circuit and a bus capacitor arranged on the test circuit, the bus capacitor is applied to the bus capacitor through a bus voltage provided by a high-voltage source, an upper bridge element and a lower bridge element are respectively arranged on a line, connected with the bus capacitor in parallel, on the test circuit, and the upper bridge element is connected with the lower bridge element. The upper bridge element is composed of a Si IGBT and a SiC Mosfet, the Q1 end of the Si IGBT and the M1 end of the SiC Mosfet are used as switching tubes, the lower bridge element is also composed of a Si IGBT and a SiC Mosfet, the Q2 end of the Si IGBT and the M2 end of the SiC Mosfet are connected in parallel with a signal source, a double-pulse driving signal VGE is provided for the Q1 end of the upper bridge element through the signal source, a double-pulse driving signal VGS is provided for the M1 end of the upper bridge element, and the Q1 end of the Si IGBT and the M1 end of the SiC Mosfet are used as switching tubes. Therefore, the switching characteristics of the Q1 end and the M1 end of the upper bridge element and the reverse recovery characteristics of the Q2 end and the M2 end of the lower bridge element are tested.

1. The name of the design product: the graphical user interface (2) of the double pulse test platform for electronic equipment. 2. The use of the design product: test information display and interaction for double pulse test in the industrial production of power semiconductor modules. 3. The design points of the design product: in the graphical user interface. 4. The picture or photo that best shows the design points: front view. 5. Other views are conventional designs, and other views are omitted. 6. The use of the graphical user interface: the front view is the main interface of the double pulse test platform. Click "calibration interface" in the front view to enter the interface change state diagram.