384results about How to "Reduced conversion time" patented technology

The present invention provides a multi-input A/D converter circuit capable of shorting a conversion time without increasing its layout area and current consumption. When a most significant bit of a binary counter is “L”, individual input signals are sampled by a sample and hold unit, and digital signals held in respective data holders are sequentially selected by a selector. When the most significant bit is brought to “H”, the respective input signals are held as analog signals and compared with each of reference voltages produced corresponding to a digital signal by a DAC. When decision signals outputted from comparators are changed from “L” to “H”, the digital signal at that time is held in the individual data holders as digital signals.

The invention relates to a high-speed automatic medicine packing machine, comprising a machine frame, wherein the machine frame is provided with a medicine board conveying belt and a packaging box conveying belt; the medicine board conveying belt and the packaging box conveying belt are arranged in parallel, and parts of the medicine board conveying belt and the packaging box conveying belt are overlapped; the overlapped part of the medicine board conveying belt and the packaging box conveying belt is provided with a medicine board pushing device which is used for pushing the semi-finished products to the packaging box conveying belt from the medicine board conveying belt; a medicine adding device and a paper adding device are sequentially arranged from one end of the medicine board conveying belt, which is far away from the packaging box conveying belt to one end of the medicine board conveying belt, which is close to the packaging box conveying belt; and a box unfolding device and a sealing device are sequentially arranged from one end of the packaging box conveying belt, which is close to the medicine board conveying belt to one end of the packaging box conveying belt, which is far away from the medicine board conveying belt. The medicine adding device, the paper adding device, the box unfolding device, the sealing device, the medicine board pushing device, the medicine board conveying belt and the packaging box conveying belt are controlled by a controller through a circuit. After adopting the scheme, the high-speed automatic medicine packing machine provided by the invention is high in efficiency and attractive in appearance.

An analog-to-digital converter generates an output digital value equivalent to the difference between two analog signals. The converter forms part of a set of converters. The converter receives a first analog signal and a second analog signal (V_reset, V_sig) and a ramp signal (V_ramp). A clock is dedicated to the converter, or a sub-set of converters. A control stage enables a first counter based on a comparison of the ramp signal with the first analog signal and the second analog signal. The converter can be calibrated by at least one reference signal (V_ref1, V_ref2) which is common to the set of converters. A-to-D conversion can include a first A-to-D conversion stage which determines a signal range, selected from a plurality of signal ranges, and a second A-to-D conversion stage which determines an M-bit digital value equivalent to the difference between the first and second analog signals by comparing the signals with a ramp signal, with the ramp signal having the signal range determined by the first analog-to-digital conversion stage.

An analog-to-digital converter (ADC) generates an output digital value equivalent to the difference between two analog signal values. The ADC 30 receives a first analog signal level, a second analog signal level and a ramp signal. A counter 32 is operable to count in a single direction. A control stage is arranged to enable the counter 32 based on a comparison 19 of the ramp signal with the first analog signal and the second analog signal. A digital value accumulated by the counter during a period when it is enabled forms the output. The ADC can perform the conversion during a single cycle of the ramp signal. The counter 32 can be loaded with a starting digital value representing an exposure level accumulated during a previous exposure period. Techniques are described for reducing the conversion time.

A solid-state imaging device includes: a plurality of pixels which are arranged in a matrix; a sequential scanning device that selects each row of pixels; and an analog-to-digital conversion unit having a first analog-to-digital converter that is connected to a vertical signal line to which a pixel signal is supplied from the pixel and performs a first bit-length analog-to-digital conversion on an output signal from the vertical signal line or a pixel output signal obtained by sampling the output signal, and a second analog-to-digital converter that, when the first analog-to-digital converter completes the conversion operation, subtracts an analog signal corresponding to the first bit-length from the pixel output signal and then performs a second bit-length analog-to-digital conversion.

The invention discloses a technology of a microwave heating synthesis method of fiber carbamate; the method is that: firstly, the fiber is soaked in carbamide aqueous solution for completely adsorbing the carbamide, the fiber / carbamide even mixture is obtained by filtering and drying, and then the fiber / carbamide mixture is placed in a microwave oven for being heated, thereby obtaining the fiber carbamate. The synthesis technology of the fiber carbamate provided by the invention has no solvent pollution, organic solvents and any catalyzers do not need, the reacting time is speed, and the energy consumption is low. The synthesized fiber carbamate products has good dissolubility in 6 to 10 wt% of NaOH aqueous solution within the temperature range of -10 to 5 DEG C, and the concentrated solution which is stable, transparent and is suitable for industrial spinning and membrane manufacturing can be prepared.

The invention relates to a method for conversing PPT into video. The method comprises the following steps of processing each PPT frame in a PPT file: S1) confirming the complexity thereof according tothe cartoon type of PPT frame, S2) setting a playing speed according to the complexity and playing the PPT frame with the set playing speed, performing the operations of sectional drawing and encoding on PPT frame during playing, automatically regulating the playing speed according to the time for sectional drawing and encoding after finishing the operations of sectional drawing and encoding, andS3) storing the encoding result into a video file. The invention further relates to a system for conversing PPT into video, comprising a cartoon type confirming unit, a playing and processing unit and a video generating unit. With the technical scheme, the invention can be applied to various machines, can fully utilize the machine resource to rapidly finishing conversion, can increase the conversion speed and ensure the conversion quality.

This invention relates to a system and a method for converting non-sequence spot-clouds into triangle griddings based on adaptive flatness, which carries out triangle analysis to spot-clouds in space directly by a non-sequence spot-cloud increment rebuilding algorithm based on adaptive flatness to structure a partial gridding ring from the initial central point based on the partial flat character of a curvature face and a Delaunary analysis rule of triangles and takes points on said gridding ring as the central point according to the generation sequence to structure the partial ring repeatedly to circulate in linearity and spread it to the entire spot set and get a topological structure finally so as to increase conversion velocity and reduce conversion time.

The invention discloses a subframe configuring method. The method comprises the following steps that: a base station reconfigures a unicast subframe into a multimedia broadcast single frequency network (MBSFN) subframe; and the base station sends a configuring signaling of the reconfigured MBSFN subframe to user equipment (UE). The invention also discloses a subframe configuring system. By the method and the system, the transmission of unicast service is not affected and the base station saves electricity and energy.

The invention discloses a low-voltage crossing method of two-stage type photovoltaic grid connected system of variable power tracking path, which belongs to the field of new energy electric power system and micro power grid technology. Under the prerequisite that the original configuration of a two-stage three phase photovoltaic grid connected system is not changed and no auxiliary device is added, the power tracking path can be adjusted through the feed-forward control of the falling amplitude of voltage, the voltage at the photovoltaic cell end can be changed in a real-time manner, and the output of the photovoltaic cell power can be rapidly and effectively controlled, and the balance of power at two sides of an inverter can be realized. Through the cooperative control with a grid connected inverter, it can be guaranteed that under the prerequisite that the grid connected output of current of the inverter is not out of limit, active power and reactive power can be provided for the power grid as more as possible, the recovery of power grid voltage can be supported to the most extent, and the zero-voltage crossing of the photovoltaic grid connected system can be realized. Comparedwith the conventional control method, the invention is advantageous in that no additional device is required; safe and stable running of the system can be realized; the cost of the photovoltaic powergeneration system can be reduced, and practicality is better.

The invention relates to a demodulator circuit. The demodulator circuit comprises a biasing circuit, an envelope detection circuit, a comparison circuit, a shaping circuit and a control circuit, wherein the envelope detection circuit comprises a full-wave rectification circuit and a band-pass filter, the full-wave rectification circuit is used for rectifying a full-wave alternating current signal which is received by an antenna to a direct current signal, and the band-pass filter is used for performing band-pass filtering on the direct current signal to output an envelope signal within a preset bandwidth range; the comparison circuit is used for reducing amplitude of a carrier signal through voltage comparison of the envelope signal; the shaping circuit is used for extracting an ASK signal from signals which are output by the envelope detection circuit or the comparison circuit; the control circuit is used for generating a control signal according to the ASK signal so that the band-pass filter is controlled to perform discharging before the ASK signal jumps from a low level to a high level and the comparison circuit is started and the comparison circuit is controlled to be closed after the ASK signal jumps from the high level to the low level. The demodulator circuit can be excellently applied to a passive radio frequency identification (RFID) system, and the accuracy of a demodulated signal is good.

The invention relates to a Brillouin optical-time-domain analyzer based on a coherence dual-pulse pair sequence technology and a method for restraining common-mode noise by utilizing the same, belongs to the field of optics, and solves the problems that a traditional Brillouin optical-time-domain analyzer is low in spatial resolution, long in measuring signal time and low in signal-to-noise ratio. A laser is adopted, an upper branch of light divided by an optical-fiber coupler I is used as pump light, pulse pairs with different pulse widths can be periodically generated by a field-programmable logic array in a programming manner, and the pulse pairs are continuously and optically modulated to form a coherence pulse pair sequence through a photoelectric modulator; a lower branch provides detection light, the detection light enters a photoelectric modulator after a polarization state is adjusted, upper marginal frequency light and lower marginal frequency light which having the frequency difference of Brillouin frequency shifting gamma B are generated on the basis of carrier light, the pump light consisting of the coherence pulse pair sequence and the modulated detection light has a Brillouin scattering phenomenon in a sensing optical fiber, and two Brillouin signals are detected by a photoelectric detector. The Brillouin optical-time-domain analyzer and the method are suitable for restraining the common-mode noise.

A bitstream conversion apparatus for converting a bitstream of a first format, containing content data, into a bitstream of a second format includes: a splitting unit which splits the bitstream of the first format in time sequential fashion into a plurality of split bitstreams of the first format; a plurality of conversion units which convert the plurality of split bitstreams of the first format into a plurality of split bitstreams of the second format; and a connecting unit which connects the plurality of split bitstreams of the second format to one another.

The invention discloses a SAR ADC adopting a low resolution DAC capacitor array and an application method thereof. The ADC comprises two DAC arrays, three preamplifiers, five comparators and a SAR control logic circuit. An interpolation structure is arranged between the two DAC arrays. Compared to the prior art, by using the ADC in the invention, one interpolation comparator is inserted between the two adjacent preamplifiers so that the number of capacitance digital-analog arrays can be reduced. A solution scheme of weighing a bandwidth and the resolution is provided for a multi-bit/periodic SAR ADC. By using the ADC and the method, there are the following advantages that for a high-precision SAR ADC design, usage of a large-scale DAC array can be avoided so that a capacitor DAC array only needs to satisfy thermal noise restraining demand.

A crimping press has a tool receptacle arranged at a lower end of a pressing slider provided with a force-sensing device. The forces arising during the crimping operation are transmitted from the supporting surfaces of an upper tool to several points on the force-sensing device. Provided on each side of an upper fork and held by screws are two collars to which are transmitted, the crimping forces on either side of the supporting surface. With their heads, the screws hold the collars, while with their other ends the screws are engaged with the pressing slider. The collars transmit the crimping forces to the sensor elements of the force-sensing device.

The invention relates to a shaft gear composite processing machine tool which comprise a tool body, a column, a rotary working platform, a hob feeding mechanism, a supporting frame feeding mechanism and a rotary knife tower feeding mechanism, wherein the column, the rotary working platform, the hob feeding mechanism, the supporting frame feeding mechanism and the rotary knife tower feeding mechanism are fixed on the tool body. The rotary working platform is fixed on the top surface of the tool body, and the hob feeding mechanism, the supporting frame feeding mechanism and the rotary knife tower feeding mechanism are horizontally and sequentially arranged on one side of the column close to the rotary working platform and matched with the column in the vertical direction in sliding mode. A workpiece is clamped once, turning, hobbing, milling, chamfering, burring, drilling and the like are performed on gears of different sizes through rotation of the working platform, switch of different processing knives, horizontal and longitudinal feeding and rotation of angles. Switching time of the workpiece between different machine tools is saved, processing efficiency is improved, and processing precision of parts is guaranteed to the maximum limit.

A liquid crystal display (LCD) having a matrix of liquid crystal pixels is provided. A plurality of digital-to-analog converters (DACs) are coupled to the LCD matrix through analog voltage switches and are adapted to produce output voltages that are applied to the pixels in the LCD matrix. Through the combination of DACs and analog voltage switches, groups of pixels are pre-written to an average value of the pixels in that group which is fairly close to their final voltage values of each pixel so that the liquid crystal material can begin slewing and settling as early as possible. Then one or more writes to each of the pixels is made of the precise voltage value desired at each of the pixels. Alternate, adjacent odd and even rows of pixels may be written together and then only the even or odd rows are finally written to obtain the desired final voltage values at each of the pixels in the LCD.

The embodiment of the invention relates to a video playing method and device in a game scene, and belongs to the technical field of video processing. The method comprises the steps of obtaining an original video frame, and adjusting the output frame rate of the original video frame according to the current actual frame rate of the game scene, so as to obtain a target video frame; rendering the target video frame to texture processing to obtain a to-be-played video frame according to an engine corresponding to a game, and loading the to-be-played video frame to a preset playing area for playing. According to the method, the problem that in the prior art, due to the fact that the frame rate is too high, audio and video asynchronization occurs, the audio and video playing accuracy is low is solved, the audio and video playing accuracy is improved, and the burden of equipment is reduced.