Low noise amplifiers, RF circuits and electronic devices

Abstract

The present application discloses a low noise amplifier, a radio frequency circuit and an electronic device, which relates to the radio frequency field and is used to prevent the LNA from generating harmonic signals in the off state. The input port in the LNA is electrically connected to the input end of the resistor and the gain circuit through input matching and bias capacitors; the bias circuit is electrically connected to the first end of the resistor and the enable port; the cathode of the first diode is electrically connected to the anode of the second diode, and the cathode of the second diode and the anode of the third diode are grounded; the anode of the first diode and the cathode of the third diode are electrically connected to either end of the bias capacitor; the switch is connected in parallel with at least one of the first diode and the second diode; the enable port is used to input an enable signal or a disable signal, the enable signal controls the bias circuit to output a bias voltage and a bias current to the gain circuit, and controls the switch to be disconnected; the disable signal controls the bias circuit to stop outputting a bias voltage and a bias current to the gain circuit, and controls the switch to be turned on.

Description

Technical Field

[0001] The present application relates to the field of radio frequency, and in particular to a low noise amplifier, a radio frequency circuit and an electronic device. Background Art

[0002] Low noise amplifier (LNA) is one of the important components in wireless communication systems, which is used to amplify the power of received RF signals. Due to the coupling relationship between the transmitting antenna and the receiving antenna, even if the LNA is turned off during the transmission time slot, the transmission channel will couple part of the power to the input of the LNA, causing the LNA to generate harmonic signals, which will generate radiation, causing the radiated spurious emission (RSE) test to exceed the standard and fail to meet regulatory requirements. Summary of the invention

[0003] Embodiments of the present application provide a low noise amplifier, a radio frequency circuit, and an electronic device, which are used to prevent an LNA from generating harmonic signals when the LNA is in a closed state.

[0004] To achieve the above objectives, the embodiments of the present application adopt the following technical solutions:

[0005] In a first aspect, a low noise amplifier is provided, comprising: a gain circuit, a protection circuit, an input match, an output match, a bias circuit, a load network, an input port, an output port, an enable port, a degeneration inductor, a bias capacitor, and a resistor; the protection circuit comprises a first diode, a second diode, a third diode, and a switch; the input port is electrically connected to a first end of the input match, the second end of the input match is electrically connected to a first end of the bias capacitor, the second end of the bias capacitor is electrically connected to a second end of the resistor and an input end of the gain circuit; the bias circuit is electrically connected to a first end of the resistor, and the bias circuit is also electrically connected to the enable port; the output end of the gain circuit is electrically connected to the output port, and the gain circuit is also electrically connected to the output port through the load network. power supply, the gain circuit is also grounded through the degeneration inductor; the cathode of the first diode is electrically connected to the anode of the second diode, and the cathode of the second diode and the anode of the third diode are grounded; the anode of the first diode and the cathode of the third diode are electrically connected to the first end or the second end of the bias capacitor; the enable port is also electrically connected to the control end of the switch, and the switch is connected in parallel with at least one of the first diode and the second diode; the enable port is used to input an enable signal or a disable signal, the enable signal is used to control the bias circuit to output a bias voltage and a bias current to the gain circuit, and to control the switch to be disconnected; the disable signal is used to control the bias circuit to stop outputting a bias voltage and a bias current to the gain circuit, and to control the switch to be turned on.

[0006] The low noise amplifier provided by the embodiment of the present application is electrically connected to the protection circuit at the input end of the gain circuit, the cathode of the first diode in the protection circuit is electrically connected to the anode of the second diode, and the cathode of the second diode and the anode of the third diode are grounded; the anode of the first diode and the cathode of the third diode are electrically connected to the input end of the gain circuit, and the switch is connected in parallel with at least one of the first diode and the second diode. The enable port is used to input an enable signal or a disable signal, the enable signal is used to control the bias circuit to output a bias voltage and a bias current to the gain circuit, and to control the switch to be disconnected; the disable signal is used to control the bias circuit to stop outputting a bias voltage and a bias current to the gain circuit, and to control the switch to be turned on. If the enable port inputs a disable signal, the disable signal controls the bias circuit to stop outputting a bias voltage and a bias current to the gain circuit, so that the LNA is in a closed state. The disable signal controls the switch to be turned on, short-circuiting at least one of the first diode and the second diode to reduce the start-up voltage of the protection circuit, so that the protection circuit is more likely to discharge a smaller input power, avoid the gain circuit from generating harmonic signals, and also avoid the LNA from generating harmonic signals in the closed state.

[0007] In a possible implementation, the protection circuit further includes an inverter, and the enable port is electrically connected to the control end of the switch through the inverter. The protection circuit including the inverter is suitable for the scenario where the enable signal is high level, the disable signal is low level, and the switch is an N-type MOS tube, or the enable signal is low level, the disable signal is high level, and the switch is a P-type MOS tube.

[0008] In a possible implementation, the enable signal is at a high level, the disable signal is at a low level, and the switch is an N-type MOS tube. The protection circuit includes an implementation of an inverter.

[0009] In a possible implementation, the enable signal is at a low level, the disable signal is at a high level, and the switch is a P-type MOS tube. The protection circuit includes an implementation of an inverter.

[0010] In a possible implementation, the enable signal is at a high level, the disable signal is at a low level, and the switch is a P-type MOS tube. An implementation in which the protection circuit does not include an inverter.

[0011] In a possible implementation, the enable signal is at a low level, the disable signal is at a high level, and the switch is an N-type MOS tube. An implementation in which the protection circuit does not include an inverter.

[0012] In a second aspect, a radio frequency circuit is provided, comprising a baseband chip, a radio frequency integrated circuit and a low noise amplifier as in any embodiment of the first aspect, wherein the baseband chip is electrically connected to the radio frequency integrated circuit and the low noise amplifier, and the radio frequency integrated circuit and the low noise amplifier are electrically connected.

[0013] In a third aspect, an electronic device is provided, comprising the radio frequency circuit and the antenna as described in the second aspect, wherein the radio frequency circuit is electrically connected to the antenna.

[0014] The technical effects of the second and third aspects refer to the technical effects of the first aspect and any of its embodiments, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 A schematic diagram of the appearance of an electronic device provided in an embodiment of the present application;

[0016] Figure 2 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application;

[0017] Figure 3 A schematic diagram of the structure of a radio frequency circuit provided in an embodiment of the present application;

[0018] Figure 4 A schematic diagram of the structure of the first LNA provided in an embodiment of the present application;

[0019] Figure 5 A schematic diagram of a first input power discharge path provided in an embodiment of the present application;

[0020] Figure 6 A schematic diagram of the structure of a second LNA provided in an embodiment of the present application;

[0021] Figure 7 A schematic diagram of a second input power discharge path provided in an embodiment of the present application;

[0022] Figure 8 A schematic diagram of the structure of a third LNA provided in an embodiment of the present application;

[0023] Fig. 9 A schematic diagram of a third input power discharge path provided in an embodiment of the present application;

[0024] Fig.10 A schematic diagram of the structure of a fourth LNA provided in an embodiment of the present application;

[0025] Fig.11 A schematic diagram of a fourth input power discharge path provided in an embodiment of the present application;

[0026] Fig.12 A schematic diagram of the structure of a fifth LNA provided in an embodiment of the present application;

[0027] Fig.13 A schematic diagram of a fifth input power discharge path provided in an embodiment of the present application;

[0028] Fig.14 A schematic diagram of the structure of a sixth LNA provided in an embodiment of the present application;

[0029] Fig.15 A schematic diagram of a sixth input power discharge path provided in an embodiment of the present application;

[0030] Fig.16 A schematic diagram of the structure of a seventh LNA provided in an embodiment of the present application;

[0031] Fig.17 A schematic diagram of a seventh input power discharge path provided in an embodiment of the present application;

[0032] Fig.18 A schematic diagram of the structure of an eighth LNA provided in an embodiment of the present application;

[0033] Fig.19 A schematic diagram of an eighth input power discharge path provided in an embodiment of the present application;

[0034] Fig. 20 A schematic diagram of the structure of a ninth LNA provided in an embodiment of the present application;

[0035] Fig.21 A schematic diagram of a ninth input power discharge path provided in an embodiment of the present application;

[0036] Fig. 22 A schematic diagram of the structure of the tenth LNA provided in an embodiment of the present application;

[0037] Fig.23 A schematic diagram of a tenth input power discharge path provided in an embodiment of the present application;

[0038] Fig.24 A schematic diagram of the structure of the eleventh LNA provided in an embodiment of the present application;

[0039] Fig.25 A schematic diagram of an eleventh input power discharge path provided in an embodiment of the present application. DETAILED DESCRIPTION

[0040] First, some concepts involved in this application are described.

[0041] The terms "first", "second", etc. involved in the embodiments of the present application are only used to distinguish features of the same type and cannot be understood as indicating relative importance, quantity, order, etc.

[0042] The terms "exemplary" or "for example" and the like in the embodiments of the present application are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary" or "for example" in the present application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of the terms "exemplary" or "for example" is intended to present the related concepts in a specific way.

[0043] The terms "coupling" and "connection" involved in the embodiments of the present application should be understood in a broad sense. For example, they may refer to a direct physical connection, or an indirect connection achieved through electronic devices, such as a connection achieved through resistors, inductors, capacitors or other electronic devices.

[0044] like Figure 1 As shown, an embodiment of the present application provides an electronic device 101, which is an electronic device with a wireless communication function. The electronic device can be mobile or fixed. The electronic device can be deployed on land (for example, indoors or outdoors, handheld or vehicle-mounted, etc.), on the water (for example, ships, etc.), or in the air (for example, airplanes, balloons, and satellites, etc.). The electronic device can be called user equipment (UE), access terminal, terminal unit, subscriber unit, terminal station, mobile station (MS), mobile station, terminal agent or terminal device, etc. For example, the electronic device can be a mobile phone, a tablet computer, a laptop computer, a smart bracelet, a smart screen, a smart watch, a virtual reality (VR) device, an augmented reality (AR) device, a terminal in industrial control, a terminal in self-driving, a terminal in remote medical, a terminal in smart grid, a terminal in transportation safety, a terminal in smart city, a terminal in smart home, etc. The embodiments of the present application do not limit the specific type and structure of the electronic device. A possible structure of the electronic device is described below.

[0045] like Figure 1 As shown in Figure A, the electronic device 101 may include a front camera 2931 and a display screen 294. Figure 1As shown in B, the electronic device 101 may include a rear camera 2932. The front camera 2931 and the rear camera 2932 are used to capture static images or dynamic videos (collectively referred to as images). The display screen 294 is used to display images or receive user touch operations.

[0046] Taking a mobile phone as an example, Figure 2 A possible structure of the electronic device 101 is shown. The electronic device 101 may include a processor 210, an external memory interface 220, an internal memory 221, a universal serial bus (USB) interface 230, a power management module 240, a battery 241, a wireless charging coil 242, an antenna 1, an antenna 2, a mobile communication module 250, a wireless communication module 260, an audio module 270, a speaker 270A, a receiver 270B, a microphone 270C, an earphone interface 270D, a sensor module 280, a button 290, a motor 291, an indicator 292, a camera 293, a display screen 294, and a subscriber identification module (SIM) card interface 295. Optionally, in some embodiments, an audio digital signal processor (ADSP) 243 is also included.

[0047] It is understood that the structure illustrated in the embodiment of the present application does not constitute a specific limitation on the electronic device 101. In other embodiments of the present application, the electronic device 101 may include more or fewer components than shown in the figure, or combine some components, or split some components, or arrange the components differently. The components shown in the figure may be implemented in hardware, software, or a combination of software and hardware.

[0048] The processor 210 may include one or more processing units, for example, the processor 210 may be a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), a system on chip (SoC), a central processing unit (CPU), an application processor (AP), a network processor (NP), a digital signal processor (DSP), a microcontroller unit (MCU), a programmable logic device (PLD), a modem processor, a graphics processor (GPU), an image signal processor (ISP), a controller, a video codec, and a neural-network processing unit (NPU). Among them, different processing units may be independent devices or integrated into one or more processors. For example, the processor 210 may be an application processor AP. Alternatively, the processor 210 may be integrated into a system on chip (SoC). Alternatively, the processor 210 may be integrated into an integrated circuit (IC) chip. The processor 210 may include an analog front end (AFE) and a micro-controller unit (MCU) in an IC chip.

[0049] The processor 210 executes the antenna feeding control method provided in the embodiment of the present application by executing the program and computer instructions stored in the internal memory 221.

[0050] The processor 210 may also be provided with a memory for storing computer instructions and data. In some embodiments, the memory in the processor 210 is a cache memory. The memory may store computer instructions or data that the processor 210 has just used or circulated. If the processor 210 needs to use the computer instructions or data again, it may be directly called from the memory. This avoids repeated access, reduces the waiting time of the processor 210, and thus improves the efficiency of the system.

[0051] In some embodiments, the processor 210 may include one or more interfaces. The interface may include an inter-integrated circuit (I2C) interface, an inter-integrated circuit sound (I2S) interface, a pulse code modulation (PCM) interface, a universal asynchronous receiver / transmitter (UART) interface, a mobile industry processor interface (MIPI), a general-purpose input / output (GPIO) interface, a subscriber identity module (SIM) interface, and / or a USB interface, etc.

[0052] ADSP 243 can be coupled with audio module 270 and sensor module 280, and ADSP 243 can be used to process audio signals and sensor data. When the processor is in a dormant state, ADSP 243 can still keep working, thereby reducing the power consumption of the electronic device.

[0053] It is understandable that the interface connection relationship between the modules illustrated in the embodiment of the present application is only a schematic illustration and does not constitute a structural limitation on the electronic device 101. In other embodiments of the present application, the electronic device 101 may also adopt different interface connection methods in the above embodiments, or a combination of multiple interface connection methods.

[0054] The external memory interface 220 can be used to connect an external memory card, such as a micro SanDisk (Micro SD) card, to expand the storage capacity of the electronic device 101. The external memory card communicates with the processor 210 through the external memory interface 220 to implement a data storage function. For example, files such as music and videos can be stored in the external memory card.

[0055] The internal memory 221 may be used to store computer executable program codes, which include computer instructions. The processor 210 executes various functional applications and data processing of the electronic device 101 by running the computer instructions stored in the internal memory 221. In addition, the internal memory 221 may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, a universal flash storage (UFS), etc.

[0056] The memory involved in the embodiments of the present application may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example but not limitation, many forms of RAM are available, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), and direct RAM bus RAM (DR RAM). It should be noted that the memory of the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0057] The electronic device 101 can implement audio functions such as music playing and recording through the audio module 270, the speaker 270A, the receiver 270B, the microphone 270C, the headphone interface 270D and the application processor.

[0058] The audio module 270 is used to convert digital audio information into analog audio signal output, and is also used to convert analog audio input into digital audio signal. In some embodiments, the audio module 270 can be arranged in the processor 210, or some functional modules of the audio module 270 can be arranged in the processor 210. The speaker 270A, also known as the "speaker", is used to convert the audio electrical signal into a sound signal. The receiver 270B, also known as the "earpiece", is used to convert the audio electrical signal into a sound signal. The microphone 270C, also known as the "microphone" or "microphone", is used to convert the sound signal into an electrical signal. The electronic device 101 can be provided with at least one microphone 270C. The headphone interface 270D is used to connect a wired headset. The headphone interface 270D can be a USB interface 230, or it can be a 3.5mm open mobile terminal platform (OMTP) standard interface, or a cellular telecommunications industry association of the USA (CTIA) standard interface.

[0059] The button 290 includes a power button, a volume button, etc. The button 290 may be a mechanical button. It may also be a touch button. The electronic device 101 may receive a button input and generate a key signal input related to the user settings and function control of the electronic device 101. The motor 291 may generate a vibration prompt. The motor 291 may be used for an incoming call vibration prompt or for touch vibration feedback. The indicator 292 may be an indicator light, which may be used to indicate the charging status, the change in power, or may be used to indicate messages, missed calls, notifications, etc. The SIM card interface 295 is used to connect a SIM card. The SIM card may be inserted into or removed from the SIM card interface 295 to achieve contact and separation with the electronic device 101. The electronic device 101 may support 1 or N SIM card interfaces, where N is a positive integer greater than 1. The SIM card interface 295 may support a Nano SIM card, a Micro SIM card, a SIM card, etc. In some embodiments, the electronic device 101 uses an embedded SIM (eSIM) card. The eSIM card can be embedded in the electronic device 101 and cannot be separated from the electronic device 101.

[0060] The electronic device 101 can realize the shooting function through the ISP, the camera 293, the video codec, the GPU, the display screen 294, and the application processor. The ISP is used to process the data fed back by the camera 293. In some embodiments, the ISP can be set in the camera 293. The camera 293 is used to capture static images or videos. In some embodiments, the electronic device 101 may include 1 or N cameras 293, where N is a positive integer greater than 1, for example Figure 1 The front camera 2931 and the rear camera 2932 are shown.

[0061] The electronic device 101 can realize the display function through a GPU, a display screen 294, and an application processor. The GPU is a microprocessor for image processing, which connects the display screen 294 and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. The processor 210 may include one or more GPUs, which execute computer instructions to generate or change display information.

[0062] The sensor module 280 may include a pressure sensor, a gyroscope sensor, an air pressure sensor, a magnetic sensor, an acceleration sensor, a distance sensor, a proximity light sensor, a fingerprint sensor, a temperature sensor, a touch sensor, an ambient light sensor, an angle sensor, etc. When the display screen 294 is a folding screen, the angle sensor may detect the folding angle of the display screen 294, and the folding angle ranges from 0 to 180 degrees.

[0063] The battery 241 may include one or more batteries to power the load. The power management module 240 is used to receive charging input from a charger. The charger may be a wireless charger, such as a wireless charging base, other electronic devices 101 with reverse wireless charging function, etc. The power management module 240 may receive wireless charging input through a wireless charging coil 242 of the electronic device. The charger may also be a wired charger, for example, the power management module 240 may receive charging input from a wired charger through the USB interface 230. The power management module 240 is also called a charging chip.

[0064] The power management module 240 can charge the battery 241 and also power the electronic device. The power management module 240 receives input from the battery 241 and powers the processor 210, the internal memory 221, the external memory interface 220, the display screen 294, the camera 293, and the wireless communication module 260. The power management module 240 can also be used to monitor the capacity, voltage, battery cycle number, battery health status (leakage, impedance) and other parameters of the battery 241. In some other embodiments, the power management module 240 can also be set in the processor 210.

[0065] The display screen 294 is used to display images, videos, etc. The display screen 294 includes a display panel. In some embodiments, the electronic device 101 may include one or more display screens 294 .

[0066] The wireless communication function of the electronic device 101 can be implemented through the antenna 1, the antenna 2, the mobile communication module 250, the wireless communication module 260, the modem processor, etc.

[0067] Antenna 1 and antenna 2 are used to transmit and receive electromagnetic wave signals. Each antenna in electronic device 101 can be used to cover a single or multiple communication frequency bands. Different antennas can also be reused to improve the utilization of antennas. For example, antenna 1 can be reused as a diversity antenna for a wireless local area network. In some other embodiments, the antenna can be used in combination with a tuning switch.

[0068] The mobile communication module 250 (also called the cellular communication module) can provide solutions for wireless communications including 2G / 3G / 4G / 5G applied to the electronic device 101. The wireless communication module 260 (including the satellite communication module) can provide solutions for wireless communications including wireless local area networks (WLAN) (such as wireless fidelity (Wi-Fi) networks), Bluetooth (BT), global navigation satellite system (GNSS) (such as Beidou satellite communication), satellite network communication (such as Tiantong satellite communication, Xingwang satellite communication), frequency modulation (FM), nearfield communication technology (NFC), infrared technology (IR), etc. applied to the electronic device 101. In some embodiments, the antenna 1 of the electronic device 101 is coupled to the mobile communication module 250, and the antenna 2 is coupled to the wireless communication module 260, so that the electronic device 101 can communicate with the network and other devices through wireless communication technology. The mobile communication module 250 and the wireless communication module 260 can be collectively referred to as a radio frequency circuit.

[0069] like Figure 3As shown, the radio frequency circuit 30 may include a baseband chip 31, a radio frequency integrated circuit (RFIC) 32 and a radio frequency front-end circuit 33. The baseband chip 31 and the RFIC 32 may also be integrated with the processor 210 in the SoC. The radio frequency front-end circuit 33 includes a power amplifier (PA) 331 and an LNA 332, and may also include devices such as filters, antenna switches, and couplers, which are not limited in this application. The branch where the PA 331 is located is the transmitting channel, and the branch where the LNA 332 is located is the receiving channel.

[0070] The baseband chip 31 is used to convert the data from the processor 210 into a baseband signal, including modulation and demodulation, digital filtering, equalization processing, etc. of the baseband signal. The baseband chip 31 is also used to control each device in the RF front-end circuit 33 through a control signal. The RFIC 32 is used to convert the baseband signal from the baseband chip 31 into a RF signal, which is then amplified by the PA 331 and then transmitted from the first antenna 341. The LNA 332 is used to amplify the RF signal received from the second antenna 342 and then send it to the RFIC 32, which converts the RF signal into a baseband signal and sends it to the baseband chip 31, which converts the baseband signal into data and sends it to the processor 210.

[0071] like Figure 4 As shown, the LNA includes a gain circuit 401, a protection circuit 402, an input match 403, an output match 404, a bias circuit 405, a load network 406, an input port IN, an output port OUT, a degeneration inductor L, a bias capacitor C, and a resistor R. The protection circuit 402 includes a diode D1, a diode D2, a diode D3, and a diode D4.

[0072] The input port IN is used to Figure 3 The input port IN is electrically connected to the first end of the input matching 403, the second end of the input matching 403 is electrically connected to the first end of the bias capacitor C, the second end of the bias capacitor C is electrically connected to the second end of the resistor R and the input end of the gain circuit 401. The bias circuit 405 is electrically connected to the first end of the resistor R. The output end of the gain circuit 401 is electrically connected to the output port OUT through the output matching 404, and the output port OUT is used to communicate with the Figure 3 The gain circuit 401 is also electrically connected to a power supply through a load network 406, and the gain circuit 401 is also grounded through a degeneration inductor L.

[0073] In the protection circuit 402, the anode of the diode D1 and the cathode of the diode D3 are electrically connected to the first end of the bias capacitor C, the cathode of the diode D1 is electrically connected to the anode of the diode D2, the anode of the diode D3 is electrically connected to the cathode of the diode D4, and the cathode of the diode D2 and the anode of the diode D4 are grounded.

[0074] The degeneration inductor L and the input matching 403 are used to match the noise coefficient and gain of the LNA. The load network 406 is used to supply power to the gain circuit 401 and prevent the RF signal from flowing back into the power supply. The bias circuit 405 is used to output a bias voltage and a bias current to the gain circuit 401. The output matching 404 is used to match the impedance. The bias capacitor C is used to isolate the DC signal and conduct the AC signal. The resistor R is used to limit the current.

[0075] The protection circuit 402 is used to protect the LNA from electrostatic discharge. The voltage of static electricity has both positive and negative voltages, so the diodes D1 and D2 connected in series in the protection circuit 402 are used to conduct the positive voltage of static electricity, and the diodes D3 and D4 connected in series are used to conduct the negative voltage of static electricity, so as to discharge the bidirectional electrostatic voltage. Electrostatic discharge protection refers to preventing excessive static electricity accumulated during the user's use of electronic equipment from burning the gain circuit 401 of the LNA. When the absolute value of the electrostatic voltage input to the LNA is large, causing any group of series-connected diodes to be turned on, the protection circuit 402 grounds the input port IN, thereby discharging the static electricity.

[0076] Since the parasitic capacitance of the diodes connected in series will affect the performance of the input matching 403 when the LNA is working, the number of each group of diodes connected in series in the protection circuit 402 is usually greater than or equal to 2, resulting in a turn-on voltage of the protection circuit 402 of at least 2*Vdiode, where Vdiode is the turn-on voltage of the diode (e.g., 0.7V), and the corresponding input power of the input port IN is greater than 10dBm. When the input power of the input port IN is less than 10dBm, the diode cannot be turned on, and the protection circuit 402 will not discharge the input power, thereby failing to play a protective role.

[0077] like Figure 5 As shown, taking the RF signal of the n79 frequency band as an example, in the transmission time slot, PA 331 amplifies the RF signal so that the power of the RF signal radiated by the first antenna 341 is 20dBm. Assuming that the isolation between the first antenna 341 and the second antenna 342 is 15dB, although LNA 332 is in the off state in the transmission time slot, because there is a coupling relationship between the first antenna 341 and the second antenna 342, the power of the RF signal coupled to the second antenna 342 is 5dBm, that is, the power of the RF signal coupled to the input end of LNA 332 by the transmission channel is 5dBm. Figure 4As explained in the specification, the protection circuit in the LNA will not discharge the input power when the input power is less than 10dBm, and thus cannot play a protective role. The PN junction in the gain circuit 401 of the LNA is a nonlinear device, so that even if the LNA is in the off state, as long as the gain circuit 401 inputs power, a harmonic signal will be generated. The harmonic signal will generate radiation, causing the radiated spurious emission (RSE) test to exceed the standard and fail to meet regulatory requirements.

[0078] For this reason, Figure 6-Figure 25 As shown, the embodiment of the present application provides another LNA, including: a gain circuit 401, a protection circuit 402, an input match 403, an output match 404, a bias circuit 405, a load network 406, an input port IN, an output port OUT, an enable port EN, a degeneration inductor L, a bias capacitor C, and a resistor R. The protection circuit 402 includes a diode D1, a diode D2, a diode D3, and a switch K. The switch K can be a metal-oxide-semiconductor field-effect transistor (MOS) tube. Optionally, as Figure 16-Figure 25 As shown, the protection circuit 402 further includes an inverter INV.

[0079] The input port IN is electrically connected to the first end of the input match 403, the second end of the input match 403 is electrically connected to the first end of the bias capacitor C, the second end of the bias capacitor C is electrically connected to the second end of the resistor R and the input end of the gain circuit 401. The bias circuit 405 is electrically connected to the first end of the resistor R, and the bias circuit 405 is also electrically connected to the enable port EN. The output end of the gain circuit 401 is electrically connected to the output port OUT, the gain circuit 401 is also electrically connected to the power supply through the load network 406, and the gain circuit 401 is also grounded through the degeneration inductor L.

[0080] In the protection circuit 402, as Figure 6-Figure 25 As shown, the cathode of diode D1 is electrically connected to the anode of diode D2, and the cathode of diode D2 and the anode of diode D3 are grounded. Figure 6-Figure 11 as well as Figure 16-Figure 21 As shown, the anode of the diode D1 and the cathode of the diode D3 are electrically connected to the first end of the bias capacitor C; or, as shown Figure 12-Figure 15 as well as Figure 22-Figure 25As shown, the anode of the diode D1 and the cathode of the diode D3 are electrically connected to the second end of the bias capacitor C. The anode of the diode D1 and the cathode of the diode D3 are electrically connected to the first end of the bias capacitor C. Compared with the anode of the diode D1 and the cathode of the diode D3 being electrically connected to the first end of the bias capacitor C, the protection circuit 402 can not only perform electrostatic discharge protection on the gain circuit 401, but also perform electrostatic discharge protection on the bias capacitor C.

[0081] Since the power of the RF signal input to the input port IN of the LNA is only forward, when the input power is large, the diodes D1 and D2 are turned on, while the diode D3 will never be turned on because it is reversely connected between the input port IN and the ground. Therefore, it is only necessary to connect the switch K in parallel with at least one of the diodes D1 and D2, so that when the switch K is turned on, at least one of the diodes D1 and D2 is short-circuited to reduce the turn-on voltage of the protection circuit 402, and the switch K is not required to be connected in parallel with the diode D3. In this way, even if the input power of the LNA is small (for example, 5dBm) in the off state, the input port IN of the LNA can be grounded through the diode D1 or the diode D2, or directly grounded through the switch K, so that the input power can be discharged to the ground even when the input power is small, avoiding the gain circuit 401 from generating harmonic signals.

[0082] For example, Figure 6 , Figure 7 , Fig.12 , Fig.13 , Fig.16 , Fig.17 , Fig. 22 , Fig.23 The switch K is connected in parallel with the diode D1. When the switch K is turned on, the diode D1 is short-circuited, and the turn-on voltage of the protection circuit 402 is equal to the turn-on voltage Vdiode of the diode D2. Figure 8 , Fig. 9 , Fig.14 , Fig.15 , Fig.18 , Fig.19 , Fig.24 , Fig.25 The switch K is connected in parallel with the diode D2. When the switch K is turned on, the diode D2 is short-circuited, and the turn-on voltage of the protection circuit 402 is equal to the turn-on voltage Vdiode of the diode D1. Fig.10 , Fig.11 , Fig. 20 , Fig.21 The switch K is connected in parallel with the diode D1 and the diode D2. When the switch K is turned on, the diode D1 and the diode D2 are short-circuited, and the start-up voltage of the protection circuit 402 is 0 V. They are all smaller than the corresponding start-up voltage 2*Vdiode when the input power is 10 dBm, which makes it easier to discharge the smaller input power and avoid the gain circuit 401 from generating harmonic signals.

[0083] The enable port EN can be used with Figure 3 The baseband chip 31 is electrically connected to the LNA, and the baseband chip 31 can send a control signal (including an enable signal or a disable signal) to the enable port EN of the LNA. The enable signal is used to control the bias circuit 405 to output a bias voltage and a bias current to the gain circuit 401, so that the LNA is in a working state, and the enable signal is also used to control the switch K to be disconnected; the disable signal is used to control the bias circuit 405 to stop outputting the bias voltage and the bias current to the gain circuit 401, so that the LNA is in a closed state, and the disable signal is also used to control the switch K to be turned on.

[0084] The enable signal is at a high level, the disable signal is at a low level, the switch K is an N-type MOS tube, and the protection circuit 402 includes an inverter INV. Alternatively, the enable signal is at a high level, the disable signal is at a low level, the switch K is a P-type MOS tube, and the protection circuit 402 does not include an inverter INV. Alternatively, the enable signal is at a low level, the disable signal is at a high level, the switch K is a P-type MOS tube, and the protection circuit 402 includes an inverter INV. Alternatively, the enable signal is at a low level, the disable signal is at a high level, the switch K is an N-type MOS tube, and the protection circuit 402 does not include an inverter INV. Figure 6-Figure 15 As shown, when the protection circuit 402 does not include the inverter INV, the enable port EN is electrically connected to the control terminal of the switch K. Figure 16-Figure 25 As shown, when the protection circuit 402 includes an inverter INV, the input end of the inverter INV is electrically connected to the enable port EN, and the output end of the inverter INV is electrically connected to the control end of the switch K, that is, the enable port EN is electrically connected to the control end of the switch K through the inverter INV.

[0085] Taking the enable signal as a high level, the disable signal as a low level, the switch K as an N-type MOS tube, and the protection circuit 402 including the inverter INV as an example, the working principle of the protection circuit 402 is as follows:

[0086] When the baseband chip 31 sends an enable signal to the enable port EN of the LNA, the bias circuit 405 outputs a bias voltage and a bias current to the gain circuit 401, so that the LNA is in a working state. If the enable signal is at a high level, the disable signal is at a low level, the switch K is an N-type MOS tube, and the protection circuit 402 includes an inverter INV, then the high-level enable signal is inverted by the inverter INV to a low level, and the switch K of the N-type MOS tube is controlled to be turned off. At this time, the protection circuit 402 can still play the role of electrostatic discharge protection, that is, when the LNA is in a working state, when the absolute value of the input electrostatic voltage is large (greater than 2*Vdiode), the diode D1, the diode D2, or the diode D3 is turned on, and the static electricity is discharged through the diode D1 and the diode D2, or, it is discharged through the diode D3.

[0087] When the baseband chip 31 sends a disable signal to the enable port EN of the LNA, the bias circuit 405 stops outputting the bias voltage and bias current to the gain circuit 401, so that the LNA is in a closed state. If the enable signal is at a high level, the disable signal is at a low level, the switch K is an N-type MOS tube, and the protection circuit 402 includes an inverter INV, then the low-level disable signal is inverted by the inverter INV to a high level, and the switch K of the N-type MOS tube is controlled to be turned on. At this time, the switch K short-circuits the diode connected in parallel with the switch K. For example Figure 6 , Figure 7 , Fig.12 , Fig.13 , Fig.16 , Fig.17 , Fig. 22 , Fig.23 The middle switch K short-circuits the diode D1, and the input power is discharged through the switch K and the diode D2. Figure 8 , Fig. 9 , Fig.14 , Fig.15 , Fig.18 , Fig.19 , Fig.24 , Fig.25 The middle switch K short-circuits the diode D2, and the input power is discharged through the switch K and the diode D1. Fig.10 , Fig.11 , Fig. 20 , Fig.21 The middle switch K short-circuits the diode D1 and the diode D2, and the input power is discharged through the switch K. Both can prevent the gain circuit 401 from generating harmonic signals.

[0088] Taking the enable signal as a high level, the disable signal as a low level, the switch K as a P-type MOS tube, and the protection circuit 402 not including the inverter INV as an example, the working principle of the protection circuit 402 is as follows:

[0089] When the baseband chip 31 sends an enable signal to the enable port EN of the LNA, the bias circuit 405 outputs a bias voltage and a bias current to the gain circuit 401, so that the LNA is in a working state. If the enable signal is at a high level, the disable signal is at a low level, the switch K is a P-type MOS tube, and the protection circuit 402 does not include an inverter INV, then the high-level enable signal controls the switch K of the P-type MOS tube to turn off. At this time, the protection circuit 402 can still play the role of electrostatic discharge protection, that is, when the LNA is in a working state, when the absolute value of the input electrostatic voltage is large (greater than 2*Vdiode), the diode D1, the diode D2 is turned on, or the diode D3 is turned on, and the static electricity is grounded and discharged through the diode D1 and the diode D2, or grounded and discharged through the diode D3.

[0090] When the baseband chip 31 sends a disable signal to the enable port EN of the LNA, the bias circuit 405 stops outputting the bias voltage and bias current to the gain circuit 401, so that the LNA is in a closed state. If the enable signal is at a high level, the disable signal is at a low level, the switch K is a P-type MOS tube, and the protection circuit 402 does not include an inverter INV, then the low-level disable signal controls the switch K of the P-type MOS tube to turn on. At this time, the switch K short-circuits the diode connected in parallel with the switch K. For example Figure 6 , Figure 7 , Fig.12 , Fig.13 , Fig.16 , Fig.17 , Fig. 22 , Fig.23 The middle switch K short-circuits the diode D1, and the input power is discharged through the switch K and the diode D2. Figure 8 , Fig. 9 , Fig.14 , Fig.15 , Fig.18 , Fig.19 , Fig.24 , Fig.25 The middle switch K short-circuits the diode D2, and the input power is discharged through the switch K and the diode D1. Fig.10 , Fig.11 , Fig. 20 , Fig.21 The middle switch K short-circuits the diode D1 and the diode D2, and the input power is discharged through the switch K. Both can prevent the gain circuit 401 from generating harmonic signals.

[0091] Taking the enable signal as a low level, the disable signal as a high level, the switch K as a P-type MOS tube, and the protection circuit 402 including the inverter INV as an example, the working principle of the protection circuit 402 is as follows:

[0092] When the baseband chip 31 sends an enable signal to the enable port EN of the LNA, the bias circuit 405 outputs a bias voltage and a bias current to the gain circuit 401, so that the LNA is in working state. If the enable signal is at a low level, the disable signal is at a high level, the switch K is a P-type MOS tube, and the protection circuit 402 includes an inverter INV, then the low-level enable signal is inverted by the inverter INV to become a high level, and the switch K of the P-type MOS tube is controlled to be turned off. At this time, the protection circuit 402 can still play the role of electrostatic discharge protection, that is, when the LNA is in working state, when the absolute value of the input electrostatic voltage is large, the diode D1, the diode D2 is turned on, or the diode D3 is turned on, and the static electricity is grounded and discharged through the diode D1 and the diode D2, or grounded and discharged through the diode D3.

[0093] When the baseband chip 31 sends a disable signal to the enable port EN of the LNA, the bias circuit 405 stops outputting the bias voltage and bias current to the gain circuit 401, so that the LNA is in a closed state. If the enable signal is at a low level, the disable signal is at a high level, the switch K is a P-type MOS tube, and the protection circuit 402 includes an inverter INV, then the high-level disable signal is inverted by the inverter INV to a low level, and the switch K of the P-type MOS tube is controlled to be turned on. At this time, the switch K short-circuits the diode connected in parallel with the switch K. For example Figure 6 , Figure 7 , Fig.12 , Fig.13 , Fig.16 , Fig.17 , Fig. 22 , Fig.23 The middle switch K short-circuits the diode D1, and the input power is discharged through the switch K and the diode D2. Figure 8 , Fig. 9 , Fig.14 , Fig.15 , Fig.18 , Fig.19 , Fig.24 , Fig.25 The middle switch K short-circuits the diode D2, and the input power is discharged through the switch K and the diode D1. Fig.10 , Fig.11 , Fig. 20 , Fig.21 The middle switch K short-circuits the diode D1 and the diode D2, and the input power is discharged through the switch K. Both can prevent the gain circuit 401 from generating harmonic signals.

[0094] Taking the enable signal as a low level, the disable signal as a high level, the switch K as an N-type MOS tube, and the protection circuit 402 not including the inverter INV as an example, the working principle of the protection circuit 402 is as follows:

[0095] When the baseband chip 31 sends an enable signal to the enable port EN of the LNA, the bias circuit 405 outputs a bias voltage and a bias current to the gain circuit 401, so that the LNA is in a working state. If the enable signal is at a low level, the disable signal is at a high level, the switch K is an N-type MOS tube, and the protection circuit 402 does not include an inverter INV, then the low-level enable signal controls the switch K of the N-type MOS tube to turn off. At this time, the protection circuit 402 can still play the role of electrostatic discharge protection, that is, when the LNA is in a working state, when the absolute value of the input electrostatic voltage is large, the diode D1, the diode D2 is turned on, or the diode D3 is turned on, and the static electricity is grounded and discharged through the diode D1 and the diode D2, or grounded and discharged through the diode D3.

[0096] When the baseband chip 31 sends a disable signal to the enable port EN of the LNA, the bias circuit 405 stops outputting the bias voltage and bias current to the gain circuit 401, so that the LNA is in a closed state. If the enable signal is at a low level, the disable signal is at a high level, the switch K is an N-type MOS tube, and the protection circuit 402 does not include an inverter INV, then the high-level disable signal controls the switch K of the N-type MOS tube to turn on. At this time, the switch K short-circuits the diode connected in parallel with the switch K. For example Figure 6 , Figure 7 , Fig.12 , Fig.13 , Fig.16 , Fig.17 , Fig. 22 , Fig.23 The middle switch K short-circuits the diode D1, and the input power is discharged through the switch K and the diode D2. Figure 8 , Fig. 9 , Fig.14 , Fig.15 , Fig.18 , Fig.19 , Fig.24 , Fig.25 The middle switch K short-circuits the diode D2, and the input power is discharged through the switch K and the diode D1. Fig.10 , Fig.11 , Fig. 20 , Fig.21 The middle switch K short-circuits the diode D1 and the diode D2, and the input power is discharged through the switch K. Both can prevent the gain circuit 401 from generating harmonic signals.

[0097] The low noise amplifier, radio frequency circuit and electronic device provided by the embodiment of the present application, the low noise amplifier provided by the embodiment of the present application, the protection circuit is electrically connected to the input end of the gain circuit, the cathode of the first diode in the protection circuit is electrically connected to the anode of the second diode, the cathode of the second diode and the anode of the third diode are grounded; the anode of the first diode and the cathode of the third diode are electrically connected to the input end of the gain circuit, and the switch is connected in parallel with at least one of the first diode and the second diode. The enable port is used to input an enable signal or a disable signal, the enable signal is used to control the bias circuit to output a bias voltage and a bias current to the gain circuit, and to control the switch to be disconnected; the disable signal is used to control the bias circuit to stop outputting a bias voltage and a bias current to the gain circuit, and to control the switch to be turned on. If the enable port inputs a disable signal, the disable signal controls the bias circuit to stop outputting a bias voltage and a bias current to the gain circuit, so that the LNA is in a closed state. The disable signal controls the switch to be turned on, short-circuiting at least one of the first diode and the second diode to reduce the start-up voltage of the protection circuit, so that the protection circuit can more easily discharge a smaller input power, thereby preventing the gain circuit from generating harmonic signals, thereby preventing the LNA from generating harmonic signals when in the off state.

[0098] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A low noise amplifier, characterized in that: include: Gain circuit, protection circuit, input matching, output matching, bias circuit, load network, input port, output port, enable port, degeneration inductance, bias capacitor, resistor; the protection circuit includes a first diode, a second diode, a third diode, and a switch; The input port is electrically connected to the first end of the input match, the second end of the input match is electrically connected to the first end of the bias capacitor, the second end of the bias capacitor is electrically connected to the second end of the resistor and the input end of the gain circuit; the bias circuit is electrically connected to the first end of the resistor, and the bias circuit is also electrically connected to the enable port; the output end of the gain circuit is electrically connected to the output port, the gain circuit is also electrically connected to a power supply through the load network, and the gain circuit is also grounded through a degeneration inductor; The cathode of the first diode is electrically connected to the anode of the second diode, and the cathode of the second diode and the anode of the third diode are grounded; the anode of the first diode and the cathode of the third diode are electrically connected to the first end or the second end of the bias capacitor; the enable port is also electrically connected to the control end of the switch, and the switch is connected in parallel with at least one of the first diode and the second diode; The enable port is used to input an enable signal or a disable signal, and the enable signal is used to control the bias circuit to output a bias voltage and a bias current to the gain circuit, and to control the switch to be disconnected; The disable signal is used to control the bias circuit to stop outputting the bias voltage and bias current to the gain circuit, and to control the switch to be turned on, so that the input power coupled from the transmit channel to the input port is discharged through the first diode or the second diode, or is discharged through the switch.

2. The low noise amplifier according to claim 1, characterized in that: The protection circuit further includes an inverter, and the enable port is electrically connected to the control end of the switch through the inverter.

3. The low noise amplifier according to claim 2, characterized in that: The enable signal is at a high level, the disable signal is at a low level, and the switch is an N-type MOS tube.

4. The low noise amplifier according to claim 2, characterized in that: The enable signal is at a low level, the disable signal is at a high level, and the switch is a P-type MOS tube.

5. The low noise amplifier according to claim 1, characterized in that: The enable signal is at a high level, the disable signal is at a low level, and the switch is a P-type MOS tube.

6. The low noise amplifier according to claim 1, characterized in that: The enable signal is at a low level, the disable signal is at a high level, and the switch is an N-type MOS tube.

7. A radio frequency circuit, characterized in that: It comprises a baseband chip, a radio frequency integrated circuit and a low noise amplifier as described in any one of claims 1 to 6, wherein the baseband chip is electrically connected to the radio frequency integrated circuit and the low noise amplifier, and the radio frequency integrated circuit is electrically connected to the low noise amplifier.

8. An electronic device, characterized in that: It comprises the radio frequency circuit and the antenna as claimed in claim 7, wherein the radio frequency circuit is electrically connected to the antenna.

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