A digital pre-distortion correction method, device, equipment, medium and product

Abstract

The application discloses a digital pre-distortion correction method, device, equipment, medium and product, and the baseband signal of IQ modulation is input into a digital pre-distortion calculator to obtain a pre-distortion signal; a feedback loop is used for signal collection on the pre-distortion signal to obtain a feedback signal; the feedback signal is input into a delay module to be aligned with the baseband signal to obtain an aligned trainer input signal; the trainer input signal is input into a digital pre-distortion trainer for processing to obtain an expected trainer output signal; a preset estimation function is used for minimum adaptive estimation on the trainer output signal and the corresponding pre-distortion signal to obtain a pre-distortion coefficient; and the digital pre-distortion calculator and the digital pre-distortion trainer are updated according to the pre-distortion coefficient. The application can simplify the operation complexity and reduce the occupation of hardware resources.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of communication technology, in particular to a digital predistortion correction method, device, equipment, medium and product. BACKGROUND

[0002] Among all linearization technologies, digital predistortion technology is gradually replacing various analog linearization technologies and becoming a key technology for commercial application of wireless communication.

[0003] The working principle of digital predistortion technology is to pre-generate an inverse distortion of the baseband signal and the power amplifier characteristics, so that the cascade of digital predistortion and power amplifier response can achieve the expected linear response. The digital predistortion technology collects the in-band and out-of-band output data of the power amplifier with nonlinear distortion to correct the transmission signal. The current digital predistortion technology generally uses a memory power amplifier model and a correlation function loop delay estimation algorithm. When the delay estimation algorithm is calculated, a large number of complex multipliers are used for floating point operation using the original data of the IQ two-way, and the operation complexity is high, which requires a large amount of hardware resources in engineering implementation. SUMMARY

[0004] In order to solve the above problems, the present application provides a digital predistortion correction method, device, equipment, medium and product, which can simplify the operation complexity and reduce the occupation of hardware resources.

[0005] The embodiment of the present application provides a digital predistortion correction method, which comprises the following steps:

[0006] Inputting an IQ modulated baseband signal into a digital predistorter for calculation to obtain a predistorted signal;

[0007] Collecting the predistorted signal through a feedback loop to obtain a feedback signal;

[0008] Inputting the feedback signal into a delay module to align with the baseband signal to obtain an aligned trainer input signal;

[0009] Inputting the trainer input signal into a digital predistortion trainer for processing to obtain an expected trainer output signal;

[0010] Adopting a preset estimation function to perform minimum adaptive estimation on the trainer output signal and the corresponding predistorted signal to obtain a predistortion coefficient;

[0011] Updating the coefficients of the digital predistorter and the digital predistortion trainer according to the predistortion coefficient.

[0012] Preferably, collecting the predistorted signal through the feedback loop to obtain the feedback signal comprises:

[0013] The predistortion signal is converted into an analog signal by a digital-to-analog converter, and the converted signal is processed by a power amplifier to obtain a power amplifier output signal.

[0014] The power amplifier output signal is collected to obtain a collected signal, and the collected signal is input into an analog-to-digital converter to obtain a feedback signal output.

[0015] Preferably, the digital predistorter and the digital predistortion trainer adopt the same memory polynomial power amplifier model.

[0016] Further, the memory polynomial power amplifier model adopted by the digital predistortion trainer is specifically:

[0017] wherein, is a trainer output signal, n is a sampling point, and the memory depth combination term is h kq is a polynomial coefficient, K represents the highest order of the polynomial, k = 1, 2, …, K; Q represents the memory delay depth, q = 0, 1, 2, …, Q; Y(n-q) represents a delay of q unit lengths of the trainer input signal Y(n).

[0018] Preferably, the solving of the predistortion coefficient comprises:

[0019] The polynomial coefficient in the memory polynomial power amplifier model is represented by a complex coefficient, and the baseband signal is represented by a complex signal.

[0020] The memory polynomial power amplifier model is decomposed, and the decomposed signal is solved by using an in-phase component signal to determine the coefficient of the in-phase component signal, thereby obtaining the predistortion coefficient.

[0021] Preferably, the solving of the predistortion coefficient comprises:

[0022] The solving of the predistortion coefficient comprises:

[0023] The polynomial coefficient in the memory polynomial power amplifier model is represented by a complex coefficient, thereby obtaining a complex form of the memory depth combination term.

[0024] The baseband signal is represented by a complex signal, thereby obtaining a complex form of the memory polynomial power amplifier model.

[0025] The complex form of the memory polynomial power amplifier model is subjected to extraction of nonlinear parameters, thereby obtaining an IQ modulated decomposed signal.

[0026] The coefficients of the in-phase component signal are determined by solving the decomposed signal using single-channel information from the I and Q signals, and then the predistortion coefficients are obtained.

[0027] Wherein, the polynomial coefficients h kq =a kq +jb kq The complex form of the memory depth merging term F q (|Y(nq)|)=A q (|Y(nq)|)+jB q (|Y(nq)|); First in-phase component signal A q (|Y(nq)|)=a 1q +a 2q |Y(nq)|+...+a kq |Y(nq)| k-1 The second in-phase component signal B q (|Y(nq)|)=b 1q +b 2q |Y(nq)|+...+b kq |Y(nq)| k-1 a kq and b kq Let Y(nq) be the two complex coefficients of the polynomial, k = 1, 2, ..., K, where K represents the highest order of the polynomial; q = 0, 1, 2, ..., Q represents the memory delay depth; Y(nq) represents the trainer input signal Y(n) delayed by q units, where Y(nq) = Y i (nq)+jY q (nq), Y i (nq) and Y q (nq) represents two complex signals Y(nq), and the complex form of the memory polynomial power amplifier model is shown. The decomposition signal

[0028] Preferably, the acquired signal is P(n) / K;

[0029] Wherein, P(n) is the power amplifier output signal of the power amplifier, and K represents the desired amplitude gain of the power amplifier.

[0030] Preferably, the IQ modulated baseband signal is input into a digital predistorter to calculate and obtain a predistorted signal, including:

[0031] The baseband signal is divided into odd and even phase signals;

[0032] performing nonlinear calculation on the odd-numbered signal of the odd-even two-phase signals, and using odd-numbered coefficients under a nonlinear order as tap coefficients of an odd-numbered sequence LTI calculation to obtain a first pre-distortion signal; performing nonlinear calculation on the even-numbered signal of the odd-even two-phase signals, and using even-numbered coefficients under a nonlinear order as tap coefficients of an even-numbered sequence calculation to obtain a second pre-distortion signal;

[0033] adding the first pre-distortion signal and the second pre-distortion signal to obtain the pre-distortion signal.

[0034] Preferably, the estimation function

[0035] wherein, is the pre-distortion signal, and Z(n) is the pre-distortion signal.

[0036] Preferably, the feedback signal is input into a delay module to align with the baseband signal to obtain an aligned trainer input signal, comprising:

[0037] extracting a signal of a preset first proportion from the baseband signal as a first template set, and calculating a first amplitude curve of the first template set according to an abs function, and calculating a first trend dimensionless function of the amplitude of the first amplitude curve changing with time;

[0038] extracting a signal of a preset second proportion from the feedback signal as a second template set, and calculating a second amplitude curve of the second template set according to an abs function, and calculating a second trend dimensionless function of the amplitude of the second amplitude curve changing with time;

[0039] using a clustering optimization algorithm in the second trend dimensionless function to search for an index value when the second trend dimensionless function has maximum cross-correlation with the first trend dimensionless function; wherein the cross-correlation of the second trend dimensionless function and the first trend dimensionless function is calculated by a cosine similarity function or a Hamming distance;

[0040] calculating the aligned baseband signal according to the position determined by the index value.

[0041] Further, the first trend dimensionless function D[x(n)] = sign[|x(n)| - |x(n-1)|];

[0042] The second trend dimensionless function M[y(n)] = sign[|y(n)| - |y(n-1)|];

[0043] wherein, the dimensionless function x(n-1) represents that the baseband signal x(n) is delayed by 1 unit length, and y(n-1) represents that the feedback information y(n) is delayed by 1 unit length.

[0044] The embodiment of the present application also provides a digital pre-distortion correction device, which comprises:

[0045] a pre-distortion module, configured to input an IQ modulated baseband signal into a digital pre-distortion calculator to obtain a pre-distortion signal;

[0046] a feedback module, configured to collect a feedback signal by feeding back the pre-distortion signal through a feedback loop

[0047] a delay calculation module, configured to input the feedback signal into a delay module to align the feedback signal with the baseband signal to obtain an aligned trainer input signal;

[0048] a training module, configured to input the trainer input signal into a digital pre-distortion trainer to process the trainer input signal to obtain an expected trainer output signal;

[0049] an adaptive module, configured to perform minimum adaptive estimation on the trainer output signal and the corresponding pre-distortion signal by using a preset estimation function to obtain a pre-distortion coefficient;

[0050] a coefficient updating module, configured to update coefficients of the digital pre-distortion calculator and the digital pre-distortion trainer according to the pre-distortion coefficient.

[0051] Preferably, the feedback module is specifically configured to:

[0052] perform digital-to-analog conversion on the pre-distortion signal through a digital-to-analog converter, and then process the conversion result through a power amplifier to obtain a power amplifier output signal;

[0053] collect the power amplifier output signal to obtain a collection signal, and then input the collection signal into an analog-to-digital converter to perform analog-to-digital conversion to obtain a feedback signal output.

[0054] Preferably, the digital pre-distortion calculator and the digital pre-distortion trainer adopt the same memory polynomial power amplifier model.

[0055] Preferably, the memory polynomial power amplifier model adopted by the digital pre-distortion trainer is specifically:

[0056] wherein, is a trainer output signal, n is a sampling point, and the memory depth combination term is h kq is a polynomial coefficient, K represents the highest order of the polynomial, k=1, 2, …, K; Q represents the memory delay depth, q=0, 1, 2, …, Q; and Y(n-q) represents a trainer input signal Y(n) delayed by q unit lengths.

[0057] Preferably, the adaptive module is specifically used for:

[0058] Polynomial coefficients in the memory polynomial power amplifier model are represented by complex coefficients, and the baseband signal is represented by complex signals.

[0059] The memory polynomial power amplifier model is decomposed, and the decomposition signal is solved by using the in-phase component signal to determine the coefficients of the in-phase component signal, and the pre-distortion coefficients are solved.

[0060] Preferably, the adaptive module is specifically used for:

[0061] Polynomial coefficients in the memory polynomial power amplifier model are represented by complex coefficients, and the memory depth combined term is obtained in the form of complex numbers.

[0062] The baseband signal is represented by complex signals, and the memory polynomial power amplifier model is obtained in the form of complex numbers.

[0063] The non-linear parameters of the memory polynomial power amplifier model in the form of complex numbers are extracted, and the IQ modulated decomposition signal is obtained.

[0064] The coefficients of the in-phase component signal are determined by solving the decomposition signal through the single-channel information in the IQ two-way signal, and the pre-distortion coefficients are solved.

[0065] Wherein, the polynomial coefficient h kq = a kq +jb kq , the memory depth combined term F q (|Y(n-q)|) = A q (|Y(n-q)|) + jB q (|Y(n-q)|) is obtained in the form of complex numbers; the first in-phase component signal A q (|Y(n-q)|) = a 1q +a 2q |Y(n-q)|+…+a kq |Y(n-q)| k-1 , the second in-phase component signal B q (|Y(n-q)|) = b 1q +b 2q |Y(n-q)|+…+b kq |Y(n-q)| k-1 , a kq and b kq are two complex coefficients of the polynomial coefficient, k = 1, 2, …, K, K represents the highest order of the polynomial; q = 0, 1, 2, …, Q represents the memory delay depth; Y(n-q) represents that the input signal Y(n) of the trainer is delayed by q unit lengths, and the signal Y(n-q) = Y i(n-q)+jY q (n-q), Y i (n-q) and Y q (n-q) is a two-way complex signal of signal Y(n q), a complex form memory polynomial power amplifier model the decomposition signal

[0066] Preferably, the acquisition signal is P(n) / K.

[0067] Wherein, P(n) is the power amplifier output signal of the power amplifier, K represents the expected amplitude gain of the power amplifier.

[0068] Preferably, the pre-distortion module is specifically used for:

[0069] The baseband signal is divided into odd and even two signals;

[0070] The odd signal in the odd and even two signals is calculated by non-linear calculation, and the odd coefficient under the non-linear order is used as the odd sequence LTI calculation of the tap coefficient to obtain the first pre-distortion signal; The even signal in the odd and even two signals is calculated by non-linear calculation, and the even coefficient under the non-linear order is used as the even sequence calculation of the tap coefficient to obtain the second pre-distortion signal.

[0071] The first pre-distortion signal and the second pre-distortion signal are added to obtain the pre-distortion signal.

[0072] Preferably, the estimation function

[0073] Wherein, The output signal of the trainer is Z(n), and the pre-distortion signal is Z(n).

[0074] Preferably, the delay calculation module is specifically used for:

[0075] A signal of a preset first proportion is extracted from the baseband signal as a first template set, a first amplitude curve of the first template set is calculated according to the abs function, and a first trend dimensionless function of the amplitude of the first amplitude curve changing with time is calculated.

[0076] A signal of a preset second proportion is extracted from the feedback signal as a second template set, a second amplitude curve of the second template set is calculated according to the abs function, and a second trend dimensionless function of the amplitude of the second amplitude curve changing with time is calculated.

[0077] searching the index value when the second trend dimensionless function has the maximum cross-correlation with the first trend dimensionless function using a clustering optimization algorithm in the second trend dimensionless function; wherein the cross-correlation of the second trend dimensionless function and the first trend dimensionless function is calculated by a cosine similarity function or a Hamming distance;

[0078] calculating the aligned baseband signal according to the position determined by the index value.

[0079] Further, the first trend dimensionless function D[x(n)] = sign[|x(n)|-|x(n-1)|];

[0080] The second trend dimensionless function M[y(n)] = sign[|y(n)|-|y(n-1)|];

[0081] wherein the dimensionless function x(n-1) represents that the baseband signal x(n) is delayed by 1 unit length, and y(n-1) represents that the feedback information y(n) is delayed by 1 unit length.

[0082] The embodiment of the present application also provides a terminal device, which comprises a processor, a memory and a computer program stored in the memory and configured to be executed by the processor, and the processor implements the digital pre-distortion correction method according to any one of the above embodiments when executing the computer program.

[0083] The embodiment of the present application also provides a computer readable storage medium, which comprises a stored computer program, wherein the computer readable storage medium controls a device where the computer readable storage medium is located to execute the digital pre-distortion correction method according to any one of the above embodiments when the computer program runs.

[0084] The embodiment of the present application also provides a computer program product, which comprises computer programs / instructions, and the computer programs / instructions implement the steps of the method according to any one of the above embodiments when executed by a processor.

[0085] The present application provides a kind of digital pre-distortion correction method, device, equipment, medium and product, by IQ modulated baseband signal input to digital pre-distortion calculator, obtain pre-distortion signal;Feedback loop is carried out signal acquisition to the pre-distortion signal, obtain feedback signal;The feedback signal is input into delay module and is aligned with the baseband signal, obtain the input signal of aligner after training;The input signal of training ware is input into digital pre-distortion training ware and is handled, obtain the expected output signal of training ware;Using preset estimation function, the training ware output signal and corresponding pre-distortion signal are minimally adaptive estimation, and pre-distortion coefficient is obtained by solving;According to the pre-distortion coefficient, the digital pre-distortion calculator and the digital pre-distortion training ware are updated.The present application can simplify the complexity of operation, reduce the occupation of hardware resources. BRIEF DESCRIPTION OF DRAWINGS

[0086] Figure 1 It is a kind of digital pre-distortion correction method flow schematic diagram provided by the present application embodiment;

[0087] Figure 2 It is the working principle schematic diagram of a kind of digital pre-distortion correction method provided by the present application embodiment;

[0088] Figure 3 It is the principle schematic diagram of in-phase component signal solving of the present application embodiment;

[0089] Figure 4 It is the schematic diagram of multi-phase architecture provided by the present application embodiment;

[0090] Figure 5 It is the flow schematic diagram of the work executed by the digital pre-distortion correction device provided by the present application embodiment;

[0091] Figure 6 It is the structure schematic diagram of a kind of terminal equipment provided by the present application embodiment. DETAILED DESCRIPTION

[0092] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor are within the scope of protection of the present application.

[0093] The present application embodiment provides a kind of digital pre-distortion correction method, refer to Figure 1 It is the flow schematic diagram of a kind of digital pre-distortion correction method provided by the present application embodiment, the method includes the following steps:

[0094] Step S1, inputting the IQ modulated baseband signal into a digital pre-distorter to calculate a pre-distorted signal;

[0095] Step S2, collecting the pre-distorted signal through a feedback loop to obtain a feedback signal;

[0096] Step S3, inputting the feedback signal into a delay module to align with the baseband signal to obtain an aligned trainer input signal;

[0097] Step S4, inputting the trainer input signal into a digital pre-distortion trainer to process to obtain an expected trainer output signal;

[0098] Step S5, using a preset estimation function to perform minimum adaptive estimation on the trainer output signal and the corresponding pre-distorted signal to solve a pre-distortion coefficient;

[0099] Step S6, updating the coefficient of the digital pre-distorter and the digital pre-distortion trainer according to the pre-distortion coefficient.

[0100] When the digital pre-distortion correction is performed, the working principle is to make the baseband signal pre-distort the inverse of the power amplifier characteristics, so that the cascade of digital pre-distortion and feedback response can achieve the expected linear response. The digital pre-distortion technology corrects the transmission signal by collecting the in-band and out-of-band output data with nonlinear distortion in the feedback loop.

[0101] In the existing digital pre-distortion delay calculation, a large number of complex multipliers are used to perform floating point operation on the original data of the IQ two-way, which wastes a large amount of hardware resources. Therefore, the embodiment of the present application proposes an improved digital pre-distortion implementation method, which can solve the pre-distortion coefficient by using a single signal to simplify the operation complexity.

[0102] In the specific implementation, refer to Figure 2 , which is a working principle diagram of the digital pre-distortion correction method provided by the embodiment of the present application.

[0103] The IQ modulated baseband signal is input into the digital pre-distorter, preferably, in the embodiment, the modulated baseband signal includes I-channel baseband signal X i (n) and Q-channel baseband signal X q (n).

[0104] In Figure 2 , the I-channel baseband signal X i (n) and the Q-channel baseband signal X q (n) are input into the digital pre-distorter to obtain two-way pre-distorted signals Z i (n) and Z q(n).

[0105] It should be noted that the pre-distortion processing and feedback sampling process of the two baseband signals are given in the embodiment Figure 2 , and in actual implementation, the digital pre-distortion device also needs to process the two baseband signals to solve the pre-distortion coefficients when working.

[0106] When sampling in the feedback loop, the two pre-distortion signals Z i (n) and Z q (n) need to be sampled, that is, the two pre-distortion signals are collected through the feedback loop to obtain the two trainer input signals Y i (n) and Y q (n).

[0107] In order to ensure that the pre-distortion signal Z i (n) output by the digital pre-distortion device is completely aligned with the trainer output signal Y (n) output by the pre-distortion trainer, so as to use accurate data for adaptive convergence and obtain more accurate pre-distortion coefficients, therefore, in specific implementation, the baseband signal x(n) input into the digital pre-distortion device and the feedback signal y(n) collected by the feedback loop from the output signal of the digital pre-distortion device are input into the delay module for alignment, and the aligned feedback signal is obtained as the trainer input signal.

[0108] The delay module uses three methods of convolution correlation function method of fast Fourier transform, phase compensation and decimal alignment to delay and align the baseband signal x(n) and the feedback signal y(n) collected by the feedback loop;

[0109] In the embodiment Figure 2 , the I baseband signal X i (n) and the Q baseband signal X q (n) input into the digital pre-distortion device obtain two pre-distortion signals Z i (n) and Z q (n). After the two pre-distortion signals are sampled, the two signals Y i (n) and Y q (n) of I and Q are obtained as the trainer input signals.

[0110] The aligned trainer input signal is input into the digital pre-distortion trainer for processing to obtain the expected trainer output signal

[0111] The trainer output signal and the corresponding pre-distortion signal are minimized and adaptively estimated by the estimation function e(n), and the polynomial coefficients corresponding to the minimum of the estimation function e(n) are obtained by minimizing the error.

[0112] The polynomial coefficient corresponding to the minimum e(n) is updated as the coefficient of the digital predistorter and the digital predistortion trainer.

[0113] The embodiment of the present application simplifies the operation complexity by using a single channel signal to solve the predistortion coefficient.

[0114] In another embodiment provided by the present application, the feedback loop in step S2 specifically comprises a digital-to-analog converter (DAC), a power amplifier (PA) and an analog-to-digital converter (ADC).

[0115] When the feedback loop collects signals, the predistortion signal is input into the DAC and the PA to obtain the power amplifier output signal.

[0116] The collector collects the power amplifier output signal to obtain the trainer input signal after the collected signal is input into the ADC.

[0117] It should be noted that before the feedback loop outputs the trainer input signal, it is necessary to determine whether the trainer input signal satisfies linearization. If the trainer input signal does not satisfy linearization, the output trainer input signal is subjected to subsequent predistortion correction processing; if the trainer input signal satisfies linearization, the predistortion processing is not needed. In the present embodiment, the predistortion correction processing process is directly described.

[0118] The post-inverse model of the power amplifier is established by the DAC, the PA and the ADC.

[0119] In another embodiment provided by the present application, the digital predistorter adopts a preset memory polynomial power amplifier model, the structure of the memory polynomial model is analyzed, and the calculation of the coefficient is realized by using a single channel signal to simplify the operation complexity.

[0120] It should be noted that as a preferred embodiment, the digital predistorter and the digital predistortion trainer adopt the same improved memory polynomial power amplifier model. The difference lies in that the input variable of the digital predistorter is the baseband signal, and the input variable of the digital predistortion trainer is the trainer input signal.

[0121] In another embodiment provided by the present application, the memory polynomial power amplifier model adopted by the digital predistortion trainer is as follows:

[0122] wherein, is the trainer output signal, n is the sampling point, h kqFor the polynomial coefficients, K represents the highest order of the polynomial, k = 1, 2, ..., K; Q represents the memory delay depth, q = 0, 1, 2, ..., Q; Y(nq) represents the delay of the trainer input signal Y(n) by q units, with zeros padded from Y(1) to Y(q).

[0123] Merging items with the same memory depth, then

[0124] Memory depth merged items

[0125] Therefore, the memory polynomial power amplifier model can be represented as a sum of several coefficients to be solved. By solving the coefficients of the memory polynomial power amplifier model, the digital predistorter can be solved.

[0126] In another embodiment of the present invention, the process of solving the predistortion coefficient specifically includes:

[0127] Complex coefficients are used to represent the polynomial coefficients in the memory polynomial power amplifier model, and complex signals are used to represent the baseband signal. The memory polynomial power amplifier model is represented in the form of a complex signal, that is, in the form of an IQ signal. After decomposing the memory polynomial power amplifier model, it is found that the IQ signals obtained by decomposing the memory polynomial power amplifier model all contain in-phase component signals. Therefore, the nonlinear parameters can be extracted using a single-channel signal to determine the coefficients of the in-phase component signals, and then the predistortion coefficients can be obtained.

[0128] It should be noted that during the solution process, each time the coefficients of the digital predistortion trainer are updated, the updated h will be... kq All coefficients are updated, and the updated coefficients are copied one by one to the corresponding coefficients of the digital predistorter to complete one iteration update.

[0129] In another embodiment of the present invention, the process of solving the predistortion coefficients specifically includes:

[0130] Complex coefficients are used to represent the polynomial coefficients in the memory polynomial power amplifier model, through a kq and b kq Two complex coefficients express the polynomial coefficients in complex form, where the polynomial coefficients h are... kq =a kq +jb kq ; We obtain the complex form of the memory depth merge term, F q (|Y(nq)|)=A q (|Y(nq)|)+jB q (|Y(nq)|).

[0131] Among them, the first in-phase component signal A q (|Y(nq)|)=a1q +a 2q |Y(nq)|+...+a kq |Y(nq)| k-1 The second in-phase component signal B q (|Y(nq)|)=b 1q +b 2q |Y(nq)|+...+b kq |Y(nq)| k-1 .

[0132] Y(nq) represents the delay of the trainer input signal Y(n) by q units, where k = 1, 2, ..., K, K represents the highest order of the polynomial; and q = 0, 1, 2, ..., Q represents the memory delay depth.

[0133] If we use complex signals to represent baseband signals, then the trainer input signal Y(n) delayed by q units, Y(nq), can be expressed as Y(nq) = Y i (nq)+jY q (nq), Y i (nq) and Y q (nq) represents the two complex signals of signal Y(nq).

[0134] We obtain a complex form of a memory polynomial power amplifier model.

[0135] Based on the decomposition principle of IQ modulation, the decomposed signal is obtained by analyzing the single-channel information in the I and Q signals. The I-channel decomposed signal...

[0136] For specific extraction details, please refer to [link / reference]. Figure 3 This is a schematic diagram illustrating the principle of solving for in-phase component signals according to an embodiment of the present invention. Figure 3 In this process, in-phase component signals are used for the solution, and the original signal X(n) = X i (n)+X q (n), the baseband signal is divided into two baseband signals. When solving, for the different polynomial orders of the two signals, the orders from 0 to k-1 are calculated and summed respectively. Then, FIR is used for filtering. Finally, the sum is used as the predistortion signal to complete the solution of nonlinear parameters and obtain the predistortion coefficients.

[0137] In another embodiment of the present invention, when extracting the acquisition signal, P(n) / K is used as the acquisition signal of the power amplifier, where K represents the expected amplitude gain of the power amplifier and P(n) is the power amplifier output signal of the power amplifier.

[0138] It should be noted that when the acquisition signal is collected, the acquisition signal can also be preprocessed to obtain the preprocessed acquisition signal P(n) / K.

[0139] The purpose of the data preprocessing module is to intercept a signal with a complete period, and the data preprocessing module is mainly aimed at wideband signal types such as WLAN, and the specific method is to divide the signal into 100 continuous blocks of sampling points and calculate the amplitude accumulation sum of all blocks, and the amplitude difference of the continuous blocks is used to estimate the start position and the stop position of the signal and the number of periods. The first advantage is to reduce the calculation amount of the delay alignment part, and the second advantage is to ensure the accuracy of the delay alignment result, avoid the spectrum distortion caused by the misalignment of data, avoid the interference of invalid data during the digital predistortion training, and higher accuracy.

[0140] In another embodiment provided by the present application, in the scene of large bandwidth and high rate, in order to compensate for the lack of hardware resources and reduce the requirement for DAC sampling rate, the reduction of sampling rate needs to be completed after using a band-limited filter and decimation after high-speed digital predistortion processing, but this will cause part of the calculation results to be discarded, wasting a large amount of calculation resources.

[0141] Referring to Figure 4 , the multi-phase architecture provided by the embodiment of the present application, since the band-limited FIR filter is also a linear system, the FIR system is combined in the embodiment of the present application, and a multi-phase architecture is used, so that when the digital predistorter processes the signal, the baseband signal is divided into odd and even two-phase signals, and the original signal X(n) is X i (n)+X q (n).

[0142] The baseband signal containing the IQ component is divided into odd and even two-phase signals X(2n) and X(2n+1), which are respectively calculated and processed, the odd-phase signal X(2n+1) is calculated by a nonlinear system, and the odd coefficients under the nonlinear order are used as the tap coefficients of the odd sequence LTI calculation, to obtain the first predistortion signal; the even-phase signal X(2n) is calculated by a nonlinear system, and the even coefficients under the nonlinear order are used as the tap coefficients of the even sequence LTI calculation, to obtain the first predistortion signal;

[0143] The first predistortion signal and the second predistortion signal are added to obtain the predistortion signal Z(n).

[0144] The embodiment reduces the waste of calculation resources and reduces the requirement for the sampling rate of the digital-analog sampler.

[0145] In another embodiment provided by the present application, the estimation function is wherein, is the output signal of the trainer, and Z(n) is the pre-distortion signal.

[0146] The polynomial coefficients corresponding to the minimum e(n) are obtained by minimizing the error through the Newton method, and the polynomial coefficients corresponding to the minimum e(n) are updated as the coefficients of the pre-distortion trainer.

[0147] In another embodiment provided by the present application, when the alignment processing is specifically performed, a part of the baseband signal entering the digital pre-distortion trainer is first extracted as a first template set, and the extracted signal is a first proportion of the baseband signal.

[0148] A first amplitude curve of the first template set is obtained using an abs function, and the abs function is specifically an absolute value function, and the absolute value of the baseband signal x(n) can be determined through the abs function.

[0149] A first trend dimensionless function of the amplitude of the first amplitude curve changing with time is calculated.

[0150] The feedback signal is processed by the same principle, a signal of a preset second proportion is extracted from the feedback signal y(n) as a second template set, a second amplitude curve of the second template set is calculated according to the abs function, and a second trend dimensionless function of the amplitude of the second amplitude curve changing with time is calculated.

[0151] According to the first trend dimensionless function, an index value when the maximum cross-correlation is searched in the second trend dimensionless function is searched, the position is determined according to the index value, and then the alignment signal is determined correspondingly.

[0152] In order to reduce the time complexity of the traversal search, a clustering optimization algorithm can be used, and a cosine similarity function / Hamming distance can be used in the cross-correlation algorithm, wherein when the cosine similarity function is used, the index corresponding to the maximum value is used, and when the Hamming distance is used, the index corresponding to the minimum value is used.

[0153] The amplitude trend fitting is performed on the input signal and the collected signal, and then the clustering analysis method is used to find the delay length when the cross-correlation is maximum in the feedback link sequence for a given input sequence set.

[0154] The time delay module can ensure that the pre-distortion signal Z(n) is completely aligned with the trainer output signal , accurate data can be used for adaptive convergence, and accurate pre-distortion coefficients can be obtained.

[0155] In another embodiment provided by the present application, the first trend dimensionless function is D[x(n)]=sign[|x(n)|-|x(n-1)|].

[0156] The second dimensionless function M[y(n)] = sign[|y(n)|-|y(n-1)|];

[0157] wherein the dimensionless function x(n-1) represents that the baseband signal x(n) is delayed by 1 unit length.

[0158] The dimensionless function y(n-1) represents that the feedback signal y(n) is delayed by 1 unit length.

[0159] The embodiment of the present application provides an optimization solution for the problem of insufficient hardware resources in a large bandwidth high rate scene, and the solution realizes approximate high rate digital pre-distortion by optimizing complex complex operation of a delay module and using a multi-phase architecture at a relatively low processing rate, and further reduces operation complexity by using a single-channel signal for processing.

[0160] Referring to Figure 5 is a structural schematic diagram of a digital pre-distortion correction device provided by the embodiment of the present application, and the device comprises:

[0161] A pre-distortion module is configured to input an IQ modulated baseband signal into a digital pre-distorter for calculation, so as to obtain a pre-distortion signal.

[0162] A feedback module is configured to collect a feedback signal by a feedback loop.

[0163] A delay calculation module is configured to input the feedback signal into a delay module to align with the baseband signal, so as to obtain an aligned trainer input signal.

[0164] A training module is configured to input the trainer input signal into a digital pre-distortion trainer for processing, so as to obtain an expected trainer output signal.

[0165] An adaptive module is configured to perform minimum adaptive estimation on the trainer output signal and a corresponding pre-distortion signal by using a preset estimation function, so as to obtain a pre-distortion coefficient.

[0166] A coefficient updating module is configured to update coefficients of the digital pre-distorter and the digital pre-distortion trainer according to the pre-distortion coefficient.

[0167] The digital pre-distortion correction device provided by the embodiment can perform all steps and functions of the digital pre-distortion correction method provided by any of the above embodiments, and the specific functions of the device are not described herein.

[0168] Referring to Figure 6, is a structural schematic diagram of a terminal device provided by an embodiment of the present application. The terminal device comprises a processor, a memory, and a computer program stored in the memory and capable of running on the processor, for example, a digital pre-distortion correction program. The processor implements the steps in each of the above-mentioned digital pre-distortion correction method embodiments when executing the computer program, for example Figure 1 the steps S1-S6 shown in the figure. Alternatively, the processor implements the functions of each module in the above-mentioned device embodiments when executing the computer program.

[0169] For example, the computer program can be divided into one or more modules, which are stored in the memory and executed by the processor to complete the present application. The one or more modules can be a series of computer program instruction segments capable of completing a specific function, which are used to describe the execution process of the computer program in the digital pre-distortion correction device. For example, the computer program can be divided into several modules, and the specific functions of each module have been described in detail in any of the above-mentioned digital pre-distortion correction method embodiments, and the specific functions of the device will not be described here.

[0170] The terminal device can be a desktop computer, a notebook computer, a palm computer, a cloud server, and the like. The terminal device can include, but is not limited to, a processor and a memory. Those skilled in the art can understand that the schematic diagram is only an example of the terminal device, and does not constitute a limitation on the digital pre-distortion correction device, which can include more or fewer components than shown, or combine certain components, or different components, for example, the terminal device can also include an input / output device, a network access device, a bus, and the like.

[0171] The processor can be a central processing unit (CPU), and can also be other general-purpose processors, digital signal processors (DSP), application specific integrated circuits (ASIC), field programmable gate arrays (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor and the like. The processor is the control center of the digital pre-distortion correction device, and connects each part of the digital pre-distortion correction device through various interfaces and lines.

[0172] The memory can be used to store the computer program and / or modules, and the processor realizes various functions of the digital pre-distortion correction device by running or executing the computer program and / or modules stored in the memory, and calling the data stored in the memory. The memory can mainly include a program storage area and a data storage area, wherein the program storage area can store an operating system, at least one application program required by a function (such as a sound playing function, an image playing function, etc.), and the like; and the data storage area can store data created according to the use of the mobile phone (such as audio data, a phone book, etc.), and the like. In addition, the memory can include a high-speed random access memory, and can also include a non-volatile memory, for example, a hard disk, a memory, a plug-in hard disk, a smart media card (SMC), a secure digital (SD) card, a flash card, at least one disk storage device, a flash memory device, or other volatile solid-state storage devices.

[0173] The modules of the digital pre-distortion correction device integrated in the embodiment of the present application can be stored in a computer readable storage medium if the modules are realized in the form of software function units and sold or used as independent products. Based on this understanding, all or part of the processes in the above-mentioned embodiment methods can also be completed by a computer program instructing related hardware, and the computer program can be stored in a computer readable storage medium. The computer program can realize the steps of the above-mentioned various method embodiments when executed by a processor. The computer program includes computer program code, which can be in the form of source code, object code, an executable file, or some intermediate form, etc. The computer readable medium can include any entity or device capable of carrying the computer program code, a recording medium, a U disk, a mobile hard disk, a magnetic disk, an optical disk, a computer memory, a read-only memory (ROM), a random access memory (RAM), an electrical carrier signal, a telecommunication signal, and a software distribution medium, etc.

[0174] The embodiment of the present application also provides a computer program product, which includes computer programs / instructions, and the computer programs / instructions realize the steps of the method when executed by a processor.

[0175] The computer program product provided by the embodiment can execute all steps and functions of the digital pre-distortion correction method provided by any of the above-mentioned embodiments, and the specific functions of the product are not described here.

[0176] It should be noted that, for those skilled in the art, several improvements and refinements can be made without departing from the principles of the present application, and these improvements and refinements are also considered to be within the scope of protection of the present application.

Claims

1. A digital predistortion correction method, characterized in that, The method includes: The IQ modulated baseband signal is input into a digital predistorter for calculation to obtain the predistorted signal; The predistortion signal is acquired through a feedback loop to obtain a feedback signal; The feedback signal is input into the delay module and aligned with the baseband signal to obtain the aligned trainer input signal; The trainer input signal is input into a digital predistortion trainer for processing to obtain the desired trainer output signal; The predistortion coefficients are obtained by minimizing the output signal of the trainer and the corresponding predistortion signal using a preset estimation function. The digital predistorter and the digital predistorter are updated according to the predistortion coefficients; The step of inputting the IQ modulated baseband signal into a digital predistorter to calculate the predistorted signal includes: The baseband signal is divided into odd and even phase signals; wherein the odd and even phase signals are divided into X(2n) and X(2n+1); The odd-phase signal X(2n+1) in the two-phase odd-even signal is nonlinearly calculated, and the odd-numbered coefficients under the nonlinear order are used as the tap coefficients to calculate the odd-numbered sequence LTI to obtain the first predistortion signal; the even-phase signal X(2n) in the two-phase odd-even signal is nonlinearly calculated, and the even-numbered coefficients under the nonlinear order are used as the tap coefficients to calculate the even-numbered sequence to obtain the second predistortion signal. The first predistorted signal and the second predistorted signal are added together to obtain the predistorted signal; The step of using a preset estimation function to minimize the adaptive estimation of the trainer output signal and the corresponding predistortion signal, and solving for the predistortion coefficients, includes: By using complex coefficients to represent the polynomial coefficients in the memory polynomial power amplifier model, the memory depth merging term in complex form is obtained; By representing the baseband signal with a complex signal, a complex form memory polynomial power amplifier model is obtained; Nonlinear parameters are extracted from the complex form of the memory polynomial power amplifier model to obtain the IQ modulated decomposed signal; The coefficients of the in-phase component signal are determined by solving the decomposed signal using single-channel information from the I and Q signals, and then the predistortion coefficients are obtained.

2. The digital predistortion correction method according to claim 1, characterized in that, The predistortion signal is acquired through a feedback loop to obtain a feedback signal, including: The predistorted signal is converted from digital to analog by a digital-to-analog converter, and the conversion result is then processed by a power amplifier to obtain the power amplifier output signal. The output signal of the power amplifier is acquired to obtain an acquired signal. The acquired signal is then input into an analog-to-digital converter for analog-to-digital conversion to obtain a feedback signal output.

3. The digital predistortion correction method according to claim 1, characterized in that, The digital predistorter and the digital predistorter trainer use the same memory polynomial power amplifier model.

4. The digital predistortion correction method according to claim 1, characterized in that, The memory polynomial power amplifier model used in the digital predistortion trainer is specifically as follows: in, The signal is the output signal of the trainer, where n is the number of sampling points and the memory depth is the merged term. h kq Here, K represents the highest order of the polynomial, k = 1, 2, ..., K; Q represents the memory delay depth, q = 0, 1, 2, ..., Q; Y(nq) represents the delay of the trainer input signal Y(n) by q units.

5. The digital predistortion correction method according to claim 1, characterized in that, The solution yields the predistortion coefficients, including: Complex coefficients are used to represent the polynomial coefficients in the memory polynomial power amplifier model, and complex signals are used to represent the baseband signals. The memory polynomial power amplifier model is decomposed, and the decomposed signal is solved using the in-phase component signal to determine the coefficients of the in-phase component signal, thereby obtaining the predistortion coefficients.

6. The digital predistortion correction method according to claim 1, characterized in that, polynomial coefficients h kq =a kq +jb kq The complex form of the memory depth merging term F q (|Y(nq)|)=A q (|Y(nq)|)+jB q (|Y(nq)|); First in-phase component signal A q (|Y(nq)|)=a 1q +a 2q |Y(nq)|+...+a kq |Y(nq)| k-1 The second in-phase component signal B q (|Y(nq)|)=b 1q +b 2q |Y(nq)|+...+b kq |Y(nq)| k-1 a kq and b kq Here are two complex coefficients of a polynomial, k = 1, 2, ..., K, where K represents the highest order of the polynomial; q = 0, 1, 2, ..., Q represents the memory delay depth; Y(nq) represents the trainer input signal Y(n) delayed by q units, where Y(nq) = Y i (nq)+jY q (nq), Y i (nq) and Y q (nq) represents two complex signals Y(nq), and the complex form of the memory polynomial power amplifier model is shown. The decomposition signal 7. The digital predistortion correction method according to claim 2, characterized in that, The acquired signal is P(n) / K; Wherein, P(n) is the power amplifier output signal of the power amplifier, and K represents the desired amplitude gain of the power amplifier.

8. The digital predistortion correction method according to claim 1, characterized in that, The estimation function in, Z(n) is the output signal of the trainer, and Z(n) is the predistortion signal.

9. The digital predistortion correction method according to claim 2, characterized in that, The feedback signal is input to the delay module and aligned with the baseband signal to obtain the aligned trainer input signal, including: A preset first proportion of the signal is extracted from the baseband signal as a first template set, and a first amplitude curve of the first template set is calculated according to the abs function. A first trend dimensionless function of the amplitude of the first amplitude curve changing with time is also calculated. A preset second proportion of signal is extracted from the feedback signal as a second template set, and a second amplitude curve of the second template set is calculated according to the abs function. A second trend dimensionless function of the amplitude of the second amplitude curve changing with time is also calculated. In the second trend dimensionless function, a clustering optimization algorithm is used to search for the index value that has the maximum cross-correlation with the first trend dimensionless function; wherein, the cross-correlation between the second trend dimensionless function and the first trend dimensionless function is calculated by the cosine similarity function or Hamming distance; The aligned baseband signal is calculated based on the position determined by the index value.

10. The digital predistortion correction method according to claim 9, characterized in that, The first trend dimensionless function D[x(n)] = sign[|x(n)|-|x(n-1)|]; The second trend dimensionless function M[y(n)] = sign[|y(n)|-|y(n-1)|]; Among them, dimensionless functions x(n-1) represents the baseband signal x(n) delayed by 1 unit length, and y(n-1) represents the feedback information y(n) delayed by 1 unit length.

11. A digital predistortion correction device, characterized in that, The device includes: The predistortion module is used to input the IQ modulated baseband signal into the digital predistorter for calculation to obtain the predistorted signal; The feedback module is used to acquire the predistortion signal through a feedback loop to obtain a feedback signal. The delay calculation module is used to input the feedback signal into the delay module and align it with the baseband signal to obtain the aligned trainer input signal; The training module is used to input the trainer input signal into the digital predistortion trainer for processing to obtain the desired trainer output signal. An adaptive module is used to perform a minimum adaptive estimation of the trainer output signal and the corresponding predistortion signal using a preset estimation function, and solve for the predistortion coefficients. A coefficient update module is used to update the coefficients of the digital predistorter and the digital predistorter based on the predistortion coefficients. The predistortion module is specifically used to divide the baseband signal into odd and even phase signals; wherein the odd and even phase signals are divided into X(2n) and X(2n+1); nonlinear calculation is performed on the odd phase signal X(2n+1) of the odd and even phase signals, and the odd sequence LTI with odd coefficients under nonlinear order is used as tap coefficients to calculate the first predistortion signal; nonlinear calculation is performed on the even phase signal X(2n) of the odd and even phase signals, and the even sequence with even coefficients under nonlinear order is used as tap coefficients to calculate the second predistortion signal; the first predistortion signal and the second predistortion signal are added together to obtain the predistortion signal; The adaptive module is specifically used to represent the polynomial coefficients in the memory polynomial power amplifier model using complex coefficients to obtain the complex form of the memory depth merging term; to represent the baseband signal using complex signals to obtain the complex form of the memory polynomial power amplifier model; to extract nonlinear parameters from the complex form of the memory polynomial power amplifier model to obtain the IQ modulation decomposed signal; to solve the decomposed signal using single-channel information from the IQ signals to determine the coefficients of the in-phase component signal, and then to solve for the predistortion coefficients.

12. A terminal device, characterized in that, It includes a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor, wherein the processor, when executing the computer program, implements the digital predistortion correction method as described in any one of claims 1 to 10.

13. A computer-readable storage medium, characterized in that, The computer-readable storage medium includes a stored computer program, wherein, when the computer program is executed, it controls the device on which the computer-readable storage medium is located to perform the digital predistortion correction method as described in any one of claims 1 to 10.

14. A computer program product, characterized in that, The computer program product includes a computer program or computer instructions, which, when executed by a processor, implement the digital predistortion correction method as described in any one of claims 1 to 10.

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