Screen display circuit and terminal device

Abstract

The application provides a screen display circuit and a terminal device, relates to the technical field of display, and the screen display circuit comprises: N first D-ICs integrated in a first part of a screen panel; M second D-ICs integrated in a second part of the screen panel, N and M are positive integers, and N+M is greater than or equal to 8; a first panel driving circuit comprising a first TCON, the first TCON is electrically connected with the N first D-ICs respectively; a second panel driving circuit comprising a second TCON, the second TCON is electrically connected with the M second D-ICs respectively; and the first panel driving circuit is electrically connected with the second panel driving circuit. Based on the scheme, a user can be provided with a picture with high contrast, high resolution and high frame rate at low power consumption, so that the visual experience of the user is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, and more particularly, to a screen display circuit and a terminal device. BACKGROUND

[0002] With the development of new energy automobile technology, how to provide better driving experience for users has gradually become an important research direction in the field. The vehicle cockpit display terminal integrates various functions such as vehicle information entertainment system and driving information display system. The driver and passenger can intuitively obtain vehicle status, navigation information and entertainment content by watching the screen provided by the cockpit display terminal. It can be seen that the cockpit display terminal is the core component of the intelligent cockpit and an important role for improving the user driving experience.

[0003] However, in order to provide higher visual effects for users, it is proposed to design the screen panel of the cockpit display terminal as an integrated structure to avoid the existence of joints in the screen panel. Then, for the above-mentioned integrated structure screen panel, how to provide users with high contrast, high resolution, high frame rate and uniform backlight picture through the display circuit inside the screen, and control the screen power consumption at a low level, is a problem to be solved at present. SUMMARY

[0004] The present application provides a screen display circuit and a terminal device, which can provide users with high contrast, high resolution, high frame rate and uniform backlight picture with low power consumption through special screen internal circuit design, thereby improving the user's visual experience.

[0005] In a first aspect, a screen display circuit is provided, which includes: N first display integrated circuits (D-ICs) integrated in a first part of a screen panel; M second D-ICs integrated in a second part of the screen panel, N and M are positive integers, and N+M≥8; a first panel driving circuit including a first timing controller (TCON), the first TCON being electrically connected with the N first D-ICs respectively; a second panel driving circuit including a second TCON, the second TCON being electrically connected with the M second D-ICs respectively; the first panel driving circuit and the second panel driving circuit being electrically connected.

[0006] With reference to the first aspect, in some implementations of the first aspect, the screen display circuit further includes a system driving circuit, the system driving circuit being electrically connected with the first panel driving circuit and the second panel driving circuit respectively; the first TCON is configured to receive a first image signal from the system driving circuit, and the second TCON is configured to receive a second image signal from the system driving circuit, the first image signal and the second image signal being obtained by the system driving circuit splitting and recombining an original image signal, the original image signal corresponding to a picture resolution of A x B, and the first image signal and the second image signal corresponding to a picture resolution of C x D, where C is greater than A.

[0007] With reference to the first aspect, in some implementations of the first aspect, the first TCON and the second TCON are cascaded, where the first TCON is configured to split the first image signal into N third image signals and distribute the N third image signals to N first D-ICs, and the second TCON is configured to split the second image signal into M fourth image signals and distribute the M fourth image signals to M second D-ICs, the first image signal and the second image signal corresponding to a picture resolution greater than 4K.

[0008] With reference to the first aspect, in some implementations of the first aspect, the N first D-ICs and the M second D-ICs are sequentially cascaded to form a cascaded queue, a first D-IC located at a first position of the cascaded queue and a second D-IC located at a last position of the cascaded queue each being integrated with a gate on array (GOA); or a second D-IC located at the first position of the cascaded queue and a first D-IC located at the last position of the cascaded queue each being integrated with a GOA.

[0009] With reference to the first aspect, in some implementations of the first aspect, the system driving circuit includes a processing chip and a first logic circuit, the processing chip being electrically connected with the first logic circuit; where the processing chip is configured to input Q first image data of a first resolution to the first logic circuit, Q being greater than 1, the first logic circuit being configured to splice the Q first image data into second image data of a second resolution, and split the second image data into third image data of a third resolution and fourth image data of the third resolution, the third image data being carried by the first image signal, the fourth image data being carried by the second image signal, the second resolution > the third resolution ≥ the first resolution.

[0010] With reference to the first aspect, in some implementations of the first aspect, the processing chip is further configured to obtain original image data of an original resolution, and split the original image data into the Q first image data based on effective pictures in the original image data, the original image data being carried by the original image signal.

[0011] With reference to the first aspect, in some implementations of the first aspect, the N first D-ICs and the M second D-ICs include a master D-IC, the master D-IC is configured to receive a control signal from a system driving circuit, and forward the control signal to the D-ICs other than the master D-IC in the cascaded queue, the control signal is used to control the N first D-ICs and the M second D-ICs.

[0012] With reference to the first aspect, in some implementations of the first aspect, the screen display circuit further includes: a backlight substrate, the backlight substrate is a glass substrate, and includes J light sources and K light-emitting driving ICs, each light-emitting driving IC is electrically connected to a corresponding plurality of light sources, and K is greater than 1; a first backlight driving circuit, the first backlight driving circuit is electrically connected to the first part of the backlight substrate, and the first backlight driving circuit is further electrically connected to the first panel driving circuit, and the first backlight driving circuit is configured to control the brightness of at least one region in the first part of the backlight substrate; and a second backlight driving circuit, the second backlight driving circuit is electrically connected to the second part of the backlight substrate, and the second backlight driving circuit is further electrically connected to the second panel driving circuit, and the second backlight driving circuit is configured to control the brightness of at least one region in the second part of the backlight substrate.

[0013] With reference to the first aspect, in some implementations of the first aspect, the light source can be a miniaturized light-emitting diode (Mini LED).

[0014] With reference to the first aspect, in some implementations of the first aspect, the first backlight driving circuit includes a second logic circuit, the second logic circuit is electrically connected to the first TCON to receive a first backlight control signal sent by the first TCON, or the second logic circuit is electrically connected to the first logic circuit to receive a first backlight control signal sent by the first logic circuit; wherein the first backlight control signal is generated by the first logic circuit, and the first backlight control signal is used to adjust the brightness of at least one region in the first part of the backlight substrate; and the second backlight driving circuit includes a third logic circuit, the third logic circuit is electrically connected to the second TCON to receive a second backlight control signal sent by the second TCON, or the third logic circuit is electrically connected to the first logic circuit to receive a second backlight control signal sent by the first logic circuit; wherein the second backlight control signal is generated by the first logic circuit, and the second backlight control signal is used to adjust the brightness of at least one region in the second part of the backlight substrate.

[0015] With reference to the first aspect, in some implementations of the first aspect, the first panel driving circuit further comprises: a first power supply and a first voltage converter, wherein the first voltage converter is electrically connected with the first power supply and the first backlight driving circuit respectively, and the first voltage converter is configured to convert an original voltage signal input by the first power supply into a first driving voltage signal, and input the first driving voltage signal to the first backlight driving circuit, the first driving voltage signal being used to drive the light source located at the first part of the backlight substrate to emit light; and the second panel driving circuit further comprises: a second power supply and a second voltage converter, wherein the second voltage converter is electrically connected with the second power supply and the second backlight driving circuit respectively, and the second voltage converter is configured to convert an original voltage signal input by the second power supply into a second driving voltage signal, and input the second driving voltage signal to the second backlight driving circuit, the second driving voltage signal being used to drive the light source located at the second part of the backlight substrate to emit light.

[0016] With reference to the first aspect, in some implementations of the first aspect, the backlight substrate is of an integrated structure, and a length of the backlight substrate is consistent with a length of the screen panel.

[0017] With reference to the first aspect, in some implementations of the first aspect, the first panel driving circuit further comprises: a first level shifter (LS) electrically connected with the GOA in the first panel driving circuit, the first LS being configured to perform a voltage lifting process on a first gate driving signal of the GOA in the first panel driving circuit; and a first power management integrated circuit (PMIC) electrically connected with the N first D-ICs, the first PMIC being configured to transmit a third driving voltage signal to the N first D-ICs, the third driving voltage signal being used to ensure normal work of the N first D-ICs; and the second panel driving circuit further comprises: a second LS electrically connected with the GOA in the second panel driving circuit, the second LS being configured to perform a voltage lifting process on a second gate driving signal of the GOA in the second panel driving circuit; and a second PMIC electrically connected with the M second D-ICs, the second PMIC being configured to transmit a fourth driving voltage signal to the M second D-ICs, the fourth driving voltage signal being used to ensure normal work of the M second D-ICs.

[0018] The second aspect provides a terminal device, comprising a screen panel and the screen display circuit in any possible implementation manner of the first aspect.

[0019] With reference to the second aspect, in some implementations of the second aspect, the terminal device is a cabin display terminal of a vehicle. BRIEF DESCRIPTION OF DRAWINGS

[0020] Figure 1 is a schematic diagram of an architecture of a backlight substrate 100 applied to an integrated screen at the present stage;

[0021] Figure 2 is a schematic diagram of an architecture of a screen display circuit 200 proposed by an embodiment of the present application;

[0022] Figure 3 is a schematic diagram of another architecture of a screen display circuit 200 proposed by an embodiment of the present application;

[0023] Figure 4 is a schematic diagram of a principle of image processing of a system driving circuit 230 proposed by an embodiment of the present application;

[0024] Figure 5 is a schematic diagram of another architecture of a screen display circuit 200 proposed by an embodiment of the present application;

[0025] Figure 6 is a schematic diagram of an architecture of a backlight substrate 240 proposed by an embodiment of the present application. DETAILED DESCRIPTION

[0026] The technical solutions in the present application will be described below with reference to the drawings.

[0027] Embodiments of the present application will present various aspects, embodiments or features around a system including a plurality of devices, components, modules, etc. It should be understood and appreciated that each system can include additional devices, components, modules, etc., and / or can not include all the devices, components, modules, etc. discussed in connection with the drawings. In addition, combinations of these solutions can also be used.

[0028] In addition, in the embodiments of the present application, the words "example", "for example", etc. are used to represent as an example, illustration or description. Any embodiment or design scheme described as "example" in the embodiments of the present application should not be interpreted as more preferred or more advantageous than other embodiments or design schemes. Rather, the word "example" is intended to present the concept in a specific manner.

[0029] The business scenarios described in the embodiments of the present application are to more clearly illustrate the technical solutions of the embodiments of the present application, and do not constitute a limitation on the technical solutions provided by the embodiments of the present application. Those skilled in the art can know that, as technology evolves and new business scenarios appear, the technical solutions provided by the embodiments of the present application are also applicable to similar technical problems.

[0030] Reference within the specification to "one embodiment" or "some embodiments" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the application. The appearances of the phrase "in one embodiment" or "in some embodiments" in various places within the specification are not necessarily all referring to the same embodiment, however, are meant to signify that a particular feature, structure, or characteristic described is included in at least one embodiment of the application. The terms "including," "comprising," "having," and the like are meant to be inclusive and mean that there can be additional

[0031] In the embodiments of the present application, "at least one" means one or more, and "multiple" means two or more. The "and / or" describes the association relationship of the associated objects, which means that there can be three relationships, for example, A and / or B, which can represent the following cases: A exists alone, A and B exist together, and B exists alone, where A and B can be singular or plural. The character " / " generally represents an "or" relationship between the associated objects before and after it. "At least one of the following" or similar expressions means any combination of these items, including any combination of single or multiple items. For example, at least one of a, b, or c can represent a, b, c, a-b, a-c, b-c, or a-b-c, where a, b, and c can be single or multiple.

[0032] In the description of the embodiments of the present application, the terms "upper", "lower", "left", "right", "inner", "outer", "vertical", "horizontal", and the like indicate the orientation or positional relationship defined with respect to the orientation or position in which the components in the drawings are placed. It should be understood that these directional terms are relative concepts, which are used for relative description and clarification, and do not indicate or imply that the device or component must have a specific orientation or be constructed and operated in a specific orientation. It can change accordingly according to the change of the orientation in which the components are placed in the drawings, and therefore cannot be understood as a limitation on the present application.

[0033] In the embodiments of the present application, the same reference signs represent the same components or the same parts. For the same parts in the embodiments of the present application, only one part or component may, for example, be labeled with a reference sign in the drawings, and it should be understood that the reference sign is also applicable to other identical parts or components. In addition, the components in the drawings are not drawn to scale, and the size and dimensions of the components shown in the drawings are only exemplary and should not be understood as a limitation on the present application.

[0034] With the development of new energy vehicle technology, the importance of the cockpit display terminal as a device for interacting with users is also increasing. In existing cockpit display terminal solutions, the cockpit display terminal usually needs to show the following aspects to the user: instrument panel, entertainment application interface, and other display interfaces of subsidiary information. The screen of the cockpit display terminal can also be divided into multiple independent parts.

[0035] It should be noted that the vehicle involved in the present application can include a road vehicle, a water vehicle, an air vehicle, an industrial device, an agricultural device, or an entertainment device, etc. For example, the vehicle can include a driverless vehicle, which is a vehicle in a broad sense, and can be a vehicle (such as a commercial vehicle, a passenger vehicle, a motorcycle, a flying vehicle, a train, etc.), an industrial vehicle (such as a forklift, a trailer, a tractor, etc.), an engineering vehicle (such as an excavator, a bulldozer, a crane, etc.), an agricultural device (such as a mower, a harvester, etc.), an amusement device, a toy vehicle, etc. The type of vehicle is not limited in the embodiments of the present application. For the convenience of description, the new energy vehicle is taken as an example for detailed description.

[0036] At present, the demand of vehicle manufacturers and users for the screen of the cockpit display terminal is gradually developing towards an integrated screen structure, so as to eliminate the joints between the screen panels and improve the aesthetics of the cockpit display terminal.

[0037] However, considering that the cockpit display terminal is deployed close to the user, the user is more likely to find picture defects of the cockpit display terminal. Therefore, in order to provide the user with a clearer and more delicate picture, it is necessary to further improve the picture resolution, contrast, and backlight uniformity of the cockpit display terminal.

[0038] Among them, in order to provide the user with a picture with high contrast and high resolution, such as a picture with a resolution of more than 4K, the current screen solution that can meet the above requirements is a dual-gate architecture display driving circuit using amorphous silicon (a-Si) technology. The display integrated circuit (D-IC) of the display driving circuit uses a chip on film (COF) type to drive the screen panel to display a picture with high contrast and high resolution.

[0039] It should be noted that the high resolution mentioned in the embodiments of the present application refers to a resolution greater than 8K.

[0040] However, the screen in the above solution has the problems of high power consumption, low refresh rate, and large number of D-ICs used. Moreover, the D-IC driving circuit based on the COF type needs to be customized according to the project, and has poor universality. Due to the limitation of the D-IC type, the yield of the display module production is low, and the manufacturing cost is high.

[0041] In addition, the screen panel of the integrated screen structure applied to the vehicle cabin has the characteristics of being narrow and long, and the length is usually greater than 1 m. As a common screen backlight substrate, the printed circuit board (PCB) substrate usually needs to be less than 600 mm due to technical limitations, so in order to realize the display of the screen panel longer than 1 m, multiple PCB substrates need to be spliced to form a backlight substrate matching the length of the screen panel.

[0042] Figure 1 is a schematic diagram of a backlight substrate 100 applied to an integrated screen at the present stage.

[0043] Referring to Figure 1 As shown, assuming that the length of the integrated screen is 1200 mm and the width is 300 mm, the backlight substrate 100 matched with the integrated screen includes a first PCB substrate 110, a second PCB substrate 120 and a third PCB substrate 130, wherein the first PCB substrate 110, the second PCB substrate 120 and the third PCB substrate 130 respectively integrate a corresponding number of light sources and light source driving circuits, thereby providing the integrated screen with backlight of a corresponding brightness. The geometric parameters of the first PCB substrate 110, the second PCB substrate 120 and the third PCB substrate 130 are all: length 400 mm, width 300 mm.

[0044] Further, the first PCB substrate 110, the second PCB substrate 120 and the third PCB substrate 130 also need to be spliced in sequence along the length direction of the substrate, and the splicing mode can be splicing based on the connector 101, thereby ensuring the normal operation of the overall circuit of the backlight substrate.

[0045] However, the splicing positions of the above-mentioned three PCB substrates have obvious seams, and the light sources cannot be arranged at the seams, so the backlight of the screen panel ultimately presented is usually weaker than the backlight at other positions corresponding to the seams of the backlight substrate, causing the problem of uneven backlight of the screen panel presented, thereby reducing the visual experience of the user.

[0046] In view of this, the embodiment of the present application proposes a screen display circuit and a terminal device, which can provide a user with a picture with high contrast, high resolution, high frame rate and uniform backlight with low power consumption through the special design of the screen display circuit, thereby improving the visual experience of the user.

[0047] Figure 2 is a schematic diagram of a screen display circuit 200 proposed by the embodiment of the present application.

[0048] Referring to Figure 2As shown, the screen display circuit 200 comprises:

[0049] N first D-ICs 212 integrated in the first part of the screen panel 201;

[0050] M second D-ICs 222 integrated in the second part of the screen panel 201, N and M are positive integers, and N+M≥8;

[0051] A first panel driving circuit 210 comprising a first TCON 214 electrically connected with the N first D-ICs 212 respectively;

[0052] A second panel driving circuit 220 comprising a second TCON 224 electrically connected with the M second D-ICs 222 respectively;

[0053] The first panel driving circuit 210 is electrically connected with the second panel driving circuit 220.

[0054] For the convenience of understanding, the following introduces the electronic elements involved in the screen display circuit 200.

[0055] 1) D-IC refers to an integrated circuit for processing and driving display devices (such as various types of screens), which usually contains circuits for controlling display pixels, processing display data, generating timing signals, and performing other display-related functions.

[0056] 2) Panel driving circuit, usually constructed based on printed circuit board assembly (PCBA) technology, refers to a circuit board assembly or module with specific functions formed by welding or mounting electronic components (such as resistors, capacitors, integrated circuits, etc.) on a PCB and connecting them through wires, in the embodiments of the present application, the first panel driving circuit 210 and the second panel driving circuit 220 are used to realize the display driving of the screen panel.

[0057] 3) TCON is a key component in display technology, its main function is to convert the received video signal into a control signal suitable for the timing requirements of the screen panel, and transmit the control signal to the D-IC, so that the D-IC drives the screen to display the corresponding picture.

[0058] In some possible embodiments, the length of the screen panel 201 is greater than 600 mm, and the length of the screen panel 201 can be adaptively adjusted according to the application scenario of the screen. For example, in the case of applying the screen to a cockpit display terminal of a vehicle, the length of the screen panel 201 can be greater than 1000 mm, for example, 1500 mm, and the like.

[0059] In some possible embodiments, the driving architecture of the screen display circuit 200 can adopt a triple gate architecture, that is, each display channel of the D-IC can be used to control 3 rows or 3 columns of pixels at a corresponding screen position, where the display channel of the D-IC refers to a channel used to send a driving screen pixel light-emitting color signal.

[0060] It should be noted that, according to the current technical capability, a single TCON can only support image data transmission of less than 8K resolution, so the panel driving circuit design in the embodiment of the present application includes multiple panel driving circuits, and the multiple panel driving circuits are used to jointly share image data of greater than 8K resolution.

[0061] For example, in the application scenario in which the screen display circuit 200 is used to realize 9K resolution picture display, it can be known that Figure 2 It can be known that the four first D-ICs 212 are integrated in the left half of the screen panel, and the four second D-ICs 222 are integrated in the right half of the screen panel, so the first panel driving circuit 210 electrically connected to the four first D-ICs 212 and the second panel driving circuit 220 electrically connected to the four second D-ICs 222 can be respectively used to realize 4.5K resolution picture display, that is, the 9K resolution picture display of the screen panel can be realized.

[0062] It should be understood that the number of panel driving circuits can be adaptively increased under the demand of different picture resolutions.

[0063] In some possible embodiments, the hardware parameters of the first D-IC 212 and the second D-IC 222 are the same, for example, the number of display channels of the first D-IC 212 and the second D-IC 222 is 1120, and of course, the number of display channels of the first D-IC 212 and the second D-IC 222 can be adaptively adjusted under the demand of different picture resolutions. In addition, considering that the embodiment of the present application is used to realize high-resolution picture display, for example, 9K picture display, the number of the first D-IC 212 and the second D-IC 222 can be greater than or equal to 8 in total, that is, N+M≥8. Generally, the number of the first D-IC 212 and the second D-IC 222 can be equal, that is, the number of the first D-IC 212 and the second D-IC 222 is 4 respectively. However, in the case of implementing high-resolution picture display, for example, 9K picture display, the number of the first D-IC 212 and the second D-IC 222 can be greater than 4, for example, 6, 8, 10, and the like. Figure 2The screen display circuit 200 shown is a circuit architecture design including four first D-ICs 212 and four second D-ICs 222.

[0064] It should be understood that the first D-IC 212 and the second D-IC 222 are integrated on the screen panel (usually a glass panel), so the first D-IC 212 and the second D-IC 222 are chip on glass (COG) type D-ICs.

[0065] In some possible embodiments, the first D-IC 212 can be electrically connected to the first panel driving circuit 210 through a connector 202, one end of the connector 202 is electrically connected to the first D-IC 212, and the other end of the connector 202 is electrically connected to the first panel driving circuit 210. The electrical connection from the first D-IC 212 to the first panel driving circuit 210 can be realized by a flexible printed circuit (FPC) between the two ends of the connector 202. Inside the first panel driving circuit 210, the first TCON can be electrically connected to the connector 202 through the internal wiring of the first panel driving circuit 210, thereby realizing the electrical connection from the first D-IC 212 to the first TCON 214.

[0066] Similarly, the second D-IC 222 can also be electrically connected to the second panel driving circuit 220 through a connector 203, and the second TCON 224 can be electrically connected to the connector 203 through the internal wiring of the second panel driving circuit 220, thereby realizing the electrical connection from the second D-IC 222 to the second TCON 224.

[0067] Based on the above technical solution, the first D-IC and the second D-IC are integrated on the screen panel by using the COG technology, the screen panel is directly driven for display, and multiple panel driving circuits are used to share the high-resolution (usually greater than 8K) image data. The COG type D-IC used in the screen display circuit is higher than the COF type D-IC based on a-Si technology in terms of preparation difficulty and yield, and under the condition of displaying the same high-resolution picture on the screen panel of the same size, the number of COG type D-ICs used in the present solution is lower than that of COF type D-ICs based on a-Si technology, the cost is also low, the overall manufacturing cost of the screen display circuit can be reduced by 50%, and the power consumption can be reduced by 30% to 40%. In addition, since multiple panel driving circuits share the high-resolution image data, the data transmission pressure of each panel driving circuit is small, which helps to realize higher frame rate picture display, thereby improving the user's visual experience.

[0068] In some possible embodiments, referring to Figure 2 As shown, the first TCON 214 is cascaded with the second TCON 224, the first TCON 214 is configured to split the first image signal input to the first panel driving circuit 210 into N third image signals and distribute the N third image signals to the N first D-ICs 212, and the second TCON 224 is configured to split the second image signal input to the second panel driving circuit 220 into M fourth image signals and distribute the M fourth image signals to the M second D-ICs 222.

[0069] The first image signal can be transmitted to the first TCON by a system driving circuit, the second image signal can be transmitted to the second TCON by the system driving circuit, and the first image signal and the second image signal are obtained by splitting and recombining an original image signal by the system driving circuit, the original image signal corresponds to a picture resolution of A x B, the first image signal and the second image signal correspond to a picture resolution of C x D, and C is greater than A. The architecture of the system driving circuit will be described in detail in subsequent embodiments.

[0070] In some possible embodiments, the picture resolution corresponding to the first image signal and the second image signal can be greater than 4K, which is a 4K resolution.

[0071] It should be understood that, since the picture resolution corresponding to the first image signal and the second image signal is greater than 4K, the picture ultimately presented by the screen as a whole will also be greater than 8K, thereby realizing the display of a picture with super-high resolution.

[0072] It should be noted that the above examples are only illustrative in the case where, according to the current technical capability, a single TCON can only support the transmission of image data with a resolution less than 8K. With the development of technology, a single TCON can support the transmission of image data with a higher resolution, for example, 16K. Therefore, based on the above technical solutions, the picture resolution corresponding to the first image signal and the second image signal can be greater than 8K. The same applies to other cases.

[0073] In some possible embodiments, the first image signal and the second image signal can be an embedded display port (EDP) signal, and the third image signal and the fourth image signal can be an image signal processing (ISP) signal.

[0074] In some possible embodiments, the first panel driving circuit 210 and the second panel driving circuit 220 can be electrically connected through the connector 204, one end of the connector 204 is electrically connected with the first panel driving circuit 210, the other end of the connector 204 is electrically connected with the second panel driving circuit 220, and the two ends of the connector 204 can be connected through the FPC to realize the circuit wiring from the first panel driving circuit 210 to the second panel driving circuit 220. Inside the first panel driving circuit 210 and the second panel driving circuit 220, the first TCON 214 can be electrically connected with the connector 204 through the internal wiring of the first panel driving circuit 210, and the second TCON 224 can be electrically connected with the connector 204 through the internal wiring of the second panel driving circuit 220, so as to realize the cascading relationship from the first TCON 214 to the second TCON 224.

[0075] In some possible embodiments, the first TCON 214 and the first D-IC 212, and the second TCON 224 and the second D-IC 222 can be connected through two-way (2port) signal lines. Accordingly, as shown in FIG. 2, the first TCON 214 mentioned in the above embodiments can split the first image signal into four third image signals, but since the signal line between the first TCON 214 and the first D-IC 212 is a two-way signal line, the data of one third image signal can be further divided and transmitted through the two-way signal line. Figure 2

[0076] Based on the technical solutions, two TCONs are cascaded and used to transmit image signal data with a resolution greater than 4K, so that the screen can display a picture with a resolution greater than 8K.

[0077] Considering that the display panel of the screen in the embodiments of the present application is relatively long, usually greater than 1000 mm, and the voltage value of the gate control voltage of the GOA of the screen display circuit is an important factor for controlling the conduction or turn-off of the transistor of the pixel circuit of the screen. However, since the display panel of the screen is relatively long, the gate control voltage of the GOA attenuates in the transmission process, and with the aging of the screen display circuit, the degree of attenuation of the gate control voltage in the transmission process will gradually increase, and finally the gate control voltage of the GOA may be attenuated to the extent that it cannot control the conduction of the transistor of part of the pixel circuit. In view of this, the embodiments of the present application propose the following GOA integrated architecture.

[0078] ​In some possible embodiments, the N first D-ICs 212 and the M second D-ICs 222 are cascaded in sequence to form a cascaded queue, and a first D-IC 212 located at the head of the cascaded queue and a second D-IC 222 located at the tail of the cascaded queue are respectively integrated with a GOA; or a second D-IC 222 located at the head of the cascaded queue and a first D-IC 212 located at the tail of the cascaded queue are respectively integrated with a GOA.

[0079] For example, referring to FIG. 2, a first D-IC 212 located at the head of the cascaded queue is the leftmost first D-IC 212 in the N first D-ICs 212, and a second D-IC 222 located at the tail of the cascaded queue is the rightmost second D-IC 222 in the M second D-ICs 222. Figure 2 For example, referring to FIG. 2, a first D-IC 212 located at the head of the cascaded queue is the leftmost first D-IC 212 in the N first D-ICs 212, and a second D-IC 222 located at the tail of the cascaded queue is the rightmost second D-IC 222 in the M second D-ICs 222. Figure 2 For example, referring to FIG. 2, a first D-IC 212 located at the head of the cascaded queue is the leftmost first D-IC 212 in the N first D-ICs 212, and a second D-IC 222 located at the tail of the cascaded queue is the rightmost second D-IC 222 in the M second D-ICs 222. Figure 2 For example, referring to FIG. 2, a first D-IC 212 located at the head of the cascaded queue is the leftmost first D-IC 212 in the N first D-ICs 212, and a second D-IC 222 located at the tail of the cascaded queue is the rightmost second D-IC 222 in the M second D-ICs 222.

[0080] In some possible embodiments, referring to FIG. 2, the first panel driving circuit 210 further includes: Figure 2

[0081] a first LS 217, which is electrically connected with the GOA in the first panel driving circuit 210, and is configured to perform a voltage lifting process on a first gate driving signal of the GOA in the first panel driving circuit 210;

[0082] a first PMIC 219, which is electrically connected with the N first D-ICs 212, and is configured to transmit a third driving voltage signal to the N first D-ICs 212, where the third driving voltage signal is used to ensure normal work of the N first D-ICs 212.

[0083] Correspondingly, the second panel driving circuit 220 further includes:

[0084] a second LS 227, which is electrically connected with the GOA in the second panel driving circuit 220, and is configured to perform a voltage lifting process on a second gate driving signal of the GOA in the second panel driving circuit 220;

[0085] a second PMIC 229, which is electrically connected with the M second D-ICs 222, and is configured to transmit a fourth driving voltage signal to the M second D-ICs 222, where the fourth driving voltage signal is used to ensure normal work of the M second D-ICs 222.

[0086] ​In some possible embodiments, the first LS 217 is the LS closest to the first D-IC of the integrated GOA in the first panel driving circuit 210, and the second LS 227 is the LS closest to the second D-IC of the integrated GOA in the second panel driving circuit 220.

[0087] In some possible embodiments, the third driving voltage signal and the fourth driving voltage signal include a high-level gate voltage (VGH), a low-level gate voltage (VGL), a liquid crystal driving power positive voltage (VSP), a liquid crystal driving power negative voltage (VSN), and the like, and the first PMIC 219 and the second PMIC 229 can further provide a voltage driving signal, for example, a common electrode voltage (VCOM).

[0088] Based on the technical solution, in the case of a relatively long screen panel, GOAs are integrated in the D-ICs at both ends of the D-IC cascade queue of the screen display circuit, thereby forming a double-sided GOA driving architecture. The GOA only needs to transmit the gate driving voltage for half the distance of the screen, thereby effectively reducing the attenuation of the gate driving voltage in the circuit transmission process, effectively avoiding the problem that the gate control voltage is attenuated to the extent that it cannot control the transistor of part of the pixel circuit to turn on due to transmission loss, thereby ensuring the completeness of the screen picture display and the visual experience of the user.

[0089] Figure 3 FIG. 8 is another schematic structural diagram of a screen display circuit 200 according to an embodiment of the present application.

[0090] Referring to FIG. 8, the screen display circuit 200 includes a first panel driving circuit 210, a second panel driving circuit 220, and a system driving circuit 230. Figure 3 Referring to FIG. 8, the screen display circuit 200 includes a first panel driving circuit 210, a second panel driving circuit 220, and a system driving circuit 230. Figure 2 Based on the screen display circuit 200 shown in FIG. 8, the screen display circuit 200 further includes:

[0091] The system driving circuit 230 is electrically connected to the first panel driving circuit 210 and the second panel driving circuit 220, and includes a processing chip 232 and a first logic circuit 234, wherein the processing chip 232 is electrically connected to the first logic circuit 234.

[0092] In some possible embodiments, based on the foregoing embodiments, the system driving circuit 230 can send the EDP signal to the first TCON 214 and the second TCON 224, and the EDP signal is output by the first logic circuit 234, so the system driving circuit 230 can be electrically connected to the first panel driving circuit 210 through the connector 205 and electrically connected to the second panel driving circuit 220 through the connector 206. Based on this, the first logic circuit 234 can send the first image signal to the first TCON 214 through the connector 205 and internal circuit wiring; similarly, the first logic circuit 234 can send the second image signal to the second TCON 224 through the connector 206 and internal circuit wiring.

[0093] In some possible embodiments, the processing chip 232 described above can be a system on chip (SOC) with a model number of RK3588; and the first logic circuit 234 can be a field-programmable gate array (FPGA) with a model number of XCKU3EP.

[0094] It should be understood that the SOC with the model number described above can support an image signal resolution of 8K, for example, 8Kx4K. In order to realize the display of a final picture with a resolution of 8K or above, for example, 9K, the processing chip 232 and the first logic circuit 234 need to have the following image processing capabilities.

[0095] Figure 4 FIG. 2 is a schematic diagram of an image processing principle of the system driving circuit 230 according to an embodiment of the present application.

[0096] Reference Figure 4 As shown in FIG. 2, the processing chip 232 is configured to input Q first image data with a first resolution to the first logic circuit 234, Q is greater than 1, the first logic circuit 234 is configured to splice the Q first image data into second image data with a second resolution, and split the second image data into third image data with a third resolution and fourth image data with the third resolution, wherein the third image data is carried by the first image signal, the fourth image data is carried by the second image signal, and the second resolution>the third resolution≥the first resolution.

[0097] Further, the processing chip 232 is further configured to obtain original image data with an original resolution, and split the original image data into the Q first image data based on an effective picture in the original image data, and the original image data is carried by the original image signal.

[0098] For example, Figure 4The final output of the example shown is a 9K*1K picture, which is not exactly 9K*1K and can be adaptively adjusted in numerical value, for example, 8960*1092. The image signal received by the processing chip 232 corresponds to an image resolution of 8K*4K, i.e., the above-mentioned original resolution. Assuming that the position of the upper left corner of the image has a valid picture, the processing chip 232 can divide the 8960*1092 image signal required for screen picture display into 3 parts (8960*1092 / 3), i.e., the above-mentioned first resolution, and position them at the upper left corner of the original image obtained by the processing chip 232, and then transmit the processed image data to the first logic circuit 234; the first logic circuit 234 can reassemble the 3 parts of image pictures into a 8960*1092 image signal, i.e., the above-mentioned second resolution, and then divide them into two parts with a resolution of 4480*1092, i.e., the above-mentioned third resolution, and then transmit the two parts of image signals to the first panel driving circuit 210 and the second panel driving circuit 220, respectively, so that the screen panel can finally realize 8960*1092 picture display.

[0099] In some possible embodiments, with reference to Figure 4 As shown, the processing chip 232 includes:

[0100] A decoder 2321 is configured to decode the received image data to obtain an image signal with an original resolution.

[0101] A processor core 2322 is configured to control the reception and transmission of the image signal and related data, and is further configured to decode the image signal and implement the above-mentioned image signal segmentation operation.

[0102] A first inter-integrated circuit (I2C) port 2233 is configured to implement bidirectional communication with the first logic circuit 234, i.e., to transmit control signals and data signals.

[0103] A high-definition multimedia interface (HDMI) 2234 is configured to implement image signal transmission with the first logic circuit 234.

[0104] Correspondingly, the first logic circuit 234 includes:

[0105] An HDMI 2341 is configured to implement image signal transmission with the processing chip 232.

[0106] An image high-definition repair algorithm processor (Upscaler) 2342 is configured to upscale a low-resolution image to a high-resolution image to obtain a clearer and more delicate image, for example, by the image splicing operation described above.

[0107] A double data rate (DDR) controller 2343 is configured to manage and control a large amount of data exchange between the DDR memory and the system, and to perform complex algorithms. In particular, when connected to an RK3588 model SOC, the DDR controller 2343 can support the RK3588 model SOC to efficiently perform processing-intensive tasks and run complex graphics applications.

[0108] An EDP port 2344 is configured to input the processed image signal with the third resolution, i.e., the first image signal and the second image signal described above, to the first panel driving circuit 210 and the second panel driving circuit 220.

[0109] In some possible embodiments, the screen display circuit 200 described above can be applied to a touch screen, and the touch screen includes a touch unit 2011. Based on this, the processing chip 232 can further include a second I2C port 2235 that is electrically connected to the touch unit 2011, so as to realize signal interaction between the processing chip 232 and the touch unit 2011, and to realize a touch response function of the screen.

[0110] Based on the technical solution described above, even if the processing chip 232 is an SOC that supports a maximum of 8K resolution image signals, the system driving circuit architecture proposed in the present solution can be used to realize image signal splitting and splicing, so that the screen can finally output a picture with a resolution higher than 8K.

[0111] In some possible embodiments, the N first D-ICs 212 and the M second D-ICs 222 include a master D-IC, which is configured to receive a control signal from the system driving circuit 230, and to forward the control signal to the D-ICs other than the master D-IC in the cascade queue, the control signal being configured to control the N first D-ICs 212 and the M second D-ICs 222.

[0112] For example, the master D-IC can be Figure 2 or Figure 3 the first D-IC marked as P in FIG. 24. Of course, in different circuit architecture designs, the master D-IC can also be another D-IC in the screen display circuit 200.

[0113] In some possible embodiments, the control signal described above can also be sent to N first D-ICs 212 via the first panel driving circuit 210, and simultaneously sent to M second D-ICs 222 via the second panel driving circuit 220.

[0114] In some possible embodiments, the control signal can also be sent to N first D-ICs 212 via the first panel driving circuit 210, and the N first D-ICs 212 can transmit the control signal to M second D-ICs 222 via a cascaded circuit.

[0115] Based on the above technical solution, since multiple D-ICs are interconnected in a cascaded manner, the system drive circuit only needs to send a control signal to one of the multiple D-ICs to realize the linkage control of multiple D-ICs, which simplifies the control logic of multiple D-ICs and reduces the control overhead of the system drive circuit for multiple D-ICs.

[0116] Figure 5 This is a schematic diagram of the architecture of another screen display circuit 200 proposed in the embodiments of this application.

[0117] refer to Figure 5 As shown above, in the above Figure 3 Based on the screen display circuit 200 shown, the screen display circuit 200 further includes:

[0118] Backlight substrate 240, which is a glass substrate, includes J light sources and K light-emitting driver ICs, each of which is electrically connected to a corresponding plurality of light sources, and K is greater than 1;

[0119] A first backlight driving circuit 250 is electrically connected to a first portion of a backlight substrate 240 and is also electrically connected to a first panel driving circuit 210. The first backlight driving circuit 250 is used to control the brightness of at least one area in the first portion of the backlight substrate 240.

[0120] A second backlight driving circuit 260 is electrically connected to a second portion of a backlight substrate 240 and also electrically connected to a second panel driving circuit 220. The second backlight driving circuit 260 is used to control the brightness of at least one area in the second portion of the backlight substrate 240.

[0121] It should be understood that the backlight substrate 240 in this embodiment does not use a PCB substrate, but rather a glass substrate, on which a corresponding number of light sources and light-emitting driver ICs are integrated. Since there are no technical limitations on the length of the glass substrate, the length of the glass-based backlight substrate can be directly manufactured to match the length of the screen panel, for example, exceeding 600mm, thereby avoiding the problem of uneven backlighting caused by seams formed after splicing multiple backlight substrates. However, matching the length of the backlight substrate to the length of the screen panel does not mean that the length of the backlight substrate is equal to the length of the screen panel; there can be a certain deviation between the two lengths. For example, the length of the backlight substrate only needs to cover the display area of ​​the screen panel.

[0122] Accordingly, the backlight driving circuit in the screen display circuit 200 can also adopt the same architecture as the panel driving circuit to facilitate the driving control of the entire circuit. That is, the first backlight driving circuit 250 is electrically connected to the first panel driving circuit 210, and the second backlight driving circuit 260 is electrically connected to the second panel driving circuit 220.

[0123] In some possible embodiments, the first backlight driving circuit 250 and the first panel driving circuit 210 can be electrically connected via connector 207, and the second backlight driving circuit 260 and the second panel driving circuit 220 can be electrically connected via connector 208.

[0124] In some possible embodiments, reference Figure 5 As shown, the backlight substrate 240 is an integral elongated glass substrate. The backlight substrate 240 can be electrically connected to the first backlight driving circuit 250 and the second backlight driving circuit 260 through 8 FPCs respectively.

[0125] It should be understood that the length of the backlight substrate 240 is consistent with the length of the screen panel 201. However, "consistent length" does not mean that the lengths of the backlight substrate 240 and the screen panel 201 are equal. There may be a deviation between their lengths, which is within a certain range. For example, the screen panel 201 may be slightly longer than the backlight substrate.

[0126] It should be noted that the multiple circuit components mentioned in the embodiments of this application can be electrically connected through connectors and / or FPCs, and other reasonable electrical connection methods are also applicable to the circuit architecture proposed in the embodiments of this application.

[0127] In some possible embodiments, the light source of the backlight substrate 240 described above can be a Mini LED. The Mini LED refers to an LED device with a chip length of microns; compared with a common LED, the chip size of the Mini LED is smaller, and it can produce smaller pixel particles, thereby helping to achieve higher resolution, higher brightness and more vivid color images. Therefore, the backlight substrate 240 described above can include a Mini LED array composed of a plurality of Mini LEDs.

[0128] Figure 6 FIG. 1 is a schematic diagram of an architecture of a backlight substrate 240 according to an embodiment of the present application.

[0129] Referring to FIG. 1, Figure 6 Figure 6 The architecture of the backlight substrate 240 shown in FIG. 1 is applied to a screen of a vehicle cabin display terminal, and the length is taken as 1200 mm for example. The entire backlight substrate 240 can be further divided into 224 columns and 27 rows, and the pitch between each column is set to 5.0733 mm, and the pitch between each row is set to 5.2018 mm.

[0130] Further, the intersection of each row and each column of the backlight substrate 240 divided is defined as a partition. It can be calculated that the backlight substrate 240 includes a total of 6048 partitions, and each partition is provided with a Mini LED. Therefore, the entire backlight substrate 240 includes a total of 6048 Mini LEDs.

[0131] Based on the technical solution described above, by using a glass substrate as the backlight substrate 240, the light source and the light-emitting driving circuit can be directly integrated on the glass substrate, and the length of the glass substrate can be more easily directly manufactured to match the length of the display panel, that is, the backlight substrate 240 and the screen panel 201 can be manufactured in an integrated structure, thereby avoiding the problem of backlight unevenness caused by the joint gap formed after the plurality of backlight substrates are spliced. In addition, since the light source and the light-emitting driving circuit can be directly integrated inside the glass substrate, the thickness of the backlight substrate can be effectively reduced, thereby helping to reduce the thickness of the entire screen.

[0132] In some possible embodiments, the light-emitting driving IC of the backlight substrate 240 described above adopts an active matrix (AM) driving technology. As shown in FIG. 2, Figure 6

[0133] ​​Based on the above technical solution, since the light-emitting driving IC of the backlight substrate 240 adopts AM driving, each light-emitting driving IC is used to control part of the light source. Compared with passive matrix (PM) driving, the light-emitting driving IC based on AM driving has faster response speed, can realize higher brightness and refresh rate under lower power consumption conditions, can effectively avoid the flicker phenomenon of the picture, has good heat dissipation effect, and is more suitable for large-size backlight substrates.

[0134] It should be understood that the number of light sources, the number of light-emitting driving ICs, the number of partitions of the backlight substrate, and other related parameters of the above backlight substrate 240 can be adaptively adjusted under different screen requirements, and are not limited to Figure 6 The related parameter examples are shown.

[0135] In some possible embodiments, referring to Figure 5 As shown, the first backlight driving circuit 250 includes a second logic circuit 252, which can be electrically connected to the first TCON 214 to receive the first backlight control signal sent by the first TCON 214, or the second logic circuit 252 can also be electrically connected to the first logic circuit 234 to receive the first backlight control signal sent by the first logic circuit 234; wherein the first backlight control signal is generated by the first logic circuit 234, and the first backlight control signal is used to adjust the brightness of at least one region in the first part of the backlight substrate 240.

[0136] Correspondingly, the second backlight driving circuit 260 includes a third logic circuit 262, which can be electrically connected to the second TCON 224 to receive the second backlight control signal sent by the second TCON 224, or the third logic circuit 262 can also be electrically connected to the first logic circuit 234 to receive the second backlight control signal sent by the first logic circuit 234; wherein the second backlight control signal is generated by the first logic circuit 234, and the second backlight control signal is used to adjust the brightness of at least one region in the second part of the backlight substrate 240.

[0137] In some possible embodiments, the first backlight control signal and the second backlight control signal described above can be a serial peripheral interface (SPI) signal.

[0138] It should be understood that since the second logic circuit 252 and the third logic circuit 262 described above can respectively realize the brightness adjustment of the corresponding regions of the backlight substrate 240 based on the backlight control signal from the first logic circuit 252, the local dimming function for the backlight substrate 240 can be realized.

[0139] Based on the above technical scheme, the first backlight driving circuit 250 and the second backlight driving circuit 260 can realize the area light adjustment function of the backlight substrate 240, and in combination with the large number of light sources with high integration in the backlight substrate 240, the picture light halo can be effectively reduced, the picture output with higher contrast can be realized, and the picture can present a clearer and more delicate effect.

[0140] It should be understood that, since the power supply requirements of the first backlight driving circuit 250 and the second backlight driving circuit 260 are relatively large, if only one power supply and voltage converter are used to realize the power supply requirements of the two backlight driving circuits, the current of the internal circuit between the power supply and the backlight driving circuit will be too large, the wiring will be relatively complex, and the circuit needs to be designed to be relatively long. Considering that the circuit wiring has a certain resistance, due to the large current, the circuit will generate a large amount of heat. Based on this, it can be known that the power supply driving scheme of the single power supply and single voltage converter increases the pressure loss of the internal circuit on the one hand, and also increases the risk of overheating of the circuit. In view of this, the embodiment of the present application proposes the following power supply driving architecture:

[0141] Reference Figure 5 As shown in FIG. 1, the first panel driving circuit 210 further includes:

[0142] The first power supply 216 and the first voltage converter 218, wherein the first voltage converter 218 is electrically connected with the first power supply 216 and the first backlight driving circuit 250 respectively, the first voltage converter 218 is used to convert the original voltage signal input by the first power supply 216 into a first driving voltage signal, and input the first driving voltage signal to the first backlight driving circuit 250, the first driving voltage signal is used to drive the light source located in the first part of the backlight substrate 240 to emit light;

[0143] Correspondingly, the second panel driving circuit 220 further includes:

[0144] The second power supply 226 and the second voltage converter 228, wherein the second voltage converter 228 is electrically connected with the second power supply 226 and the second backlight driving circuit 260 respectively, the second voltage converter 228 is used to convert the original voltage signal input by the second power supply 226 into a second driving voltage signal, and input the second driving voltage signal to the second backlight driving circuit 260, the second driving voltage signal is used to drive the light source located in the second part of the backlight substrate 240 to emit light.

[0145] It should be understood that the first power supply 216 and the first voltage converter 218 jointly constitute the power supply driving of the first backlight driving circuit 250, and the second power supply 226 and the second voltage converter 228 jointly constitute the power supply driving of the second backlight driving circuit 260.

[0146] In Figure 5In the circuit architecture shown, the power supply driving of the first backlight driving circuit 250 and the second backlight driving circuit 260 can correspond to the first panel driving circuit 210 and the second panel driving circuit 220, respectively.

[0147] For example, the first power supply 216 can provide a voltage of 12V, and further, the first power supply 216 can be a 12V adapter. The first voltage converter 218 can be a Buck circuit, which can convert the output voltage of the first power supply 216 into a voltage suitable for the working voltage of the light source of the backlight substrate 240, i.e., the first driving voltage signal, and then the first voltage converter 218 inputs the first driving voltage signal to the first backlight driving circuit 250 through the connector 207. The second power supply 226 and the second voltage converter 228 are similar, and are not repeated here.

[0148] It should be noted that the level converter and the voltage converter mentioned in the embodiments of the present application are not the same electronic component, and their functions are different. Among them, the level converter is mainly used in digital circuits to realize conversion between different logic levels, while the voltage converter is more widely used in various circuits to realize voltage increase or decrease.

[0149] In some possible embodiments, the working current of the Buck circuit used by the first voltage converter 218 and the second voltage converter 228 can be 2A, and the maximum current can reach 5A. Accordingly, by using the power supply driving architecture proposed in the present solution, the median of the brightness of the backlight substrate 240 when displaying a full-white picture on the screen panel 201 can reach 2000nit, and the maximum value can reach 5000nit. This brightness parameter can adapt to the screen display requirements in various application scenarios, and can more truly restore the dynamic brightness range perceived by the human eye, which helps to improve the user's visual experience.

[0150] Based on the above technical solution, multiple power supplies and multiple voltage converters are used to provide voltages for corresponding backlight driving circuits, which simplifies the wiring of the internal power supply circuit, and the line for each power supply and voltage converter to deliver voltage to the corresponding backlight driving circuit is relatively short, the pressure loss of the internal circuit is small, the heat generated based on the internal circuit resistance is small, and the circuit can be effectively protected.

[0151] The embodiments of the present application also propose a terminal device, which includes a screen panel and any one of the screen display circuits 200 proposed in the embodiments of the present application.

[0152] In some possible embodiments, the terminal device is a cockpit display terminal of a vehicle.

[0153] It should be noted that the screen mentioned in the embodiments of the present application can refer to the screen itself in a narrow sense, or refer to the entire display system in a broad sense, which is the integration of the screen, a display substrate (such as a liquid crystal display substrate, an OLED substrate, etc.) and other functional components.

[0154] Those skilled in the art can clearly understand that the units and algorithm steps of each example described in combination with the embodiments disclosed herein can be realized by electronic hardware or a combination of computer software and electronic hardware. Whether the functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.

[0155] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the above-described system, device and unit can refer to the corresponding processes in the foregoing method embodiments, which will not be repeated here.

[0156] In several embodiments provided in the present application, it should be understood that the disclosed system, device and method can be implemented in other ways. For example, the device embodiments described above are only schematic, for example, the division of the units is only a logical function division, and actual implementation can have another division manner, for example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the units shown or discussed can be indirect coupling or communication connection through some interface, device or unit, and can be electrical, mechanical or other forms.

[0157] The units described as separate components can or can not be physically separated, and the components shown as units can or can not be physical units, that is, they can be located in one place, or can be distributed on a plurality of network units. Part or all of the units can be selected according to actual needs to achieve the purpose of the embodiments.

[0158] In addition, each functional unit in each embodiment of the present application can be integrated in one processing unit, or each unit can exist physically, or two or more units can be integrated in one unit.

[0159] If the functions are implemented in the form of software function units and sold or used as independent products, they can be stored in a computer readable storage medium. Based on this understanding, the technical solutions of the present application essentially or the parts that contribute to the prior art or parts of the technical solutions can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes a plurality of instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present application. The aforementioned storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and various media that can store program codes.

[0160] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art can easily think of changes or replacements within the technical scope disclosed in the present application, which should be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A screen display circuit, characterized by comprising: The screen display circuit comprises: N first display integrated circuits (D-ICs) (212) integrated in a first part of a screen panel (201); M second D-ICs (222) integrated in a second part of the screen panel (201), N and M being positive integers, and N+M≥8; a first panel driving circuit (210) comprising a first timing controller (TCON) (214) electrically connected with the N first D-ICs (212) respectively; a second panel driving circuit (220) comprising a second TCON (224) electrically connected with the M second D-ICs (222) respectively; the first panel driving circuit (210) is electrically connected with the second panel driving circuit (220).

2. The screen display circuit according to claim 1, characterized by The screen display circuit further comprises: a system driving circuit (230) electrically connected with the first panel driving circuit (210) and the second panel driving circuit (220) respectively; the first TCON (214) is configured to receive a first image signal from the system driving circuit (230), and the second TCON (224) is configured to receive a second image signal from the system driving circuit (230), the first image signal and the second image signal being obtained by splitting and recombining an original image signal by the system driving circuit (230), the original image signal corresponding to a picture resolution of A×B, the first image signal and the second image signal corresponding to a picture resolution of C×D, and C being greater than A.

3. The screen display circuit according to claim 2, wherein The first TCON (214) and the second TCON (224) are cascaded, the first TCON (214) is configured to split the first image signal into N third image signals and distribute the third image signals to the N first D-ICs (212), and the second TCON (224) is configured to split the second image signal into M fourth image signals and distribute the fourth image signals to the M second D-ICs (222), the first image signal and the second image signal corresponding to a picture resolution greater than 4K.

4. The screen display circuit according to claim 3, wherein The N first D-ICs (212) and the M second D-ICs (222) are sequentially cascaded to form a cascaded queue, the first D-IC (212) at the head of the cascaded queue and the second D-IC (222) at the tail of the cascaded queue are respectively integrated with a gate driver array (GOA), or the second D-IC (222) at the head of the cascaded queue and the first D-IC (212) at the tail of the cascaded queue are respectively integrated with the GOA.

5. A screen display circuit as claimed in any one of claims 2 to 4, characterized in that, The system driving circuit (230) comprises a processing chip (232) and a first logic circuit (234), the processing chip (232) being electrically connected with the first logic circuit (234); The processing chip (232) is configured to input Q first image data of a first resolution to the first logic circuit (234), where Q is greater than 1, and the first logic circuit (234) is configured to splice the Q first image data into second image data of a second resolution, and split the second image data into third image data of a third resolution and fourth image data of the third resolution, where the third image data is carried by the first image signal, the fourth image data is carried by the second image signal, and the second resolution is greater than the third resolution and the third resolution is greater than or equal to the first resolution.

6. The screen display circuit according to claim 5, wherein The processing chip (232) is further configured to obtain original image data of an original resolution, and split the original image data into the Q first image data based on valid pictures in the original image data, where the original image data is carried by an original image signal.

7. The screen display circuit according to claim 4, wherein The N first D-ICs (212) and the M second D-ICs (222) include a master D-IC, and the master D-IC is configured to receive a control signal from the system driving circuit (230), and forward the control signal to other D-ICs in the cascade queue except the master D-IC, where the control signal is used to control the N first D-ICs (212) and the M second D-ICs (222).

8. A screen display circuit as claimed in claim 6 or 7, characterized in that The screen display circuit further includes: A backlight substrate (240) is a glass substrate, and includes J light sources and K light-emitting driving ICs, each of the light-emitting driving ICs is electrically connected to a corresponding plurality of the light sources, and K is greater than 1; A first backlight driving circuit (250) is electrically connected to a first part of the backlight substrate (240), and is further electrically connected to the first panel driving circuit (210), and is configured to control the brightness of at least one region in the first part of the backlight substrate (240); A second backlight driving circuit (260) is electrically connected to a second part of the backlight substrate (240), and is further electrically connected to the second panel driving circuit (220), and is configured to control the brightness of at least one region in the second part of the backlight substrate (240).

9. The screen display circuit according to claim 8, wherein The light source is a sub-millimeter light-emitting diode (Mini LED).

10. The screen display circuit according to claim 8, wherein, The first backlight driving circuit (250) comprises a second logic circuit (252) electrically connected to the first TCON (214) to receive a first backlight control signal sent by the first TCON (214), or the second logic circuit (252) is electrically connected to the first logic circuit (234) to receive the first backlight control signal sent by the first logic circuit (234); wherein the first backlight control signal is generated by the first logic circuit (234), and the first backlight control signal is used to adjust the brightness of at least one region in the first part of the backlight substrate (240). The second backlight driving circuit (260) comprises a third logic circuit (262) electrically connected to the second TCON (224) to receive a second backlight control signal sent by the second TCON (224), or the third logic circuit (262) is electrically connected to the first logic circuit (234) to receive the second backlight control signal sent by the first logic circuit (234); wherein the second backlight control signal is generated by the first logic circuit (234), and the second backlight control signal is used to adjust the brightness of at least one region in the second part of the backlight substrate (240).

11. The screen display circuit of claim 8, wherein, The first panel driving circuit (210) further comprises a first power supply (216) and a first voltage converter (218), the first voltage converter (218) is electrically connected to the first power supply (216) and the first backlight driving circuit (250) respectively, and the first voltage converter (218) is used to convert an original voltage signal input by the first power supply (216) into a first driving voltage signal and input the first driving voltage signal into the first backlight driving circuit (250), the first driving voltage signal is used to drive the light source located in the first part of the backlight substrate (240) to emit light; The second panel driving circuit (220) further comprises a second power supply (226) and a second voltage converter (228), the second voltage converter (228) is electrically connected to the second power supply (226) and the second backlight driving circuit (260) respectively, and the second voltage converter (228) is used to convert an original voltage signal input by the second power supply (226) into a second driving voltage signal and input the second driving voltage signal into the second backlight driving circuit (260), the second driving voltage signal is used to drive the light source located in the second part of the backlight substrate (240) to emit light.

12. The screen display circuit of claim 8, wherein, The backlight substrate (240) is of an integrated structure, and the length of the backlight substrate (240) is consistent with the length of the screen panel (201).

13. The screen display circuit according to any one of claims 1 to 4, 6, 7, 9 to 12, characterized by, The first panel driving circuit (210) further comprises: a first level shifter LS (217) electrically connected with the GOA in the first panel driving circuit (210), the first LS (217) being configured to perform a voltage lifting process on a first gate driving signal of the GOA in the first panel driving circuit (210); a first power management circuit PMIC (219) electrically connected with the N first D-ICs (212), the first PMIC (219) being configured to transmit a third driving voltage signal to the N first D-ICs (212), the third driving voltage signal being configured to ensure normal operation of the N first D-ICs (212); the second panel driving circuit (220) further comprises: a second LS (227) electrically connected with the GOA in the second panel driving circuit (220), the second LS (227) being configured to perform a voltage lifting process on a second gate driving signal of the GOA in the second panel driving circuit (220); a second PMIC (229) electrically connected with the M second D-ICs (222), the second PMIC (229) being configured to transmit a fourth driving voltage signal to the M second D-ICs (222), the fourth driving voltage signal being configured to ensure normal operation of the M second D-ICs (222).

14. A terminal device, comprising: The screen display circuit according to any one of claims 1 to 13.

15. The terminal device according to claim 14, characterized by The terminal device is a cabin display terminal of a vehicle. The terminal device is a cabin display terminal of a vehicle.

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