A synchronous switch for switching a reactive power compensation device to a power grid

Abstract

The present invention relates to a synchronous switch for switching a reactive power compensation device to a power grid, comprising a switching device, a sampling circuit and a control module, wherein the sampling circuit comprises a voltage sampling circuit and a current sampling circuit, the control module comprises a frequency error calculation unit and a judgment unit, and the switching device performs a switching action according to a delayed switching signal or a fixed switching signal. The beneficial effect of the present invention is that the influence of non-standard and large fluctuation of power grid frequency on zero-crossing switching is reduced, and zero-crossing switching is realized.

Description

Technical Field

[0001] The invention belongs to the field of switching devices, and in particular relates to a synchronous switch for switching a reactive power compensation device to a power grid. Background Art

[0002] The delayed switching mode of SVG (static var generator), also known as "static" compensation mode, relies on the action of a special contactor to suppress the inrush current of the capacitor. The purpose of this switching mode is to prevent the contactor from operating too frequently, causing damage to the capacitor, and more importantly, to prevent the continuous switching of the capacitor from causing oscillation of the power supply system, such as Figure 1 As shown, the working principle of the existing dedicated contactor for switching the SVG reactive compensation device to the power grid is that the single-chip microcomputer collects the current and voltage zero-crossing signals to control the capacitor switching, thereby ensuring that the relay (contactor) is switched in at the voltage zero-crossing point and the current is cut off at the current zero-crossing point. However, in the prior art, the power grid frequency of some distribution cabinets is not a fixed standard frequency, and the frequency sampling circuit design of the switching device is unreasonable, resulting in that if the switching is carried out according to the fixed standard frequency, the true zero-crossing switching will not be achieved. Therefore, the existing switching strategy and switching circuit for switching the SVG reactive compensation device to the power grid need to be improved. Summary of the invention

[0003] The object of the present invention is to design a synchronous switch for switching a reactive power compensation device to a power grid.

[0004] The specific technical scheme of the present invention is as follows: a synchronous switch for switching a reactive power compensation device to a power grid, comprising a switching device, a sampling circuit and a control module, wherein the sampling circuit comprises a voltage sampling circuit and a current sampling circuit, and the control module comprises a frequency error calculation unit and a judgment unit;

[0005] The frequency error calculation unit is configured as follows:

[0006] Obtaining the real-time sampling frequency of the power grid collected by the sampling circuit in each frequency cycle, and calculating the frequency error between the real-time sampling frequency of the power grid and the fundamental frequency in each frequency cycle;

[0007] The judging unit is configured to:

[0008] If the frequency errors of the current frequency cycle and the two previous frequency cycles are not greater than the threshold, a delayed switching signal is output to the switching device according to the real-time sampling frequency of the power grid in the current frequency cycle;

[0009] If the frequency error of the current frequency cycle is greater than the threshold, no delayed switching signal is output to the switching device in the current frequency cycle;

[0010] If the frequency errors of the three frequency cycles before the current frequency cycle are all greater than the threshold, a delayed switching signal is output to the switching device according to the fundamental frequency of the current frequency cycle.

[0011] As an improvement, the sampling circuit also includes a first frequency sampling circuit, which is used to receive a grid voltage signal and output a first frequency signal to the control module. The control module obtains the real-time sampling frequency of the grid according to the first frequency signal.

[0012] As a further improvement, the sampling circuit further includes a first frequency sampling circuit, which collects a first grid voltage signal and outputs a first frequency signal to the control module, and the control module obtains the real-time sampling frequency of the grid according to the first frequency signal;

[0013] The first frequency sampling circuit includes a first resistor and a first optocoupler connected in series with the first resistor, a second optocoupler connected in parallel with the first optocoupler, and a second resistor connected in series with the second optocoupler.

[0014] As a further improvement, the voltage sampling circuit includes a differential amplifier circuit, a conditioning circuit and a second frequency sampling circuit. The differential amplifier circuit collects a second power grid voltage signal and outputs a control voltage signal to the conditioning circuit and the second frequency sampling circuit. The conditioning circuit receives the control voltage signal and outputs a stabilized voltage signal to the control module. The second frequency sampling circuit receives the control voltage signal and outputs a second frequency signal to the control module. The control module obtains the real-time sampling frequency of the power grid according to the second frequency signal.

[0015] As a further improvement, the control module calculates a third power grid real-time sampling frequency according to a first power grid real-time sampling frequency corresponding to the first frequency signal and a second power grid real-time sampling frequency corresponding to the second frequency signal;

[0016] The control module calculates a third frequency error according to a first frequency error corresponding to the first frequency signal and a second frequency error corresponding to the second frequency signal;

[0017] The judgment unit judges whether to output a delayed input signal according to the third power grid real-time sampling frequency and the third frequency error.

[0018] As a further improvement, the switching device performs a countdown according to the delayed input signal, and the input countdown is the real-time sampling frequency time of the power grid in each frequency cycle, the delay time of the switching device, and the frequency error delay time T 1 The difference between the frequency error and the delay time T 1It is the difference between the real-time sampling frequency time of the power grid and the fundamental frequency time.

[0019] As a further improvement, the input countdown is the real-time sampling frequency time of the power grid and the delay time of the switching device and the frequency error delay time T of each frequency cycle. 1 And the inrush current ratio or voltage change delay time T 2 The difference between

[0020] The inrush current ratio or voltage change delay time T 2 is the dynamic step time. When the inrush current ratio or voltage of the current frequency cycle is less than or equal to the inrush current ratio or voltage of the previous frequency cycle, the dynamic step time increases; when the inrush current ratio of the current frequency cycle is greater than the inrush current ratio or voltage of the previous frequency cycle, the dynamic step time decreases.

[0021] As a further improvement, the dynamic step time is the product of the set adjustment time and the step ratio. When the inrush current ratio or voltage of the current frequency cycle is less than or equal to the inrush current ratio or voltage of the previous frequency cycle, the step ratio increases; when the inrush current ratio of the current frequency cycle is greater than the inrush current ratio or voltage of the previous frequency cycle, the step ratio decreases.

[0022] As a further improvement, the step ratio is the sum of the set step value and the accumulated step value, and the current accumulated step value is the sum of the set step value and the previous accumulated step value.

[0023] As a further improvement, the set step value is 1 / 1000 and the threshold is 1 Hz.

[0024] As a further improvement, when the inrush current ratio is greater than 3, no delayed switching signal is output to the switching device in the current frequency cycle.

[0025] The beneficial effect of the present invention is that the influence of non-standard and large fluctuation of power grid frequency on zero-crossing switching is reduced, and zero-crossing switching is realized. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 It is a reactive power compensation switching device in the prior art;

[0027] Figure 2 A schematic diagram of a synchronous switch for switching a reactive power compensation device to a power grid according to the present invention;

[0028] Figure 3 A switching principle diagram of a synchronous switch for switching a reactive power compensation device to a power grid according to the present invention;

[0029] Figure 4 A schematic diagram of a control module of a synchronous switch for switching a reactive power compensation device to a power grid according to the present invention;

[0030] Figure 5 A circuit diagram of a first frequency sampling circuit of a synchronous switch for switching a reactive power compensation device to a power grid according to the present invention;

[0031] Figure 6 A circuit diagram of a voltage sampling circuit of some specific implementations of a synchronous switch for switching a reactive power compensation device to a power grid according to the present invention;

[0032] Figure 7 A circuit diagram of a voltage sampling circuit of some specific implementations of a synchronous switch for switching a reactive power compensation device to a power grid according to the present invention;

[0033] Figure 8 The present invention is a schematic diagram of the switching principle of a synchronous switch for switching a reactive compensation device to a power grid. DETAILED DESCRIPTION

[0034] The embodiments of the present invention are described in detail below with reference to the accompanying drawings and examples.

[0035] The "zero point" or "grid zero point" of the present invention generally refers to the voltage zero-crossing point. The synchronous switch of the reactive power compensation device switched to the grid must ensure that the relay (contactor) is switched on at the voltage zero-crossing point.

[0036] The specific technical solutions of some embodiments of the present invention are as follows: Figure 2 As shown, a synchronous switch for switching a reactive power compensation device to a power grid includes a switching device, a sampling circuit and a control module, wherein the sampling circuit includes a voltage sampling circuit and a current sampling circuit, and the control module includes a frequency error calculation unit and a judgment unit;

[0037] The frequency error calculation unit is configured as follows:

[0038] Obtaining the real-time sampling frequency of the power grid collected by the sampling circuit in each frequency cycle, and calculating the frequency error between the real-time sampling frequency of the power grid and the fundamental frequency in each frequency cycle;

[0039] The judging unit is configured to:

[0040] If the frequency errors of the current frequency cycle and the two previous frequency cycles are not greater than a threshold value (e.g., 1 Hz), a delayed switching signal is output to the switching device according to the real-time sampling frequency of the power grid in the current frequency cycle; Figure 3 As shown in the figure, assuming that the current frequency cycle T is 3, the previous two frequency cycles T are 1 and 2 respectively, and the frequency error e is no more than 1Hz, then according to the real-time sampling frequency f of the power grid in the current frequency cycle (T is 3) 3 Output a delayed switching signal to the switching device.

[0041] If the frequency error of the current frequency cycle is greater than the threshold, no delayed input signal is output to the switching device in the current frequency cycle; Figure 3 As shown in the figure, assuming that the current frequency cycle T is 4 or 5, and the frequency error e is greater than 1Hz, then the delayed switching signal is not output to the switching device in the current frequency cycle (T is 4 or 5). Assuming that the current frequency cycle T is 6, and the previous two frequency cycles T are 2 and 3 (not 4 and 5), respectively, and the frequency error e is not greater than 1Hz, then the real-time sampling frequency f of the power grid in the current frequency cycle (T is 6) is used. 6 Output a delayed switching signal to the switching device.

[0042] If the frequency errors of the three frequency cycles before the current frequency cycle are all greater than the threshold, a delayed switching signal is output to the switching device according to the fundamental frequency of the current frequency cycle. Figure 3 As shown in the figure, assuming that the current frequency cycle T is n, and the previous three frequency cycles T are n-3, n-2 and n-1 respectively, and the frequency error e is greater than 1Hz, then the real-time sampling frequency f of the power grid of the current frequency cycle is not used. n Instead of outputting a delayed input signal to the switching device, a delayed input signal is output to the switching device according to the fundamental frequency of the current frequency cycle.

[0043] In these embodiments of the present invention, the reactive power compensation device is switched to the synchronous switch of the power grid, and the zero-crossing switching timing can be automatically adjusted by adaptively adjusting the power grid frequency range. The purpose is that the power grid frequency of some distribution cabinets is not the standard 50H Z , if according to 50H Z The switching will not reach the true zero point. In these implementations: through the op amp zero point detection hardware circuit design, the real-time sampling frequency of the power grid is collected, and the error between the current and the previous two frequency cycles is calculated at all times. If the error is not greater than 1H Z The delay switching is performed according to the current frequency. If the error is greater than 1H Z This means that the grid frequency is fluctuating too much at this moment and is not suitable for switching. It will wait for the next cycle to switch again. If it exceeds 1H for three times Z , the next time it will be switched according to the fundamental frequency.

[0044] like Figure 4 As shown, the control module includes a frequency error calculation unit, which is used to receive the real-time sampling frequency of the power grid, calculate the error of the real-time sampling frequency of the power grid, and output an error signal according to the error of the real-time sampling frequency of the power grid; the control module also includes a judgment unit, which receives the error signal output by the error calculation unit several times according to the frequency period T. n-2 、e n-1 、e n 、e n+1、e n+2 , determine the error signal e n 、e n-1 、e n-2 , when the error signal e n 、e n-1 、e n-2 When it is not greater than 1, according to the frequency f n Output delay input signal; when the error signal e n When it is greater than 1, wait for the error signal output by the next error calculation unit. n+1、 e n 、e n-1 When it is not greater than 1, according to the frequency f n+1 Output delay input signal, when the error signal e n+1、 e n 、e n-1 When it is greater than 1, wait for the error signal output by the next error calculation unit. n+2、 e n+1 、e n When it is not greater than 1, according to the frequency f n+2 Output delay input signal, when the error signal e n+2、 e n+1 、e n When it is greater than 1, the delayed input signal is output according to the fundamental frequency.

[0045] The present invention provides two frequency sampling circuit implementation methods. The first method is to set a first frequency sampling circuit in the sampling circuit. The second method is to set a second frequency sampling circuit in the voltage sampling circuit of the sampling circuit, wherein the second frequency sampling circuit has the function of conditioning the waveform.

[0046] The sampling circuit includes a first frequency sampling circuit, which collects a first grid voltage signal and outputs a first frequency signal to the control module to help monitor the real-time state of the grid. The control module obtains the real-time sampling frequency of the grid according to the first frequency signal. Figure 5As shown, in a specific embodiment, the first frequency sampling circuit includes a sampling resistor R13 and an optocoupler U1 connected in series with the resistor R13, and also includes an optocoupler U2 connected in parallel with the optocoupler U1, and a sampling resistor R14 connected in series with the optocoupler U2. The following example illustrates the working principle of the first frequency sampling circuit: the first frequency sampling circuit collects the grid voltage through sampling resistors R13 and R14. When the grid voltage is greater than the diode conduction voltage in the optocoupler U1, the optocoupler U1 is turned on, and the IO port of the pull-down control module is low level. U1 and U2 are connected in parallel, so one of the optocouplers can be turned on in the first half of the grid and the second half of the grid. The time period that cannot be turned on is zero point, and the level of the IO port of the control module is high level. It can be seen that the first frequency signal includes the aforementioned low level signal and high level signal. In these specific embodiments, the voltage sampling signal is directly used, the frequency is calculated by software, and a comparator is used to output a grid square wave, and the CPU calculates the real-time sampling frequency of the grid according to the alternating edge. The circuit outputs a voltage pulse signal containing a zero point signal.

[0047] like Figure 6 and Figure 7 As shown, the voltage sampling circuit includes a differential amplifier circuit, a conditioning circuit and a second frequency sampling circuit. The differential amplifier circuit is used to collect the grid voltage signal, output the control voltage signal to the conditioning circuit and the second frequency sampling circuit, the conditioning circuit receives the control voltage signal and outputs the stabilized voltage signal to the control module, and the second frequency sampling circuit receives the control voltage signal and outputs the second frequency signal to the control module. The second frequency signal: generated by the second frequency sampling circuit, is mainly used to condition the waveform for Fourier decomposition, eliminate the zero-point jitter caused by the harmonic content, extract the fundamental frequency, ensure the accuracy and stability of the signal, so as to facilitate the processing of the control module.

[0048] The differential amplifier circuit includes resistors R1, R2, R3, R7, capacitors C1, C2 and comparator A1. It should be noted that R1=R2, R3=R7, and the amplification factor is R1 / R5, V out1 =(LN)*R1 / R5.

[0049] The conditioning circuit includes a voltage boosting circuit, which includes resistors R4, R5 and capacitor C3. It should be noted that the function of the voltage boosting circuit is to boost the voltage below 0V to above 0V. out2 = (3-v in2 ) / (R5+R4)*R4.

[0050] The conditioning circuit also includes a voltage follower circuit, which includes a voltage follower A2. It should be noted that, V out3 =V in3 .

[0051] The conditioning circuit also includes a filter circuit, which includes a resistor R6, a capacitor C4, and a diode D1 and a diode D2. It should be noted that the filter circuit is an Rc filter circuit and a voltage clamp circuit composed of a resistor R6 and a capacitor C4.

[0052] The second frequency sampling circuit includes resistor R8, resistor R9, resistor R10, resistor R11, resistor R12, capacitor C5, capacitor C6, capacitor C7, capacitor C8, comparator A3, diode D3 and diode D4. It should be noted that the circuit is used to compare the switching alternating edges of the positive half-cycle and negative half-cycle of the AC signal, and provide them to the single-chip microcomputer as an external interrupt. The zero point is detected according to the external interrupt, so as to determine the switching zero point more quickly and accurately.

[0053] It should be noted that if Figure 7 As shown, the second frequency sampling circuit may also be a resistor R8, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a capacitor C5, a capacitor C6, a capacitor C7, a comparator A3, and a diode D3 and a diode D4.

[0054] In some embodiments of the present invention, the reactive power compensation device is switched to a synchronous switch of the power grid, and the control module calculates a third power grid real-time sampling frequency according to a first power grid real-time sampling frequency corresponding to the first frequency signal and a second power grid real-time sampling frequency corresponding to the second frequency signal;

[0055] The control module calculates a third frequency error according to a first frequency error corresponding to the first frequency signal and a second frequency error corresponding to the second frequency signal;

[0056] The judgment unit judges whether to output a delayed input signal according to the third power grid real-time sampling frequency and the third frequency error.

[0057] In these embodiments, there is no specific limitation on the method for calculating the third frequency error or the third power grid real-time sampling frequency, such as using an average method, a proportion method, or a learning-based calculation.

[0058] In some embodiments of the present invention, the reactive power compensation device is switched to the synchronous switch of the power grid, and the switching device performs a switching countdown according to the delayed switching signal. The switching countdown is the real-time sampling frequency time of the power grid in each frequency cycle, the switching device delay time, and the frequency error delay time T 1 When the switching device includes a relay, the switching device delay time is the relay delay time, that is, the switching countdown = grid real-time sampling frequency time - relay delay time - T 1 . Frequency error delay time T 1 It is the difference between the real-time sampling frequency time of the power grid and the fundamental frequency time.

[0059] For example, if the real-time sampling frequency of the power grid is 50.01Hz, the real-time sampling frequency time of the power grid is 1 / 50.01=19.996 milliseconds; if the fundamental frequency is 50Hz, the fundamental frequency time is 1 / 50=20 milliseconds; the frequency error delay time T 1 It is 20-19.996=0.004 milliseconds=4 microseconds.

[0060] In some embodiments of the present invention, the reactive power compensation device is switched to the synchronous switch of the power grid, and the countdown is the real-time sampling frequency time of the power grid and the delay time of the switching device and the frequency error delay time T of each frequency cycle. 1 And the inrush current ratio or voltage change delay time T 2 The inrush current ratio is the ratio of the inrush current peak to the stable current peak. When the switching device includes a relay, the switching device delay time is the relay delay time, that is, the switching countdown = grid real-time sampling frequency time - relay delay time - T 1 -T 2 . In addition, the countdown is executed after the system detects that the voltage crosses the zero point. Each time it is executed according to the zero point, when the capacitor is switched, the system will detect the zero point position of the power grid in real time to ensure that the switching operation is performed at the moment when the voltage is zero. This can reduce the impact of inrush current and voltage changes on the equipment and ensure the accuracy and safety of switching. In this way, the system can optimize the switching timing and improve the effect of reactive power compensation.

[0061] Inrush current ratio or voltage change delay time T 2 The dynamic step time increases when the inrush current ratio or voltage of the current frequency cycle is less than or equal to the inrush current ratio or voltage of the previous frequency cycle; the dynamic step time decreases when the inrush current ratio of the current frequency cycle is greater than the inrush current ratio or voltage of the previous frequency cycle. For example, if the inrush current ratio of the current input is equal to or decreases with the inrush current ratio of the last input, the step time can be increased (plus one "+1"), and if the inrush current ratio increases, the step time can be reduced (minus one "-1"). Combined with Figure 8As shown, the product (synchronous switch) of the present invention is self-learning, and its principle is to gradually optimize the switching zero point of the product by performing multiple feedback and adjustments on the switching process of the capacitor. After each switching, the system will detect the inrush current and voltage changes to evaluate the accuracy of the switching timing. Through continuous adjustment and optimization, the product can gradually approach the optimal switching timing within a step size (such as 1 / 1000), thereby improving overall performance and efficiency. The present invention uses a sampling circuit to monitor changes in voltage and current. By collecting the voltage and current signals of the power grid in real time, the control module can calculate the inrush current and frequency conditions at the time of input, and judge the accuracy of the switching timing based on these data. The method of the embodiment of the present invention combines the frequency error calculation and the external interrupt signal to quickly and accurately determine the switching zero point, thereby effectively suppressing the surge phenomenon.

[0062] In some embodiments of the present invention, the reactive power compensation device is switched to the synchronous switch of the power grid, and the dynamic step time is the product of the set adjustment time and the step ratio. When the inrush current ratio or voltage of the current frequency cycle is less than or equal to the inrush current ratio or voltage of the previous frequency cycle, the step ratio increases; when the inrush current ratio of the current frequency cycle is greater than the inrush current ratio or voltage of the previous frequency cycle, the step ratio decreases. Accordingly, the method of the present invention is also called "left and right step perturbation method".

[0063] In some embodiments of the present invention, the reactive power compensation device is switched to the synchronous switch of the power grid, and the step ratio is the sum of the set step value and the accumulated step value (which can be increased or decreased cyclically), and the current accumulated step value is the sum of the set step value and the previous accumulated step value. At this time, the inrush current ratio or voltage change delay time T 2 It can be expressed as: T 2 =(1 / k+kref)*t, where 1 / k represents the set step value, kref represents the accumulated step value, and t represents the set adjustment time (which can be 0.1~10ms).

[0064] In some embodiments of the present invention, the reactive power compensation device is switched to a synchronous switch of the power grid, the set step value is 1 / 1000, and the threshold value is 1 Hz.

[0065] Below, when t=1ms, 1 / k=1 / 1000, kref=0, T 2 The present invention is further described by taking the calculation of kref as an example.

[0066] First time: T 2 =(1 / 1000+0)*1=0.001ms=1us;

[0067] Determine the surge current: if the current surge current is less than or equal to the previous surge current, kref=kref+1 / 1000=0+1 / 1000=0.001; otherwise, kref=kref-1 / 1000=0-1 / 1000=-0.001;

[0068] Second time: T 2 =(1 / 1000+0.001)*1=0.002ms=2us; or T 2 =(1 / 1000-0.001)*1=0ms=0us;

[0069] Determine the surge current: if the current surge current is less than or equal to the previous surge current, kref = kref + 1 / 1000 = 1 / 1000 + 1 / 1000 = 0.002; otherwise, kref = kref - 1 / 1000 = -1 / 1000 - 1 / 1000 = -0.002

[0070] Third time: T 2 =(1 / 1000+0.002)*1=0.003ms=3us; or T 2 =(1 / 1000-0.002)*1=-0.001ms=-1us.

[0071] In some embodiments of the present invention, the reactive compensation device is switched to the synchronous switch of the power grid. When the inrush current ratio is greater than 3, the delayed switching signal is not output to the switching device in the current frequency cycle. In the embodiment of the present invention, the switching standard is determined by detecting the frequency error of the current frequency cycle and the two previous frequency cycles. For example, if the frequency error is not greater than 1 Hz and the inrush current ratio is less than 3, it is considered that the switching timing is accurate, and delayed switching can be performed and fine-tuned. Through the left and right step perturbation method, it is determined that the next switching inrush current is getting smaller and the frequency is getting smaller and gradually approaching the zero point of the power grid; if the frequency error is greater than 1 Hz, it means that the power grid frequency fluctuates greatly and is not suitable for switching. Through this standard, the system can ensure that the switching operation is performed at the right time.

[0072] If the switching timing is not accurate, the system will gradually adjust the switching timing point according to the step size of 1 / 1000. This implementation method is related to the switching logic in that the system will evaluate the frequency error after each switching and gradually adjust the switching timing according to the feedback information of the error to optimize the switching accuracy. Through this meticulous adjustment, the system can gradually approach the optimal switching timing in multiple iterations, thereby improving the effect and stability of reactive power compensation.

[0073] The above-described embodiments are merely descriptions of preferred implementation modes of the present invention and are not intended to limit the scope of the present invention. Without departing from the design spirit of the present invention, various modifications and improvements made to the technical solutions of the present invention by ordinary technicians in this field should all fall within the protection scope determined by the claims of the present invention.

Claims

1. A synchronous switch for switching a reactive power compensation device to a power grid, comprising a switching device, a sampling circuit and a control module, wherein the sampling circuit comprises a voltage sampling circuit and a current sampling circuit, and is characterized in that: The control module includes a frequency error calculation unit and a judgment unit; The frequency error calculation unit is configured as follows: Obtaining the real-time sampling frequency of the power grid collected by the sampling circuit in each frequency cycle, and calculating the frequency error between the real-time sampling frequency of the power grid and the fundamental frequency in each frequency cycle; The judging unit is configured to: If the frequency errors of the current frequency cycle and the two previous frequency cycles are not greater than the threshold, a delayed switching signal is output to the switching device according to the real-time sampling frequency of the power grid in the current frequency cycle; If the frequency error of the current frequency cycle is greater than the threshold, no delayed switching signal is output to the switching device in the current frequency cycle; If the frequency errors of the three frequency cycles before the current frequency cycle are all greater than the threshold, a delayed switching signal is output to the switching device according to the fundamental frequency of the current frequency cycle; The switching device performs a switching countdown according to the delayed switching signal, and the switching countdown is the difference between the real-time sampling frequency time of the power grid and the switching device delay time, the frequency error delay time T1, and the inrush current ratio or voltage change delay time T2 in each frequency cycle; The frequency error delay time T1 is the difference between the real-time sampling frequency time of the power grid and the fundamental frequency time; The inrush current ratio or voltage change delay time T2 is the dynamic step time. When the inrush current ratio or voltage of the current frequency cycle is less than or equal to the inrush current ratio or voltage of the previous frequency cycle, the dynamic step time increases; when the inrush current ratio of the current frequency cycle is greater than the inrush current ratio or voltage of the previous frequency cycle, the dynamic step time decreases.

2. The synchronous switch for switching a reactive power compensation device to a power grid according to claim 1, characterized in that: The sampling circuit further includes a first frequency sampling circuit, which collects a first grid voltage signal and outputs a first frequency signal to the control module, and the control module obtains the real-time sampling frequency of the grid according to the first frequency signal; The first frequency sampling circuit includes a first resistor and a first optocoupler connected in series with the first resistor, a second optocoupler connected in parallel with the first optocoupler, and a second resistor connected in series with the second optocoupler.

3. The synchronous switch for switching the reactive power compensation device to the power grid according to claim 2, characterized in that: The voltage sampling circuit includes a differential amplifier circuit, a conditioning circuit and a second frequency sampling circuit. The differential amplifier circuit collects a second power grid voltage signal and outputs a control voltage signal to the conditioning circuit and the second frequency sampling circuit. The conditioning circuit receives the control voltage signal and outputs a stabilized voltage signal to the control module. The second frequency sampling circuit receives the control voltage signal and outputs a second frequency signal to the control module. The control module obtains the real-time sampling frequency of the power grid according to the second frequency signal.

4. The synchronous switch for switching a reactive power compensation device to a power grid according to claim 3, characterized in that: The control module calculates a third power grid real-time sampling frequency according to a first power grid real-time sampling frequency corresponding to the first frequency signal and a second power grid real-time sampling frequency corresponding to the second frequency signal; The control module calculates a third frequency error according to a first frequency error corresponding to the first frequency signal and a second frequency error corresponding to the second frequency signal; The judgment unit judges whether to output a delayed input signal according to the third power grid real-time sampling frequency and the third frequency error.

5. The synchronous switch for switching a reactive power compensation device to a power grid according to claim 1, characterized in that: The dynamic step time is the product of the set adjustment time and the step ratio. When the inrush current ratio or voltage of the current frequency cycle is less than or equal to the inrush current ratio or voltage of the previous frequency cycle, the step ratio increases; when the inrush current ratio of the current frequency cycle is greater than the inrush current ratio or voltage of the previous frequency cycle, the step ratio decreases.

6. The synchronous switch for switching the reactive power compensation device to the power grid according to claim 5, characterized in that: The step ratio is the sum of the set step value and the accumulated step value, and the current accumulated step value is the sum of the set step value and the previous accumulated step value.

7. The synchronous switch for switching the reactive power compensation device to the power grid according to claim 6, characterized in that: The set step value is 1 / 1000, and the threshold is 1 Hz.

8. The synchronous switch for switching a reactive power compensation device to a power grid according to claim 7, characterized in that: When the inrush current ratio is greater than 3, no delayed switching signal is output to the switching device in the current frequency cycle.

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