Field programmable gate array configuration method and device, edge gateway and storage medium

Abstract

The application discloses a field programmable gate array configuration method and device, an edge gateway and a storage medium. A target encryption algorithm of a target blockchain needing interaction is identified. A target hardware logic corresponding to the target encryption algorithm is selected from a pre-stored encryption hardware logic library. A field programmable gate array is configured according to the target hardware logic. An encryption algorithm associated with the target blockchain in the field programmable gate array is updated, so that the field programmable gate array performs a signature verification operation associated with the target blockchain through the encryption algorithm associated with the target blockchain. According to the application, the field programmable gate array is reconstructed according to the encryption algorithm of the target blockchain, so that the hardware device can support the signature verification operation of multiple blockchains across platforms by using the reconstructed field programmable gate array, the occupation of the computing resources of the hardware device is reduced, the device throughput is improved, and the access of different blockchains is facilitated.

Description

Technical Field

[0001] This invention relates to the field of blockchain technology, and more specifically, to a field-programmable gate array (FPGA) configuration method, apparatus, edge gateway, and storage medium. Background Technology

[0002] Blockchain technology, as a distributed ledger technology, features decentralization, security, reliability, and immutability, and is widely used across various industries. Traditional blockchain edge gateways typically use general-purpose computing units such as CPUs or MCUs to perform signature and verification operations. However, these operations often consume significant computing resources, leading to reduced device throughput and an inability to process concurrent streaming data in a timely manner. Furthermore, different blockchain projects do not entirely employ the same encryption algorithms to ensure transaction security and privacy; even when using the same algorithm, the specific encryption parameters differ, posing challenges to the universality and cross-platform capabilities of hardware devices. Summary of the Invention

[0003] Based on this, the present invention provides a field-programmable gate array (FPGA) configuration method, apparatus, edge gateway, and storage medium, which can reconstruct the FPGA according to the encryption algorithm of the target blockchain to be interacted with, so as to ensure that the hardware device can use the reconstructed FPGA to support signature verification operations of multiple blockchains across platforms, reduce the consumption of hardware device computing resources, improve device throughput, and facilitate the access of different blockchains.

[0004] To achieve the above objectives, embodiments of the present invention provide a field-programmable gate array (FPGA) configuration method, comprising:

[0005] Identify the target cryptographic algorithm of the target blockchain to be interacted with;

[0006] Select the target hardware logic corresponding to the target encryption algorithm from the pre-stored encryption hardware logic library;

[0007] According to the target hardware logic configuration field-programmable gate array, the encryption algorithm associated with the target blockchain in the field-programmable gate array is updated so that the field-programmable gate array performs the signature verification operation associated with the target blockchain through the encryption algorithm associated with the target blockchain; wherein, the type of encryption algorithm associated with the target blockchain is elliptic curve cryptography.

[0008] As an improvement to the above scheme, before identifying the target encryption algorithm of the target blockchain to be interacted with, the method further includes:

[0009] When the field-programmable gate array (FPGA) is started, it is initialized to a preset general state and equipped with an encryption hardware logic library, wherein the encryption hardware logic library includes hardware logic resources that support several encryption algorithms.

[0010] As an improvement to the above scheme, the target encryption algorithm for identifying the target blockchain to be interacted with includes:

[0011] When interaction with the target blockchain is required, a connection to the target blockchain is established;

[0012] The version information of the target blockchain is obtained through a protocol handshake operation with the target blockchain;

[0013] Based on the correspondence between the version information and the encryption algorithm, the encryption standard adopted by the target blockchain is determined;

[0014] The step of selecting the target hardware logic corresponding to the target encryption algorithm from the pre-stored encryption hardware logic library includes:

[0015] Select the target hardware logic that conforms to the encryption standard from the pre-stored encrypted hardware logic library.

[0016] As an improvement to the above solution, after configuring the field-programmable gate array (FPGA) according to the target hardware logic and updating the encryption algorithm associated with the target blockchain in the FPGA, the solution further includes:

[0017] Initialize the state or registers associated with the field-programmable gate array (FPGA) to ensure that the new configuration of the FPGA takes effect correctly.

[0018] As an improvement to the above solution, the method further includes:

[0019] In response to a data request from the target blockchain, the field-programmable gate array (FPGA) is invoked to sign the target data using an elliptic curve cryptography algorithm associated with the target blockchain combined with the Montgomery step algorithm; wherein the target data is the information associated with the data request.

[0020] The signed target data is uploaded to the target blockchain.

[0021] As an improvement to the above solution, the method further includes:

[0022] Receive data sent by the target blockchain;

[0023] The field-programmable gate array (FPGA) is invoked to enable it to use an elliptic curve cryptography algorithm associated with the target blockchain combined with the Montgomery ladder algorithm to verify the signature of the received data, thereby obtaining data that has passed the signature verification.

[0024] To achieve the above objectives, embodiments of the present invention also provide a field-programmable gate array (FPGA) configuration device, comprising:

[0025] The encryption algorithm identification module is used to identify the target encryption algorithm of the target blockchain that needs to be interacted with.

[0026] The hardware logic selection module is used to select the target hardware logic corresponding to the target encryption algorithm from a pre-stored encrypted hardware logic library.

[0027] A configuration module is configured to configure a field-programmable gate array (FPGA) according to the target hardware logic and update the encryption algorithm associated with the target blockchain in the FPGA, so that the FPGA can perform a signature verification operation associated with the target blockchain through the encryption algorithm associated with the target blockchain; wherein the encryption algorithm associated with the target blockchain is an elliptic curve cryptography algorithm.

[0028] To achieve the above objectives, embodiments of the present invention also provide an edge gateway, comprising:

[0029] Field-programmable gate arrays (FPGAs) are used to perform signature verification operations.

[0030] The CPU general-purpose computing module is used to execute the field-programmable gate array configuration method as described in any of the above embodiments.

[0031] A network interface is used as the interface for communication between the blockchain edge gateway and the blockchain.

[0032] To achieve the above objectives, embodiments of the present invention also provide a computer-readable storage medium, the computer-readable storage medium including a stored computer program, wherein, when the computer program is executed, it controls the device where the computer-readable storage medium is located to perform the field-programmable gate array configuration method as described in any of the above embodiments.

[0033] Compared with existing technologies, the field-programmable gate array (FPGA) configuration method, apparatus, edge gateway, and storage medium disclosed in this invention first identify the target encryption algorithm of the target blockchain to be interacted with; then, select the target hardware logic corresponding to the target encryption algorithm from a pre-stored encryption hardware logic library; finally, configure the FPGA according to the target hardware logic, and update the encryption algorithm associated with the target blockchain in the FPGA, so that the FPGA can perform signature verification operations associated with the target blockchain through the encryption algorithm associated with the target blockchain; wherein, the encryption algorithm associated with the target blockchain is an elliptic curve cryptography algorithm. Therefore, this invention can reconstruct the FPGA according to the encryption algorithm of the target blockchain to be interacted with, ensuring that the hardware device can use the reconstructed FPGA to support signature verification operations of multiple blockchains across platforms, reducing the consumption of hardware device computing resources, improving device throughput, and facilitating the access of different blockchains. Attached Figure Description

[0034] To more clearly illustrate the technical solution of the present invention, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0035] Figure 1 This is a flowchart illustrating a field-programmable gate array (FPGA) configuration method according to an embodiment of the present invention.

[0036] Figure 2 This is a schematic diagram of an elliptic curve cryptography hardware architecture based on a field-programmable gate array provided in an embodiment of the present invention;

[0037] Figure 3 This is a schematic diagram of the code for an elliptic curve encryption algorithm provided in an embodiment of the present invention;

[0038] Figure 4 This is a schematic diagram of a field-programmable gate array (FPGA) configuration device provided in an embodiment of the present invention. Detailed Implementation

[0039] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0040] See Figure 1 This is a flowchart illustrating a field-programmable gate array (FPGA) configuration method according to an embodiment of the present invention. Specifically, the FPGA configuration method includes steps S1 to S3:

[0041] S1. Identify the target encryption algorithm of the target blockchain that needs to be interacted with;

[0042] S2. Select the target hardware logic corresponding to the target encryption algorithm from the pre-stored encryption hardware logic library;

[0043] S3. Configure the field-programmable gate array (FPGA) according to the target hardware logic, and update the encryption algorithm associated with the target blockchain in the FPGA, so that the FPGA can perform the signature verification operation associated with the target blockchain through the encryption algorithm associated with the target blockchain; wherein, the encryption algorithm associated with the target blockchain is an elliptic curve cryptography algorithm.

[0044] Specifically, the field-programmable gate array (FPGA) configuration method provided in this embodiment of the invention is particularly suitable for the interaction between the Internet of Things (IoT) and blockchain. IoT applications suffer from fragmentation, discrete demands, and differences in hardware and software platforms. This is because the IoT is a complex heterogeneous system involving various industries and requiring compatibility with various communication protocols. However, traditional IoT devices are often resource-constrained and have limited computing power, lacking effective defenses against increasingly severe data security threats, seriously affecting the authenticity and credibility of the data. Taking movable asset financing monitoring as an example, the data collected by IoT sensors includes key node information from various business processes of an enterprise, such as production, warehousing, and logistics. Financial institutions use the information collected by IoT devices to comprehensively assess the enterprise's production and operation status, providing support for financial activities such as bank credit loans. Once the sensing information collected by IoT devices is maliciously tampered with, it will seriously affect the decision-making of financial institutions, causing unavoidable losses. Blockchain, on the other hand, is a distributed decentralized database with high security and reliability, and therefore has been widely used in finance, IoT, and other fields. In blockchain systems, digital signatures and verification are important means to ensure data security and integrity. Therefore, the integration of the Internet of Things (IoT) and blockchain has become inevitable. However, traditional blockchain edge gateways typically use general-purpose computing units such as CPUs (Central Processing Units) or MCUs (Microcontroller Units) to perform signature and verification operations. These operations usually consume a large amount of computing resources, leading to reduced device throughput and an inability to process concurrent streaming data in a timely manner. Furthermore, different blockchains use different methods for signature and verification, resulting in poor versatility of existing hardware devices. The method provided in this invention can effectively solve the above-mentioned technical problems.

[0045] Specifically, the key steps of the method provided in this embodiment of the invention include: blockchain identification, loading adaptation logic, and field-programmable gate array (FPGA) reconfiguration. FPGA stands for Field-Programmable Gate Array.

[0046] For example, step S1 belongs to the key step of "blockchain identification". This step is used to analyze the encryption algorithm used for signature verification of the blockchain to which information will be exchanged, and obtain the target encryption algorithm. Step S2 belongs to the key step of "loading adaptation logic". According to the target encryption algorithm of the target blockchain, appropriate hardware logic is selected and loaded from a predefined library (encryption hardware logic library); these logic blocks implement the specific encryption algorithm required by the target blockchain. Step S3 belongs to the key step of "field-programmable gate array reconfiguration". After loading the adaptation logic, the field-programmable gate array will be quickly reconfigured, reconfiguring its hardware resources to adapt to the encryption algorithm of the target blockchain.

[0047] It's worth noting that the rapid reconfiguration of a Field-Programmable Gate Array (FPGA) relies on its programmability and reconfigurability, typically involving bitstream loading, configuration parsing, reconfiguration, and initialization. During rapid reconfiguration, a new bitstream file, describing the FPGA's hardware logic, is loaded into the FPGA, overwriting the current configuration. Based on this, its hardware resources, such as the connection methods and states of Look-Up Tables and Flip-Flops, are parsed. Through partial reconfiguration, the FPGA updates the logic related to the target blockchain's cryptographic algorithms without affecting the functionality of other parts.

[0048] Compared with existing technologies, the embodiments of this invention solve the bottleneck problem in the blockchain signature verification process. By utilizing a Field-Programmable Gate Array (FPGA) as the signature verification module, the FPGA can be used to perform data encryption tasks, significantly reducing the preparation time for data uploading to the blockchain and ensuring the real-time performance of massive streaming big data uploading. It also solves the reusability problem for different blockchains. Through the rapid reconfiguration of the FPGA, it has the ability to support multiple encryption algorithms, enabling access to different blockchains.

[0049] In one implementation, before identifying the target cryptographic algorithm of the target blockchain to be interacted with, the method further includes:

[0050] When the field-programmable gate array (FPGA) is started, it is initialized to a preset general state and equipped with an encryption hardware logic library, wherein the encryption hardware logic library includes hardware logic resources that support several encryption algorithms.

[0051] Specifically, the key steps of the method provided in this embodiment of the invention include: initial configuration, blockchain identification, loading adaptation logic, and field-programmable gate array (FPGA) reconfiguration; wherein, blockchain identification, loading adaptation logic, and FPGA reconfiguration are detailed in the description of the above embodiments and will not be repeated here. Regarding the initial configuration, when the system starts up (e.g., when the edge gateway starts up), the FPGA will be initialized to a general state, which includes, for example, configuring hardware logic resources to support a series of common elliptic curve cryptography algorithms. It is worth noting that the hardware logic resources are not limited to the aforementioned elliptic curve cryptography algorithms.

[0052] In one implementation, the identification of the target cryptographic algorithm of the target blockchain to be interacted with in step S1 includes:

[0053] When interaction with the target blockchain is required, a connection to the target blockchain is established;

[0054] The version information of the target blockchain is obtained through a protocol handshake operation with the target blockchain;

[0055] Based on the correspondence between the version information and the encryption algorithm, the encryption standard adopted by the target blockchain is determined;

[0056] The step of selecting the target hardware logic corresponding to the target encryption algorithm from the pre-stored encryption hardware logic library includes:

[0057] Select the target hardware logic that conforms to the encryption standard from the pre-stored encrypted hardware logic library.

[0058] Specifically, the crucial step of "blockchain identification" in step S1 includes the following: When interaction with a specific blockchain (target blockchain) is required, the system identifies the target blockchain's specific encryption algorithm (target encryption algorithm). The identification process includes a protocol handshake, version check, encryption negotiation, and initial information acquisition. After establishing a connection with the target blockchain, the edge gateway and the target blockchain node typically perform a protocol handshake. This includes exchanging information such as protocol version and supported functions. The handshake phase helps confirm whether the connection is successful and which protocol and encryption algorithm should be used in subsequent communication. The edge gateway can check the version information of the target blockchain node. Different versions of blockchain software may use different encryption algorithms or algorithm parameters. By confirming the node's version, the edge gateway can understand the encryption standard adopted by the target blockchain and further negotiate the encryption algorithm to be used. Both parties will select a mutually supported encryption algorithm to protect data transmission.

[0059] In one implementation, after configuring the field-programmable gate array (FPGA) according to the target hardware logic and updating the encryption algorithm associated with the target blockchain in the FPGA, the method further includes:

[0060] Initialize the state or registers associated with the field-programmable gate array (FPGA) to ensure that the new configuration of the FPGA takes effect correctly.

[0061] Specifically, after partially reconfiguring a field-programmable gate array (FPGA), the FPGA may need to reinitialize some status or registers to ensure that the new configuration takes effect correctly, such as the FPGA's internal status registers, interrupt control registers, and communication interface-related registers.

[0062] In one embodiment, the method further includes:

[0063] In response to a data request from the target blockchain, the field-programmable gate array (FPGA) is invoked to sign the target data using an elliptic curve cryptography algorithm associated with the target blockchain combined with the Montgomery step algorithm; wherein the target data is the information associated with the data request.

[0064] The signed target data is uploaded to the target blockchain.

[0065] Specifically, blockchain technology may employ different cryptographic algorithms in different implementations, such as different variants of Elliptic Curve Cryptography (ECC). RingCT combines multiple cryptographic techniques, including ECC. Although these blockchain projects use ECC, they employ different curve parameters and variants to meet their specific needs. The method provided in this invention can reconstruct a field-programmable gate array (FPGA) according to a specific cryptographic algorithm, making it adaptable to different types of ECC algorithms and applicable to different blockchains. This allows the FPGA to be compatible with data transmission and signature verification between different blockchains.

[0066] Specifically, the field-programmable gate array (FPGA) accelerator is used to accelerate elliptic curve cryptography algorithms. This invention supports, but is not limited to, encryption algorithms such as ED25519 and secp256k1. The elliptic curve cryptography hardware architecture based on the FPGA is as follows: Figure 2As shown, it includes four main stages: stage-1, Seed Generation; stage-2, Key Pair Generation; stage-3, Signature Generation; and stage-4, Signature Verification. Figure 2The parameters appearing in the code are explained as follows: arst_n represents the reset signal, core_ena represents the enable signal, core_comp_done represents the end signal of the current stage of computation, core_start represents the start node of the algorithm, core_done represents the end node of the algorithm, sig_verify_pass represents the signature verification passed. 1. In stage-1, the seed creation module (create_seed_inst) is used to create the seed (create_seed), gen_seed represents the random seed generation command, Seed[255:0] represents the generated 256-bit seed, and Seed_vld represents the seed generation flag. 2. In stage-2, the key pair module (keypair_inst) is used to generate key pairs (keypair), Seed_in[255:0] represents the key pair generation command. The input seed signal serves as the private key, and core_pk[255:0] represents the generated public key. In stage-3, the signature module (sign_core_inst) has a signature function (sign_core), and the signature verification module (verify_core_inst) has a signature verification function (verify_core). core_M[255:0] represents the message to be signed, core_pk[255:0] represents the generated public key, core_sk[255:0] represents the generated private key, and core_R[255:0] and core_S[255:0] together constitute a 512-bit signature information, where R is the upper half and S is the lower half. In stage-4, core_M[255:0] represents the message to be verified, and signature_passed indicates that the verification has passed. Specifically, a seed is randomly generated, and a key pair is created based on the seed. When data is received from other devices, the key pair is used for verification. Before sending data to other devices, the key pair is used for signing. This process requires the assistance of clock signals (clk) or reset (rst), the application of which can be found in existing technologies. Scalar multiplication is a key operation in elliptic curve cryptography, involving numerous point addition and point doubling operations, requiring repeated multiplication and modulo operations. This scheme incorporates the Montgomery ladder algorithm to implement scalar multiplication. Unlike MCU or CPU-based processing methods, the hardware implementation based on a field-programmable gate array (FPGA) can perform point addition and doubling operations simultaneously, thus significantly reducing computation time. The detailed calculation process is as follows... Figure 3 As shown, Figure 3These are general steps in elliptic curve cryptography algorithms, and therefore can be applied to algorithms such as secp256k1, ed25519, and sm2p256v1. Figure 3 In the input sequence k, where k t-1 =1, convert the affine coordinates of point P to projective coordinates, thus obtaining two sets of coordinates (X1, Z1) and (X2, Z2); define the coordinate range; in each iteration, according to the sequence k i Whether the value is 1 determines whether to perform the corresponding dot addition and doubling operations. After passing through all bits of sequence k, the coordinate parameters (X1, X2, Z1, Z2) are transformed back to affine coordinates. Figure 3 The elliptic curve calculation process shown uses the Montgomery step algorithm and is applied in... Figure 2 In the three modules of stage-2 / 3 / 4.

[0067] In one embodiment, the method further includes:

[0068] Receive data sent by the target blockchain;

[0069] The field-programmable gate array (FPGA) is invoked to enable it to use an elliptic curve cryptography algorithm associated with the target blockchain combined with the Montgomery ladder algorithm to verify the signature of the received data, thereby obtaining data that has passed the signature verification.

[0070] Specifically, after the field-programmable gate array (FPGA) completes its reconfiguration, the system can interact with the target blockchain, using appropriate encryption algorithms for data transmission, signature verification, and processing to ensure that the device can access the target blockchain. For example, the edge gateway may request initial information from the target blockchain node, such as the block header and chain height, and then interact with the target blockchain. During the interaction, the FPGA may be invoked to perform signature verification operations.

[0071] It is worth noting that the interaction between the edge gateway (system) and the target blockchain includes the edge gateway receiving data from the target blockchain, as well as the edge gateway sending data to the target blockchain after receiving a data request from the target blockchain.

[0072] Compared with existing technologies, the Field-Programmable Gate Array (FPGA) configuration method provided in this invention, through FPGA technology, executes the most computationally intensive signature and verification calculations in blockchain applications, thereby solving the throughput bottleneck problem of edge devices in processing massive data upload requests. Since the circuit implemented by the FPGA hardware can efficiently execute signature and verification operations, it can greatly improve the throughput of the device, thus better handling concurrent streaming data. Furthermore, as a programmable logic device, the FPGA can be designed and implemented according to specific needs, allowing for online reconfiguration for blockchains with different encryption algorithms. This invention innovatively integrates real-time cloud monitoring technology based on IoT and big data, innovatively addressing the issue from the system hardware level, ensuring data trustworthiness from the source, and exploring new solutions for the long-term management of infrastructure, commercial properties, and other real estate by combining business risk control processes. Through multi-party trusted cooperation and the notarization of assets and transactions on the blockchain platform, trusted cooperation among multiple entities becomes possible, improving liquidity, realizing value transfer, and defining a new business model for asset securitization, with promising application prospects.

[0073] See Figure 4 This invention also provides a field-programmable gate array (FPGA) configuration device, comprising:

[0074] Encryption algorithm identification module 11 is used to identify the target encryption algorithm of the target blockchain to be interacted with;

[0075] The hardware logic selection module 12 is used to select the target hardware logic corresponding to the target encryption algorithm from the pre-stored encryption hardware logic library.

[0076] Configuration module 13 is configured to configure the field-programmable gate array (FPGA) according to the target hardware logic and update the encryption algorithm associated with the target blockchain in the FPGA, so that the FPGA can perform the signature verification operation associated with the target blockchain through the encryption algorithm associated with the target blockchain; wherein the encryption algorithm associated with the target blockchain is an elliptic curve cryptography algorithm.

[0077] In one implementation, an initialization module is further included, for:

[0078] When the field-programmable gate array (FPGA) is started, it is initialized to a preset general state and equipped with an encryption hardware logic library, wherein the encryption hardware logic library includes hardware logic resources that support several encryption algorithms.

[0079] In one embodiment, the encryption algorithm identification module 11 is specifically used for:

[0080] When interaction with the target blockchain is required, a connection to the target blockchain is established;

[0081] The version information of the target blockchain is obtained through a protocol handshake operation with the target blockchain;

[0082] Based on the correspondence between the version information and the encryption algorithm, the encryption standard adopted by the target blockchain is determined;

[0083] The step of selecting the target hardware logic corresponding to the target encryption algorithm from the pre-stored encryption hardware logic library includes:

[0084] Select the target hardware logic that conforms to the encryption standard from the pre-stored encrypted hardware logic library.

[0085] In one implementation, a reset module is also included, for:

[0086] Initialize the state or registers associated with the field-programmable gate array (FPGA) to ensure that the new configuration of the FPGA takes effect correctly.

[0087] In one implementation, the encryption algorithm is an elliptic curve cryptography algorithm.

[0088] In one embodiment, a data processing module is further included, for:

[0089] In response to a data request from the target blockchain, the field-programmable gate array (FPGA) is invoked to sign the target data using an elliptic curve cryptography algorithm associated with the target blockchain combined with the Montgomery step algorithm; wherein the target data is the information associated with the data request.

[0090] The signed target data is uploaded to the target blockchain.

[0091] In one embodiment, the data processing module is further configured to:

[0092] Receive data sent by the target blockchain;

[0093] The field-programmable gate array (FPGA) is invoked to enable it to use an elliptic curve cryptography algorithm associated with the target blockchain combined with the Montgomery ladder algorithm to verify the signature of the received data, thereby obtaining data that has passed the signature verification.

[0094] It is worth noting that the specific operation process of the field-programmable gate array configuration device can be referred to the operation process of the field-programmable gate array configuration method described in the above embodiments, and will not be repeated here.

[0095] This invention also provides an edge gateway, comprising:

[0096] Field-programmable gate arrays (FPGAs) are used to perform signature verification operations.

[0097] The CPU general-purpose computing module is used to execute the field-programmable gate array configuration method as described in any of the above embodiments.

[0098] A network interface is used as the interface for communication between the blockchain edge gateway and the blockchain.

[0099] Specifically, the edge gateway for blockchain accelerated by field-programmable gate arrays includes the following components:

[0100] Field-Programmable Gate Array (FPGA): An FPGA accelerator used to perform signature and verification operations, which can be designed and implemented according to specific requirements. In this embodiment of the invention, the FPGA accelerator performs all signature and verification operations, thereby greatly improving the throughput of the device.

[0101] CPU general-purpose computing unit: used to perform other computing operations. In this embodiment of the invention, the CPU is used to perform computing tasks other than signing and verifying operations, such as the reconstruction of a field-programmable gate array (FPGA).

[0102] Network interface: A network interface used to communicate with other devices. It can use various communication protocols, such as Ethernet and Wi-Fi.

[0103] Compared with existing technologies, the field-programmable gate array (FPGA) configuration device and edge gateway disclosed in this invention first identify the target encryption algorithm of the target blockchain to be interacted with; then, select the target hardware logic corresponding to the target encryption algorithm from a pre-stored encryption hardware logic library; finally, configure the FPGA according to the target hardware logic, update the encryption algorithm associated with the target blockchain in the FPGA, so that the FPGA can perform the signature verification operation associated with the target blockchain through the encryption algorithm associated with the target blockchain; wherein, the type of encryption algorithm associated with the target blockchain is elliptic curve cryptography. Therefore, this invention can reconstruct the FPGA according to the encryption algorithm of the target blockchain to be interacted with, ensuring that the hardware device can use the reconstructed FPGA to support signature verification operations of multiple blockchains across platforms, reducing the consumption of hardware device computing resources, improving device throughput, and facilitating the access of different blockchains.

[0104] This invention also provides a field-programmable gate array (FPGA) configuration device, including a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor. When the processor executes the computer program, it implements the steps described in the above-described FPGA configuration method embodiments, for example... Figure 1 The steps S1 to S3 described above; or, when the processor executes the computer program, it implements the functions of each module in the above-described device embodiments.

[0105] For example, the computer program may be divided into one or more modules, which are stored in the memory and executed by the processor to complete the present invention. The one or more modules may be a series of computer program instruction segments capable of performing specific functions, which describe the execution process of the computer program in the field-programmable gate array configuration device. For example, the computer program may be divided into multiple modules, each with the following specific functions:

[0106] Encryption algorithm identification module 11 is used to identify the target encryption algorithm of the target blockchain to be interacted with;

[0107] The hardware logic selection module 12 is used to select the target hardware logic corresponding to the target encryption algorithm from the pre-stored encryption hardware logic library.

[0108] Configuration module 13 is configured to configure the field-programmable gate array (FPGA) according to the target hardware logic and update the encryption algorithm associated with the target blockchain in the FPGA, so that the FPGA can perform the signature verification operation associated with the target blockchain through the encryption algorithm associated with the target blockchain; wherein the encryption algorithm associated with the target blockchain is an elliptic curve cryptography algorithm.

[0109] The specific working process of each module can be referred to the working process of the field programmable gate array configuration device described in the above embodiments, and will not be repeated here.

[0110] The field-programmable gate array (FPGA) configuration device can be a computing device such as a desktop computer, laptop, handheld computer, or cloud server. The FPGA configuration device may include, but is not limited to, a processor and memory. Those skilled in the art will understand that the FPGA configuration device may also include input / output devices, network access devices, buses, etc.

[0111] The processor can be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or any conventional processor. The processor is the control center of the FPGA configuration device, connecting various parts of the entire FPGA configuration device through various interfaces and lines.

[0112] The memory can be used to store the computer programs and / or modules. The processor implements various functions of the FPGA configuration device by running or executing the computer programs and / or modules stored in the memory and by calling data stored in the memory. The memory may mainly include a program storage area and a data storage area. The program storage area may store the operating system, at least one application program required for a function (such as image playback function), etc.; the data storage area may store data created based on the use of the mobile phone, etc. In addition, the memory may include high-speed random access memory, and may also include non-volatile memory, such as hard disk, memory, plug-in hard disk, smart media card (SMC), secure digital (SD) card, flash card, at least one disk storage device, flash memory device, or other volatile solid-state storage device.

[0113] If the modules integrated into the FPGA configuration device are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the above embodiments of the present invention can also be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when executed by a processor, it can implement the steps of the various method embodiments described above. The computer program includes computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. The computer-readable medium can include: any entity or device capable of carrying the computer program code, a recording medium, a USB flash drive, a portable hard drive, a magnetic disk, an optical disk, a computer memory, a read-only memory (ROM), a random access memory (RAM), an electrical carrier signal, a telecommunication signal, and a software distribution medium, etc.

[0114] The above description represents the preferred embodiments of the present invention. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principles of the present invention, and these improvements and modifications are also considered to be within the scope of protection of the present invention.

Claims

1. A method for configuring a field-programmable gate array (FPGA), characterized in that, include: Identify the target cryptographic algorithm of the target blockchain to be interacted with; Select the target hardware logic corresponding to the target encryption algorithm from the pre-stored encryption hardware logic library; According to the target hardware logic configuration, the field-programmable gate array (FPGA) is updated, and the encryption algorithm associated with the target blockchain in the FPGA is updated so that the FPGA performs the signature verification operation associated with the target blockchain through the encryption algorithm associated with the target blockchain; wherein, the encryption algorithm associated with the target blockchain is an elliptic curve cryptography algorithm. The target encryption algorithm for identifying the target blockchain to be interacted with includes: The version information of the target blockchain is obtained through a protocol handshake operation with the target blockchain; Based on the correspondence between the version information and the encryption algorithm, the encryption standard adopted by the target blockchain is determined; The step of selecting the target hardware logic corresponding to the target encryption algorithm from the pre-stored encryption hardware logic library includes: Select the target hardware logic that conforms to the encryption standard from the pre-stored encrypted hardware logic library.

2. The field-programmable gate array configuration method as described in claim 1, characterized in that, Before identifying the target cryptographic algorithm of the target blockchain to be interacted with, the method further includes: When the field-programmable gate array (FPGA) is started, it is initialized to a preset general state and equipped with an encryption hardware logic library, wherein the encryption hardware logic library includes hardware logic resources that support several encryption algorithms.

3. The field-programmable gate array configuration method as described in claim 1, characterized in that, After configuring the field-programmable gate array (FPGA) according to the target hardware logic and updating the encryption algorithm associated with the target blockchain in the FPGA, the method further includes: Initialize the state or registers associated with the field-programmable gate array (FPGA) to ensure that the new configuration of the FPGA takes effect correctly.

4. The field-programmable gate array configuration method as described in claim 1, characterized in that, The method further includes: In response to a data request from the target blockchain, the field-programmable gate array (FPGA) is invoked to sign the target data using an elliptic curve cryptography algorithm associated with the target blockchain combined with the Montgomery step algorithm; wherein the target data is the information associated with the data request. The signed target data is uploaded to the target blockchain.

5. The field-programmable gate array configuration method as described in claim 1, characterized in that, The method further includes: Receive data sent by the target blockchain; The field-programmable gate array (FPGA) is invoked to enable it to verify the received data using an elliptic curve cryptography algorithm associated with the target blockchain, combined with the Montgomery step algorithm, to obtain data that has passed the verification.

6. A field-programmable gate array (FPGA) configuration device, characterized in that, include: The encryption algorithm identification module is used to identify the target encryption algorithm of the target blockchain that needs to be interacted with. The hardware logic selection module is used to select the target hardware logic corresponding to the target encryption algorithm from a pre-stored encrypted hardware logic library. A configuration module is used to configure a field-programmable gate array (FPGA) according to the target hardware logic, and update the encryption algorithm associated with the target blockchain in the FPGA, so that the FPGA can perform a signature verification operation associated with the target blockchain through the encryption algorithm associated with the target blockchain; wherein, the encryption algorithm associated with the target blockchain is an elliptic curve cryptography algorithm. The encryption algorithm identification module is specifically used for: The version information of the target blockchain is obtained through a protocol handshake operation with the target blockchain; Based on the correspondence between the version information and the encryption algorithm, the encryption standard adopted by the target blockchain is determined; The hardware logic selection module is specifically used for: Select the target hardware logic that conforms to the encryption standard from the pre-stored encrypted hardware logic library.

7. The field-programmable gate array configuration device as described in claim 6, characterized in that, The device further includes an initialization module, used for: When the field-programmable gate array (FPGA) is started, it is initialized to a preset general state and equipped with an encryption hardware logic library, wherein the encryption hardware logic library includes hardware logic resources that support several encryption algorithms.

8. An edge gateway, characterized in that, include: Field-programmable gate arrays (FPGAs) are used to perform signature verification operations. The CPU general-purpose computing module is used to execute the field-programmable gate array configuration method as described in any one of claims 1 to 5; A network interface is used as the interface for communication between the blockchain edge gateway and the blockchain.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium includes a stored computer program, wherein, when the computer program is executed, it controls the device on which the computer-readable storage medium resides to perform the field-programmable gate array configuration method as described in any one of claims 1 to 5.

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