Data transmission system, method, device and computer-readable storage medium

Abstract

The present application discloses a data transmission system, method, apparatus, and computer-readable storage medium, including: a complex programmable logic device (CPLD) for monitoring the network status between a cloud server and a central processing unit (CPU) in an edge device; when a network module is blocked, sending a first network switching instruction to an improved internal integrated circuit (IC) multiplexer; receiving cached data sent by the CPU via an improved IC bus and sending the instruction to a data cache; when the network is normal, sending a second network switching instruction to the improved IC multiplexer; reading the cached data and uploading it to the cloud server; an improved IC multiplexer for controlling the connection switching between the CPU, the cloud server, and the CPLD; and a data cache for caching the cached data. The present application realizes adaptive perception of edge server resources, has good scalability, and improves data caching efficiency.

Description

Technical Field

[0001] The present application relates to the field of computer application technology, and in particular to a data transmission system, method, device and computer-readable storage medium. Background Art

[0002] Edge devices play a key role in distributed computing. Unlike centralized traditional data centers, edge devices are strategically located closer to data sources or end users. This proximity reduces latency and improves responsiveness. These devices handle tasks such as data caching, content delivery, and real-time analytics at the edge of the network.

[0003] Currently, network edge processing data caching is achieved through microcontroller units (MCUs) that utilize edge devices to cache and control data, resulting in low data caching efficiency.

[0004] In summary, how to effectively solve the current problem of low data caching efficiency in network edge processing is an urgent problem that those skilled in the art need to solve. Summary of the Invention

[0005] The purpose of this application is to provide a data transmission system that realizes adaptive perception of edge server resources, has good scalability, and improves data caching efficiency; another purpose of this application is to provide a data transmission method, device and computer-readable storage medium.

[0006] To solve the above technical problems, this application provides the following technical solutions:

[0007] A data transmission system, comprising:

[0008] A complex programmable logic device is configured to monitor a network status between a cloud server and a central processing unit in an edge device; when determining that the network status is a network module congestion, send a first network switching instruction to an improved internal integrated circuit multiplexer; receive data to be cached sent by the central processing unit via an improved internal integrated circuit bus, and send the data to be cached to a data cache; when detecting that the network status changes from a network module congestion to a network normal, send a second network switching instruction to the improved internal integrated circuit multiplexer; read cached data in the data cache, and upload the cached data to the cloud server via the improved internal integrated circuit bus;

[0009] The improved internal integrated circuit multiplexer is configured to switch the central processing unit from being connected to the cloud server to being connected to the complex programmable logic device according to the first network switching instruction; and to switch the central processing unit from being connected to the complex programmable logic device to being connected to the cloud server according to the second network switching instruction, so that the central processing unit uploads data to the cloud server through the network module;

[0010] The data buffer is used to cache the data to be cached.

[0011] In a specific embodiment of the present application, the data buffer is a flash memory chip set including at least two flash memory chips.

[0012] In a specific embodiment of the present application, the complex programmable logic device is further configured to roll back to a pre-stored verified firmware version when it is determined that an error exists in the current new firmware version.

[0013] In a specific embodiment of the present application, a central processing unit load sensor is further included, which is arranged between the central processing unit and the complex programmable logic device, and the central processing unit load sensor is used to detect the load state of the central processing unit and obtain a load state detection result;

[0014] The complex programmable logic device is further configured to adjust the voltage and clock frequency of the central processing unit according to the load status detection result.

[0015] In a specific embodiment of the present application, the complex programmable logic device is specifically used to control the power supply chip of the central processing unit to shut down when it is determined that the central processing unit is in a sleep state according to the load status detection result.

[0016] In a specific embodiment of the present application, the complex programmable logic device is specifically used to verify the data to be cached, and send the data to be cached to the data buffer when the verification passes.

[0017] In a specific embodiment of the present application, it also includes:

[0018] The cooling device is used to cool the complex programmable logic device when it is sensed that the operating temperature of the complex programmable logic device exceeds a preset value.

[0019] A data transmission method, applied to a complex programmable logic device, comprising:

[0020] Monitor the network status between the cloud server and the central processor in the edge device;

[0021] When it is determined that the network status is that the network module is blocked, sending a first network switching instruction to the improved internal integrated circuit multiplexer, so that the improved internal integrated circuit multiplexer switches the central processing unit from being connected to the cloud server to being connected to the complex programmable logic device;

[0022] receiving data to be cached sent by the central processing unit through the improved inter-integrated circuit bus, and sending the data to be cached to the data buffer, so that the data buffer caches the data to be cached;

[0023] When it is detected that the network status changes from a network module being blocked to a network being normal, a second network switching instruction is sent to the improved internal integrated circuit multiplexer, so that the improved internal integrated circuit multiplexer switches the central processing unit from being connected to the complex programmable logic device to being connected to the cloud server, and enables the central processing unit to upload data to the cloud server through the network module;

[0024] The cached data in the data buffer is read, and the cached data is uploaded to the cloud server via the improved internal integrated circuit bus.

[0025] A data transmission device, applied to a complex programmable logic device, comprising:

[0026] A network status monitoring unit, used to monitor the network status between the cloud server and the central processor in the edge device;

[0027] a first network switching instruction sending unit, configured to, when determining that the network status is that the network module is blocked, send a first network switching instruction to the improved internal integrated circuit multiplexer, so that the improved internal integrated circuit multiplexer switches the central processing unit from being connected to the cloud server to being connected to the complex programmable logic device;

[0028] a cache data sending unit, configured to receive the data to be cached sent by the central processing unit via the improved inter-integrated circuit bus, and send the data to be cached to the data buffer, so that the data buffer caches the data to be cached;

[0029] a second network switching instruction sending unit, configured to, when detecting that the network status changes from a network module blocked state to a network normal state, send a second network switching instruction to the improved internal integrated circuit multiplexer, so as to cause the improved internal integrated circuit multiplexer to switch the central processing unit from being connected to the complex programmable logic device to being connected to the cloud server, and to cause the central processing unit to upload data to the cloud server through the network module;

[0030] A cache data uploading unit is used to read the cache data in the data buffer and upload the cache data to the cloud server through the improved internal integrated circuit bus.

[0031] A computer-readable storage medium stores a computer program, which implements the steps of the data transmission method described above when executed by a processor.

[0032] The data transmission system provided in the present application includes: a complex programmable logic device, which is used to monitor the network status between a cloud server and a central processing unit in an edge device; when it is determined that the network status is a network module congestion, a first network switching instruction is sent to an improved internal integrated circuit multiplexer; data to be cached is received from the central processing unit through an improved internal integrated circuit bus, and the data to be cached is sent to a data cache; when it is monitored that the network status changes from a network module congestion to a network normal, a second network switching instruction is sent to the improved internal integrated circuit multiplexer; cached data in the data cache is read, and the cached data is uploaded to the cloud server through the improved internal integrated circuit bus; the improved internal integrated circuit multiplexer is used to switch the central processing unit from being connected to the cloud server to being connected to the complex programmable logic device according to the first network switching instruction; and the central processing unit is switched from being connected to the complex programmable logic device to being connected to the cloud server according to the second network switching instruction, so that the central processing unit uploads data to the cloud server through the network module; and a data cache is used to cache the data to be cached.

[0033] As can be seen from the above technical solution, by connecting a complex programmable logic device (CPLD) with the central processing unit (CPU), data buffer, and other devices in the edge device, and using an improved internal integrated circuit bus for signal transmission between the CPU and the CPLD, the advantages of the improved internal integrated circuit bus, such as high data transmission rate, low power consumption, and fewer cables, are fully utilized. Using a CPLD to implement data caching at the network edge fully utilizes its advantages, such as its ability to perform multiple logical operations in parallel, support wider data bus widths, and allow precise control of timing logic. This achieves adaptive awareness of edge server resources, improves scalability, and improves data caching efficiency.

[0034] Correspondingly, the present application also provides a data transmission device, equipment and computer-readable storage medium corresponding to the above-mentioned data transmission method, which has the above-mentioned technical effects and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the following briefly introduces the drawings required for use in the embodiments or related technical descriptions. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0036] Figure 1 This is a structural block diagram of a data transmission system in an embodiment of the present application;

[0037] Figure 2 This is a topology diagram of a complex programmable logic device edge cloud synchronization buffer system in an embodiment of the present application;

[0038] Figure 3 This is another topology diagram of the edge cloud synchronization buffer system of a complex programmable logic device in an embodiment of the present application;

[0039] Figure 4 A topological diagram of a complex programmable logic device resource and power management system in an embodiment of the present application;

[0040] Figure 5 This is another topology diagram of a complex programmable logic device edge cloud synchronization buffer system in an embodiment of the present application;

[0041] Figure 6 This is a flowchart of an implementation of the data transmission method in an embodiment of the present application;

[0042] Figure 7 This is a structural block diagram of a data transmission device in an embodiment of the present application.

[0043] The following are marked in the accompanying drawings:

[0044] 1- Complex programmable logic device, 2- Improved inter-integrated circuit multiplexer, 3- Data buffer, 31- Flash memory chip, 4- Central processing unit load sensor, 5- Fan. DETAILED DESCRIPTION

[0045] In order to enable those skilled in the art to better understand the present application, the present application is further described in detail below in conjunction with the accompanying drawings and specific embodiments. Obviously, the embodiments described are only a part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making any creative efforts are within the scope of protection of the present application.

[0046] See also Figure 1 , Figure 1 This is a structural block diagram of a data transmission system in an embodiment of the present application. The system may include:

[0047] A complex programmable logic device 1 is configured to monitor the network status between a cloud server and a central processing unit in an edge device; when determining that the network status is a network module jam, send a first network switching instruction to an improved internal integrated circuit multiplexer 2; receive data to be cached sent by the central processing unit via an improved internal integrated circuit bus, and send the cached data to a data cache 3; when detecting that the network status changes from a network module jam to a network normal, send a second network switching instruction to the improved internal integrated circuit multiplexer 2; read cached data in the data cache 3, and upload the cached data to the cloud server via the improved internal integrated circuit bus;

[0048] The improved internal integrated circuit multiplexer 2 is used to switch the central processing unit from being connected to the cloud server to being connected to the complex programmable logic device 1 according to the first network switching instruction; and to switch the central processing unit from being connected to the complex programmable logic device 1 to being connected to the cloud server according to the second network switching instruction, so that the central processing unit can upload data to the cloud server through the network module;

[0049] The data buffer 3 is used to cache the data to be cached.

[0050] The data transmission system provided in an embodiment of the present application includes a complex programmable logic device (CPLD) 1, an improved inter-integrated circuit multiplexer (I3C MUX) 2, and a data buffer 3. CPLD 1 monitors the network status between a cloud server and a central processing unit (CPU) in an edge device. When the network status is determined to be network congestion, a first network switching instruction is sent to I3C MUX 2. Based on the first network switching instruction, I3C MUX 2 switches the CPU from connecting to the cloud server to connecting to CPLD 1. CPLD 1 controls I3C MUX 2 to receive data to be buffered from the CPU via an improved I3C bus and sends the data to data buffer 3, which then buffers the data to be buffered.

[0051] When CPLD 1 detects a change in network status from a blocked network module to a normal network, it sends a second network switching instruction to the improved inter-IC multiplexer 2, reads the cached data in data buffer 3, and uploads the cached data to the cloud server via the improved inter-IC bus. In response to the second network switching instruction, the improved inter-IC multiplexer 2 switches the central processing unit (CPU) from connecting to CPLD 1 to the cloud server, enabling the CPU to upload data to the cloud server via the network module. This enables the data cached in data buffer 3 and newly generated data by the CPU to be uploaded to the cloud server in parallel.

[0052] Compared to a microcontroller unit, the complex programmable logic device 1 has a basic programmable structure that enables users to quickly program to perform corresponding functions. In addition, the complex programmable logic device 1 can perform multiple logical operations in parallel, significantly improving computing efficiency. The complex programmable logic device 1 can also support a wider data bus width (more than 16 bits) for interfacing with external memories, which makes it very suitable for bus interface and protocol bridging applications. The complex programmable logic device 1 also allows precise control of timing logic, making it more suitable for needs such as servers. The embodiment of the present application improves the efficiency of edge computing devices by dynamically allocating resources using the complex programmable logic device 1, solving the pain points of intermittent connections, disconnections and delays, robust error handling and efficient power management in the edge environment.

[0053] In areas like servers, where data integrity is crucial, additional mechanisms must be implemented at the application level. Improved Inter-IC Multiplexing (I2C), an enhanced version of Inter-Integrated Circuit (I2C), combines the functionality of an I2C, a Serial Peripheral Interface (SPI), and a Universal Asynchronous Receiver / Transmitter (UART), supporting both synchronous and asynchronous communication. It also supports cyclic redundancy checking (CRC) at high rates in specific modes, such as HDR-BT.

[0054] Edge devices act as intermediaries between local devices and cloud servers. To ensure seamless synchronization, an edge-cloud synchronization buffer (i.e., data cache 3) plays a crucial role, temporarily storing data before transmitting it to the cloud. Complex programmable logic devices 1 can also be used to verify the correctness of this data. By aggregating data from multiple terminals and sending it in larger chunks, edge devices reduce communication overhead.

[0055] As can be seen from the above technical solution, by connecting a complex programmable logic device (CPLD) with the central processing unit (CPU), data buffer, and other devices in the edge device, and using an improved internal integrated circuit bus for signal transmission between the CPU and the CPLD, the advantages of the improved internal integrated circuit bus, such as high data transmission rate, low power consumption, and fewer cables, are fully utilized. Using a CPLD to implement data caching at the network edge fully utilizes its advantages, such as its ability to perform multiple logical operations in parallel, support wider data bus widths, and allow precise control of timing logic. This achieves adaptive awareness of edge server resources, improves scalability, and improves data caching efficiency.

[0056] It should be noted that, based on the above embodiment, the present application also provides corresponding improved solutions. In subsequent embodiments, the same steps or corresponding steps as those in the above embodiment can be referenced to each other, and the corresponding beneficial effects can also be referenced to each other, and will not be described in detail in the following improved embodiments.

[0057] In a specific embodiment of the present application, the data buffer 3 is a flash memory chip 31 set including at least two flash memory chips 31 .

[0058] See also Figure 2 , Figure 2 This is a topology diagram of a complex programmable logic device (CPLD) 1 edge-cloud synchronization buffer system in an embodiment of the present application. The data buffer 3 for caching data to be cached can be configured as a flash memory chip 31 set comprising at least two flash memory chips 31. By using the flash memory chips 31 as a high-speed cache for storing frequently accessed data, an efficient synchronization buffer is established, bridging the gap between edge devices and cloud servers and improving data caching efficiency.

[0059] The embodiment of the present application provides an edge computing device architecture including a complex programmable logic device 1. The architecture is heterogeneous multi-core, combining the complex programmable logic device 1 with a system-level chip, a flash memory storage chip 31, etc., using an improved internal integrated circuit bus with cyclic redundancy check, using the complex programmable logic device 1 for real-time control and data management verification, and realizing data caching of the flash memory chip 31 to reduce delays during data transmission. The embodiment of the present application can monitor and control peripheral signals and redundant improved internal integrated circuit buses in a simple, cost-effective manner. Users can easily add additional I / O (Input / Output) to the design, thereby freeing up the GPIO (General Purpose Input / Output) of devices such as the central processing unit for other more important functions.

[0060] In a specific embodiment of the present application, the complex programmable logic device 1 is further configured to roll back to a pre-stored verified firmware version when it is determined that an error exists in the current new firmware version.

[0061] See also Figure 3 , Figure 3 This is another topology diagram of a CPLD 1 edge-cloud synchronization buffer system in an embodiment of the present application. Multiple CPLD 1 firmware versions are pre-stored in the CPLD 1 firmware flash memory storage chip 31 (CPLD Firmware FLASH). The CPLD 1 is also configured to roll back to a pre-stored, verified firmware version when an error is detected in the current new firmware version. By setting a firmware version rollback policy, fault tolerance is achieved for the CPLD 1 firmware version, improving the operational reliability of the CPLD 1.

[0062] In a specific embodiment of the present application, the system may further include a central processing unit load sensor 4 provided between the central processing unit and the complex programmable logic device 1, the central processing unit load sensor 4 being configured to detect the load state of the central processing unit and obtain a load state detection result;

[0063] The complex programmable logic device 1 is further used to adjust the voltage and clock frequency of the central processing unit according to the load status detection result.

[0064] See also Figure 4 , Figure 4 This is a topology diagram of the resource and power management system of the complex programmable logic device 1 in the embodiment of the present application. The data transmission system provided in the embodiment of the present application may also include a central processing unit load sensor 4 (such as a utilization counter) arranged between the central processing unit and the complex programmable logic device 1. The central processing unit load sensor 4 is used to collect real-time data to detect the load status of the central processing unit and obtain a load status detection result. The complex programmable logic device 1 is also used to adjust the voltage and clock frequency of the central processing unit according to the load status detection result. During heavy load periods, the voltage and clock frequency are increased to obtain better performance. During light load periods, the voltage and clock frequency are reduced to save power. During sleep periods, the power supply of the central processing unit-related power supply chip is turned off to reduce power consumption during idle periods and maximize power saving, thereby achieving fine-tuning of performance without affecting efficiency.

[0065] In a specific embodiment of the present application, the complex programmable logic device 1 is specifically used to control the power supply chip of the central processing unit to shut down when it is determined that the central processing unit is in a sleep state according to a load state detection result.

[0066] CPU operating modes include Normal, Idle, and Sleep. In Normal operation, the CPU is fully powered on, fully powered, and receiving active clocks. In Idle mode, even if the CPU and other components are powered, all CPU clocks are stopped, and only peripheral clocks are active. In Sleep mode, power to the CPU and other peripheral components is disabled. Sleep mode disables all functions except the real-time clock, interrupt controller, power manager, and general-purpose I / O.

[0067] Efficient resource and power management is crucial in edge devices. Dynamic Voltage and Frequency Scaling (DVFS) adjusts CPU performance based on workload. Sleep mode reduces power consumption during idle periods. By balancing performance and energy usage, edge devices can maximize their operational lifespan.

[0068] The complex programmable logic device 1 is specifically used to control the power supply chip of the central processing unit to turn off when it is determined that the central processing unit is in a dormant state according to the load state detection result, thereby reducing power consumption during the idle period.

[0069] In a specific embodiment of the present application, the complex programmable logic device 1 is specifically used to verify the data to be cached, and send the data to be cached to the data buffer 3 when the verification passes.

[0070] The complex programmable logic device 1 is specifically used to verify the data to be cached, and when the verification passes, the data to be cached is sent to the data buffer 3. Robust error detection mechanisms, such as cyclic redundancy check (CRC) and parity bit technologies, identify damaged data during transmission. In the embodiment of the present application, the improved internal integrated circuit bus uses HDR-BT HDR Bulk Transport Mode (HDR bulk transmission mode), so that the complex programmable logic device 1 verifies to the central processor whether the transmission cyclic redundancy check value of each information frame is consistent with the cyclic redundancy check value calculated for the received data. The central processor can use the cyclic redundancy check to determine whether it can release the buffer and continue to send information to the complex programmable logic device 1, or whether it must resend the data, which can prevent data corruption and enhance system reliability.

[0071] The complex programmable logic device 1 is specifically configured to obtain the size of data to be cached and the remaining storage space in the data cache 3. When the data size is determined to be greater than the remaining storage space, the data to be deleted is filtered from the data cache 3 and deleted. Specifically, the complex programmable logic device 1 stores the received and verified data in the flash memory chips 31. The number and size of the flash memory chips 31 can be flexibly configured based on actual redundancy requirements and the size of the information to be stored based on network conditions. When the stored file format exceeds the capacity of the flash memory chips 31, the oldest data is replaced with the latest data. By promptly deleting cached data in the data cache 3, the smooth caching of subsequent data is ensured, data loss is avoided, and data reliability is improved. When network congestion occurs, critical data is prioritized. If the number of flash memory chips 31 is limited, less critical data is discarded, or the oldest data is replaced with the latest data. When the network is restored and the old data transmission is completed, the circular buffer is cleared to efficiently manage storage.

[0072] Edge devices must be able to withstand hardware failures without interrupting service. Redundancy and fault tolerance are key. Dual power supplies, mirrored storage, and redundant network paths ensure continuity. If a component fails, the system seamlessly switches to a backup resource. The architecture of this embodiment of the application achieves fault-tolerant hardware recovery through the following design:

[0073] Redundant components (eg, multiple flash memory chips 31) are used to minimize the impact of single points of failure.

[0074] Implement data replication: store data in multiple locations (primary flash memory storage chip 31 and backup flash memory storage chip 31) at the same time.

[0075] like Figure 3 As shown, a watchdog timer is integrated into CPLD 1. If CPLD 1 stops responding (due to a fault), the watchdog timer triggers a reset. In this case, an improved inter-IC multiplexer 2 is permanently switched between the CPU and the network module, ensuring full functionality even in the event of a CPLD 1 freeze.

[0076] Monitor the operational status of the complex programmable logic device 1, flash memory chip 31, and network. Set alerts (e.g., SNMP traps, email notifications) for abnormal conditions. Take proactive measures based on the alerts (e.g., switch to a backup component).

[0077] Maintain multiple firmware versions of the complex programmable logic device 1, such as setting a fixed CPLD FirmwareFLASH and rolling back to a known stable version if a new version causes problems.

[0078] The design allows for seamless failover to the redundant component if one component fails.

[0079] In a specific embodiment of the present application, the system may further include:

[0080] The cooling device is used to cool down the complex programmable logic device 1 when it is sensed that the operating temperature of the complex programmable logic device 1 exceeds a preset value.

[0081] See also Figure 5 , Figure 5 This is another topology diagram of a CPLD 1 edge-cloud synchronization buffer system in an embodiment of the present application. The data transmission system provided in this embodiment of the present application may also include a cooling device, such as a fan 5 connected to the CPLD 1. When the cooling device senses that the operating temperature of the CPLD 1 exceeds a preset value, it cools the CPLD 1, achieving thermal management optimization through the intelligent cooling device.

[0082] By selecting a suitable CPLD 1 with sufficient I / O pins and logic resources and using a hardware description language (HDL) such as VHDL (Very High Speed ​​Integrated Circuit Hardware Description Language) or Verilog to develop the CPLD 1 logic, it can play the following roles:

[0083] Acts as a central controller, managing the data flow between edge devices and cloud servers.

[0084] Implement a cyclic redundancy check or other error checking mechanism.

[0085] Optimize power usage and resource allocation based on server computing tasks.

[0086] When the complex programmable logic device 1 detects that the network is stuck for a long time, only critical data is written to the flash memory storage chip 31, and the power supply of the central processing unit is reduced according to the strategy.

[0087] The above system architecture minimizes edge server latency while achieving a good balance between performance and energy efficiency, making it suitable for common edge device application scenarios. By connecting a complex programmable logic device (CPLD) 1 with modules such as a central processing unit (CPU), flash memory chip 31, and power supply, and using an improved internal integrated circuit bus (ICB) or universal asynchronous receiver / transmitter (UART) bus for signal transmission, CPLD 1 is used to implement fine-grained resource allocation. A predictive prefetch transmission scheme reduces data retrieval latency, improves fault-tolerant recovery mechanisms, and enhances system reliability. This solution significantly addresses the needs of edge devices for resource-aware adaptation, predictive strategies, robust error handling, and efficient power management. It also minimizes the increase in the BOM (Bill of Materials) and offers excellent scalability, making it ideal for edge computing applications.

[0088] Corresponding to the above system embodiment, the present application also provides a data transmission method, which is applied to a complex programmable logic device. The data transmission method described below and the data transmission system described above can be referenced to each other.

[0089] See also Figure 6 , Figure 6 This is a flowchart of an implementation of a data transmission method in an embodiment of the present application. The method may include the following steps:

[0090] S601: Monitor the network status between the cloud server and the central processor in the edge device.

[0091] S602: When it is determined that the network status is that the network module is blocked, a first network switching instruction is sent to the improved internal integrated circuit multiplexer, so that the improved internal integrated circuit multiplexer switches the central processing unit from being connected to the cloud server to being connected to the complex programmable logic device.

[0092] S603: Receive the data to be cached sent by the central processing unit through the improved inter-integrated circuit bus, and send the data to be cached to the data cache, so that the data cache caches the data to be cached.

[0093] S604: When it is monitored that the network status changes from network module congestion to network normal, a second network switching instruction is sent to the improved internal integrated circuit multiplexer, so that the improved internal integrated circuit multiplexer switches the central processing unit from being connected to the complex programmable logic device to being connected to the cloud server, and enables the central processing unit to upload data to the cloud server through the network module.

[0094] S605: Read the cached data in the data buffer, and upload the cached data to the cloud server via the improved internal integrated circuit bus.

[0095] As can be seen from the above technical solution, by connecting a complex programmable logic device (CPLD) with the central processing unit (CPU), data buffer, and other devices in the edge device, and using an improved internal integrated circuit bus for signal transmission between the CPU and the CPLD, the advantages of the improved internal integrated circuit bus, such as high data transmission rate, low power consumption, and fewer cables, are fully utilized. Using a CPLD to implement data caching at the network edge fully utilizes its advantages, such as its ability to perform multiple logical operations in parallel, support wider data bus widths, and allow precise control of timing logic. This achieves adaptive awareness of edge server resources, improves scalability, and improves data caching efficiency.

[0096] In a specific embodiment of the present application, receiving data to be cached sent by a central processing unit via an improved inter-integrated circuit bus, and sending the data to be cached to a data buffer so that the data buffer caches the data to be cached, includes:

[0097] receiving data to be cached sent by a central processing unit through an improved internal integrated circuit bus, and sending the data to be cached to a flash memory storage chip set comprising at least two flash memory chips, so that the flash memory storage chip set caches the data to be cached;

[0098] Accordingly, the cached data in the data buffer is read, including:

[0099] Read cached data in the flash memory chipset.

[0100] In a specific embodiment of the present application, the method may further include the following steps:

[0101] When it is determined that the current new firmware version has errors, roll back to the pre-existing verified firmware version.

[0102] In a specific embodiment of the present application, the method may further include the following steps:

[0103] The CPU load sensor is used to detect the load state of the CPU to obtain a load state detection result; wherein the CPU load sensor is arranged between the CPU and the complex programmable logic device;

[0104] The voltage and clock frequency of the central processing unit are adjusted according to the load status detection result.

[0105] In a specific embodiment of the present application, the method may further include the following steps:

[0106] When it is determined according to the load state detection result that the central processing unit is in the dormant state, the power supply chip for controlling the central processing unit is turned off.

[0107] In a specific embodiment of the present application, sending the data to be cached to the data cache may include the following steps:

[0108] The data to be cached is verified, and when the verification passes, the data to be cached is sent to the data buffer.

[0109] In a specific embodiment of the present application, the method may further include the following steps:

[0110] The cooling device is used to cool down the complex programmable logic device when it is sensed that the operating temperature of the complex programmable logic device exceeds a preset value.

[0111] Corresponding to the above system embodiment, the present application also provides a data transmission device, which is applied to a complex programmable logic device. The data transmission device described below and the data transmission system described above can be referenced to each other.

[0112] See also Figure 7 , Figure 7 This is a structural block diagram of a data transmission device in an embodiment of the present application. The device may include:

[0113] A network status monitoring unit 71 is used to monitor the network status between the cloud server and the central processor in the edge device;

[0114] a first network switching instruction sending unit 72 for sending a first network switching instruction to the improved internal integrated circuit multiplexer when determining that the network status is that the network module is blocked, so as to cause the improved internal integrated circuit multiplexer to switch the central processing unit from being connected to the cloud server to being connected to the complex programmable logic device;

[0115] The cache data sending unit 73 is used to receive the data to be cached sent by the central processing unit through the improved internal integrated circuit bus, and send the data to be cached to the data buffer so that the data buffer caches the data to be cached;

[0116] a second network switching instruction sending unit 74 for sending a second network switching instruction to the improved internal integrated circuit multiplexer when detecting that the network status has changed from a network module blocked state to a network normal state, so as to cause the improved internal integrated circuit multiplexer to switch the central processing unit from being connected to the complex programmable logic device to being connected to the cloud server, and to cause the central processing unit to upload data to the cloud server through the network module;

[0117] The cache data uploading unit 75 is used to read the cache data in the data buffer and upload the cache data to the cloud server through the improved internal integrated circuit bus.

[0118] As can be seen from the above technical solution, by connecting a complex programmable logic device (CPLD) with the central processing unit (CPU), data buffer, and other devices in the edge device, and using an improved internal integrated circuit bus for signal transmission between the CPU and the CPLD, the advantages of the improved internal integrated circuit bus, such as high data transmission rate, low power consumption, and fewer cables, are fully utilized. Using a CPLD to implement data caching at the network edge fully utilizes its advantages, such as its ability to perform multiple logical operations in parallel, support wider data bus widths, and allow precise control of timing logic. This achieves adaptive awareness of edge server resources, improves scalability, and improves data caching efficiency.

[0119] In a specific embodiment of the present application, the cache data sending unit is specifically a unit that receives the data to be cached sent by the central processing unit through the improved internal integrated circuit bus, and sends the data to be cached to a flash memory storage chip set including at least two flash memory storage chips, so that the flash memory storage chip set caches the data to be cached;

[0120] The cache data uploading unit is specifically a unit for reading cache data in the flash memory storage chip set.

[0121] In a specific embodiment of the present application, the device may further include:

[0122] The firmware version rollback unit is used to roll back to a pre-stored verified firmware version when it is determined that the current new firmware version has an error.

[0123] In a specific embodiment of the present application, the device may further include:

[0124] A load state detection unit is used to detect the load state of the central processing unit using a central processing unit load sensor to obtain a load state detection result; wherein the central processing unit load sensor is arranged between the central processing unit and the complex programmable logic device;

[0125] The voltage and frequency adjustment unit is used to adjust the voltage and clock frequency of the central processing unit according to the load status detection result.

[0126] In a specific embodiment of the present application, the device may further include:

[0127] The power supply chip control unit is used to control the power supply chip of the central processing unit to shut down when it is determined that the central processing unit is in a dormant state according to the load state detection result.

[0128] In a specific embodiment of the present application, the cache data sending unit is specifically a unit that verifies the data to be cached and sends the data to be cached to the data buffer when the verification passes.

[0129] In a specific embodiment of the present application, the device may further include:

[0130] The cooling unit is used to cool the complex programmable logic device using a cooling device when it is sensed that the operating temperature of the complex programmable logic device exceeds a preset value.

[0131] Corresponding to the above method embodiment, the present application further provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the following steps can be implemented:

[0132] Monitor the network status between the cloud server and the central processing unit in the edge device; when it is determined that the network status is that the network module is blocked, send a first network switching instruction to the improved internal integrated circuit multiplexer, so that the improved internal integrated circuit multiplexer switches the central processing unit from being connected to the cloud server to being connected to the complex programmable logic device; receive the to-be-buffered data sent by the central processing unit through the improved internal integrated circuit bus, and send the to-be-buffered data to the data buffer, so that the data buffer caches the to-be-buffered data; when it is monitored that the network status changes from being blocked to being normal, send a second network switching instruction to the improved internal integrated circuit multiplexer, so that the improved internal integrated circuit multiplexer switches the central processing unit from being connected to the complex programmable logic device to being connected to the cloud server, and enables the central processing unit to upload data to the cloud server through the network module; read the cached data in the data buffer, and upload the cached data to the cloud server through the improved internal integrated circuit bus.

[0133] The computer-readable storage medium may include: a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, etc., which can store program codes.

[0134] For an introduction to the computer-readable storage medium provided in this application, please refer to the above method embodiment, and this application will not go into details here.

[0135] Corresponding to the above method embodiments, the present application also provides a computer program product, including a computer program, which implements the steps of the above data transmission method when executed by a processor.

[0136] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from the other embodiments. References to the same or similar parts between the various embodiments are sufficient. The devices, apparatuses, and computer-readable storage media disclosed in the embodiments are described briefly because they correspond to the methods disclosed in the embodiments. For relevant details, refer to the description of the methods.

[0137] Specific examples are used herein to illustrate the principles and implementation methods of this application. The description of the above embodiments is only intended to help understand the technical solution and core ideas of this application. It should be noted that, for those skilled in the art, without departing from the principles of this application, various improvements and modifications may be made to this application, and such improvements and modifications also fall within the scope of protection of this application.

Claims

1. A data transmission system, characterized in that: include: Complex programmable logic devices for monitoring network status between cloud servers and central processors in edge devices; When it is determined that the network status is that the network module is blocked, a first network switching instruction is sent to the improved internal integrated circuit multiplexer; data to be cached is received from the central processing unit via the improved internal integrated circuit bus, and the data to be cached is sent to the data cache; when it is detected that the network status changes from network module blocking to network normal, a second network switching instruction is sent to the improved internal integrated circuit multiplexer; cached data in the data cache is read, and the cached data is uploaded to the cloud server via the improved internal integrated circuit bus; The improved internal integrated circuit multiplexer is configured to switch the central processing unit from being connected to the cloud server to being connected to the complex programmable logic device according to the first network switching instruction; and to switch the central processing unit from being connected to the complex programmable logic device to being connected to the cloud server according to the second network switching instruction, so that the central processing unit uploads data to the cloud server through the network module; The data buffer is used to cache the data to be cached.

2. The data transmission system according to claim 1, characterized in that The data buffer is a flash memory chip set including at least two flash memory chips.

3. The data transmission system according to claim 1, wherein: The complex programmable logic device is further configured to roll back to a pre-stored verified firmware version when it is determined that the current new firmware version has an error.

4. The data transmission system according to claim 1, wherein: Also included is a central processing unit load sensor disposed between the central processing unit and the complex programmable logic device, the central processing unit load sensor being used to detect a load state of the central processing unit and obtain a load state detection result; The complex programmable logic device is further configured to adjust the voltage and clock frequency of the central processing unit according to the load status detection result.

5. The data transmission system according to claim 4, characterized in that The complex programmable logic device is specifically used to control the power supply chip of the central processing unit to shut down when it is determined that the central processing unit is in a dormant state according to the load state detection result.

6. The data transmission system according to claim 1, characterized in that The complex programmable logic device is specifically used to verify the data to be cached, and when the verification passes, the data to be cached is sent to the data buffer.

7. The data transmission system according to claim 1, wherein: Also includes: The cooling device is used to cool the complex programmable logic device when it is sensed that the operating temperature of the complex programmable logic device exceeds a preset value.

8. A data transmission method, characterized in that: Applications in complex programmable logic devices, including: Monitor the network status between the cloud server and the central processor in the edge device; When it is determined that the network status is that the network module is blocked, sending a first network switching instruction to the improved internal integrated circuit multiplexer, so that the improved internal integrated circuit multiplexer switches the central processing unit from being connected to the cloud server to being connected to the complex programmable logic device; receiving data to be cached sent by the central processing unit through the improved inter-integrated circuit bus, and sending the data to be cached to the data buffer, so that the data buffer caches the data to be cached; When it is detected that the network status changes from a network module being blocked to a network being normal, a second network switching instruction is sent to the improved internal integrated circuit multiplexer, so that the improved internal integrated circuit multiplexer switches the central processing unit from being connected to the complex programmable logic device to being connected to the cloud server, and enables the central processing unit to upload data to the cloud server through the network module; The cached data in the data buffer is read, and the cached data is uploaded to the cloud server via the improved internal integrated circuit bus.

9. A data transmission device, characterized in that: Applications in complex programmable logic devices, including: A network status monitoring unit, used to monitor the network status between the cloud server and the central processor in the edge device; a first network switching instruction sending unit, configured to, when determining that the network status is that the network module is blocked, send a first network switching instruction to the improved internal integrated circuit multiplexer, so that the improved internal integrated circuit multiplexer switches the central processing unit from being connected to the cloud server to being connected to the complex programmable logic device; a cache data sending unit, configured to receive the data to be cached sent by the central processing unit via the improved inter-integrated circuit bus, and send the data to be cached to the data buffer, so that the data buffer caches the data to be cached; a second network switching instruction sending unit, configured to, when detecting that the network status changes from a network module blocked state to a network normal state, send a second network switching instruction to the improved internal integrated circuit multiplexer, so as to cause the improved internal integrated circuit multiplexer to switch the central processing unit from being connected to the complex programmable logic device to being connected to the cloud server, and to cause the central processing unit to upload data to the cloud server through the network module; A cache data uploading unit is used to read the cache data in the data buffer and upload the cache data to the cloud server through the improved internal integrated circuit bus.

10. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, which, when executed by a processor, implements the steps of the data transmission method according to claim 8.

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