A solar cell and a method for manufacturing the same

Abstract

The present invention discloses a solar cell and a manufacturing method thereof, which relates to the field of photovoltaic technology, and is used to enhance the diffusion barrier effect of dopants in a first doped semiconductor layer through a dense tunneling oxide layer, and reduce the depth of a diffuse doped layer formed in a corresponding region of a semiconductor substrate. The solar cell comprises a semiconductor substrate, a first tunneling oxide layer and a first doped semiconductor layer. The semiconductor substrate has a first surface and a second surface relative to each other, one of which is a light-facing surface and the other is a backlight surface. The first tunneling oxide layer and the first doped semiconductor layer are stacked on at least a portion of the area of ​​the first surface and / or the second surface. The corrosion rate of the first tunneling oxide layer along its own thickness direction in an etching solution is greater than or equal to 0.02 nm / s and less than or equal to 0.05 nm / s. The etching solution is a hydrofluoric acid solution, and the volume ratio of H2O to HF in the hydrofluoric acid solution is 240 L:1.5 L, and the etching temperature is 60°C.

Description

Technical Field

[0001] The present invention relates to the field of photovoltaic technology, and in particular to a solar cell and a manufacturing method thereof. Background Art

[0002] A solar cell is a device that can convert sunlight into electrical energy. Specifically, when a solar cell is in operation, sunlight shines on the semiconductor pn junction of the solar cell, forming new hole-electron pairs. Under the action of the built-in electric field of the pn junction, photogenerated holes flow to the p region and photogenerated electrons flow to the n region. When the circuit is connected, current can be generated. With the growing global demand for renewable energy, solar cells have received widespread attention as an efficient and clean way of energy conversion. Tunneling oxide passivation contact technology, as a new type of solar cell technology, has become a hot topic of current research due to its high efficiency, low cost and easy large-scale production. This technology effectively reduces interface recombination losses, improves the open circuit voltage and fill factor of the battery, and thus improves the photoelectric conversion efficiency of the battery by introducing an ultra-thin tunneling oxide layer and a doped semiconductor layer into the battery.

[0003] However, the tunnel oxide layer in the existing tunnel oxide passivation contact solar cell has a weak diffusion barrier effect on the dopant in the doped semiconductor layer located on the side of the tunnel oxide passivation contact solar cell away from the semiconductor substrate, which is not conducive to improving the conversion efficiency of the solar cell. Summary of the invention

[0004] The object of the present invention is to provide a solar cell and a method for manufacturing the same, which is used to enhance the diffusion barrier effect on dopants through a dense tunneling oxide layer, thereby facilitating reducing the depth of the diffused doping layer formed in the region of the first tunneling oxide layer and the first doped semiconductor layer stacked in the semiconductor substrate, thereby improving the conversion efficiency of the solar cell.

[0005] In order to achieve the above-mentioned purpose, in the first aspect, the present invention provides a solar cell, which comprises: a semiconductor substrate, a first tunneling oxide layer and a first doped semiconductor layer. The semiconductor substrate has a first surface and a second surface opposite to each other. Among the first surface and the second surface, one surface is a light-facing surface, and the other surface is a backlight surface. The first tunneling oxide layer and the first doped semiconductor layer are stacked on at least a portion of the area of ​​the first surface and / or the second surface. The corrosion rate of the first tunneling oxide layer along its own thickness direction in the etching solution is greater than or equal to 0.02nm / s and less than or equal to 0.05nm / s. The etching solution is a hydrofluoric acid solution, and the volume ratio between H2O and HF in the hydrofluoric acid solution is 240L:1.5L, and the etching temperature is 60°C.

[0006] In the case of adopting the above technical solution, the passivation contact structure composed of the stacked first tunneling oxide layer and the first doped semiconductor layer has an excellent interface passivation effect, and can realize the selective collection of carriers, reduce the carrier recombination rate at the region where the semiconductor substrate is formed with the passivation contact structure, and is conducive to improving the conversion efficiency of the solar cell. Secondly, compared with the corrosion rate of the tunneling oxide layer in the above-mentioned etching solution along its own thickness direction in the existing solar cell (at least greater than 0.05nm / s), when the corrosion rate of the first tunneling oxide layer in the etching solution along its own thickness direction in the solar cell provided by the present invention is set within the above-mentioned range, the corrosion rate of the first tunneling oxide layer in the etching solution along its own thickness direction is small, that is, the first tunneling oxide layer has higher corrosion resistance. Within a certain range, the corrosion resistance of the first tunneling oxide layer is proportional to the density of its own film layer, so when the first tunneling oxide layer has higher corrosion resistance, the first tunneling oxide layer has higher film density. At the same time, the first tunnel oxide layer with higher film density also has a stronger diffusion barrier effect on dopants, which is conducive to retaining more dopants in the first doped semiconductor layer under a stronger barrier effect, rather than more dopants diffusing through the first tunnel oxide layer to the corresponding stacked first tunnel oxide layer and first doped semiconductor layer in the conductor substrate, thereby helping to reduce the depth of the diffused doped layer formed in the corresponding stacked first tunnel oxide layer and first doped semiconductor layer in the semiconductor substrate, and facilitating the formation of a high-low junction or PN junction with a larger built-in electric field strength between the first doped semiconductor layer and the semiconductor substrate, thereby improving the conversion efficiency of the solar cell.

[0007] As a possible implementation scheme, the solar cell further includes a diffusion doping layer, which is arranged in the region corresponding to the semiconductor substrate and the first tunneling oxide layer and the first doped semiconductor layer arranged in a stacked manner, and the dopant in the diffusion doping layer includes the dopant in the first doped semiconductor layer. Wherein, when the conductivity type of the first doped semiconductor layer is P-type, the ratio between the maximum depth of the diffusion doping layer and the thickness of the first doped semiconductor layer along the thickness direction of the semiconductor substrate is less than 40%; or, when the conductivity type of the first doped semiconductor layer is N-type, the ratio between the maximum depth of the diffusion doping layer and the thickness of the first doped semiconductor layer along the thickness direction of the semiconductor substrate is less than 30%. In this case, the maximum depth of the diffusion doping layer in the semiconductor substrate is small, and at this time, the dose of the dopant in the first doped semiconductor layer diffused into the semiconductor substrate through the first tunneling oxide layer is small, which is conducive to making the first doped semiconductor layer have a higher field passivation effect on the semiconductor substrate, improving the carrier collection efficiency, and further improving the conversion efficiency of the solar cell.

[0008] As a possible implementation scheme, the thickness of the first doped semiconductor layer is greater than or equal to 150nm and less than or equal to 380nm. In this case, because the maximum depth of the diffusion doped layer and the thickness of the first doped semiconductor layer satisfy the proportional relationship described above, when the thickness of the first doped semiconductor layer is within the above range, the maximum depth of the diffusion doped layer can be obtained by calculation. At this time, the maximum depth of the diffusion doped layer in the semiconductor substrate is small, which is conducive to forming a high-low junction or PN junction with a large built-in electric field strength between the first doped semiconductor layer and the semiconductor substrate, thereby improving the conversion efficiency of the solar cell.

[0009] As a possible implementation scheme, when the conductivity type of the first doped semiconductor layer is P-type, the maximum depth of the diffuse doped layer along the thickness direction of the semiconductor substrate is less than 150nm; or, when the conductivity type of the first doped semiconductor layer is N-type, the maximum depth of the diffuse doped layer along the thickness direction of the semiconductor substrate is less than 100nm. In this case, the maximum depth of the diffuse doped layer in the semiconductor substrate is small, which is conducive to forming a high-low junction or PN junction with a large built-in electric field strength between the first doped semiconductor layer and the semiconductor substrate, thereby improving the conversion efficiency of the solar cell.

[0010] As a possible implementation scheme, the solar cell further includes a diffusion doping layer, which is arranged in the region corresponding to the semiconductor substrate and the first tunneling oxide layer and the first doped semiconductor layer which are stacked, and the dopant in the diffusion doping layer includes the dopant in the first doped semiconductor layer. Along the thickness direction of the semiconductor substrate, the ratio between the maximum depth of the diffusion doping layer and the thickness of the semiconductor substrate is less than 0.1%. In this case, the maximum depth of the diffusion doping layer in the semiconductor substrate is appropriately reduced, and at this time, the dose of the dopant in the first doped semiconductor layer diffused into the semiconductor substrate through the first tunneling oxide layer is appropriately reduced, which is conducive to making the first doped semiconductor layer have a higher field passivation effect on the semiconductor substrate, improving the carrier collection efficiency, and further improving the conversion efficiency of the solar cell.

[0011] As a possible implementation solution, the reflectivity of the first tunneling oxide layer is greater than or equal to 3% and less than or equal to 5%.

[0012] In the case of adopting the above technical solution, the reflectivity of the first tunneling oxide layer is also related to its own film density. Within a certain range, the greater the reflectivity of the first tunneling oxide layer, the higher the film density. Moreover, within a certain range, and when other factors are the same, the first tunneling oxide layer with a higher film density also has a certain hindering effect on the penetration and movement of carriers within itself. In the above case, when the reflectivity of the first tunneling oxide layer is within the above range, it is beneficial to prevent the first tunneling oxide layer from having a smaller film density due to the smaller reflectivity, so that the first tunneling oxide layer has a higher diffusion barrier effect on dopants. In addition, it is also beneficial to prevent the first tunneling oxide layer from having an excessively large film density due to the larger reflectivity, so that the first tunneling oxide layer has good carrier selective penetration and directional movement effects, that is, it has a relatively low tunneling resistance, ensuring that the solar cell has a higher conversion efficiency. In addition, when the solar cell provided by the present invention is a back-contact cell, the first tunnel oxide layer is located on the back of the cell, and the reflectivity of the first tunnel oxide layer is within the above range, which also makes it have a higher reflective effect on the light refracted from the semiconductor substrate, which is conducive to making more light return to the semiconductor substrate under the reflection of the first tunnel oxide layer, and further improve the conversion efficiency of the solar cell. That is, when the solar cell provided by the embodiment of the present invention is a back-contact cell, the reflectivity of the first tunnel oxide layer within the above range can take into account the following three: a higher diffusion barrier effect on dopants, good selective transmission and directional migration effect on carriers, and better reflection effect on the light refracted from the semiconductor substrate.

[0013] As a possible implementation scheme, the solar cell also includes a second tunneling oxide layer and a second doped semiconductor layer arranged in stacked layers, the second doped semiconductor layer and the first doped semiconductor layer have opposite conductivity types, and the second tunneling oxide layer and the second doped semiconductor layer arranged in stacked layers and the first tunneling oxide layer and the first doped semiconductor layer arranged in stacked layers are alternately distributed on the first surface.

[0014] As a possible implementation scheme, the conductivity type of the first doped semiconductor layer is P type, and the conductivity type of the second doped semiconductor layer is N type; the corrosion rate of the first tunneling oxide layer along its own thickness direction in the etching solution is a first corrosion rate, and the corrosion rate of the second tunneling oxide layer along its own thickness direction in the etching solution is a second corrosion rate, and the first corrosion rate is less than the second corrosion rate.

[0015] As a possible implementation scheme, the ratio of the second corrosion rate to the first corrosion rate is greater than or equal to 1.1; and / or the difference between the second corrosion rate and the first corrosion rate is greater than or equal to 0.001 nm / s.

[0016] When the above technical solution is adopted, the second tunneling oxide layer can be prevented from having a higher manufacturing temperature corresponding to the second tunneling oxide layer due to the difference and / or ratio between the corrosion rates of the first tunneling oxide layer and the second tunneling oxide layer in the etching solution along the thickness direction thereof being small, so that the second tunneling oxide layer also has a higher film density, and it can be avoided that when manufacturing the second tunneling oxide layer, in order to obtain a higher film density, more dopants in the first doped semiconductor layer pass through the first tunneling oxide layer and enter the semiconductor substrate, which is beneficial to controlling the maximum depth of the diffused doping layer formed in the semiconductor substrate, balancing the diffusion depths of the P region and the N region, and further improving the conversion efficiency of the solar cell.

[0017] As a possible implementation scheme, the solar cell also includes a second tunneling oxide layer and a second doped semiconductor layer arranged in stacked form, the second doped semiconductor layer and the first doped semiconductor layer have opposite conductivity types, and one of the stacked second tunneling oxide layer and the second doped semiconductor layer and the stacked first tunneling oxide layer and the first doped semiconductor layer is distributed on at least a portion of the first surface, and the other is distributed on at least a portion of the second surface; wherein, among the first tunneling oxide layer and the second tunneling oxide layer, the corrosion rate corresponding to the one arranged on the backlight surface is smaller than the corrosion rate corresponding to the one arranged on the light-facing surface.

[0018] As a possible implementation scheme, the thickness of the first tunnel oxide layer is less than or equal to 2 nm. In this case, the thickness of the first tunnel oxide layer is relatively small, which is conducive to making the first tunnel oxide layer have a lower tunnel resistance, ensuring that the first doped semiconductor layer has a higher carrier collection efficiency, and further improving the conversion efficiency of the solar cell.

[0019] In a second aspect, the present invention provides a method for manufacturing a solar cell, the method comprising: first, providing a semiconductor substrate; the semiconductor substrate has a first surface and a second surface opposite to each other; of the first surface and the second surface, one surface is a light-facing surface, and the other surface is a backlight surface. Next, a first tunneling oxide layer and a first doped semiconductor layer are stacked on at least a portion of the first surface and / or the second surface. The corrosion rate of the first tunneling oxide layer along its own thickness direction in the etching solution is greater than or equal to 0.02nm / s and less than or equal to 0.05nm / s. The etching solution is a hydrofluoric acid solution, and the ratio of H2O to HF in the hydrofluoric acid solution is 240L:1.5L, and the etching temperature is 60°C.

[0020] The beneficial effects of the second aspect of the present invention and its various implementations can be analyzed by referring to the beneficial effects of the first aspect and its various implementations, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0022] Figure 1 A schematic longitudinal cross-sectional view of the structure of a solar cell provided in an embodiment of the present invention Figure 1 ;

[0023] Figure 2 A schematic longitudinal cross-sectional view of the structure of a solar cell provided in an embodiment of the present invention Figure 2 ;

[0024] Figure 3 A schematic longitudinal cross-sectional view of the structure of a solar cell provided in an embodiment of the present invention Figure 3 ;

[0025] Figure 4 A schematic longitudinal cross-sectional view of the structure of a solar cell provided in an embodiment of the present invention Figure 4 ;

[0026] Figure 5 A schematic longitudinal cross-sectional view of the structure of a solar cell provided in an embodiment of the present invention Figure 5 ;

[0027] Figure 6 A schematic longitudinal cross-sectional view of the structure of a solar cell provided in an embodiment of the present invention Figure 6 ;

[0028] Figure 7 A schematic longitudinal cross-sectional view of the structure of a solar cell provided in an embodiment of the present invention Figure 7 ;

[0029] Figure 8 A schematic longitudinal cross-sectional view of the structure of a solar cell provided in an embodiment of the present invention Figure 8 ;

[0030] Fig. 9 A schematic longitudinal cross-sectional view of the structure of a solar cell provided in an embodiment of the present invention Figure 9 ;

[0031] Fig.10 A schematic longitudinal cross-sectional view of the structure of a solar cell provided in an embodiment of the present invention Figure 10 ;

[0032] Fig.11 A schematic longitudinal cross-sectional view of the structure of a solar cell provided in an embodiment of the present invention Figure 10 one;

[0033] Fig.12 A schematic longitudinal cross-sectional view of the structure of a solar cell provided in an embodiment of the present invention Figure 10 two.

[0034] Figure numerals: 11 is a semiconductor substrate, 12 is a first surface, 13 is a second surface, 14 is a first tunneling oxide layer, 15 is a first doped semiconductor layer, 16 is a diffused doped layer, 17 is a second tunneling oxide layer, and 18 is a second doped semiconductor layer. DETAILED DESCRIPTION

[0035] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the present invention. In addition, in the following description, descriptions of known structures and technologies are omitted to avoid unnecessary confusion of the concept of the present invention.

[0036] Various structural schematic diagrams according to embodiments of the present invention are shown in the accompanying drawings. These figures are not drawn to scale, and some details are magnified and some details may be omitted for a clearer expression. The shapes of various regions and layers shown in the figures and the relative sizes and positional relationships therebetween are only exemplary, and may deviate in practice due to manufacturing tolerances or technical limitations, and those skilled in the art may additionally design regions / layers with different shapes, sizes, and relative positions according to actual needs.

[0037] In the context of the present invention, when a layer / element is referred to as being "on" another layer / element, the layer / element may be directly on the other layer / element, or there may be an intermediate layer / element between them. In addition, if a layer / element is "on" another layer / element in one orientation, then when the orientation is reversed, the layer / element may be "under" the other layer / element. In order to make the technical problems, technical solutions and beneficial effects to be solved by the present invention clearer, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0038] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "multiple" is two or more, unless otherwise clearly and specifically defined. The meaning of "several" is one or more, unless otherwise clearly and specifically defined.

[0039] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0040] A solar cell is a device that can convert sunlight into electrical energy. Specifically, when a solar cell is in operation, sunlight shines on the semiconductor pn junction of the solar cell, forming new hole-electron pairs. Under the action of the built-in electric field of the pn junction, photogenerated holes flow to the p region and photogenerated electrons flow to the n region. When the circuit is connected, current can be generated. With the growing global demand for renewable energy, solar cells have received widespread attention as an efficient and clean way of energy conversion. Tunneling oxide passivation contact technology, as a new type of solar cell technology, has become a hot topic of current research due to its high efficiency, low cost and easy large-scale production. This technology effectively reduces interface recombination losses, improves the open circuit voltage and fill factor of the cell, and thus improves the photoelectric conversion efficiency of the cell by introducing an ultra-thin tunneling oxide layer and a polysilicon layer on the back or front of the cell.

[0041] However, in the existing tunnel oxide passivation contact solar cell, the tunnel oxide layer has a weak diffusion barrier effect on the dopant in the doped semiconductor layer located on the side away from the semiconductor substrate, resulting in a large diffusion depth of the dopant penetrating the tunnel oxide layer to the corresponding area of ​​the semiconductor substrate, which is not conducive to the formation of a high-efficiency PN junction (and / or high-low junction) in the battery, resulting in a low conversion efficiency of the battery. In response to this technical problem, those skilled in the art have optimized it by increasing the thickness of the tunnel oxide layer. It can be understood that the greater the thickness of the tunnel oxide layer, the stronger its own barrier effect on the dopant, and it is easy to control the distribution of the dopant in the depth direction of the battery, which is conducive to the formation of the PN junction (and / or high-low junction). At the same time, the greater the thickness of the tunnel oxide layer, the greater its own tunnel resistance will be, which will significantly reduce the carrier selective penetration and directional movement effect, which is not conducive to improving the resistance and overall contact effect of the solar cell. In addition, the increase in the thickness of the tunnel oxide layer has no significant improvement effect on carrier recombination, resulting in the conversion efficiency of the solar cell is still poor.

[0042] In order to solve the above technical problems, in a first aspect, an embodiment of the present invention provides a solar cell. Figures 1 to 4As shown, the solar cell includes: a semiconductor substrate 11, a first tunneling oxide layer 14 and a first doped semiconductor layer 15. The semiconductor substrate 11 has a first surface 12 and a second surface 13 opposite to each other. Among the first surface 12 and the second surface 13, one surface is a light-facing surface, and the other surface is a backlight surface. The first tunneling oxide layer 14 and the first doped semiconductor layer 15 are stacked on at least a portion of the area of ​​the first surface 12 and / or the second surface 13. The corrosion rate of the first tunneling oxide layer 14 along its own thickness direction in the etching solution is greater than or equal to 0.02nm / s and less than or equal to 0.05nm / s. The etching solution is a hydrofluoric acid solution, and the volume ratio between H2O and HF in the hydrofluoric acid solution is 240L:1.5L, and the etching temperature is 60°C.

[0043] It should be noted that the solar cell provided in the embodiment of the present invention may be a double-sided contact cell or a back-contact cell.

[0044] In the case of adopting the above technical solution, the passivation contact structure composed of the stacked first tunneling oxide layer and the first doped semiconductor layer has an excellent interface passivation effect, and can realize the selective collection of carriers, reduce the carrier recombination rate at the region where the semiconductor substrate is formed with the passivation contact structure, and is conducive to improving the conversion efficiency of the solar cell. Secondly, compared with the corrosion rate of the tunneling oxide layer in the above etching solution along its own thickness direction in the existing solar cell (at least greater than 0.05nm / s), when the corrosion rate of the first tunneling oxide layer in the solar cell provided by the embodiment of the present invention along its own thickness direction in the etching solution is set within the above range, the corrosion rate of the first tunneling oxide layer in the etching solution along its own thickness direction is small, that is, the first tunneling oxide layer has higher corrosion resistance. Within a certain range, the corrosion resistance of the first tunneling oxide layer is proportional to its own film density, so when the first tunneling oxide layer has higher corrosion resistance, the first tunneling oxide layer has higher film density. At the same time, the first tunnel oxide layer with higher film density also has a stronger diffusion barrier effect on dopants, which is conducive to retaining more dopants in the first doped semiconductor layer under a stronger barrier effect, rather than more dopants diffusing through the first tunnel oxide layer to the corresponding stacked first tunnel oxide layer and first doped semiconductor layer in the conductor substrate, thereby helping to reduce the depth of the diffused doped layer formed in the corresponding stacked first tunnel oxide layer and first doped semiconductor layer in the semiconductor substrate, and facilitating the formation of a high-low junction or PN junction with a larger built-in electric field strength between the first doped semiconductor layer and the semiconductor substrate, thereby improving the conversion efficiency of the solar cell.

[0045] In actual application, the embodiment of the present invention does not specifically limit the material and conductivity type of the semiconductor substrate. For example, the semiconductor substrate may be a silicon substrate. Alternatively, the semiconductor substrate may be a substrate made of any semiconductor material such as a germanium silicon substrate, a germanium substrate, or a gallium arsenide substrate.

[0046] Secondly, the above-mentioned semiconductor substrate includes a first surface and a second surface relative to each other. The first surface of the semiconductor substrate can correspond to the light-facing surface of the solar cell (referred to as the front surface), and the second surface of the semiconductor substrate corresponds to the backlight surface of the solar cell (referred to as the back surface); or, the first surface of the semiconductor substrate can correspond to the back surface of the solar cell, and the second surface of the semiconductor substrate corresponds to the front surface of the solar cell.

[0047] Regarding the stacked first tunneling oxide layer and the first doped semiconductor layer, in terms of thickness, the embodiment of the present invention does not specifically limit the thickness of the first tunneling oxide layer and the first doped semiconductor layer, as long as they can be applied to the solar cell provided in the embodiment of the present invention.

[0048] Exemplarily, the thickness of the first tunnel oxide layer may be less than or equal to 2 nm. For example, the thickness of the first tunnel oxide layer may be 0.5 nm, 0.8 nm, 1 nm, 1.2 nm, 1.4 nm, 1.6 nm, 1.8 nm or 2 nm, etc. In this case, it can be understood that the first tunnel oxide layer has a high density, which can improve its diffusion barrier effect on dopants. At this time, the dense first tunnel oxide layer can improve its own thickness range window, and there is no need to set a larger thickness to improve its own diffusion barrier effect. Based on this, when the thickness of the first tunnel oxide layer is within the above range, the thickness of the first tunnel oxide layer is small, which is conducive to making the first tunnel oxide layer have a lower tunnel resistance, ensuring that the first doped semiconductor layer has a higher carrier collection efficiency, and further improving the conversion efficiency of the solar cell.

[0049] Exemplarily, the thickness of the first doped semiconductor layer may be greater than or equal to 150 nm and less than or equal to 380 nm. For example, the thickness of the first doped semiconductor layer may be 150 nm, 180 nm, 200 nm, 220 nm, 240 nm, 260 nm, 280 nm, 300 nm, 350 nm or 380 nm, etc. In this case, the thickness of the first doped semiconductor layer can be selected in a wide range, which is conducive to improving the applicability of the solar cell provided by the embodiment of the present invention in different application scenarios.

[0050] In terms of the formation range, the formation range of the stacked first tunnel oxide layer and the first doped semiconductor layer on the semiconductor substrate can be set according to the type of solar cell and actual needs, and is not specifically limited here.

[0051] For example, in the case where the solar cell is a double-sided contact cell, Figure 1 and Figure 2 As shown in FIG. 1 , the stacked first tunneling oxide layer 14 and the first doped semiconductor layer 15 may be disposed only on at least a portion of the first surface 12 of the semiconductor substrate 11. Alternatively, as shown in FIG. Figure 3 and Figure 4 As shown, the stacked first tunnel oxide layer 14 and the first doped semiconductor layer 15 may also be disposed only on at least a portion of the second surface 13 of the semiconductor substrate 11 .

[0052] In the case where the solar cell is a double-sided contact cell, the arrangement range of the first tunnel oxide layer and the first doped semiconductor layer stacked on the corresponding surface can be set according to actual needs. Figure 2 and Figure 4 As shown in FIG. 1 , the first tunneling oxide layer 14 and the first doped semiconductor layer 15 stacked in layers may be disposed only on a portion of the corresponding surface; or, as shown in FIG. Figure 1 and Figure 3 As shown, the first tunnel oxide layer 14 and the first doped semiconductor layer 15 which are stacked may also be arranged on the entire area of ​​the corresponding surface.

[0053] Exemplarily, when the solar cell is a back-contact cell, the stacked first tunnel oxide layer and the first doped semiconductor layer are only disposed on a portion of the back side of the first side and the second side of the semiconductor substrate.

[0054] In addition, in the actual application process, as mentioned above, within a certain range, the corrosion resistance of the first tunneling oxide layer is proportional to its own film density, and the density of the first tunneling oxide layer also has an impact on the diffusion barrier effect of the dopant, as well as the selective permeation and directional movement effect of the carrier. The higher the film density of the first tunneling passivation layer, the stronger its own diffusion barrier effect on the dopant, and the more conducive to reducing the depth of the diffusion doping layer formed in the region of the first tunneling oxide layer and the first doped semiconductor layer corresponding to the stacked arrangement in the semiconductor substrate; however, the higher the film density of the first tunneling passivation layer, the more its own carrier selective permeation and directional movement effect will be affected, thereby affecting the carrier collection efficiency of the first doped semiconductor layer. Based on this, when the etching rate of the first tunneling oxide layer along its own thickness direction in the above-mentioned etching solution is greater than or equal to 0.02nm / s and less than or equal to 0.05nm / s, it can have both a better diffusion barrier effect on the dopant and a better selective permeation and directional movement effect on the carrier. For example, the corrosion rate of the first tunnel oxide layer along its thickness direction in the etching solution may be 0.02 nm / s, 0.022 nm / s, 0.025 nm / s, 0.028 nm / s, 0.03 nm / s, 0.032 nm / s, 0.035 nm / s, 0.038 nm / s, 0.04 nm / s, 0.042 nm / s, 0.045 nm / s, 0.048 nm / s or 0.05 nm / s, etc.

[0055] In some cases, such as Figure 5 As shown, the solar cell may further include a diffuse doping layer 16, which is arranged in the region corresponding to the semiconductor substrate 11 and the stacked first tunneling oxide layer 14 and the first doped semiconductor layer 15, and the dopant in the diffuse doping layer 16 includes the dopant in the first doped semiconductor layer 15. It is understandable that in the actual manufacturing process, the diffuse doping layer 16 may be formed by the dopant in the first doped semiconductor layer 15 diffusing into the semiconductor substrate 11 through the first tunneling passivation layer. Based on this, when the density of the first tunneling passivation layer is higher, the diffusion barrier effect of itself on the dopant is stronger, and the maximum depth of the diffuse doping layer 16 may be smaller. In the above case, the maximum depth of the diffuse doping layer 16 can be determined according to the corrosion rate of the first tunneling passivation layer along its own thickness direction in the etching solution in the actual application scenario, and no specific limitation is made here.

[0056] Exemplarily, along the thickness direction of the semiconductor substrate, the ratio between the maximum depth of the diffusion doping layer and the thickness of the semiconductor substrate may be less than 0.1%. For example, the ratio between the maximum depth of the diffusion doping layer and the thickness of the semiconductor substrate may be 0.01%, 0.02%, 0.04%, 0.06%, 0.08% or 0.09%, etc. In this case, the maximum depth of the diffusion doping layer in the semiconductor substrate is appropriately reduced, and at this time, the dose of the dopant diffused into the semiconductor substrate through the first tunnel oxide layer in the first doped semiconductor layer is appropriately reduced, which is conducive to the first doped semiconductor layer having a higher field passivation effect on the semiconductor substrate, improving the carrier collection efficiency, and further improving the conversion efficiency of the solar cell.

[0057] Secondly, it is understandable that when the types of dopants are different, the diffusion modes of the dopants may be different, so that the maximum depth of the diffuse doped layer formed may also be different. For example: the size of P-type dopants such as boron atoms is relatively small, and the corresponding diffusion mode is gap diffusion. The larger N-type dopants such as phosphorus are doped by substitutional diffusion. Because the substitutional diffusion mode is that the dopant atoms replace the positions of semiconductor atoms to form doped regions, compared with small-sized P-type dopants such as boron atoms, the larger N-type dopants such as phosphorus are more difficult to diffuse. In the above case, the maximum depth of the diffuse doped layer can be determined based on the corrosion rate of the first tunneling passivation layer in the etching solution along its own thickness direction in the actual application scenario, and the type of dopant in the first doped semiconductor layer, and no specific limitation is made here.

[0058] For example, when the conductivity type of the first doped semiconductor layer is P-type, the ratio of the maximum depth of the diffusion doped layer to the thickness of the first doped semiconductor layer along the thickness direction of the semiconductor substrate may be less than 40%; or, when the conductivity type of the first doped semiconductor layer is N-type, the ratio of the maximum depth of the diffusion doped layer to the thickness of the first doped semiconductor layer along the thickness direction of the semiconductor substrate may be less than 30%. In this case, the maximum depth of the diffusion doped layer in the semiconductor substrate is appropriately reduced, and at this time, the dose of the dopant diffused into the semiconductor substrate through the first tunnel oxide layer in the first doped semiconductor layer is appropriately reduced, which is conducive to the first doped semiconductor layer having a higher field passivation effect on the semiconductor substrate, improving the carrier collection efficiency, and further improving the conversion efficiency of the solar cell.

[0059] For example: when the conductivity type of the first doped semiconductor layer is P type, along the thickness direction of the semiconductor substrate, the ratio between the maximum depth of the diffusion doping layer and the thickness of the first doped semiconductor layer can be 5%, 10%, 15%, 20%, 25%, 30%, 35% or 40%, etc.

[0060] For example: when the conductivity type of the first doped semiconductor layer is N-type, along the thickness direction of the semiconductor substrate, the ratio between the maximum depth of the diffused doped layer and the thickness of the first doped semiconductor layer can be 5%, 8%, 10%, 12%, 15%, 18%, 20%, 22%, 25% or 30%, etc.

[0061] As for the specific maximum depth of the above-mentioned diffusion doping layer, it can be determined according to the thickness of the first doped semiconductor layer and the conductivity type of the first doped semiconductor layer, and is not specifically limited here.

[0062] Exemplarily, when the conductivity type of the first doped semiconductor layer is P-type, the maximum depth of the diffuse doped layer along the thickness direction of the semiconductor substrate is less than 150nm; or, when the conductivity type of the first doped semiconductor layer is N-type, the maximum depth of the diffuse doped layer along the thickness direction of the semiconductor substrate is less than 100nm. In this case, the maximum depth of the diffuse doped layer in the semiconductor substrate is appropriately reduced, which is conducive to forming a high-low junction or PN junction with a large built-in electric field strength between the first doped semiconductor layer and the semiconductor substrate, thereby improving the conversion efficiency of the solar cell.

[0063] For example, when the conductivity type of the first doped semiconductor layer is P type, the maximum depth of the diffused doped layer along the thickness direction of the semiconductor substrate can be 10nm, 20nm, 40nm, 60nm, 80nm, 120nm or 150nm, etc.

[0064] For example, when the conductivity type of the first doped semiconductor layer is N-type, the maximum depth of the diffused doped layer along the thickness direction of the semiconductor substrate can be 10nm, 20nm, 30nm, 50nm, 60nm, 80nm or 100nm.

[0065] In terms of conductivity type, the embodiment of the present invention does not specifically limit the conductivity type of the first doped semiconductor layer. The first doped semiconductor layer can be an N-type doped semiconductor layer or a P-type doped semiconductor layer.

[0066] Among them, the conductivity type of the first doped semiconductor layer may be opposite to the conductivity type of the semiconductor substrate. Alternatively, the conductivity type of the first doped semiconductor layer may also be the same as the conductivity type of the semiconductor substrate, and the solar cell also includes a second doped semiconductor layer of opposite conductivity type to the first doped semiconductor layer. It can be understood that when the conductivity type of the first doped semiconductor layer is N-type, the conductivity type of the second doped semiconductor layer is P-type. And when the conductivity type of the first doped semiconductor layer is P-type, the conductivity type of the first doped semiconductor layer is N-type. (It should be noted that when the conductivity type of the first doped semiconductor layer is opposite to the conductivity type of the semiconductor substrate, the solar cell may also include a second doped semiconductor layer of opposite conductivity type to the first doped semiconductor layer)

[0067] In addition, the reflectivity of the first tunneling oxide layer is also related to its own film density. Within a certain range, the greater the reflectivity of the first tunneling oxide layer, the higher the film density. Moreover, within a certain range, and with other factors being the same, the first tunneling oxide layer with a higher film density also has a certain hindering effect on the penetration and movement of carriers within itself. In the above case, the reflectivity of the first tunneling oxide layer can be determined according to the requirements of the actual application scenario for the depth of the above-mentioned diffuse doping layer and the carrier collection efficiency of the first doped semiconductor layer.

[0068] Exemplarily, the reflectivity of the first tunnel oxide layer may be greater than or equal to 3% and less than or equal to 5%. For example, the reflectivity of the first tunnel oxide layer may be 3%, 3.2%, 3.4%, 3.6%, 3.8%, 4%, 4.2%, 4.4%, 4.6%, 4.8% or 5%. In this case, when the reflectivity of the first tunnel oxide layer is within the above range, it is beneficial to prevent the first tunnel oxide layer from having a smaller film density due to a smaller reflectivity, so that the first tunnel oxide layer has a higher diffusion barrier effect on dopants. In addition, it is also beneficial to prevent the first tunnel oxide layer from having an excessively large film density due to a larger reflectivity, so that the first tunnel oxide layer has good carrier selective permeability and directional migration effects, that is, it has a relatively low tunnel resistance, ensuring that the solar cell has a higher conversion efficiency. In addition, when the solar cell provided in the embodiment of the present invention is a back-contact cell, the first tunnel oxide layer is located on the back of the cell, and the reflectivity of the first tunnel oxide layer is within the above range, which also makes it have a higher reflective effect on the light refracted from the semiconductor substrate, which is conducive to making more light return to the semiconductor substrate under the reflection of the first tunnel oxide layer, and further improve the conversion efficiency of the solar cell. That is, when the solar cell provided in the embodiment of the present invention is a back-contact cell, the reflectivity of the first tunnel oxide layer within the above range can take into account the following three: a higher diffusion barrier effect on dopants, good selective transmission and directional migration effect on carriers, and better reflection effect on light refracted from the semiconductor substrate.

[0069] The specific formation position of the second doped semiconductor layer in the embodiment of the present invention can be set according to the device type of the solar cell and actual needs, and is not specifically limited here. Figures 6 to 9 As shown, when the solar cell provided by the embodiment of the present invention is a double-sided contact cell, one of the second doped semiconductor layer 18 and the stacked first tunnel oxide layer 14 and the first doped semiconductor layer 15 is disposed on at least a portion of the first surface 12, and the other is formed on at least a portion of the second surface 13. Specifically, as Figures 6 to 9 As shown, the second doped semiconductor layer 18 may be disposed on only a partial region of the corresponding surface, or may be disposed on the entire region of the corresponding surface.

[0070] like Fig.10 As shown, when the solar cell provided by the embodiment of the present invention is a back contact cell, the second doped semiconductor layer 18 and the stacked first tunneling oxide layer 14 and the first doped semiconductor layer 15 are alternately distributed on the first surface 12 .

[0071] In addition, the embodiment of the present invention does not specifically limit the material of the second doped semiconductor layer. The material of the second doped semiconductor layer may include any semiconductor material such as silicon, silicon germanium, germanium or gallium arsenide. In terms of the arrangement of the material, the crystal phase of the second doped semiconductor layer may be amorphous, microcrystalline, nanocrystalline, single crystal or polycrystalline. The material of the second doped semiconductor layer may be the same as or different from the material of the first doped semiconductor layer.

[0072] Secondly, if Figures 6 to 10 As shown, the second doped semiconductor layer 18 can be directly disposed on the corresponding surface of the semiconductor substrate 11. Alternatively, the solar cell may further include an interface passivation layer located between the second doped semiconductor layer and the semiconductor substrate. In this case, the passivation contact structure composed of the interface passivation layer and the second doped semiconductor layer has an excellent interface passivation effect, and can realize the selective collection of carriers, reduce the carrier recombination rate on the surface of the region where the interface passivation layer and the second doped semiconductor layer are formed on the semiconductor substrate, and further improve the photoelectric conversion efficiency of the back contact battery. The material and thickness of the interface passivation layer can be set according to the material of the second doped semiconductor layer and actual needs, and are not specifically limited here. For example: when the material of the second doped semiconductor layer includes at least one of doped amorphous silicon, doped microcrystalline silicon and doped nanocrystalline silicon, the interface passivation layer is an intrinsic amorphous silicon layer, an intrinsic microcrystalline silicon layer, an intrinsic nanocrystalline silicon layer or a mixed layer of the above three. For another example: when the material of the second doped semiconductor layer includes doped polycrystalline silicon, the interface passivation layer is a tunneling passivation layer.

[0073] Alternatively, if Fig.12 As shown, the above-mentioned interface passivation layer can be a second tunneling oxide layer 17, and the second tunneling oxide layer 17 and the second doped semiconductor layer 18 are stacked along the thickness direction of the semiconductor substrate 11. The stacked second tunneling oxide layer 17 and the second doped semiconductor layer 18 can be alternately distributed on the first surface 12 with the stacked first tunneling oxide layer 14 and the first doped semiconductor layer 15. In this case, the stacked second tunneling oxide layer 17 and the second doped semiconductor layer 18 can also be arranged on the same surface of the semiconductor substrate 11 as the stacked first tunneling oxide layer 14 and the first doped semiconductor layer 15. At this time, the solar cell provided by the embodiment of the present invention is a back contact cell. The specific arrangement positions of the stacked second tunneling oxide layer 17 and the second doped semiconductor layer 18, and the stacked first tunneling oxide layer 14 and the first doped semiconductor layer 15 on the semiconductor substrate 11 can refer to the specific arrangement position relationship between the second doped semiconductor layer 18 and the stacked first tunneling oxide layer 14 and the first doped semiconductor layer 15 on the semiconductor substrate 11 described above, which will not be repeated here.

[0074] Among them, the corrosion rate of the above-mentioned second tunneling oxide layer along its own thickness direction in the etching solution can be equal to the corrosion rate of the first tunneling oxide layer along its own thickness direction in the etching solution; at this time, the second tunneling oxide layer can also have approximately the same film density as the first tunneling oxide layer, which is beneficial to reducing the depth of the diffused doped layer formed in the region of the second tunneling oxide layer and the second doped semiconductor layer corresponding to the stacked arrangement in the semiconductor substrate, and further improving the conversion efficiency of the solar cell; secondly, in this case, the specific values ​​of the etching rate of the second tunneling oxide layer along its own thickness direction in the etching solution, the thickness and reflectivity of the second tunneling oxide layer, and the maximum depth of the diffused doped layer formed in the region of the second tunneling oxide layer and the second doped semiconductor layer corresponding to the stacked arrangement in the semiconductor substrate and other parameters can refer to the corresponding information corresponding to the first tunneling oxide layer described above, and will not be repeated here.

[0075] Of course, the corrosion rate of the second tunnel oxide layer in the etching solution along the direction of its thickness may also be different from the corrosion rate of the first tunnel oxide layer in the etching solution along the direction of its thickness. Moreover, in the actual application process, a first tunnel oxide layer with higher corrosion resistance and higher film density can be obtained by increasing the formation temperature and / or the heat treatment temperature. At relatively high temperatures, dopants are more likely to diffuse. Based on this, if in the actual manufacturing process, the formation order of the stacked second tunnel oxide layer and the second doped semiconductor layer is located after the stacked first tunnel oxide layer and the second doped semiconductor layer, then the second tunnel oxide layer with the same corrosion resistance and higher film density is obtained by increasing the formation temperature and / or the heat treatment temperature, which may affect the first doped semiconductor layer that has been formed, so that more dopants in it pass through the first tunnel oxide layer and enter the semiconductor substrate. In addition, as mentioned above, small-sized P-type dopants such as boron atoms are relatively easy to diffuse, while larger-sized N-type dopants such as phosphorus are more difficult to diffuse. Therefore, the corrosion rate of the second tunneling oxide layer along its own thickness direction in the etching solution can be determined according to the conductivity type of the first doped semiconductor layer and the second doped semiconductor layer, as well as actual needs.

[0076] Preferably, when the conductivity type of the first doped semiconductor layer is P-type and the conductivity type of the second doped semiconductor layer is N-type, the corrosion rate of the first tunneling oxide layer in the above-mentioned etching solution along the direction of its thickness is the first corrosion rate, and the corrosion rate of the second tunneling oxide layer in the above-mentioned etching solution along the direction of its thickness is the second corrosion rate, and the first corrosion rate is less than the second corrosion rate. Compared with the internal diffusion of N-type dopants, the excessive diffusion depth of P-type dopants will have a greater negative impact on battery efficiency. In this case, when the conductivity type of the first doped semiconductor layer is P-type, the corrosion rate of the first tunneling oxide layer in the etching solution along the direction of its thickness is relatively small, which is conducive to making itself have a higher diffusion barrier effect on small-sized P-type dopants such as boron atoms, and reducing the depth of the corresponding diffuse doping layer. Although the corrosion rate of the second tunnel oxide layer of N-type conductivity in the etching solution along its own thickness direction is relatively large, making its own density relatively low, the diffusion difficulty of N-type dopants such as phosphorus with larger sizes is inherently greater. Therefore, after the first tunnel oxide layer and the first doped semiconductor layer are formed, it is possible to avoid that more dopants in the first doped semiconductor layer pass through the first tunnel oxide layer and enter the semiconductor substrate in order to obtain a denser second tunnel oxide layer when manufacturing the second tunnel oxide layer, which is beneficial to controlling the maximum depth of the diffused doped layer formed in the semiconductor substrate, and further improving the conversion efficiency of the solar cell.

[0077] Exemplarily, the ratio of the second corrosion rate to the first corrosion rate may be greater than or equal to 1.1; and / or, the difference between the second corrosion rate and the first corrosion rate may be greater than or equal to 0.001 nm / s. In this case, it is possible to prevent the second tunneling oxide layer from having a higher film density due to the small difference and / or ratio between the corrosion rates of the first tunneling oxide layer and the second tunneling oxide layer in the etching solution along the thickness direction thereof, thereby preventing the second tunneling oxide layer from having a higher manufacturing temperature corresponding to the second tunneling oxide layer, and avoiding more dopants in the first doped semiconductor layer from passing through the first tunneling oxide layer into the semiconductor substrate in order to obtain a higher film density when manufacturing the second tunneling oxide layer, thereby facilitating the control of the maximum depth of the diffused doping layer formed in the semiconductor substrate, facilitating the balancing of the diffusion depths of the P region and the N region, and further improving the conversion efficiency of the solar cell.

[0078] Alternatively, if Fig.11As shown, the above-mentioned interface passivation layer can be a second tunneling oxide layer 17, and the stacked second tunneling oxide layer 17 and the second doped semiconductor layer 18 can also be distributed on at least a portion of the first surface 12 with one of the stacked first tunneling oxide layer 14 and the first doped semiconductor layer 15, and the other is distributed on at least a portion of the second surface 13. The stacked second tunneling oxide layer 17 and the second doped semiconductor layer 18 can be arranged on opposite sides of the semiconductor substrate 11 with the stacked first tunneling oxide layer 14 and the first doped semiconductor layer 15. In this case, the solar cell provided by the embodiment of the present invention is a double-sided contact cell. The specific arrangement positions of the stacked second tunneling oxide layer 17 and the second doped semiconductor layer 18, and the stacked first tunneling oxide layer 14 and the first doped semiconductor layer 15 on the semiconductor substrate 11 can refer to the specific arrangement position relationship between the second doped semiconductor layer 18 and the stacked first tunneling oxide layer 14 and the first doped semiconductor layer 15 on the semiconductor substrate 11 described above, which will not be repeated here. Among them, in the first tunnel oxide layer 14 and the second tunnel oxide layer 17, the corrosion rate corresponding to the one disposed on the backlight surface is smaller than the corrosion rate corresponding to the one disposed on the light-facing surface.

[0079] In the case of adopting the above technical solution, the corrosion rate corresponding to the one of the first tunnel oxide layer and the second tunnel oxide layer arranged on the backlight surface is less than the corrosion rate corresponding to the one of the first tunnel oxide layer and the second tunnel oxide layer arranged on the backlight surface, and accordingly, the reflectivity of the one of the first tunnel oxide layer and the second tunnel oxide layer arranged on the backlight surface is greater than the reflectivity of the one of the first tunnel oxide layer and the second tunnel oxide layer arranged on the light-facing surface. The tunnel oxide layer on the light-facing surface with relatively low reflectivity (i.e., the one of the first tunnel oxide layer and the second tunnel oxide layer arranged on the light-facing surface as described above) is conducive to sunlight incident on the PN junction area of ​​the double-sided contact battery, and at the same time, the tunnel oxide layer on the backlight surface with relatively high reflectivity (i.e., the one of the first tunnel oxide layer and the second tunnel oxide layer arranged on the backlight surface as described above) is conducive to reflecting the sunlight passing through the PN junction area from the back side back to the PN junction area of ​​the double-sided contact battery. Therefore, the above technical solution can improve the efficiency of the battery.

[0080] In a second aspect, an embodiment of the present invention provides a method for manufacturing a solar cell, the method for manufacturing a solar cell comprising the following steps:

[0081] First, a semiconductor substrate is provided; the semiconductor substrate has a first surface and a second surface opposite to each other. Of the first surface and the second surface, one is a light-facing surface, and the other is a backlight surface. The material of the semiconductor substrate and which surface of the semiconductor substrate the first surface and the second surface are are referred to in the previous text, and will not be repeated here.

[0082] Next, if Figures 1 to 5As shown, a first tunneling oxide layer 14 and a first doped semiconductor layer 15 are stacked and formed on at least a portion of the first surface 12 and / or the second surface 13. The corrosion rate of the first tunneling oxide layer 14 along its thickness direction in the etching solution is greater than or equal to 0.02nm / s and less than or equal to 0.05nm / s. The etching solution is a hydrofluoric acid solution, and the ratio of H2O to HF in the hydrofluoric acid solution is 240L:1.5L, and the etching temperature is 60°C. Among them, the thickness of the above-mentioned first tunneling oxide layer 14 and the first doped semiconductor layer 15, the formation range of the two on the semiconductor substrate 11, and the conductivity type of the first doped semiconductor layer 15 and other information can be referred to the previous text.

[0083] In the actual manufacturing process, the first tunnel oxide layer can be formed by low pressure chemical vapor deposition or thermal oxidation. When the tunnel oxide layer is formed by the above process, the density of the tunnel oxygen can be controlled by controlling the temperature change during the process and the reaction time corresponding to each temperature. Then, a chemical vapor deposition and doping process can be used to form a first doped semiconductor layer on the first tunnel oxide layer.

[0084] It should be noted that when the stacked first tunnel oxide layer and the first doped semiconductor layer are only arranged on a partial area of ​​the first surface and / or the second surface, it is also necessary to selectively etch the stacked first tunnel oxide layer and the first doped semiconductor layer through dry etching or wet etching processes under the masking effect of the mask layer.

[0085] In addition, when the solar cell also includes a second doped semiconductor layer, the specific manufacturing process of the second doped semiconductor layer and the formation order of the second doped semiconductor layer and the stacked first tunneling oxide layer and the first doped semiconductor layer can be determined according to the relative position of the second doped semiconductor layer and the stacked first tunneling oxide layer and the first doped semiconductor layer, and actual needs.

[0086] For example, when the solar cell is a double-sided contact cell, a second doped semiconductor layer can be formed on the side of the semiconductor substrate away from the stacked first tunneling oxide layer and the first doped semiconductor layer by chemical vapor deposition and doping processes before or after forming the stacked first tunneling oxide layer and the first doped semiconductor layer.

[0087] For example, when the solar cell is a back contact cell, if the formation sequence of the second doped semiconductor layer is before the formation sequence of the first tunneling oxide layer and the first doped semiconductor layer, a chemical vapor deposition and doping process can be used to form a whole layer of the second doped semiconductor layer on one side of the first surface of the semiconductor substrate. Then, under the action of the corresponding mask layer, a process such as dry etching or wet etching is used to selectively remove part of the second doped semiconductor layer. Next, the stacked first tunneling oxide layer and the first doped semiconductor layer are formed on a partial area of ​​the first surface in the manner described above.

[0088] In addition, when the solar cell also includes a second tunneling oxide layer, if the corrosion rate of the second tunneling oxide layer along its own thickness direction in the etching solution is equal to the corrosion rate of the first tunneling oxide layer along its own thickness direction in the etching solution, then before manufacturing the second doped semiconductor layer, the second tunneling oxide layer can be formed on the semiconductor substrate by using the method of forming the first tunneling oxide layer as described above.

[0089] If the corrosion rate of the second tunnel oxide layer in the etching solution along its thickness direction is greater than the corrosion rate of the first tunnel oxide layer in the etching solution along its thickness direction, the second tunnel oxide layer can be formed by low pressure chemical vapor deposition or thermal oxidation before manufacturing the second doped semiconductor layer. The specific manufacturing parameters of the second tunnel oxide layer can be based on actual needs and are not specifically limited here.

[0090] The beneficial effects of the second aspect and its various implementations in the embodiments of the present invention can be analyzed by referring to the beneficial effects of the first aspect and its various implementations, and will not be repeated here.

[0091] In the above description, the technical details of the patterning and etching of each layer are not described in detail. However, those skilled in the art should understand that various technical means can be used to form layers, regions, etc. of desired shapes. In addition, in order to form the same structure, those skilled in the art can also design methods that are not completely the same as the methods described above. In addition, although the various embodiments are described above separately, this does not mean that the measures in the various embodiments cannot be used in combination to advantage.

[0092] The embodiments of the present invention are described above. However, these embodiments are only for a clearer description and are not intended to limit the scope of the present invention. The scope of the present invention is defined by the appended claims and their equivalents. Without departing from the scope of the present invention, a person skilled in the art may make various substitutions and modifications, which should all fall within the scope of the present invention.

Claims

1. A solar cell, characterized in that: include: A semiconductor substrate, wherein the semiconductor substrate has a first surface and a second surface opposite to each other; one of the first surface and the second surface is a light-facing surface, and the other surface is a backlight surface; A first tunneling oxide layer and a first doped semiconductor layer stacked on at least a portion of the first surface and / or the second surface; the first tunneling oxide layer has an etching rate in an etching solution along its thickness direction greater than or equal to 0.02 nm / s and less than or equal to 0.05 nm / s; The etching solution is a hydrofluoric acid solution, and the volume ratio of H2O to HF in the hydrofluoric acid solution is 240L:1.5L, and the etching temperature is 60°C; The solar cell further comprises a diffusion doping layer, the diffusion doping layer is arranged in a region of the semiconductor substrate corresponding to the first tunneling oxide layer and the first doped semiconductor layer arranged in a stacked manner, and the dopant in the diffusion doping layer comprises the dopant in the first doped semiconductor layer; Among them, when the conductivity type of the first doped semiconductor layer is P type, along the thickness direction of the semiconductor substrate, the ratio of the maximum depth of the diffuse doped layer to the thickness of the first doped semiconductor layer is less than 40%; or, when the conductivity type of the first doped semiconductor layer is N type, along the thickness direction of the semiconductor substrate, the ratio of the maximum depth of the diffuse doped layer to the thickness of the first doped semiconductor layer is less than 30%.

2. The solar cell according to claim 1, characterized in that The thickness of the first doped semiconductor layer is greater than or equal to 150 nm and less than or equal to 380 nm; And / or, when the conductivity type of the first doped semiconductor layer is P type, the maximum depth of the diffuse doped layer along the thickness direction of the semiconductor substrate is less than 150nm; or, when the conductivity type of the first doped semiconductor layer is N type, the maximum depth of the diffuse doped layer along the thickness direction of the semiconductor substrate is less than 100nm.

3. The solar cell according to claim 1, characterized in that The solar cell further comprises a diffusion doping layer, the diffusion doping layer is arranged in a region of the semiconductor substrate corresponding to the first tunneling oxide layer and the first doped semiconductor layer arranged in a stacked manner, and the dopant in the diffusion doping layer comprises the dopant in the first doped semiconductor layer; Along the thickness direction of the semiconductor substrate, a ratio between the maximum depth of the diffusion doping layer and the thickness of the semiconductor substrate is less than 0.1%.

4. The solar cell according to claim 1, characterized in that The reflectivity of the first tunneling oxide layer is greater than or equal to 3% and less than or equal to 5%.

5. The solar cell according to claim 1, characterized in that: The solar cell also includes a second tunneling oxide layer and a second doped semiconductor layer arranged in stacked layers, the second doped semiconductor layer and the first doped semiconductor layer have opposite conductivity types, and the second tunneling oxide layer and the second doped semiconductor layer arranged in stacked layers are alternately distributed on the first surface with the first tunneling oxide layer and the first doped semiconductor layer arranged in stacked layers.

6. The solar cell according to claim 5, characterized in that: The conductivity type of the first doped semiconductor layer is P type, and the conductivity type of the second doped semiconductor layer is N type; the corrosion rate of the first tunneling oxide layer along its own thickness direction in the etching solution is a first corrosion rate, and the corrosion rate of the second tunneling oxide layer along its own thickness direction in the etching solution is a second corrosion rate, and the first corrosion rate is less than the second corrosion rate.

7. The solar cell according to claim 6, characterized in that: The ratio of the second corrosion rate to the first corrosion rate is greater than or equal to 1.1; and / or the difference between the second corrosion rate and the first corrosion rate is greater than or equal to 0.001 nm / s.

8. The solar cell according to claim 1, characterized in that The solar cell further comprises a second tunneling oxide layer and a second doped semiconductor layer which are stacked, the second doped semiconductor layer and the first doped semiconductor layer having opposite conductivity types, and one of the stacked second tunneling oxide layer and the second doped semiconductor layer and the stacked first tunneling oxide layer and the first doped semiconductor layer is distributed on at least a portion of the first surface, and the other is distributed on at least a portion of the second surface; Among them, among the first tunneling oxide layer and the second tunneling oxide layer, the corrosion rate corresponding to the one disposed on the backlight surface is smaller than the corrosion rate corresponding to the one disposed on the light-facing surface.

9. The solar cell according to claim 1, characterized in that: The thickness of the first tunneling oxide layer is less than or equal to 2 nm.

10. A method for manufacturing a solar cell, characterized in that: include: Providing a semiconductor substrate; The semiconductor substrate has a first surface and a second surface opposite to each other; one of the first surface and the second surface is a light-facing surface, and the other surface is a backlight surface; A first tunneling oxide layer and a first doped semiconductor layer are stacked on at least a portion of the first surface and / or the second surface; the first tunneling oxide layer has an etching rate in an etching solution along its thickness direction greater than or equal to 0.02 nm / s and less than or equal to 0.05 nm / s; The etching solution is a hydrofluoric acid solution, and the ratio of H2O to HF in the hydrofluoric acid solution is 240L:1.5L, and the etching temperature is 60°C.

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