A memory allocation method, product, device and storage medium

Abstract

The embodiments of the present application relate to the technical field of data storage, and specifically to a memory allocation method, product, device, and storage medium, aiming to improve the business processing speed of a storage system based on the NUMA architecture. The method includes: when the application process is in the initialization state, mapping the memory page table in the pre-created memory management unit to the user space corresponding to the application process, where the memory page table stores memory page information of multiple memory domains corresponding to the application process; generating multiple memory page number tables corresponding to the memory page table according to the memory page table, and the memory page numbers in each memory page number table belong to the same memory domain; when receiving application data, polling multiple memory page number tables to determine multiple memory pages corresponding to the application data.

Description

Technical Field

[0001] The embodiments of the present application relate to the technical field of data storage, and more specifically, to a memory allocation method, product, device, and storage medium. Background Art

[0002] Currently, storage servers basically adopt the NUMA architecture (Non Uniform Memory Access architecture) of multi-processor. In this architecture, each processor has a corresponding memory domain. The latency for a processor to access the local memory domain is the smallest, and the latency for accessing a remote memory domain is relatively high. In related technologies, when storing data, the data used by the processor is generally placed in the local memory domain as much as possible.

[0003] In related technologies, for applications with a large volume of business, the resources of one memory domain are generally insufficient, and multiple memory domains are often required to store data. At this time, there may be many cases where processors in the application process access remote memory, resulting in a relatively high access latency and reducing the business processing speed. Summary of the Invention

[0004] The embodiments of the present application provide a memory allocation method, product, device, and storage medium, aiming to improve the business processing speed of a storage system based on the NUMA architecture.

[0005] In a first aspect of the embodiments of the present application, a memory allocation method is provided. The method includes:

[0006] When the application process is in the initialization state, map the memory page table in the pre-created memory management unit to the user space corresponding to the application process. The memory page table stores memory page information in multiple memory domains corresponding to the application process.

[0007] Generate multiple memory page number tables corresponding to the memory page table according to the memory page table. The memory page numbers in each memory page number table belong to the same memory domain.

[0008] When receiving application data, poll the memory page number tables and sequentially allocate corresponding multiple memory pages for the application data in each memory domain.

[0009] Optionally, before mapping the memory page table in the pre-created memory management unit to the user space corresponding to the application process, the method further includes:

[0010] Apply for multiple memory pages from the memory domain corresponding to the application process through the pre-created memory management unit.

[0011] Create the memory page tables corresponding to multiple said memory pages.

[0012] Optionally, the method further includes:

[0013] Add an applied flag to the memory pages that have been applied by the memory management unit in the memory domain.

[0014] Optionally, the step of applying multiple corresponding memory pages from the memory domain corresponding to the application process through a pre-created memory management unit includes:

[0015] Determine multiple memory domains corresponding to the application process according to the application process information of the application process;

[0016] Apply a preset number of said memory pages from each of the multiple memory domains.

[0017] Optionally, the step of creating the memory page tables corresponding to multiple said memory pages includes:

[0018] Obtain the memory page information of each said memory page;

[0019] Use the memory page information of each said memory page as a page table entry and add it to a list to obtain the memory page table.

[0020] Optionally, the step of mapping the memory page table in the pre-created memory management module to the user space corresponding to the application process includes:

[0021] Determine the space address of the user space corresponding to the application process;

[0022] Map the memory page table to the space address.

[0023] Optionally, the step of generating a memory page number table corresponding to multiple said memory page tables according to the memory page table includes:

[0024] Determine the memory domain node number of the memory domain corresponding to each said memory page;

[0025] Obtain the memory page number corresponding to each said memory page;

[0026] Put the memory page numbers of the memory pages with the same memory domain node number into the same list to obtain the memory page number table.

[0027] Optionally, the step of polling the memory page number table and sequentially allocating corresponding multiple said memory pages for the application data in each memory domain includes:

[0028] Determine the target number of said memory pages required by the application data;

[0029] Take the memory page numbers from each of the multiple memory page number tables in turn, and the number of memory page numbers taken from the memory page number table each time is one;

[0030] When the number of the obtained memory page numbers reaches the target number, determine that the multiple memory pages corresponding to the obtained multiple memory page numbers are the multiple memory pages corresponding to the application data.

[0031] Optionally, the method further includes:

[0032] Encapsulate the memory page numbers of the multiple memory pages into a preset data structure;

[0033] Send the encapsulated memory page numbers of the multiple memory pages to the memory management unit.

[0034] Optionally, the method further includes:

[0035] Map the memory page to the virtual address memory area corresponding to the application process through the memory management unit;

[0036] Send the pointer of the memory page in the virtual address memory area to the application process.

[0037] Optionally, the method further includes:

[0038] The application process sends the application data to the address in the virtual address memory area pointed to by the pointer;

[0039] Write the application data into the virtual address memory area starting from the address pointed to by the pointer.

[0040] Optionally, the mapping of the memory page to the virtual address memory area corresponding to the application process through the memory management unit includes:

[0041] The memory management unit looks up the physical page frame number corresponding to the memory page in the memory page table through the memory page number corresponding to the memory page;

[0042] Map the memory page corresponding to the physical page frame number to the virtual address memory area corresponding to the application process.

[0043] Optionally, the mapping of the memory page corresponding to the physical page frame number to the virtual address memory area corresponding to the application process includes:

[0044] Establish a mapping relationship between the memory page number corresponding to the memory page and the physical page frame number in the virtual address memory area.

[0045] Optionally, the method further includes:

[0046] The application process determines the storage address of the application data according to the pointer;

[0047] Access the application data at the storage address.

[0048] Optionally, the method further includes:

[0049] When the application data is no longer in use, delete the data in the memory page.

[0050] Optionally, the method further includes:

[0051] Release multiple memory pages corresponding to the application data.

[0052] Optionally, the releasing multiple memory pages corresponding to the application data includes:

[0053] The memory management unit releases the mapping relationship between the virtual address memory area corresponding to the application process and the memory page;

[0054] Release the memory page to the memory page number table according to the memory domain node number corresponding to the memory page.

[0055] A second aspect of the embodiments of the present application provides a computer program product, including computer programs / instructions, characterized in that when the computer programs / instructions are executed by a processor, the steps in the method described in the first aspect of the present application are implemented.

[0056] A third aspect of the embodiments of the present application provides a memory allocation device, the device includes:

[0057] A memory page table mapping module, configured to map the memory page table in a pre-created memory management unit to the user space corresponding to the application process when the application process is in an initialization state, and the memory page table stores memory page information of multiple memory domains corresponding to the application process;

[0058] A memory page number table generation module, configured to generate a memory page number table corresponding to multiple memory page tables according to the memory page table, and the memory page numbers in each memory page number table belong to the same memory domain;

[0059] A memory page determination module, configured to poll the memory page number table when receiving application data, and sequentially allocate corresponding multiple memory pages for the application data in each memory domain.

[0060] Optionally, the device further includes:

[0061] A memory page application module, configured to apply for multiple memory pages from the memory domain corresponding to the application process through the pre-created memory management unit;

[0062] A memory page table establishment module, configured to establish the memory page tables corresponding to the multiple memory pages.

[0063] Optionally, the device further includes:

[0064] A tag addition module, configured to add an applied tag to the memory pages that have been applied by the memory management unit in the memory domain.

[0065] Optionally, the memory page application module includes:

[0066] A memory domain determination sub-module, configured to determine multiple memory domains corresponding to the application process according to the application process information of the application process;

[0067] A memory page application sub-module, configured to apply for a preset number of memory pages from each of the multiple memory domains.

[0068] Optionally, the memory page table establishment module includes:

[0069] A memory page information acquisition sub-module, configured to acquire the memory page information of each memory page;

[0070] A memory page table acquisition sub-module, configured to add the memory page information of each memory page as a page table entry to a list to obtain the memory page table.

[0071] Optionally, the memory page table mapping module includes:

[0072] A space address determination sub-module, configured to determine the space address of the user space corresponding to the application process;

[0073] A memory page table mapping sub-module, configured to map the memory page table to the space address.

[0074] Optionally, the memory page number table generation module includes:

[0075] A memory domain node number determination sub-module, configured to determine the memory domain node numbers of the memory domains corresponding to each memory page;

[0076] A memory page number determination sub-module, configured to acquire the memory page numbers corresponding to each memory page;

[0077] The memory page number table generation sub-module is used to put the memory page numbers of the memory pages with the same memory domain node number into the same list to obtain the memory page number table.

[0078] Optionally, the memory page determination module includes:

[0079] The target quantity determination sub-module is used to determine the target quantity of the memory pages required by the application data;

[0080] The polling sub-module is used to alternately obtain memory page numbers from each memory page number table among multiple memory page number tables, and the quantity of memory page numbers obtained from the memory page number table each time is one;

[0081] The memory page determination sub-module is used to determine that multiple memory pages corresponding to the obtained memory page numbers are the multiple memory pages corresponding to the application data when the quantity of the obtained memory page numbers reaches the target quantity.

[0082] Optionally, the device further includes:

[0083] The encapsulation module is used to encapsulate the memory page numbers of multiple memory pages into a preset data structure;

[0084] The encapsulated transmission module is used to send the encapsulated memory page numbers of multiple memory pages to the memory management unit.

[0085] Optionally, the device further includes:

[0086] The address mapping module is used to map the memory page to the virtual address memory area corresponding to the application process through the memory management unit;

[0087] The pointer sending module is used to send the pointer of the memory page in the virtual address memory area to the application process.

[0088] Optionally, the device further includes:

[0089] The data sending module is used for the application process to send the application data to the address in the virtual address memory area pointed to by the pointer;

[0090] The data writing module is used to write the application data starting from the address pointed to by the pointer into the virtual address memory area.

[0091] Optionally, the address mapping module includes:

[0092] A physical page frame number acquisition submodule, used for the memory management unit to search the physical page frame number corresponding to the memory page in the memory page table through the memory page number corresponding to the memory page;

[0093] The address mapping submodule is used to map the memory page corresponding to the physical page frame number to the virtual address memory area corresponding to the application process.

[0094] Optionally, the address mapping submodule includes:

[0095] The mapping relationship establishing submodule is used to establish a mapping relationship between the memory page number corresponding to the memory page and the physical page frame number in the virtual address memory area.

[0096] Optionally, the device further comprises:

[0097] A storage address determination module, used for the application process to determine the storage address of the application data according to the pointer;

[0098] An application data access module is used to access the application data in the storage address.

[0099] Optionally, the device further comprises:

[0100] The data deletion module is used to delete the data in the memory page when the application data has been used up.

[0101] Optionally, the device further comprises:

[0102] The memory page release module is used to release the multiple memory pages corresponding to the application data.

[0103] Optionally, the memory page release module includes:

[0104] A mapping relationship release submodule, used for releasing the mapping relationship between the virtual address memory area corresponding to the application process and the memory page through the memory management unit;

[0105] The memory page release submodule is used to release the memory page to the memory page number table according to the memory domain node number corresponding to the memory page.

[0106] A fourth aspect of an embodiment of the present application provides a readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, the steps in the method described in the first aspect of the present application are implemented.

[0107] A fifth aspect of an embodiment of the present application provides an electronic device, including a memory, a processor, and a computer program stored on the memory and executable on the processor. When the processor executes the computer program, the steps of the method described in the first aspect of the present application are implemented.

[0108] When the application process is in an initialization state, using the memory allocation method proposed in the present application, map the memory page table in the pre-created memory management unit to the user space corresponding to the application process. The memory page table stores memory page information of memory pages in multiple memory domains corresponding to the application process. According to the memory page table, generate multiple memory page number tables corresponding to the memory page table. The memory page numbers in each memory page number table belong to the same memory domain. When receiving application data, poll the memory page number tables and sequentially allocate corresponding multiple memory pages for the application data in each memory domain.

[0109] In the present application, a memory management unit is pre-created. There is a memory page table in the memory management unit, and the memory page table stores memory page information of memory pages applied from multiple memory domains. Multiple corresponding memory page number tables are generated according to the memory page table. Each memory page number table corresponds to a memory domain. When receiving application data that needs to be stored, allocate memory pages for the application data from each memory page number table in a polling manner. In this way, it is ensured that when the services deployed in multiple memory domains access and process these application data, the memory access latency is at a stable value and will not fluctuate violently, ensuring the stability of the system performance. And when there is a large amount of application data, the access and storage pressure of the application data can be dispersed to the memory channels of each memory domain, avoiding the bandwidth bottleneck caused by competing for memory channels, and ensuring the operation speed and stability of the entire NUMA system. Description of the Drawings

[0110] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required to be used in the description of the embodiments of the present application will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0111] Figure 1 is a flowchart of the memory allocation method proposed in an embodiment of the present application;

[0112] Figure 2 is a schematic diagram of a memory page number table proposed in an embodiment of the present application;

[0113] Figure 3 is a schematic diagram of memory allocation proposed in an embodiment of the present application;

[0114] Figure 4 is a schematic diagram of memory allocation proposed in an embodiment of the present application;

[0115] Figure 5 is a schematic diagram of a memory allocation device proposed in an embodiment of the present application;

[0116] Figure 6 is a schematic diagram of an electronic device proposed in an embodiment of the present application. Detailed implementation manners

[0117] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.

[0118] Refer to Figure 1 , Figure 1 is a flowchart of a memory allocation method proposed in an embodiment of the present application. As Figure 1 shown, the method includes the following steps:

[0119] S11: When the application process is in the initialization state, map the memory page table in the pre-created memory management unit to the user space corresponding to the application process, and the memory page table stores memory page information of multiple memory domains corresponding to the application process.

[0120] In this embodiment, the application process is a process generated during the operation of a protocol stack application deployed in a storage system based on the NMUA architecture. The memory management unit is a module for managing the memory in the storage system. This module is responsible for applying for memory from each storage domain, and the application granularity is page (page). The memory page table is a table that aggregates the memory page information of all the memory pages applied by the memory management unit. The memory page information includes the physical page frame number of the memory page and the NUMA node id number (memory domain node number) to which each memory page belongs. The user space is a virtual storage space corresponding to the application program.

[0121] In this embodiment, the core concept of the NUMA architecture is that each processor has its own local memory and can access this local memory faster. When a processor needs to access the local memory of other processors, it needs to go through the interconnection network, which will cause an increase in access latency. Therefore, the NUMA architecture is suitable for large-scale multi-processor systems, can effectively utilize the computing resources of multi-core processors, and at the same time reduce the memory access latency.

[0122] In this embodiment, the physical page frame number (PFN) is an identifier used in the operating system to identify the location of a page in physical memory. In paged memory management, physical memory is divided into multiple fixed-size blocks, which are called physical page frames or page frames. Each physical page frame has a unique page frame number (PFN) used to uniquely identify the page frame in physical memory. The allocation and management of PFNs are crucial for the memory management of the operating system and involve operations such as the translation of logical addresses to physical addresses, as well as the allocation and recycling of memory. In virtual memory management, PFNs are closely related to page tables. When the CPU needs to access a certain virtual address, it will first look at the page table to find the corresponding physical address. The page table contains mapping information from virtual pages to physical page frames, and this mapping information includes the PFN. By looking up the page table, the CPU can determine which page frame in physical memory the data or instruction is located in, so as to correctly access the data.

[0123] In this embodiment, when the application process is running in the storage system and is in the initialization state, it first maps the memory page table in the pre-created memory management unit to the user space corresponding to the application process.

[0124] In this embodiment, the specific steps of mapping the memory page table in the pre-created memory management unit to the user space corresponding to the application process include:

[0125] S11-1: Determine the space address of the user space corresponding to the application process.

[0126] In this embodiment, when it is necessary to map the memory page table to the user space corresponding to the application process, first confirm the space address of this user space.

[0127] S11-2: Map the memory page table to the space address.

[0128] In this embodiment, address mapping is to convert a virtual address into a physical address and access physical memory through the physical address. In the operating system, each process has its own virtual address space, while physical memory is the place where data is actually stored. The role of address mapping is to establish a correspondence between virtual addresses and physical addresses, so that a process can access physical memory through virtual addresses.

[0129] In this embodiment, after determining the space address of the user space, mapping the memory page table to the space address corresponding to the user space is actually mapping the actual address of the memory page table to the virtual address space corresponding to the user space. When a user accesses an address in the user space, it can jump to the actual memory page table.

[0130] Exemplarily, each entry in the memory page table corresponds to a memory page. The page table entry is also called the descriptor of the memory page, and its content includes the physical page frame number of the memory page, the memory domain node number to which the memory page belongs, etc. The structure definition of the page table entry is as follows:

[0131] struct page_descriptor {

[0132] uint64_t pfn:m; / / page frame number

[0133] uint64_t nid:n; / / numa node id

[0134] …

[0135] }}.

[0136] Each memory page has a number, which is the position of its memory page descriptor in the page table, that is, the index value of the page table entry in the page table. Given the number of a memory page, this value can be used as the index value to find the description information of the memory page in the page table, and then the memory domain node number and physical page frame number to which the memory page belongs can be viewed.

[0137] S12: Generate multiple memory page number tables corresponding to the memory page tables, where the memory page numbers in each memory page number table belong to the same memory domain.

[0138] In this embodiment, the memory page number table is a list constructed according to the numbers of memory pages, and the multiple memory page numbers in each memory page number table belong to the same memory domain.

[0139] In this embodiment, after receiving the memory page table, the application process will obtain the memory page information of each memory page according to the received memory page table, which is the content included between the page table entries of the memory page, including the physical frame number of the memory page and the memory domain node number to which the memory page belongs. Then, the memory pages belonging to the same memory domain are allocated to the same memory page number table, and a number is added to each of them to obtain the memory page number table.

[0140] In this embodiment, the specific steps for generating multiple memory page number tables corresponding to the memory page tables include:

[0141] S12-1: Determine the memory domain node number of the memory domain corresponding to each memory page.

[0142] In this embodiment, the memory domain node number is the number added to each memory domain in the storage system, and each memory domain has its own separate number.

[0143] In this embodiment, after obtaining the memory page information, first determine which memory domain the memory page belongs to, and at this time, determine the memory domain node number of the memory domain corresponding to each memory page.

[0144] S12-2: Obtain the memory page number corresponding to each of the memory pages.

[0145] In this embodiment, when generating the memory page number table, it is necessary to obtain the memory page number of each memory page.

[0146] S12-3: Put the memory page numbers of the memory pages with the same memory domain node number into the same list to obtain the memory page number table.

[0147] In this embodiment, after obtaining the memory page number of each memory page and the memory domain node number corresponding to each memory page, put the memory page numbers of the memory pages with the same memory domain node number into the same list to obtain multiple memory page number tables.

[0148] Exemplarily, referring to Figure 2 , Figure 2 is a schematic diagram of the memory page number table proposed in an embodiment of the present application. As Figure 2 shown, there are 4 memory domains, namely memory domain 0, memory domain 1, memory domain 2, and memory domain 3. There are 4 memory page tables in each memory domain. Memory domain 0 includes memory pages a0-q0, memory domain 1 includes memory pages a1-q1, memory domain 2 includes memory pages a2-q2, and memory domain 3 includes memory pages a3-q3. These memory pages all have corresponding memory page descriptors, which include the memory domain node number of the memory domain corresponding to the memory page. Here, it is not required that the number of memory pages in each memory domain is equal.

[0149] S13: When receiving application data, poll the memory page number table and allocate corresponding multiple memory pages for the application data in each of the memory domains in turn.

[0150] In this embodiment, the application data (IO data) is the data received by the application process during operation.

[0151] In this embodiment, when receiving application data, allocate memory pages for storing the application data. After determining the number of memory pages required by the application data, poll multiple memory page number tables. Each time, take out a memory page number from one memory number table, and then take out a memory page number from the next memory page number table until the number of the taken-out memory page numbers reaches the number of memory pages required by the application data. In this way, corresponding memory pages are allocated for the application data in each memory domain.

[0152] In this embodiment, the specific steps of polling the memory page number table and sequentially allocating a plurality of corresponding memory pages to the application data in each memory domain include:

[0153] S13-1: Determine the target number of memory pages required by the application data.

[0154] In this embodiment, the target number of memory pages required by the application data is first determined.

[0155] In this embodiment, the size of a memory page is generally 4Kb. After the size of the application data is determined, the target number of required memory pages can be determined based on the size of the memory page.

[0156] For example, to store 8Kb of data, two memory pages are required.

[0157] S13-2: Obtaining a memory page number from each of the plurality of memory page number tables in turn, wherein the number of memory page numbers obtained from the memory page number table each time is one.

[0158] In this implementation, after determining the target number of memory pages required by the application data, memory page numbers are obtained from a plurality of memory page number tables in sequence, and only one memory page number is obtained from each memory page number table at a time.

[0159] S13-3: When the number of the acquired memory page numbers reaches the target number, determine that the multiple memory pages corresponding to the acquired multiple memory page numbers are the multiple memory pages corresponding to the application data.

[0160] In this embodiment, when the number of acquired memory page numbers reaches the target number, the memory pages corresponding to the acquired memory page numbers are determined to be multiple memory pages corresponding to the application data, and the application data is stored in blocks in these multiple memory pages, which belong to different memory domains respectively.

[0161] For example, refer to Figure 3 , Figure 3 is a schematic diagram of memory allocation proposed in an embodiment of the present application, such as Figure 3 As shown, if two memory pages are allocated for application data, the order of the allocated memory pages is q0, q1.

[0162] refer to Figure 4 , Figure 4 is a schematic diagram of memory allocation proposed in an embodiment of the present application, such as Figure 4 As shown, then Figure 3 After that, memory is allocated for application data that requires 8 memory pages. The allocation order is q2, q3, p0, p1, p2, p3, n0, n1.

[0163] In this embodiment, from the above allocation process, it can be seen that for a piece of IO data, its memory is cross - composed in multiple memory domains at the granularity of the memory page size. Generally, a memory page is 4KB in size, and large - block IO data is generally above 1MB. Therefore, when dealing with large - block IO, this interleaving effect will be more obvious. Compared with the case where the memory of the entire IO data is concentrated in a single memory domain, when the services deployed in multiple memory domains access and process this interleaving (memory cross - access) IO data, on the one hand, the memory access latency is at a stable value and does not fluctuate violently, ensuring the stability of performance; on the other hand, when there is a large amount of IO, the memory access pressure of the IO data can be dispersed to the memory channels of each memory domain, avoiding the bandwidth bottleneck caused by competing for memory channels.

[0164] In another embodiment of the present application, before mapping the memory page table in the pre - created memory management unit to the user space corresponding to the application process, the method further includes:

[0165] S21: Apply for multiple memory pages from the memory domain corresponding to the application process through the pre - created memory management unit.

[0166] In this embodiment, first, multiple memory pages are applied for from the storage domain corresponding to the application process through the memory management unit pre - created in the kernel state. First, it is necessary to determine in which memory domains the application process is deployed, and then apply for multiple memory pages from the corresponding memory domains.

[0167] In this embodiment, the specific steps of applying for multiple memory pages from the memory domain corresponding to the application process through the pre - created memory management unit include:

[0168] S21 - 1: Determine multiple memory domains corresponding to the application process according to the application process information of the application process.

[0169] In this embodiment, the application process information includes the information about in which memory domains the application process is deployed.

[0170] In this embodiment, the application process information of the application process is read from the background of the system, and then multiple memory regions corresponding to the application program are determined.

[0171] S21 - 2: Apply for a preset number of memory pages from each of the multiple memory domains.

[0172] In this embodiment, after determining multiple memory domains corresponding to the application process, a preset number of memory pages are applied for from each memory domain, and this number can be set by itself.

[0173] In this embodiment, when applying, it is not necessarily required that the number of memory pages in each memory domain is equal. In the optimal case, the same number of memory pages is applied in each memory domain.

[0174] S22: Establish the memory page tables corresponding to the multiple memory pages.

[0175] In this embodiment, after the memory management unit applies for multiple memory pages from the kernel, it extracts the memory page information of each memory page and establishes the memory page tables corresponding to the multiple memory pages according to the memory page information of each memory page.

[0176] In this embodiment, the specific steps of establishing the memory page tables corresponding to the multiple memory pages include:

[0177] S22-1: Obtain the memory page information of each memory page.

[0178] In this embodiment, after applying for the memory pages, obtain the memory page information of each memory page. Determine the physical page frame number and the memory domain node number of each memory page.

[0179] S22-2: Add the memory page information of each memory page as a page table entry to a list to obtain the memory page table.

[0180] In this embodiment, add the memory page information of each memory page as a page table entry to a list to obtain the memory page table. In the memory page table created in this way, each page table entry corresponds to a memory page. Furthermore, the memory page number can be used as an index to search for the corresponding internal page information in the memory page table.

[0181] In this embodiment, the method further includes:

[0182] S23: Add an applied mark to the memory pages that have been applied by the memory management unit in the memory domain.

[0183] In this embodiment, after the memory management unit applies for memory pages in the memory domain, the memory domain adds an applied mark to the memory pages that have been applied by the memory management unit. At this time, unless the memory management unit releases the applied memory pages from the memory page table, the marked memory pages cannot be used anymore and are uniformly used by the memory management unit.

[0184] In another embodiment of the present application, the method further includes:

[0185] S31: Encapsulate the memory page numbers of the multiple memory pages into a preset data structure.

[0186] In this embodiment, after allocating multiple memory pages for application data, the memory page numbers of these multiple memory pages are encapsulated into a preset data structure. That is, the numbers of multiple memory pages are encapsulated together.

[0187] Exemplarily, the allocated memory pages are encapsulated into a specific data structure defined as follows:

[0188] struct pages_pack {

[0189] uint64_t pages[]; / / page number array of pages

[0190] uint64_t count; / / number of elements in the pages[] array

[0191] …

[0192] };

[0193] Among them, the memory page numbers of the allocated memory pages are stored in the pages[] array in the pages_pack structure.

[0194] S32: Send the memory page numbers of the encapsulated multiple memory pages to the memory management unit.

[0195] In this embodiment, after encapsulating the memory page numbers, the encapsulated data structure is sent to the memory management unit.

[0196] In another embodiment of the present application, the method further includes:

[0197] S33: Map the memory pages to the virtual address memory area corresponding to the application process through the memory management unit.

[0198] In this embodiment, it is also called virtual address or virtual memory, which is a way of memory management. It allows each program to have its own independent address space during runtime, thus preventing interference and conflicts between programs. This isolation improves the stability and reliability of the system, making each program think that it is running in an exclusive memory space.

[0199] In this embodiment, after the memory management unit receives the memory page numbers of multiple memory pages allocated for application data, it looks up the corresponding physical page frame numbers in the memory page table according to these memory page numbers, then obtains the corresponding memory pages from the memory domain, and further maps the memory pages to the virtual address memory area corresponding to the application process.

[0200] In this embodiment, the specific steps of mapping the memory pages to the virtual address memory area corresponding to the application process through the memory management unit include:

[0201] S33-1: The memory management unit looks up the physical page frame number corresponding to the memory page in the memory page table through the memory page number corresponding to the memory page.

[0202] In this embodiment, after the memory management unit receives the memory page numbers of multiple memory pages allocated for application data, it uses the memory page numbers as indexes to look up the physical page frame numbers corresponding to the memory pages in the memory page table. After finding the physical page frame numbers, the actual addresses of these memory pages in the memory domain can be determined.

[0203] S33-2: Map the memory page corresponding to the physical page frame number to the virtual address memory area corresponding to the application process.

[0204] In this embodiment, after obtaining the physical page frame number of the memory page, the memory page corresponding to the physical page frame number is mapped to the virtual address memory area corresponding to the application process. The specific steps include:

[0205] S33-2-1: Establish a mapping relationship between the memory page number corresponding to the memory page and the physical page frame number in the virtual address memory area.

[0206] In this embodiment, after determining the physical page frame number corresponding to the memory page, a mapping relationship between the memory page number corresponding to the memory page and the physical page frame number is established in the virtual address memory area of the application program, thus allocating this memory page to the application program.

[0207] In this embodiment, the memory management module maps these memory pages to the user-mode application process through the mmap (memory mapping) interface of the device / dev / page_interleaving. This device is a pre-created device for operating on the memory management module. The mmap interface of this device will implement a service that provides page pages for page faults. Each time a page fault occurs, the page_descriptor corresponding to each page page stored in pages[] in the pages_pack structure is accessed one by one in the order of the page pages. The search method is to access the page table in the kernel mode with the page number as the index. The physical page frame number of the page page is obtained from the page_descriptor structure and provided to the page fault process of the system to complete the mapping of these interleaving page pages to the virtual address memory area of the user-mode application process. When the application process accesses the IO data, it can directly use the pointer pointing to the memory area.

[0208] S34: Send the pointer of the memory page in the virtual address memory area to the application process.

[0209] In this embodiment, a pointer is the memory address, and a pointer variable is a variable used to store the memory address. Under the same CPU architecture, the storage unit lengths occupied by different types of pointer variables are the same, while the storage space lengths occupied by variables storing data are different due to different data types. With pointers, operations can be performed not only on the data itself but also on the variable addresses storing the data. A pointer describes the position of data in memory, indicating an entity that occupies storage space and the relative distance value from the starting position of this section of space. A pointer is generally considered a pointer variable, and the content stored in the pointer variable is the starting address of the object it points to. The object it points to can be a variable (a pointer variable is also a variable), an array, a function, or other entities that occupy storage space.

[0210] In this embodiment, after mapping a memory page to the virtual address memory area corresponding to an application process, the pointer of the memory page in the virtual address memory area is sent to the application process, and the application process can access the corresponding application data through this pointer.

[0211] In this embodiment, the method further includes:

[0212] S35: The application process sends the application data to the address in the virtual address memory area pointed to by the pointer.

[0213] In this embodiment, after obtaining the pointer in the virtual address memory area, the application process sends the application data to the address in the virtual address memory area pointed to by this pointer.

[0214] S36: Write the application data into the virtual address memory area with the address pointed to by the pointer as the starting address.

[0215] In this embodiment, after sending the application data to the virtual address memory area, write the application data into the memory page in the virtual address memory area with the address pointed to by the pointer as the starting address.

[0216] In another embodiment of the present application, the method further includes:

[0217] S41: The application process determines the storage address of the application data according to the pointer.

[0218] In this embodiment, when the application process needs to access data that has been stored in a memory page, it determines the storage address of the application data in the virtual address memory area according to the corresponding pointer.

[0219] S42: Access the application data at the storage address.

[0220] In this embodiment, after determining the storage address, the application process accesses the corresponding application data at this storage address.

[0221] In another embodiment of the present application, the method further includes:

[0222] S51: When the application data is completely used, the data in the memory page is deleted.

[0223] In this embodiment, when the application data is used up, the data in the memory page is deleted.

[0224] In this embodiment, the method further includes:

[0225] S52: releasing the plurality of memory pages corresponding to the application data.

[0226] In this embodiment, multiple memory pages corresponding to the application data are released, and the released multiple memory pages can be allocated to store new application data.

[0227] In this embodiment, releasing the plurality of memory pages corresponding to the application data includes:

[0228] S52-1: Release the mapping relationship between the virtual address memory area corresponding to the application process and the memory page through the memory management unit.

[0229] In this embodiment, when releasing a memory page, the mapping relationship between the virtual address memory area corresponding to the application process and the memory page is first released by the memory management unit, that is, the mapping relationship between the memory page number in the virtual address memory area and the physical page frame number is released.

[0230] S52-2: according to the memory domain node number corresponding to the memory page, release the memory page to the memory page number table.

[0231] In this embodiment, the memory domain node number corresponding to the memory page is determined, and the memory page is released to the memory page number table according to the memory page number. The memory page released to the memory page number table can continue to be used to store new application data.

[0232] In this embodiment, in actual operation, when the application process needs to release IO data, it first releases the mapping relationship between the process virtual address memory area and the IO data page page through the munmap (memory unmapping) interface of the device / dev / page_interleaving, and then releases the memory page of the IO data to the table corresponding to the user state according to its memory domain node number.

[0233] In this embodiment, in the storage system, the protocol stack process still plans services with the optimal NUMA affinity policy. However, for the memory of the IO data in the protocol stack process, the affinity planning is no longer adopted, and the interleaving method is used instead to avoid the excessive overall latency difference in memory access caused by the transfer of IO data among multiple modules. The optimal NUMA affinity policy mainly involves selecting the most suitable scheduling policy according to the requirements of the application program and the resource allocation of the system to ensure the best performance and efficiency. When selecting the NUMA affinity policy, several key factors need to be considered, including the requirements of the application program for the CPU and memory, the NUMA architecture characteristics of the system, and possible performance optimization measures.

[0234] In the above embodiment of the present application, a process memory page interleaving method is proposed. In a high-concurrency storage system with multi-core CPUs and NUMA architecture, while ensuring that the protocol stack process still plans services with the optimal NUMA affinity policy, the present application also solves the problem of excessive overall latency difference in memory access caused by the transfer of application data among multiple modules. When processing large chunks of application data, this interleaving effect is particularly obvious. Compared with the case where the entire chunk of application data is stored in one memory domain, for services deployed in multiple memory domains, when accessing and processing application data, the memory access latency is at a stable value and does not fluctuate violently, ensuring the stability of performance. When processing a large amount of application data, the memory access pressure of the application data can be dispersed to the memory channels of each memory domain, avoiding the bandwidth bottleneck caused by competing for memory channels, thereby improving the task processing speed of the entire system. By first applying for memory pages in the kernel module, numbering the memory pages, and constructing a page table containing the memory domain number and physical page frame number to which the memory pages belong, based on this page table information, the upper-layer process divides the numbers of the memory pages into multiple number tables according to the memory domain numbers and allocates memory in the form of memory page interleaving. The process of applying for and releasing memory is managed by the process itself without frequently applying to the kernel for release, resulting in less consumption of system resources.

[0235] Based on the same inventive concept, an embodiment of the present application provides a memory allocation device. Refer to Figure 5 , Figure 5 is a schematic diagram of a memory allocation device 500 proposed in an embodiment of the present application. As Figure 5 shown, the device includes:

[0236] A memory page table mapping module 501, configured to map the memory page table in the pre-created memory management unit to the user space corresponding to the application process when the application process is in the initialization state, where the memory page table stores memory page information in multiple memory domains corresponding to the application process;

[0237] The memory page number table generation module 502 is configured to generate multiple memory page number tables corresponding to the memory page table according to the memory page table, and the memory page numbers in each memory page number table belong to the same memory domain;

[0238] The memory page determination module 503 is configured to, when receiving application data, poll the memory page number table and sequentially allocate corresponding multiple memory pages for the application data in each memory domain.

[0239] Optionally, the device further includes:

[0240] The memory page application module is configured to apply for multiple memory pages from the memory domain corresponding to the application process through the pre-created memory management unit;

[0241] The memory page table establishment module is configured to establish the memory page tables corresponding to the multiple memory pages.

[0242] Optionally, the device further includes:

[0243] The mark addition module is configured to add an applied mark to the memory pages that have been applied by the memory management unit in the memory domain.

[0244] Optionally, the memory page application module includes:

[0245] The memory domain determination sub-module is configured to determine multiple memory domains corresponding to the application process according to the application process information of the application process;

[0246] The memory page application sub-module is configured to apply for a preset number of memory pages from each of the multiple memory domains.

[0247] Optionally, the memory page table establishment module includes:

[0248] The memory page information acquisition sub-module is configured to acquire the memory page information of each memory page;

[0249] The memory page table acquisition sub-module is configured to add the memory page information of each memory page as a page table entry to a list to obtain the memory page table.

[0250] Optionally, the memory page table mapping module includes:

[0251] The space address determination sub-module is configured to determine the space address of the user space corresponding to the application process;

[0252] The memory page table mapping sub-module is configured to map the memory page table to the space address.

[0253] Optionally, the memory page number table generation module includes:

[0254] A memory domain node number determination sub-module, configured to determine the memory domain node number of the memory domain corresponding to each memory page;

[0255] A memory page number determination sub-module, configured to obtain the memory page number corresponding to each memory page;

[0256] A memory page number table generation sub-module, configured to put the memory page numbers of the memory pages with the same memory domain node number into the same list to obtain the memory page number table.

[0257] Optionally, the memory page determination module includes:

[0258] A target quantity determination sub-module, configured to determine the target quantity of the memory pages required by the application data;

[0259] A polling sub-module, configured to alternately obtain memory page numbers from each memory page number table among multiple memory page number tables, and the number of memory page numbers obtained from the memory page number table each time is one;

[0260] A memory page determination sub-module, configured to, when the number of the obtained memory page numbers reaches the target quantity, determine the multiple memory pages corresponding to the obtained multiple memory page numbers as the multiple memory pages corresponding to the application data.

[0261] Optionally, the apparatus further includes:

[0262] An encapsulation module, configured to encapsulate the memory page numbers of multiple memory pages into a preset data structure;

[0263] An encapsulation and sending module, configured to send the encapsulated memory page numbers of multiple memory pages to the memory management unit.

[0264] Optionally, the apparatus further includes:

[0265] An address mapping module, configured to map the memory page to the virtual address memory area corresponding to the application process through the memory management unit;

[0266] A pointer sending module, configured to send the pointer of the memory page in the virtual address memory area to the application process.

[0267] Optionally, the apparatus further includes:

[0268] A data sending module, configured to enable the application process to send the application data to the address in the virtual address memory area pointed to by the pointer;

[0269] The data writing module is used to write the application data into the virtual address memory area with the address pointed to by the pointer as the starting address.

[0270] Optionally, the address mapping module includes:

[0271] A physical page frame number acquisition submodule, used for the memory management unit to search the physical page frame number corresponding to the memory page in the memory page table through the memory page number corresponding to the memory page;

[0272] The address mapping submodule is used to map the memory page corresponding to the physical page frame number to the virtual address memory area corresponding to the application process.

[0273] Optionally, the address mapping submodule includes:

[0274] The mapping relationship establishing submodule is used to establish a mapping relationship between the memory page number corresponding to the memory page and the physical page frame number in the virtual address memory area.

[0275] Optionally, the device further comprises:

[0276] A storage address determination module, used for the application process to determine the storage address of the application data according to the pointer;

[0277] An application data access module is used to access the application data in the storage address.

[0278] Optionally, the device further comprises:

[0279] The data deletion module is used to delete the data in the memory page when the application data has been used up.

[0280] Optionally, the device further comprises:

[0281] The memory page release module is used to release the multiple memory pages corresponding to the application data.

[0282] Optionally, the memory page release module includes:

[0283] A mapping relationship release submodule, used for releasing the mapping relationship between the virtual address memory area corresponding to the application process and the memory page through the memory management unit;

[0284] The memory page release submodule is used to release the memory page to the memory page number table according to the memory domain node number corresponding to the memory page.

[0285] Based on the same inventive concept, another embodiment of the present application provides a readable storage medium, on which a computer program is stored, and when the program is executed by a processor, the steps in the method described in any of the above embodiments of the present application are implemented.

[0286] Based on the same inventive concept, another embodiment of the present application provides an electronic device. Figure 6 It is a schematic diagram of an electronic device 600 proposed in an embodiment of the present application, including a memory 602, a processor 601, and a computer program stored on the memory and executable on the processor. When the processor executes, the steps in the dual-site data storage method described in any of the above embodiments of the present application are implemented.

[0287] For the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple. For the relevant parts, please refer to the partial description of the method embodiment.

[0288] Each embodiment in this specification is described in a progressive manner. The key point of each embodiment is to illustrate the differences from other embodiments. For the same or similar parts among the embodiments, reference can be made to each other.

[0289] Those skilled in the art should understand that the embodiments of the present application can be provided as a method, a device, or a computer program product. Therefore, the embodiments of the present application can take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, the embodiments of the present application can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk memories, CD-ROMs, optical memories, etc.) containing computer-usable program codes.

[0290] The embodiments of the present application are described with reference to the flowcharts and / or block diagrams of the methods, terminal devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or block in the flowchart and / or block diagram, and the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to the processors of general-purpose computers, special-purpose computers, embedded processors, or other programmable data processing terminal devices to generate a machine, so that the instructions executed by the processors of the computer or other programmable data processing terminal devices generate a device for implementing the functions specified in Figure 1 one process or multiple processes and / or blocks Figure 1 one block or multiple blocks.

[0291] These computer program instructions can also be stored in a computer-readable memory that can direct a computer or other programmable data processing terminal device to work in a specific manner, such that the instructions stored in the computer-readable memory produce a manufacture including an instruction device that implements the functions specified in one process Figure 1 or more processes and / or blocks Figure 1 or more blocks specified in one block or more blocks.

[0292] These computer program instructions can also be loaded onto a computer or other programmable data processing terminal device, such that a series of operation steps are executed on the computer or other programmable terminal device to produce a computer-implemented process, so that the instructions executed on the computer or other programmable terminal device provide steps for implementing the functions specified in one process Figure 1 or more processes and / or blocks Figure 1 or more blocks specified in one block or more blocks.

[0293] Although the preferred embodiments of the embodiments of the present application have been described, those skilled in the art can make additional changes and modifications once they learn the basic creative concept. Therefore, the appended claims are intended to be construed to include the preferred embodiments and all changes and modifications falling within the scope of the embodiments of the present application.

[0294] Finally, it should also be noted that in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, such that a process, method, article or terminal device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or elements inherent to such process, method, article or terminal device. Without further limitation, an element defined by the statement "including one..." does not exclude the existence of additional identical elements in the process, method, article or terminal device including the said element.

[0295] The above has introduced in detail the memory allocation method, device, equipment and storage medium provided by the present application. Specific examples are used in this article to elaborate on the principle and implementation manner of the present application. The description of the above embodiments is only used to help understand the method and its core idea of the present application; at the same time, for those of ordinary skill in the art, according to the idea of the present application, there will be changes in the specific implementation manner and application scope. In summary, the content of this specification should not be construed as a limitation to the present application.

Claims

1. A memory allocation method, characterized in that, The method includes: When the application process is in the initialization state, map the memory page table in the pre-created memory management unit to the user space corresponding to the application process. The memory page table stores memory page information of multiple memory domains corresponding to the application process. The memory domains are used to store the memory pages. The application process is a process generated during the operation of a protocol stack application deployed in a storage system based on a non-uniform memory access architecture; According to the memory page table, generate multiple memory page number tables corresponding to the memory page table. The memory page numbers in each memory page number table belong to the same memory domain. The memory page number table is used to determine the memory domain node number and physical page frame number to which the memory page belongs. The establishment process of the memory page number table is executed in the application process in the user state; When receiving application data, poll the memory page number table, and sequentially allocate corresponding multiple memory pages for the application data in each memory domain to obtain multiple memory page numbers corresponding to the application data. The allocation process is executed in the application process in the user state; Map the multiple memory pages corresponding to the multiple memory page numbers to the virtual address memory area corresponding to the application process in the user state through the memory management unit, so that the application process can access the multiple memory pages corresponding to the application data.

2. The memory allocation method according to claim 1, wherein Before mapping the memory page table in the pre-created memory management unit to the user space corresponding to the application process, the method further includes: Apply for multiple memory pages from the memory domains corresponding to the application process through the pre-created memory management unit; Establish the memory page table corresponding to the multiple memory pages.

3. The memory allocation method according to claim 2, wherein The method further includes: Add an applied flag to the memory pages that have been applied by the memory management unit in the memory domain.

4. The memory allocation method according to claim 2, wherein The step of applying for a corresponding number of multiple memory pages from the memory domains corresponding to the application process through the pre-created memory management unit includes: Determine multiple memory domains corresponding to the application process according to the application process information of the application process; Apply for a preset number of memory pages from each of the multiple memory domains.

5. The memory allocation method according to claim 2, characterized in that The step of establishing the memory page table corresponding to the multiple memory pages includes: Obtain the memory page information of each memory page; Add the memory page information of each memory page as a page table entry to a list to obtain the memory page table.

6. The memory allocation method according to claim 1, characterized in that, The step of mapping the memory page table in the pre-created memory management module to the user space corresponding to the application process includes: Determine the space address of the user space corresponding to the application process; Map the memory page table to the space address.

7. The memory allocation method according to claim 1, wherein The step of generating multiple memory page number tables corresponding to the memory page table according to the memory page table includes: Determine the memory domain node number of the memory domain corresponding to each memory page; Obtain the memory page number corresponding to each memory page; Put the memory page numbers of the memory pages with the same memory domain node number into the same list to obtain the memory page number table.

8. The memory allocation method according to claim 1, wherein The polling the memory page number table and sequentially allocating a plurality of corresponding memory pages for the application data in each memory domain includes: Determining a target number of the memory pages required by the application data; Obtaining a memory page number from each of the plurality of memory page number tables in turn, wherein the number of memory page numbers obtained from the memory page number table each time is one; When the number of the acquired memory page numbers reaches the target number, it is determined that the multiple memory pages corresponding to the acquired multiple memory page numbers are the multiple memory pages corresponding to the application data.

9. The memory allocation method according to claim 1, wherein The method further comprises: Encapsulating the memory page numbers of the plurality of memory pages into a preset data structure; The memory page numbers of the packaged plurality of memory pages are sent to the memory management unit.

10. The memory allocation method according to claim 9, characterized in that, The method further comprises: The pointer of the memory page in the virtual address memory area is sent to the application process.

11. The memory allocation method according to claim 10, wherein The method further comprises: The application process sends the application data to the address in the virtual address memory area pointed to by the pointer; The application data is written into the virtual address memory area with the address pointed to by the pointer as the starting address.

12. The memory allocation method according to claim 10, wherein Mapping the memory page to the virtual address memory area corresponding to the application process by the memory management unit includes: The memory management unit searches the memory page table for the physical page frame number corresponding to the memory page according to the memory page number corresponding to the memory page; The memory page corresponding to the physical page frame number is mapped to the virtual address memory area corresponding to the application process.

13. The memory allocation method according to claim 12, characterized in that, The mapping the memory page corresponding to the physical page frame number to the virtual address memory area corresponding to the application process includes: A mapping relationship between a memory page number corresponding to the memory page and the physical page frame number is established in the virtual address memory area.

14. The memory allocation method according to claim 11, characterized in that, The method further comprises: The application process determines the storage address of the application data according to the pointer; The application data is accessed at the storage address.

15. The memory allocation method according to claim 1, wherein The method further comprises: When the application data is completely used, the data in the memory page is deleted.

16. The memory allocation method according to claim 15, wherein The method further comprises: The memory pages corresponding to the application data are released.

17. The memory allocation method according to claim 16, wherein The releasing of the plurality of memory pages corresponding to the application data includes: Removing the mapping relationship between the virtual address memory area corresponding to the application process and the memory page through the memory management unit; According to the memory domain node number corresponding to the memory page, the memory page is released to the memory page number table.

18. A computer program product, comprising a computer program / instructions, characterized in that, When the computer program / instructions are executed by a processor, the steps in the method according to any one of claims 1 to 17 are implemented.

19. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, the steps in the method according to any one of claims 1 to 17 are implemented.

20. An electronic device, comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, characterized in that, When the processor executes the computer program, the steps of the method according to any one of claims 1 to 17 are implemented.

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