Method for filtering burrs in row coverage, electronic device and storage medium

Abstract

The present invention relates to the field of EDA technology, and more particularly to a method, electronic device, and storage medium for filtering glitches in line coverage. During the compilation phase, cache nodes for collecting coverage data are inserted adjacent to each executable code line; a filtering unit is inserted before the last line node, and the filtering unit calculates the bitwise OR between cumulative coverage data (stmt) and the coverage data collected by all cache nodes during the current execution of a process description block to obtain new cumulative coverage data; and stmt is updated to the new cumulative coverage data during the next clock cycle. This method eliminates glitches without changing the original file, solves the problem of inflated line coverage data, and improves the accuracy of line coverage data.

Description

Technical Field

[0001] The present invention relates to the technical field of EDA, and in particular to a method for filtering burrs in row coverage, an electronic device and a storage medium. Background Art

[0002] Verification coverage is a key tool for measuring the effectiveness and adequacy of verification activities. It can help engineers systematically improve test strategies and minimize potential defects in the design, thereby ensuring the quality and reliability of the final chip product. Coverage includes multiple types of coverage metrics, such as state machine coverage, line coverage, condition coverage, and assertion coverage. Among them, line coverage is used to measure whether every line of source code has been executed during the execution of the test case. Currently, line coverage is obtained by dynamically inserting probes during the compilation phase. These probes can record whether each line of code is actually executed during program execution during the runtime phase. When the test case is run, each probe will generate a mark or count when the corresponding line of code is executed, indicating that the line of code has been executed. After the test case is executed, the execution information is collected to calculate the coverage.

[0003] Typically, glitches occur due to users' inadequate consideration when writing test cases, leading to the inclusion of concurrency and other issues within the test cases. Currently, users must manually modify test cases to filter out these glitches. When obtaining coverage data based on test cases, the execution information generated by the glitches is also counted in the coverage calculation. Consequently, the presence of glitches can lead to inflated coverage data. For example, if the same procedure block is instantiated twice within the same clock cycle, the second instantiation will overwrite the results of the first. This means that the user's true intention was to instantiate the block after the second execution. However, when coverage is calculated, the results of both executions of the procedure block are included, resulting in inflated coverage data. In actual production applications, coverage data is typically collected in the post-processing stage, and in most cases, glitches cannot be eliminated by modifying the source files or test cases. Therefore, a method for filtering glitches without modifying the source code is urgently needed. Summary of the Invention

[0004] In order to solve the above technical problems, the present invention adopts a technical solution: a method for filtering burrs in line coverage, the method comprising the following steps:

[0005] S100 , in the compiling stage, obtaining all line nodes in a syntax tree for representing executable code lines in a process description block of a source code.

[0006] S300, insert a cache node at the adjacent position of each row node; and insert an initialization unit of the cache node before the first row node, the execution order of the initialization unit is first, and the execution order of the cache node inserted at the adjacent position of the first node is later; wherein, the i-th cache node inserted at the adjacent position of the i-th row node is used to collect coverage data of the code line corresponding to the i-th row node.

[0007] S500, insert a first filter node at the adjacent position after the last row node; the first filter node is used to calculate the bitwise OR between the cumulative coverage data stmt and the coverage data glitch collected by all cache nodes when the process description block is currently executed to obtain new cumulative coverage data; and in the next clock cycle, stmt is updated to the new cumulative coverage data.

[0008] In addition, the present invention also provides a non-transitory computer-readable storage medium, which stores at least one instruction or at least one program, and the at least one instruction or at least one program is loaded and executed by a processor to implement the above method.

[0009] In addition, the present invention also provides an electronic device including a processor and the above-mentioned non-transitory computer-readable storage medium.

[0010] The present invention has at least the following beneficial effects:

[0011] The present invention provides a method, electronic device, and storage medium for filtering glitches in line coverage. During the compilation phase, cache nodes for collecting coverage data are inserted adjacent to each executable code line. A filtering unit is inserted before the last line node. The filtering unit calculates the bitwise OR between cumulative coverage data (stmt) and the coverage data collected by all cache nodes during the current execution of a process description block to obtain new cumulative coverage data. Stmt is then updated to the new cumulative coverage data during the next clock cycle. This method eliminates glitches without changing the original file, solves the problem of inflated line coverage data, and improves the accuracy of line coverage data. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0013] Figure 1 A flow chart of a method for filtering glitches in row coverage provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0014] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making any creative efforts shall fall within the scope of protection of the present invention.

[0015] In order to solve the problem of glitches, the present invention provides a method for filtering glitches in line coverage, wherein glitches are generated due to circuit structure, delay, and input signals that may cause glitches. During the compilation phase, the present invention inserts a cache unit for collecting coverage data in the adjacent lines of each executable code line, and inserts an initialization unit for the cache node before the first row node, the initialization unit being earlier than the execution order of the cache node inserted in the adjacent position of the first node; inserts a filtering unit before the last row node, and the filtering unit calculates the bitwise OR between the cumulative coverage data (stmt) and the coverage data collected by all cache nodes during the current execution of the process description block to obtain new cumulative coverage data; and updates stmt to the new cumulative coverage data in the next clock cycle. This method achieves the purpose of eliminating glitches without changing the original file, solves the problem of inflated line coverage data, and improves the accuracy of line coverage data.

[0016] See also Figure 1 , which shows a flow chart of a method for filtering glitches in line coverage, the method comprising the following steps:

[0017] S100 , in the compiling stage, obtaining all line nodes in a syntax tree for representing executable code lines in a process description block of a source code.

[0018] The source code is a code written in a hardware description language. Optionally, the hardware description language includes Verilog, System Verilog, and HDL. In the prior art, other hardware description languages ​​also fall within the scope of protection of the present invention.

[0019] Among them, the executable code line is a single line statement in the source code file.

[0020] Optionally, a parser in the compiler parses the source code to obtain a syntax tree, checks the type of each node in the syntax tree, and extracts the line node of the executable code line in the syntax tree and its corresponding source code location based on the node type. Other prior art methods for obtaining each executable code line in the source code during the compilation phase fall within the scope of protection of this invention.

[0021] The process description block includes a combinational logic always block and a sequential logic always block. Other description blocks in the prior art also fall within the protection scope of the present invention.

[0022] Inserting additional nodes to collect coverage data during the compilation phase does not damage the source code. The nodes in the embodiment of the present invention are all nodes that implement corresponding functions through code.

[0023] S300: Insert a cache node adjacent to each row node; insert an initialization unit of the cache node before the first row node, with the initialization unit executed first and the cache node inserted adjacent to the first node executed later; wherein the i-th cache node inserted adjacent to the i-th row node is used to collect coverage data for the code line corresponding to the i-th row node. The cache node inserted adjacent to each row node is used to collect coverage data for the row node.

[0024] Among them, the row nodes are all code lines in the process description block, and the initialization unit is before the first row node, which means that each time the process description block is executed, the coverage data in the cache node is initialized to the initial value. When the initial value is 0, the coverage data is reset to 0 each time the process description block is executed.

[0025] Among them, the adjacent position is the previous node or the next node of the current row node. According to the order of code line execution, the previous code line executed is the previous node, and the next code line executed in sequence is the next node. When the adjacent position is the previous node, the code represented by the cache node is executed, and the code line represented by the adjacent row node will inevitably be executed in sequence, and the coverage data of the code line execution is collected through the cache node. Similarly, when the adjacent position is the next node, the code line represented by the row node is executed, and the code represented by the cache node will inevitably be executed in sequence, and the coverage data of the code line execution is collected through the cache node.

[0026] Optionally, the i-th cache node collects coverage data by configuring the coverage data as a coverage value and caching the coverage value in a corresponding cache unit. Other methods of collecting coverage data in the prior art fall within the protection scope of the present invention.

[0027] As a preferred embodiment, the cache node is an array element in an array variable. Each array element in the array variable glitch is used to configure a coverage value that covers a row node, and the coverage values ​​of different row nodes occupy different array elements in the array variable, and the coverage values ​​of different row nodes do not interfere with each other. For example, 1 represents coverage, and 0 represents non-coverage, and the initial value of all array elements in the array variable is 0. Other coverage values ​​used to indicate coverage or not in the prior art fall within the protection scope of the present invention. Other cache units used to collect coverage data in the prior art fall within the protection scope of the present invention.

[0028] Optionally, the data length of the array variable is the total number of code lines. In the prior art, other data lengths capable of storing coverage values ​​of different lines respectively through elements in the array variable fall within the protection scope of the present invention.

[0029] S500: Insert a first filter node at the adjacent position after the last row node. The first filter node is used to calculate the bitwise OR between the cumulative coverage data (stmt) and the coverage data (glitch) collected by all cache nodes during the current execution of the process description block, to obtain new cumulative coverage data. In the next clock cycle, stmt is updated with the new cumulative coverage data. This first filter node can filter out glitches generated within each clock cycle.

[0030] A procedure block may be executed multiple times within a clock cycle. Regardless of how many times a procedure block is executed within a clock cycle, the value of stmt is only updated on the next clock cycle, and the glitch is reinitialized each time the procedure block is re-executed.

[0031] If glitch is an array variable, 1 indicates coverage and 0 indicates uncovered. The initial value of each array element in the glitch is 0. For example, after a test case is executed or a simulation ends, the array elements in the glitch are 01110, indicating that the code lines corresponding to nodes 2-4 are covered, with a coverage rate of 3 / 5.

[0032] As an example, the following illustrates the glitch elimination process. For example, consider executing the same source code block twice within a clock cycle. The initial value of stmt is 0. For example, consider one node. In the first clock cycle, the first execution of the block covers the kth line of code, glitch[k] = 1, and the OR operation between glitch[k] and stmt yields 1. However, because the current clock cycle has not yet ended, the value of stmt is not updated. During the second execution of the block, glitch[k] is reset to its initial value of 0 by the initialization unit, and the kth line of code is not covered. glitch[k] = 0, and the OR operation between glitch[k] and stmt yields 0. In the second clock cycle, the value of stmt is updated to the 0 obtained during the second execution of the block in the first clock cycle. The 1 obtained during the OR operation during the first execution of the block in the first cycle is now filtered out, and the filtered out 1 is the glitch.

[0033] As a preferred embodiment, the first filtering node in S500 further includes an entry activation switch. When the entry activation switch is enabled, the first filtering node is activated to collect coverage data. Whether coverage data is collected is controlled by the entry activation switch. Alternatively, the entry activation switch can be implemented using a conditional block. Other prior art methods for controlling whether coverage data is collected using an entry activation switch fall within the scope of the present invention.

[0034] As a preferred embodiment, S500 further includes: after a time delay corresponding to the time span t occupied by the glitch, updating the value of stmt to new cumulative coverage data, thereby filtering glitches of different widths. Other prior art methods for filtering glitches of different widths fall within the scope of protection of the present invention.

[0035] As a preferred embodiment, S500 further includes: S510, when the i-th row node is a delay or jump, inserting a second filter node at an adjacent position before the i-th row node. The second filter node is used to calculate a bitwise OR between the cumulative coverage data (stmt) and the intermediate coverage data collected up to the i-th cache node during the current execution of the process description block, to obtain intermediate coverage data; in the next clock cycle, stmt is updated to the intermediate coverage data. Specifically, if no jump occurs, execution continues until the first filter node, collecting coverage data for all code lines during the current execution of the process description block. If a jump occurs, at least the data before the jump is saved, and the data before the jump is not lost. The second filter node saves the intermediate cumulative coverage data collected before the delay or jump statement to prevent coverage data loss after the delay or jump. Because delays may span clock cycles, code after the delay will be executed in a subsequent clock cycle. If coverage data is not saved before the delay, data between the start of the current clock cycle and the execution of the row node representing the delay will not be saved, resulting in coverage data loss. Other methods in the prior art for storing intermediate cumulative coverage data before a delay or jump statement all fall within the protection scope of the present invention.

[0036] Optionally, the step S510 further includes an entry start switch, and when the entry start switch is enabled, the second filtering node is started to collect coverage data. Whether to collect coverage data is controlled by the entry start switch.

[0037] An embodiment of the present invention also provides a non-transitory computer-readable storage medium, which can be set in an electronic device to store at least one instruction or at least one program related to implementing a method in a method embodiment. The at least one instruction or the at least one program is loaded and executed by the processor to implement the method provided in the above embodiment.

[0038] An embodiment of the present invention further provides an electronic device including a processor and the aforementioned non-transitory computer-readable storage medium.

[0039] An embodiment of the present invention further provides a computer program product comprising program code. When the program product is run on an electronic device, the program code is used to enable the electronic device to execute the steps of the method according to various exemplary embodiments of the present invention described above in this specification.

[0040] Although some specific embodiments of the present invention have been described in detail by way of example, it should be understood by those skilled in the art that the above examples are for illustration only and are not intended to limit the scope of the present invention. It should also be understood by those skilled in the art that various modifications may be made to the embodiments without departing from the scope and spirit of the present invention. The scope of the present invention is defined by the appended claims.

Claims

1. A method for filtering burrs in line coverage, characterized in that: The method comprises the following steps: S100, in the compilation phase, obtaining all line nodes in the syntax tree for representing executable code lines in a process description block of the source code; S300: inserting cache nodes at adjacent positions of each row node; and inserting an initialization unit of the cache node before the first row node, with the initialization unit being executed first and the cache nodes inserted adjacent to the first node being executed later; wherein the i-th cache node inserted adjacent to the i-th row node is used to collect coverage data for the code line corresponding to the i-th row node; S500, insert a first filter node at the adjacent position after the last row node; the first filter node is used to calculate the bitwise OR between the cumulative coverage data stmt and the coverage data glitch collected by all cache nodes when the process description block is currently executed to obtain new cumulative coverage data; and in the next clock cycle, stmt is updated to the new cumulative coverage data.

2. The method according to claim 1, characterized in that In S500, the first filtering node further includes an entry start switch. When the entry start switch is valid, the first filtering node is started to collect coverage data.

3. The method according to claim 1, characterized in that S500 further includes: after a time delay of the time span t occupied by the glitch, updating the value of stmt to new accumulated coverage data.

4. The method according to claim 1, wherein The S500 further includes: S510, when the i-th row node is a delay or jump, a second filter node is inserted at the adjacent position before the i-th row node, and the second filter node is used to calculate the bitwise OR between the cumulative coverage data stmt and the intermediate coverage data collected up to the i-th cache node when the process description block is currently executed, to obtain the intermediate coverage data; in the next clock cycle, stmt is updated to the intermediate coverage data.

5. The method according to claim 4, characterized in that The S510 further includes an entry start switch. When the entry start switch is valid, the second filtering node is started to collect coverage data.

6. The method according to claim 1, characterized in that The i-th cache node collects coverage data by configuring the coverage data as coverage values ​​and caching the coverage values ​​into corresponding cache units.

7. The method according to claim 6, characterized in that The cache node is an array element in an array variable.

8. The method according to claim 7, characterized in that The data length of the array variable is the total number of code lines.

9. A non-transitory computer-readable storage medium, wherein at least one instruction or at least one program is stored in the storage medium, characterized in that: The at least one instruction or the at least one program is loaded and executed by a processor to implement the method according to any one of claims 1 to 8.

10. An electronic device, characterized in that: The device comprises a processor and the non-transitory computer-readable storage medium as claimed in claim 9.

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