A New Dual-Mode Low-Noise Amplifier

By combining the first noise cancellation low-noise release branch and the second noise cancellation low-noise release branch in the dual-mode low-noise amplifier, and using the Switch switch to realize dual-mode switching, the problem of 1dB compression point improvement in the prior art is solved. Signal resistance to blockage is significantly improved.

CN118868810BActive Publication Date: 2024-12-31HEFEI BRITE TECH CO LTD
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Patent Information

Application Number
CN202411347397.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-09-26
Publication Date
2024-12-31
Estimated Expiration
2044-09-26

AI Technical Summary

Technical Problem

When switching from low noise mode to high linearity mode, existing dual-mode low noise amplifiers cannot effectively increase the 1dB compression point, resulting in poor anti-blocking signal capability in high gain mode.

Method used

The combination of the first noise cancellation low-noise release branch and the second noise cancellation low-noise release branch is adopted, and the dual-mode switching is realized through the Switch switch, and the signal and noise are superimposed when the switch is turned off to realize the low-noise mode; When on, the branch is disconnected without signal amplification, achieving a high linearity mode, and increasing the 1dB compression point through the combination of different structure amplifiers of the MOS tube.

Benefits of technology

The 1dB compression point during switching from low noise mode to high linearity mode is significantly improved, and the receiver's anti-blocking signal capability is improved.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention discloses a novel dual-mode low noise amplifier, which belongs to the field of wireless communication technology, and includes a first noise elimination low noise amplifier branch, a second noise elimination low noise amplifier branch and a Switch switch; wherein the first noise elimination low noise amplifier branch and the second noise elimination low noise amplifier branch respectively realize the superposition of two-way signals and noise at their respective output ends to realize the noise elimination function; and the Switch switch is used to realize the switching of the dual modes of low noise mode and high linearity mode. The present invention adopts an organic combination of two low noise amplifiers with different structures, realizes noise elimination low noise amplifier in low noise mode, realizes push-pull low noise amplifier in high linearity mode, and when switching from low noise mode to high linearity mode, not only the third-order interception point is improved, but also the 1dB compression point is improved, so that the anti-blocking signal capability of the receiver is significantly improved.
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Description

Technical Field

[0001] The invention belongs to the technical field of wireless communications, and in particular relates to a novel dual-mode low-noise amplifier. Background Art

[0002] Most low noise amplifiers in wireless communications are dual-mode, i.e., low noise mode and high linearity mode. However, when switching from low noise mode to high linearity mode, the third-order interception point is often increased by reducing the gain. This method cannot improve the 1dB compression point, resulting in poor anti-blocking signal capability of the low noise amplifier in high gain mode, and the noise performance of the receiver deteriorates significantly when encountering blocking signals. Summary of the invention

[0003] The object of the present invention is to provide a novel dual-mode low noise amplifier to overcome the problem of low 1dB compression point value in high linearity mode.

[0004] To achieve the above object, the present invention provides the following technical solutions: a novel dual-mode low noise amplifier, the dual-mode low noise amplifier comprises a first noise elimination low noise amplifier branch, a second noise elimination low noise amplifier branch and a switch;

[0005] The first noise elimination low noise amplifier branch and the second noise elimination low noise amplifier branch respectively realize the superposition of two-way signals and noise at their respective output ends to achieve the noise elimination function;

[0006] The Switch switch is used to realize dual-mode switching. When the Switch switch is closed, the first noise elimination low noise amplifier branch and the second noise elimination low noise amplifier branch constitute two noise elimination low noise amplifiers, and the signals are superimposed. At this time, it is a low noise mode; when the Switch switch is disconnected, the two noise elimination low noise amplifier branches have no signal amplification effect, and it is a high linearity mode.

[0007] Preferably, the first noise elimination low noise amplifier branch includes MOS tubes M1, M2, M3, M4 and M5;

[0008] Among them, MOS tubes M1 and M2 are common-gate amplifiers, and both are used to amplify the input signal in phase. The channel noise current of MOS tube M1 forms anti-phase noise at the input and output ends. MOS tube M5 is a P-type common-source amplifier circuit, which has an anti-phase amplification effect on the signal and noise. Therefore, the input signal becomes reverse after being amplified by MOS tube M5, and the noise is reversely amplified again and becomes in phase at the output end of MOS tube M5; MOS tubes M3 and M4 are common-source amplifiers, which perform anti-phase amplification on the noise and signal, and finally the two signals and noise are superimposed at the output end to achieve the noise elimination function.

[0009] Preferably, the second noise elimination low noise amplifier branch includes MOS tubes M6, M7, M8, M9 and M10;

[0010] Among them, MOS tubes M6 and M7 are common-gate amplifiers, and both are used to amplify the input signal in phase. The channel noise current of MOS tube M6 forms anti-phase noise at the input end and the output end. MOS tube M10 is a P-type common-source amplifier circuit, which has an anti-phase amplification effect on the signal and the noise. Therefore, the input signal becomes reversed after being amplified by MOS tube M10, and the noise is reversely amplified again and becomes in phase at the output end of MOS tube M10; MOS tubes M8 and M9 are common-source amplifiers, which perform anti-phase amplification on the noise and the signal. Finally, the two signals and the noise are superimposed at the output end to achieve the noise elimination function.

[0011] Preferably, when the Switch is closed, the MOS tubes M1, M2, M3, M4, M5, M6, M7, M8, M9 and M10 constitute a first noise elimination low noise amplifier branch and a second noise elimination low noise amplifier branch, forming signal superposition, and this is the low noise mode; and when the Switch is disconnected, the MOS tubes M3 and M4 of the first noise elimination low noise amplifier branch and the MOS tubes M8 and M9 of the second noise elimination low noise amplifier branch are disconnected as common-gate amplifiers, and there is no signal amplification effect, and this is the high linearity mode.

[0012] Preferably, the dual-mode low noise amplifier also includes Vcm and VDD, and Vcm is 1 / 2 of VDD. In the negative half cycle of the signal, MOS tubes M6 and M7 work, and in the positive half cycle of the signal, MOS tubes M1 and M2 work; at the same time, MOS tubes M1, M2 and MOS tubes M6 and M7 constitute a push-pull low noise amplifier, which can significantly improve the 1dB compression point of the circuit.

[0013] Compared with the prior art, the present invention has the following beneficial effects:

[0014] The present invention adopts an organic combination of two low noise amplifiers with different structures. In the low noise mode, a noise-cancelling low noise amplifier is realized, and in the high linearity mode, a push-pull low noise amplifier is realized. When switching from the low noise mode to the high linearity mode, not only the third-order interception point is improved, but also the 1dB compression point is increased, so that the receiver's ability to resist blocking signals is significantly improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 Schematic diagram of a low noise amplifier for noise elimination.

[0016] Figure 2 This is a schematic diagram of the low noise amplifier of the present invention. DETAILED DESCRIPTION

[0017] The technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the accompanying drawings in the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0018] Most low noise amplifiers in wireless communications are dual-mode, i.e., low noise mode and high linearity mode. However, when switching from low noise mode to high linearity mode, the third-order interception point is often increased by reducing the gain. This method cannot improve the 1dB compression point, resulting in poor anti-blocking signal capability of the low noise amplifier in high gain mode, and the noise performance of the receiver deteriorates significantly when encountering blocking signals.

[0019] In order to solve the technical problems existing in the prior art, the present application provides a novel dual-mode low noise amplifier, which includes a first noise elimination low noise amplifier branch, a second noise elimination low noise amplifier branch and a Switch switch;

[0020] The first noise elimination low noise amplifier branch and the second noise elimination low noise amplifier branch respectively realize the superposition of two-way signals and noise at their respective output ends to achieve the noise elimination function;

[0021] The Switch switch is used to realize dual-mode switching. When the Switch switch is closed, the first noise elimination low noise amplifier branch and the second noise elimination low noise amplifier branch constitute two noise elimination low noise amplifiers, and the signals are superimposed. At this time, it is a low noise mode; when the Switch switch is disconnected, the two noise elimination low noise amplifier branches have no signal amplification effect, and it is a high linearity mode.

[0022] Figure 1 This is a schematic diagram of a noise-eliminating low-noise amplifier, where the dotted line represents noise and the solid line represents signal. The noise current of M1 generates noise signals with opposite phases at Vx and V1, and these two noises cancel each other out through M3 and M4 at the source level of M5. The signal generates in-phase signals at V1 and Vx, and the signal is superimposed at the source level of M5 through M3 and M4. Noise elimination is achieved when the common-gate gain of the M1 tube branch and the common-source amplifier gain of the M4 tube branch are equal. Based on this noise elimination circuit, the DC current of each branch or the transconductance of the amplifier tube is set to be variable to achieve variable gain.

[0023] Figure 2 The low noise amplifier principle diagram of the present invention, the noise elimination principle and Figure 1 Similarly, M1~M5 form a noise-canceling low-noise amplifier, and M6~10 form another noise-canceling low-noise amplifier, and the signals are superimposed at the output. Switch is a switch to achieve switching between low-noise mode and high-linearity mode.

[0024] like Figure 2 As shown, M1 and M2 are common-gate amplifiers, which amplify the input signal in phase. The channel noise current of M1 tube forms anti-phase noise at the input and output ends. M5 is a P-type common-source amplifier circuit, which has an anti-phase amplification effect on the signal and noise. Therefore, after the input signal is amplified by M5, it becomes reversed, and the noise is reversely amplified again and becomes in phase at the output end of M5. M3 and M4 are common-source amplifiers, which amplify the noise and signal in phase, and finally superimpose the two signals and noise at the output end to achieve the noise elimination function. The same is true for M6~10. Switch is a switch to achieve dual-mode switching. When the switch is closed, M1~M10 form two noise-eliminating low-noise amplifiers, and the signals are superimposed, which is a low-noise mode. When the switch is disconnected, the common-gate amplifiers of M3, M4 and M8, M9 are disconnected, and there is no signal amplification effect. Vcm takes 1 / 2 of VDD. In the negative half cycle of the signal, M6 and M7 work, and in the positive half cycle of the signal, M1 and M2 work. M1, M2, M6 and M7 form a push-pull low noise amplifier, which greatly improves the 1dB compression point of the circuit.

[0025] The present invention adopts an organic combination of two low noise amplifiers with different structures. In the low noise mode, a noise-cancelling low noise amplifier is realized, and in the high linearity mode, a push-pull low noise amplifier is realized. When switching from the low noise mode to the high linearity mode, not only the third-order interception point is improved, but also the 1dB compression point is increased, so that the receiver's ability to resist blocking signals is significantly improved.

[0026] Although the preferred embodiments of the present invention have been described, those skilled in the art may make other changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present invention.

[0027] Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include these modifications and variations.

Claims

1. A novel dual-mode low noise amplifier, characterized in that: The dual-mode low noise amplifier comprises a first noise elimination low noise amplifier branch, a second noise elimination low noise amplifier branch and a switch; the first noise elimination low noise amplifier branch and the second noise elimination low noise amplifier branch respectively realize the superposition of two-way signals and noise at their respective output ends to realize the noise elimination function; and the switch is used to realize the switching of the dual modes. When the switch is closed, the first noise elimination low noise amplifier branch and the second noise elimination low noise amplifier branch constitute two noise elimination low noise amplifiers, and the signals are superimposed, and this is the low noise mode; and when the switch is disconnected, the two noise elimination low noise amplifier branches have no signal amplification effect, and this is the high linearity mode; The first noise elimination low noise amplifier branch includes MOS tubes M1, M2, M3, M4 and M5; Among them, MOS tubes M1 and M2 are common-source and common-gate amplifiers, and both are used to amplify the input signal in phase. The channel noise current of MOS tube M1 forms anti-phase noise at the input and output ends. MOS tube M5 is a P-type common-source amplifier circuit, which has an anti-phase amplification effect on the signal and noise. Therefore, the input signal becomes reversed after being amplified by MOS tube M5, and the noise is reversely amplified again and becomes in phase at the output end of MOS tube M5; while MOS tubes M3 and M4 are common-gate amplifiers, which perform anti-phase amplification on the noise and signal, and finally the two signals and noise are superimposed at the output end to achieve the noise elimination function; The second noise elimination low noise amplifier branch includes MOS tubes M6, M7, M8, M9 and M10; Among them, MOS tubes M6 and M7 are common-gate amplifiers, and both are used to amplify the input signal in phase. The channel noise current of MOS tube M6 forms anti-phase noise at the input end and the output end. MOS tube M10 is a P-type common-source amplifier circuit, which has an anti-phase amplification effect on the signal and the noise. Therefore, the input signal becomes reversed after being amplified by MOS tube M10, and the noise is reversely amplified again and becomes in phase at the output end of MOS tube M10; MOS tubes M8 and M9 are common-source amplifiers, which perform anti-phase amplification on the noise and the signal, and finally the two-way signal and the noise are superimposed at the output end to achieve the noise elimination function; The dual-mode low noise amplifier also includes Vcm and VDD, and Vcm is 1 / 2 of VDD. In the negative half cycle of the signal, MOS tubes M6 and M7 work, and in the positive half cycle of the signal, MOS tubes M1 and M2 work; MOS tubes M1, M2 and MOS tubes M6 and M7 form a push-pull low noise amplifier, which can significantly improve the 1dB compression point of the circuit.

2. A novel dual-mode low noise amplifier according to claim 1, characterized in that: When the Switch is closed, the MOS tubes M1, M2, M3, M4, M5, M6, M7, M8, M9 and M10 form a first noise elimination low noise amplifier branch and a second noise elimination low noise amplifier branch, forming signal superposition, and this is the low noise mode; when the Switch is opened, the MOS tubes M3 and M4 of the first noise elimination low noise amplifier branch and the MOS tubes M8 and M9 of the second noise elimination low noise amplifier branch are disconnected as common gate amplifiers, and there is no signal amplification effect, and this is the high linearity mode.