Radio Frequency Power Amplifier and Radio Frequency Front-End Module

Abstract

The present invention discloses a radio frequency power amplifier, which includes a first-stage amplification circuit, a second-stage amplification circuit, and an inter-stage conversion circuit. The first-stage amplification circuit includes a first power amplifier. The second-stage amplification circuit includes a first differential amplification circuit and a second differential amplification circuit. The inter-stage conversion circuit includes a first voltage synthesis unit and a second voltage synthesis unit. The first input terminal of the first voltage synthesis unit and the first input terminal of the second voltage synthesis unit are connected to form a first connection node. The output terminal of the first power amplifier is connected to the first connection node. The input terminal of the first power amplifier is connected to a signal input terminal. The output terminal of the first voltage synthesis unit is connected to the first differential amplification circuit. The output terminal of the second voltage synthesis unit is connected to the second differential amplification circuit. Thus, while ensuring the area of the radio frequency power amplifier, the impedance matching of the circuit can be flexibly adjusted.

Description

Technical Field

[0001] The present invention relates to the field of radio frequency technology, and in particular, to a radio frequency power amplifier and a radio frequency front-end module. Background Art

[0002] The radio frequency power amplifier (RF PA) is a main part of the transmitting system, and its importance is self-evident. In the pre-stage circuit of the transmitter, the radio frequency signal power generated by the modulation oscillation circuit is very small and needs to be amplified through a series of amplifications (buffer stage, intermediate amplification stage, final power amplification stage) to obtain sufficient radio frequency power before it can be fed to the antenna for radiation. In order to obtain a sufficiently large radio frequency output power, a radio frequency power amplifier is required. However, when designing a radio frequency power amplifier, in order to flexibly adjust the performance index of impedance matching, a complex circuit structure often needs to be designed, resulting in an overly cumbersome overall architecture of the radio frequency power amplifier. Summary of the Invention

[0003] Embodiments of the present invention provide a power amplifier and a radio frequency front-end module, which solve the problem that the radio frequency power amplifier cannot flexibly adjust impedance matching while ensuring the area.

[0004] A radio frequency power amplifier includes a first-stage amplification circuit, a second-stage amplification circuit, and an inter-stage conversion circuit. The first-stage amplification circuit includes a first power amplifier. The second-stage amplification circuit includes a first differential amplification circuit and a second differential amplification circuit. The inter-stage conversion circuit includes a first voltage synthesis unit and a second voltage synthesis unit. The first input terminal of the first voltage synthesis unit and the first input terminal of the second voltage synthesis unit are connected to form a first connection node. The output terminal of the first power amplifier is connected to the first connection node. The input terminal of the first power amplifier is connected to a signal input terminal. The output terminal of the first voltage synthesis unit is connected to the first differential amplification circuit. The output terminal of the second voltage synthesis unit is connected to the second differential amplification circuit.

[0005] Further, the first voltage synthesis unit and the second voltage synthesis unit are configured such that the real part range of the load impedance at the output terminal of the first power amplifier is [5 ohms to 25 ohms].

[0006] Further, the first power amplifier is a current amplifier.

[0007] Further, the radio frequency power amplifier further includes a capacitance matching network, and the capacitance matching network is disposed between the first power amplifier and the first differential amplification circuit and the second differential amplification circuit.

[0008] Further, the capacitance matching network is configured to convert the inductive impedance at the first input end of the first voltage synthesizing unit and the inductive impedance at the first input end of the second voltage synthesizing unit into capacitive impedance at the output end of the first power amplifier.

[0009] Further, the capacitance matching network includes a first matching capacitor. The first end of the first matching capacitor is connected to the first connection node, and the second end of the first matching capacitor is grounded.

[0010] Further, the second end of the first voltage synthesizing unit is connected to a first power supply terminal, and the second end of the second voltage synthesizing unit is connected to a second power supply terminal.

[0011] Further, the capacitance matching network includes a second matching capacitor and a third matching capacitor;

[0012] The first end of the second matching capacitor is connected to the first input end of the first voltage synthesizing unit, and the second end is connected to the output end of the first power amplifier; the first end of the third matching capacitor is connected to the first input end of the second voltage synthesizing unit, and the second end is connected to the output end of the first power amplifier;

[0013] Alternatively, the first end of the second matching capacitor is connected to the second input end of the first voltage synthesizing unit, and the second end is grounded; the first end of the third matching capacitor is connected to the second input end of the second voltage synthesizing unit, and the second end is grounded.

[0014] Further, the capacitance matching network includes a fourth matching capacitor. The first end of the fourth matching capacitor is connected to the output end of the first power amplifier, and the second end of the fourth matching capacitor is connected to the first connection node.

[0015] Further, the RF power amplifier further includes a third power supply terminal, and the third power supply terminal is connected to the output end of the first power amplifier.

[0016] Further, the first differential amplifier circuit includes a second power amplifier and a third power amplifier, and the second differential amplifier circuit includes a fourth power amplifier and a fifth power amplifier; the first output end of the first voltage synthesizing unit is connected to the input end of the second power amplifier, and the second output end of the first voltage synthesizing unit is connected to the input end of the third power amplifier; the first output end of the second voltage synthesizing unit is connected to the input end of the fourth power amplifier, and the second output end of the second voltage synthesizing unit is connected to the input end of the fifth power amplifier.

[0017] Further, the first voltage synthesis unit includes a first balun, the first balun includes a first winding and a second winding that are mutually coupled, the second voltage synthesis unit includes a second balun, the second balun includes a third winding and a fourth winding that are mutually coupled, a first end of the first winding and a first end of the third winding are connected to an output end of a first power amplifier, a second end of the first winding is connected to a first potential end, a second end of the third winding is connected to a second potential end, a first end of the second winding is connected to an input end of a second power amplifier, a second end of the second winding is connected to an input end of a third power amplifier, a first end of the fourth winding is connected to an input end of a fourth power amplifier, a second end of the fourth winding is connected to an input end of a fifth power amplifier, wherein the first potential end is a power supply end or a ground end, and the second potential end is a power supply end or a ground end.

[0018] Further, the second power amplifier is configured to amplify a first radio frequency signal, the third power amplifier is configured to amplify a second radio frequency signal, the fourth power amplifier is configured to amplify a third radio frequency signal, the fifth power amplifier is configured to amplify a fourth radio frequency signal, wherein a phase of the first radio frequency signal and a phase of the fourth radio frequency signal are a first phase, and a phase of the second radio frequency signal and a phase of the third radio frequency signal are a second phase.

[0019] A radio frequency power amplifier includes a first-stage amplification circuit, a second-stage amplification circuit, an inter-stage conversion circuit, and a capacitance matching network. The first-stage amplification circuit includes a first power amplifier. The second-stage amplification circuit includes a first differential amplification circuit and a second differential amplification circuit. The inter-stage conversion circuit includes a first voltage synthesis unit and a second voltage synthesis unit. A first input end of the first voltage synthesis unit and a first input end of the second voltage synthesis unit are connected to form a first connection node. An output end of the first power amplifier is connected to the first connection node. An input end of the first power amplifier is connected to a signal input end. An output end of the first voltage synthesis unit is connected to the first differential amplification circuit. An output end of the second voltage synthesis unit is connected to the second differential amplification circuit. The capacitance matching unit is disposed between the first-stage amplification circuit and the second-stage amplification circuit.

[0020] Further, the capacitance matching network includes a first matching capacitor. A first end of the first matching capacitor is connected to the first connection node, and a second end of the first matching capacitor is grounded.

[0021] Further, the capacitance matching network includes a second matching capacitor and a third matching capacitor;

[0022] The first end of the second matching capacitor is connected to the first input end of the first voltage synthesizing unit, and the second end is connected to the output end of the first power amplifier; the first end of the third matching capacitor is connected to the first input end of the second voltage synthesizing unit, and the second end is connected to the output end of the first power amplifier;

[0023] Alternatively, the first end of the second matching capacitor is connected to the second input end of the first voltage synthesizing unit, and the second end is grounded; the first end of the third matching capacitor is connected to the second input end of the second voltage synthesizing unit, and the second end is grounded.

[0024] A radio frequency front-end module, characterized in that it includes a first chip and the radio frequency power amplifier, and the radio frequency power amplifier is disposed on the first chip.

[0025] A radio frequency front-end module includes a first-stage amplification circuit, a second-stage amplification circuit, and an inter-stage conversion circuit. The first-stage amplification circuit includes a first power amplifier. The second-stage amplification circuit includes a first differential amplification circuit and a second differential amplification circuit. The inter-stage conversion circuit includes a first voltage synthesizing unit and a second voltage synthesizing unit. The first input end of the first voltage synthesizing unit and the first input end of the second voltage synthesizing unit are connected to form a first connection node. The output end of the first power amplifier is connected to the first connection node. The input end of the first power amplifier is connected to a signal input end. The output end of the first voltage synthesizing unit is connected to the first differential amplification circuit, and the output end of the second voltage synthesizing unit is connected to the second differential amplification circuit. Wherein, the first voltage synthesizing unit and the second voltage synthesizing unit are disposed on opposite sides of the first power amplifier.

[0026] Further, the center points of the first voltage synthesizing unit and the second voltage synthesizing unit are located on the same straight line.

[0027] Further, the output end of the first power amplifier, the first input end of the first voltage synthesizing unit, and the first input end of the second voltage synthesizing unit are located on the same straight line.

[0028] Further, the first power amplifier is disposed in the central region between the first voltage synthesizing unit and the second voltage synthesizing unit.

[0029] Further, the transmission line lengths of the connection between the output end of the first power amplifier and the first input end of the first voltage synthesizing unit and the connection between the output end of the first power amplifier and the first input end of the second voltage synthesizing unit are the same.

[0030] Further, the RF front-end module further includes a capacitive matching network, and the capacitive matching network is disposed between the first voltage synthesizing unit and the second voltage synthesizing unit.

[0031] Further, the second input terminal of the first voltage synthesizing unit is connected to the first power supply terminal, the first input terminal of the second voltage synthesizing unit is connected to the second power supply terminal, the first power supply terminal is disposed on a side of the first voltage synthesizing unit away from the first power amplifier, and the second power supply terminal is disposed on a side of the second voltage synthesizing unit away from the first power amplifier.

[0032] Further, the RF power amplifier further includes a first decoupling capacitor and a second decoupling capacitor. One end of the first decoupling capacitor is connected to the first power supply terminal, and the other end is connected to the ground terminal; one end of the second decoupling capacitor is connected to the second power supply terminal, and the other end is connected to the ground terminal. Wherein, the first decoupling capacitor is disposed adjacent to the first power supply terminal, and the second decoupling capacitor is disposed adjacent to the second power supply terminal.

[0033] Further, the RF front-end module further includes a third power supply terminal VCC, and the third power supply terminal VCC is connected to the output terminal of the first power amplifier 10. Wherein, the third power supply terminal VCC is disposed between the first voltage synthesizing unit 31 and the second voltage synthesizing unit 41.

[0034] Further, the capacitive matching network includes a first matching capacitor. The first end of the first matching capacitor is connected to the output terminal of the first power amplifier, and the first matching capacitor is connected to the ground terminal. The first matching capacitor is disposed between the first voltage synthesizing unit and the second voltage synthesizing unit.

[0035] Further, the first matching capacitor is disposed in the central region between the first voltage synthesizing unit and the second voltage synthesizing unit.

[0036] Further, the capacitive matching network further includes a second matching capacitor and a third matching capacitor. The first end of the second matching capacitor is connected to the output terminal of the first power amplifier, the second end of the second matching capacitor is connected to the first input terminal of the first voltage synthesizing unit, the first end of the third matching capacitor is connected to the output terminal of the first power amplifier, and the second end of the third matching capacitor is connected to the first input terminal of the second voltage synthesizing unit. Wherein, the second matching capacitor is disposed between the third power supply terminal and the first voltage synthesizing unit, and the third matching capacitor is disposed between the third power supply terminal and the second voltage synthesizing unit.

[0037] Further, the capacitance matching network further includes a fourth matching capacitor. One end of the fourth matching capacitor is connected to the output end of the first power amplifier, and the other end is connected to the first connection node. Wherein, the fourth matching capacitor is disposed between the first power amplifier and the first connection node.

[0038] Further, the RF front-end module further includes a fifth matching capacitor and a sixth matching capacitor. The first end of the fifth matching capacitor is connected to the second input end of the first voltage synthesis unit, and the second end of the fifth matching capacitor is connected to the ground terminal. The first end of the sixth matching capacitor is connected to the second input end of the second voltage synthesis unit, and the second end of the sixth matching capacitor is connected to the ground terminal. Wherein, the fifth matching capacitor is disposed on a side of the first voltage synthesis unit away from the first power amplifier, and the sixth matching capacitor is disposed on a side of the second voltage synthesis unit away from the first power amplifier.

[0039] The above-mentioned RF power amplifier includes a first-stage amplification circuit, a second-stage amplification circuit, and an inter-stage conversion circuit. The first-stage amplification circuit includes a first power amplifier. The second-stage amplification circuit includes a first differential amplification circuit and a second differential amplification circuit. The inter-stage conversion circuit includes a first voltage synthesis unit and a second voltage synthesis unit. The first input end of the first voltage synthesis unit and the first input end of the second voltage synthesis unit are connected to form a first connection node. The output end of the first power amplifier is connected to the first connection node. The input end of the first power amplifier is connected to the signal input end. The output end of the first voltage synthesis unit is connected to the first differential amplification circuit, and the output end of the second voltage synthesis unit is connected to the second differential amplification circuit. In this embodiment, the first-stage amplification circuit includes a first power amplifier 10, the second-stage amplification circuit includes a differential amplification circuit and a second differential amplification circuit, and the inter-stage conversion circuit between the two-stage amplification circuits includes a first voltage synthesis unit and a second voltage synthesis unit. The first input end of the first voltage synthesis unit and the first input end of the second voltage synthesis unit are connected to form a first connection node, and the output end of the first power amplifier is connected to the first connection node. Thus, not only the circuit architecture of the RF power amplifier is simplified and the area is saved, but also the symmetry is good. In addition, since the inter-stage conversion circuit adopts a combination of current merging and voltage merging, the inter-stage matching is easier to match to a low impedance, and the impedance matching adjustment is more flexible, so that the impedance matching of the circuit can be flexibly adjusted while ensuring the area of the RF power amplifier.

[0040] The above radio frequency front-end module includes a first-stage amplification circuit, a second-stage amplification circuit, and an inter-stage conversion circuit. The first-stage amplification circuit includes a first power amplifier. The second-stage amplification circuit includes a first differential amplification circuit and a second differential amplification circuit. The inter-stage conversion circuit includes a first voltage synthesis unit and a second voltage synthesis unit. A first input terminal of the first voltage synthesis unit and a first input terminal of the second voltage synthesis unit are connected to form a first connection node. An output terminal of the first power amplifier is connected to the first connection node. An input terminal of the first power amplifier is connected to a signal input terminal. An output terminal of the first voltage synthesis unit is connected to the first differential amplification circuit. An output terminal of the second voltage synthesis unit is connected to the second differential amplification circuit. Among them, the first voltage synthesis unit and the second voltage synthesis unit are arranged on opposite sides of the first power amplifier. In this embodiment, by arranging the first voltage synthesis unit and the second voltage synthesis unit on opposite sides of the first power amplifier, on the premise of realizing flexible adjustment of the impedance matching of the radio frequency power amplifier, the symmetry of the radio frequency front-end module can be better. Description of the Drawings

[0041] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following will briefly introduce the drawings required to be used in the description of the embodiments of the present invention. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0042] Figure 1 is a circuit schematic diagram of a radio frequency power amplifier in an embodiment of the present invention;

[0043] Figure 2 is another circuit schematic diagram of a radio frequency power amplifier in an embodiment of the present invention;

[0044] Figure 3 is another circuit schematic diagram of a radio frequency power amplifier in an embodiment of the present invention;

[0045] Figure 4 is another circuit schematic diagram of a radio frequency power amplifier in an embodiment of the present invention;

[0046] Figure 5 is another circuit schematic diagram of a radio frequency power amplifier in an embodiment of the present invention;

[0047] Figure 6 is another circuit schematic diagram of a radio frequency power amplifier in an embodiment of the present invention;

[0048] Figure 7 is another circuit schematic diagram of a radio frequency front-end module in an embodiment of the present invention;

[0049] Figure 8 It is another circuit schematic diagram of the RF front-end module in an embodiment of the present invention;

[0050] Figure 9 It is another circuit schematic diagram of the RF front-end module in an embodiment of the present invention;

[0051] Figure 10 It is another circuit schematic diagram of the RF front-end module in an embodiment of the present invention;

[0052] Figure 11 It is another circuit schematic diagram of the RF front-end module in an embodiment of the present invention.

[0053] In the figure, 10 is the first power amplifier; 31 is the first voltage synthesis unit; 41 is the second voltage synthesis unit; 50 is the capacitor matching network; C1 is the first matching capacitor; C2 is the second matching capacitor; C3 is the third matching capacitor; C4 is the fourth matching capacitor; 21 is the second power amplifier; 22 is the third power amplifier; 23 is the fourth power amplifier; 24 is the fourth power amplifier; C11 is the first decoupling capacitor, C12 is the second decoupling capacitor; C5 is the fifth matching capacitor; C6 is the sixth matching capacitor. Detailed implementation manners

[0054] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0055] It should be understood that the present invention can be implemented in different forms and should not be construed as limited to the embodiments presented herein. On the contrary, providing these embodiments will make the disclosure thorough and complete, and will fully convey the scope of the present invention to those skilled in the art. In the drawings, for clarity, the dimensions and relative dimensions of layers and regions may be exaggerated. The same reference numerals denote the same elements throughout the drawings.

[0056] It should be understood that when an element or layer is referred to as being "on", "adjacent to", "connected to" or "coupled to" another element or layer, it can be directly on, adjacent to, connected or coupled to the other element or layer, or there can be intervening elements or layers. In contrast, when an element is referred to as being "directly on", "directly adjacent to", "directly connected to" or "directly coupled to" another element or layer, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Thus, a first element, component, region, layer or part discussed below may be denoted as a second element, component, region, layer or part without departing from the teachings of the present invention.

[0057] Spatial relationship terms such as "under", "below", "beneath", "underneath", "above", "over", etc. are used herein for convenience in describing the relationship of one element or feature shown in the figures to other elements or features. It should be understood that, in addition to the orientation shown in the figures, spatial relationship terms are intended to include different orientations of the device in use and operation. For example, if the device in the figures is flipped, then an element or feature described as "under" or "beneath" or "underneath" another element or feature will be oriented "over" the other element or feature. Thus, the exemplary terms "under" and "beneath" can include both an upper and a lower orientation. The device may be otherwise oriented (rotated 90 degrees or other orientations) and the spatial descriptors used herein are to be interpreted accordingly.

[0058] The purpose of the terms used herein is only to describe specific embodiments and is not a limitation of the present invention. As used herein, the singular forms "a", "an" and "the" are also intended to include the plural forms unless the context clearly dictates otherwise. It should also be understood that the terms "comprising" and / or "including", when used in this specification, specify the presence of the features, integers, steps, operations, elements and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups. As used herein, the term "and / or" includes any and all combinations of the related listed items.

[0059] To fully understand the present invention, detailed structures and steps will be set forth in the following description in order to explain the technical solutions proposed by the present invention. The preferred embodiments of the present invention are described in detail below. However, in addition to these detailed descriptions, the present invention may have other embodiments.

[0060] A radio frequency power amplifier, such as Figure 1As shown, a first-stage amplifier circuit, a second-stage amplifier circuit, and an inter-stage conversion circuit. The first-stage amplifier circuit includes a first power amplifier 10. The second-stage amplifier circuit includes a first differential amplifier circuit and a second differential amplifier circuit. The inter-stage conversion circuit includes a first voltage synthesis unit 31 and a second voltage synthesis unit 41. The first input terminal of the first voltage synthesis unit 31 and the first input terminal of the second voltage synthesis unit 32 are connected to form a first connection node. The output terminal of the first power amplifier 10 is connected to the first connection node. The input terminal of the first power amplifier 10 is connected to a signal input terminal. The output terminal of the first voltage synthesis unit 31 is connected to the first differential amplifier circuit. The output terminal of the second voltage synthesis unit 41 is connected to the second differential amplifier circuit.

[0061] Among them, the first-stage amplifier circuit includes a first power amplifier 10, that is, the first power amplifier 10 is a driving-stage power amplifier. The first power amplifier 10 is used to amplify the radio frequency signal input from the signal input terminal. The first power amplifier 10 includes a first amplifying transistor and a first bias circuit for providing a bias signal to the first amplifying transistor. The first bias circuit can be any one of the circuits that can be realized in the prior art.

[0062] In at least one embodiment, the first amplifying transistor can be any type of transistor such as a bipolar transistor or a field effect transistor. For example: the first amplifying transistor is a heterojunction bipolar transistor (HBT: Heterojunction Bipolar Transistor), and the first amplifying transistor is formed by connecting multiple heterojunction bipolar transistors in parallel or in series. The first amplifying transistor is a heterojunction bipolar transistor realized by using GaAs technology. In at least one embodiment, the signal input terminal provides a radio frequency signal to the input terminal (base) of the first amplifying transistor. The emitter of the first amplifying transistor is grounded. The output terminal (collector) of the first amplifying transistor outputs the amplified radio frequency signal.

[0063] Among them, the second-stage amplification circuit includes a first differential amplification circuit and a second differential amplification circuit, that is, the first differential amplification circuit and the second differential amplification circuit are power amplification circuits of the amplification stage. The radio frequency amplification signal amplified by the first power amplifier 10 forms a first radio frequency amplification signal and a second radio frequency amplification signal after current splitting. The first radio frequency amplification signal is subjected to conversion processing by the first voltage synthesis unit 31 to generate a first differential signal and a second differential signal, which are input to the first differential amplification circuit for amplification processing. The second radio frequency amplification signal is subjected to conversion processing by the second voltage synthesis unit 41 to generate a third differential signal and a fourth differential signal, which are input to the second differential amplification circuit for amplification processing. Among them, the first differential signal and the second differential signal are a pair of differential signals with a phase difference of 180 degrees. The third differential signal and the fourth differential signal are a pair of differential signals with a phase difference of 180 degrees.

[0064] It can be understood that the radio frequency power amplifier in this embodiment includes at least two stages of amplification circuits. Among them, the first-stage amplification circuit includes a first power amplifier 10, that is, the first-stage amplification circuit is a single-ended amplification circuit, and the second-stage amplification circuit includes a first differential amplification circuit and the second differential amplification circuit. That is, the second-stage amplification circuit is composed of two differential amplification circuits (dual differential amplification circuits), and the inter-stage conversion circuit between the first-stage amplification circuit and the second-stage amplification circuit includes a first voltage synthesis unit and a second voltage synthesis unit; the first input terminal of the first voltage synthesis unit and the first input terminal of the second voltage synthesis unit are connected to form a first connection node, and the output terminal of the first power amplifier is connected to the first connection node. That is, the inter-stage conversion circuit in this embodiment adopts a combination of current merging and voltage merging.

[0065] Among them, the first voltage synthesis unit 31 is a voltage conversion unit that can convert a single-ended signal into a pair of differential signals. The second voltage synthesis unit 41 is a voltage conversion unit that can convert a single-ended signal into a pair of differential signals. As an example, the first voltage synthesis unit 31 is a first balun, the unbalanced terminal of the first balun is connected to the output terminal of the first power amplifier 10, and the two balanced terminals of the first balun are connected to the input terminals of the first differential amplification circuit. The second voltage synthesis unit 41 is a second balun, the unbalanced terminal of the second balun is connected to the output terminal of the first power amplifier 10, and the two balanced terminals of the second balun are respectively connected to the input terminals of the second differential amplification circuit.

[0066] In at least one embodiment, since the inter-stage conversion circuit between the first-stage amplifier circuit and the second-stage amplifier circuit in this embodiment adopts a combination of current combining and voltage combining, compared with the related art that only adopts current combining, this embodiment can, while ensuring the performance and occupied area of the first voltage synthesis unit 31 and the second voltage synthesis unit 41, match the impedance at the output end of the first power amplifier to a lower impedance; and compared with the related art that only adopts voltage combining, the impedance matching layout of the RF power amplifier in this embodiment is more symmetrical, that is, the impedance of each input node / output node in the circuit can be adjusted more flexibly.

[0067] In this embodiment, the RF power amplifier includes a first-stage amplifier circuit, a second-stage amplifier circuit, and an inter-stage conversion circuit. The first-stage amplifier circuit includes a first power amplifier. The second-stage amplifier circuit includes a first differential amplifier circuit and a second differential amplifier circuit. The inter-stage conversion circuit includes a first voltage synthesis unit and a second voltage synthesis unit. The first input end of the first voltage synthesis unit and the first input end of the second voltage synthesis unit are connected to form a first connection node. The output end of the first power amplifier is connected to the first connection node. The input end of the first power amplifier is connected to the signal input end. The output end of the first voltage synthesis unit is connected to the first differential amplifier circuit. The output end of the second voltage synthesis unit is connected to the second differential amplifier circuit. In this embodiment, the first-stage amplifier circuit includes a first power amplifier 10, the second-stage amplifier circuit includes a differential amplifier circuit and a second differential amplifier circuit, and the inter-stage conversion circuit between the two-stage amplifier circuits includes a first voltage synthesis unit and a second voltage synthesis unit. The first input end of the first voltage synthesis unit and the first input end of the second voltage synthesis unit are connected to form a first connection node. The output end of the first power amplifier is connected to the first connection node. Thus, not only the circuit architecture of the RF power amplifier is simplified and the area is saved, but also the symmetry is good. In addition, since the inter-stage conversion circuit adopts a combination of current combining and voltage combining, the inter-stage matching is easier to match to a low impedance, the impedance matching adjustment is more flexible, and the layout is more symmetrical, so that the impedance matching of the circuit can be flexibly adjusted while ensuring the area of the RF power amplifier.

[0068] In a specific embodiment, the first voltage synthesis unit 31 and the second voltage synthesis unit 41 are configured such that the range of the real part of the load impedance at the output end d1 of the first power amplifier 10 is [5 ohms to 25 ohms].

[0069] In at least one embodiment, the first impedance at the output end of the first voltage synthesis unit 31 is converted by the first voltage synthesis unit 31 to form a second impedance smaller than the first impedance; the third impedance at the output end of the second voltage synthesis unit 41 is converted by the second voltage synthesis unit 41 to form a fourth impedance smaller than the third impedance. Among them, the second impedance and the fourth impedance may be the same or different. The second impedance and the fourth impedance are converted into a smaller fifth impedance after current combining, so as to meet the low-impedance requirement at the output end of the first power amplifier 10. It can be understood that the second impedance at the input end of the first voltage synthesis unit 31 can be flexibly adjusted according to the parameters of the first voltage synthesis unit 31 (for example: turns ratio), and the fourth impedance at the input end of the second voltage synthesis unit 31 can be flexibly adjusted according to the parameters of the second voltage synthesis unit 41 (for example: turns ratio), and the second impedance and the fourth impedance can be converted into a smaller fifth impedance after current combining. Therefore, not only can the low-impedance requirement at the output end of the first power amplifier 10 be met, but also the impedance can be flexibly adjusted, and the layout is more symmetrical.

[0070] In this embodiment, the real part range of the load impedance at the output end of the first power amplifier 10 is [5 ohms to 25 ohms]. It should be noted that since the first connection node formed by connecting the first voltage synthesis unit 31 and the second voltage synthesis unit 41 also needs to be connected to the first power amplifier 10, the impedance at the output end of the first power amplifier 10 cannot be too large, otherwise it will affect the power of the radio frequency signal output by the first power amplifier 10. In this embodiment, the real part range of the load impedance at the output end of the first power amplifier 10 is limited to [5 ohms to 25 ohms]. Optionally, the impedance at the output end of the first power amplifier 10 can be a capacitive impedance or an inductive impedance.

[0071] In a specific embodiment, the first power amplifier is a current amplifier. Among them, the function of the current amplifier is to provide current to the inductive current load according to the current command, and it is essentially a controlled current source.

[0072] In at least one embodiment, the first power amplifier includes at least one first amplification transistor, and the first amplification transistor is an HBT transistor.

[0073] In at least one embodiment, the first power amplifier uses a heterojunction bipolar transistor implemented by gallium arsenide (GaAs) process.

[0074] It can be understood that since the first power amplifier is a current amplifier, the output end of the first power amplifier needs to meet the low-impedance requirement.

[0075] In a specific embodiment, as Figure 2As shown, the RF power amplifier further includes a capacitive matching network 50, and the capacitive matching network 50 is disposed between the first power amplifier 10 and the first differential amplifier circuit and the second differential amplifier circuit.

[0076] Among them, the capacitive matching network 50 can be a network composed of capacitive elements, or a network that can be equivalent to capacitive characteristics. The capacitive matching network 50 includes at least one capacitive element (which can be a physical capacitive element or a specific structure equivalent to a capacitive element, etc.). In this embodiment, the capacitive matching network 50, the first voltage synthesis unit 31, and the second voltage synthesis unit 41 are all inter-stage circuits for impedance matching disposed between the first power amplifier and the first differential amplifier circuit and the second differential amplifier circuit. Optionally, the capacitive elements in the capacitive matching network 50 can be chip capacitors or multilayer capacitors.

[0077] In at least one embodiment, by connecting a capacitive matching network between the first power amplifier and the first differential amplifier circuit and the second differential amplifier circuit, the impedance of the RF power amplifier can be adjusted more flexibly. For example: when the output impedance of the RF power amplifier needs to meet the requirement of a capacitive impedance, the capacitive matching network can convert the inductive impedance of the first input terminal of the first voltage synthesis unit and the inductive impedance of the first input terminal of the second voltage synthesis unit into a capacitive impedance at the input terminal of the first power amplifier; or, when the output impedance of the RF power amplifier needs to be resistive (i.e., the imaginary part impedance is zero), the capacitive matching network can convert the inductive impedance of the first input terminal of the first voltage synthesis unit and the inductive impedance of the first input terminal of the second voltage synthesis unit into a resistive impedance with an imaginary part impedance of zero at the output terminal of the first power amplifier.

[0078] In a specific embodiment, the capacitive matching network 50 is configured to convert the inductive impedance of the first input terminal of the first voltage synthesis unit and the inductive impedance of the first input terminal of the second voltage synthesis unit into a capacitive impedance at the output terminal of the first power amplifier.

[0079] In at least one embodiment, the capacitive matching network 50 is configured to convert the inductive impedance of the first input terminal of the first voltage synthesis unit and the inductive impedance of the first input terminal of the second voltage synthesis unit into a capacitive impedance at the output terminal of the first power amplifier, so that the bandwidth performance of the RF power amplifier is better.

[0080] In a specific embodiment, such as Figure 2As shown, the first end of the capacitance matching network is connected to the first connection node, and the second end of the capacitance matching network is grounded. Among them, the capacitance matching network can be a single capacitor, or a series or parallel connection of multiple capacitors.

[0081] In at least one embodiment, since the output end of the first power amplifier is connected to the first input end of the first voltage synthesis unit and the first input end of the second voltage synthesis unit to form a first connection node, therefore, when the output end of the first power amplifier is directly connected to the first connection node, that is, when there are no other components between the output end of the first power amplifier and the first connection node, the first end of the capacitance matching network can also be understood as being connected to the output end of the first power amplifier, thereby realizing flexible adjustment of impedance.

[0082] In a specific embodiment, as Figure 3 shown, the capacitance matching network includes a first matching capacitor C1. The first end of the first matching capacitor C1 is connected to the first connection node, and the second end of the first matching capacitor C1 is grounded.

[0083] In at least one embodiment, since the first input end of the first voltage synthesis unit and the first input end of the second voltage synthesis unit are connected to form a first connection node and then connected to the output end of the first power amplifier, therefore, in this embodiment, only a first matching capacitor C1 grounded is connected at the first connection node, and there is no need to connect capacitors grounded to the first input end of the first voltage synthesis unit and the first input end of the second voltage synthesis unit respectively, thereby reducing circuit components while ensuring circuit performance, and further reducing the occupied area and simplifying the circuit architecture.

[0084] In a specific embodiment, as Figure 4 shown, the second end of the first voltage synthesis unit 31 is connected to the first power supply terminal VCC1, and the second end of the second voltage synthesis unit is connected to the second power supply terminal VCC2.

[0085] In at least one embodiment, since the first end of the capacitance matching network is connected to the first connection node and the second end of the capacitance matching network is grounded, that is, there is no capacitive element between the first end of the first voltage synthesizing unit 31 and the output end of the first power amplifier, and there is no capacitive element between the first end of the second voltage synthesizing unit 41 and the output end of the first power amplifier. Therefore, in this embodiment, by connecting the second end of the first voltage synthesizing unit 31 to the first power supply terminal VCC1 and the second end of the second voltage synthesizing unit to the second power supply terminal VCC2, the power supply signal output from the first power supply terminal VCC1 is transmitted to the first power amplifier through the first voltage synthesizing unit 31, and the power supply signal output from the second power supply terminal VCC1 is transmitted to the first power amplifier through the second voltage synthesizing unit 41 to supply power to the first power amplifier, ensuring the normal operation of the first power amplifier, without the need to additionally connect a power supply inductor or a power supply coil in the circuit, thereby reducing the occupied area and simplifying the circuit architecture while ensuring the circuit performance.

[0086] In a specific embodiment, as follows Figure 5 and below Figure 6 As shown, the capacitance matching network includes a second matching capacitor C2 and a third matching capacitor C3. The first end of the second matching capacitor C2 is connected to the first input end of the first voltage synthesizing unit 31, and the second end is connected to the output end of the first power amplifier 10; the first end of the third matching capacitor C3 is connected to the first input end of the second voltage synthesizing unit 41, and the second end is connected to the output end of the first power amplifier 10;

[0087] Alternatively, the first end of the second matching capacitor is connected to the second input end of the first voltage synthesizing unit, and the second end is grounded; the first end of the third matching capacitor is connected to the second input end of the second voltage synthesizing unit, and the second end is grounded.

[0088] In at least one embodiment, as follows Figure 5As shown, by connecting a second matching capacitor C2 in series between the output terminal of the first power amplifier 10 and the first input terminal of the first voltage synthesizing unit 31, and connecting a third matching capacitor C3 in series between the output terminal of the second matching capacitor C2 and the first input terminal of the second voltage synthesizing unit 41, the second matching capacitor C2 and the third matching capacitor C3 participate in inter-stage matching and are respectively configured to adjust the impedance of the first input terminal of the first voltage synthesizing unit 31 and the impedance of the first input terminal of the second voltage synthesizing unit 41, so that not only can the impedance be flexibly adjusted, but also the symmetry is good. Wherein, the capacitance values of the second matching capacitor C2 and the second matching capacitor may be the same or different. In the case where better symmetry needs to be satisfied, the capacitance values of the second matching capacitor C2 and the second matching capacitor are the same.

[0089] In at least one embodiment, as follows Figure 6 As shown, by connecting a second matching capacitor C2 between the second input terminal of the first voltage synthesizing unit 31 and the ground, and connecting a third matching capacitor C3 between the second input terminal of the second voltage synthesizing unit 41 and the ground, the second matching capacitor C2 and the third matching capacitor C3 participate in inter-stage matching, so that not only can the impedance be flexibly adjusted, but also the symmetry is good. Wherein, the capacitance values of the second matching capacitor C2 and the second matching capacitor may be the same or different. In the case where better symmetry needs to be satisfied, the capacitance values of the second matching capacitor C2 and the second matching capacitor are the same.

[0090] In a specific embodiment, as follows Figure 7 As shown, the capacitance matching network includes a fourth matching capacitor C4. The first end of the fourth matching capacitor C4 is connected to the output terminal of the first power amplifier, and the second end of the fourth matching capacitor C4 is connected to the first connection node.

[0091] In at least one embodiment, since the first input terminal of the first voltage synthesizing unit and the first input terminal of the second voltage synthesizing unit are connected to form a first connection node and then connected to the output terminal of the first power amplifier, therefore, in this embodiment, only a fourth matching capacitor C4 needs to be connected between the first connection node and the output terminal of the first power amplifier, so that while ensuring the circuit performance, the number of circuit components is reduced, and thus the occupied area is reduced and the circuit architecture is simplified.

[0092] In a specific embodiment, as follows Figure 7 As shown, the radio frequency power amplifier further includes a third power supply terminal VCC, and the third power supply terminal VCC is connected to the output terminal of the first power amplifier.

[0093] In at least one embodiment, since a second matching capacitor C2 is connected between the first voltage synthesizing unit 31 and the output terminal of the first power amplifier, and a third matching capacitor C3 is connected between the second voltage synthesizing unit 41 and the output terminal of the first power amplifier, based on the characteristic that a capacitor blocks direct current and allows alternating current to pass through, and since the power supply signal output by the power supply terminal is a direct current signal, therefore, in order to ensure the normal operation of the first power amplifier in this embodiment, a third power supply terminal VCC needs to be additionally connected to the output terminal of the first power amplifier. The power supply signal output by the third power supply terminal VCC can be transmitted to the output terminal of the first power amplifier through a power supply inductor or a power supply coil, thereby ensuring the normal operation of the first power amplifier.

[0094] In a specific embodiment, as follows Figure 1 As shown, the first differential amplifier circuit includes a second power amplifier 21 and a third power amplifier 22, and the second differential amplifier circuit includes a fourth power amplifier 23 and a fifth power amplifier 24; the first output terminal of the first voltage synthesizing unit 31 is connected to the input terminal of the second power amplifier 21, and the second output terminal of the first voltage synthesizing unit 31 is connected to the input terminal of the third power amplifier 22; the first output terminal of the second voltage synthesizing unit 41 is connected to the input terminal of the fourth power amplifier 23, and the second output terminal of the second voltage synthesizing unit 41 is connected to the input terminal of the fifth power amplifier 24.

[0095] Wherein, the second power amplifier 21 includes a second amplifying transistor and a second bias circuit for providing a bias signal to the second amplifying transistor. The second bias circuit can be any implementable circuit in the prior art. The third power amplifier 22 includes a third amplifying transistor and a third bias circuit for providing a bias signal to the third amplifying transistor. The third bias circuit can be any implementable circuit in the prior art. The fourth power amplifier 23 includes a fourth amplifying transistor and a fourth bias circuit for providing a bias signal to the fourth amplifying transistor. The fourth bias circuit can be any implementable circuit in the prior art. The fifth power amplifier 24 includes a fifth amplifying transistor and a fifth bias circuit for providing a bias signal to the fifth amplifying transistor. The fifth bias circuit can be any implementable circuit in the prior art.

[0096] In at least one embodiment, the second amplification transistor / the third amplification transistor / the fourth amplification transistor / the fifth amplification transistor can be any type of transistor such as a bipolar transistor or a field effect transistor. For example: the second amplification transistor / the third amplification transistor / the fourth amplification transistor / the fifth amplification transistor is a heterojunction bipolar transistor (HBT: Heterojunction Bipolar Transistor), and the second amplification transistor / the third amplification transistor / the fourth amplification transistor / the fifth amplification transistor is formed by connecting multiple heterojunction bipolar transistors in parallel or in series. The second amplification transistor / the third amplification transistor / the fourth amplification transistor / the fifth amplification transistor is a heterojunction bipolar transistor implemented using GaAs technology. In at least one embodiment, the input terminal (base) of the second amplification transistor / the third amplification transistor / the fourth amplification transistor / the fifth amplification transistor receives the radio frequency signal to be amplified, the emitter of the second amplification transistor / the third amplification transistor / the fourth amplification transistor / the fifth amplification transistor is grounded, and the output terminal (collector) of the second amplification transistor / the third amplification transistor / the fourth amplification transistor / the fifth amplification transistor outputs the amplified radio frequency signal.

[0097] In a specific embodiment, as follows Figure 1 As shown, the first voltage synthesis unit includes a first balun, the first balun includes a first winding and a second winding that are mutually coupled, the second voltage synthesis unit includes a second balun, the second balun includes a third winding and a fourth winding that are mutually coupled, the first end of the first winding and the first end of the third winding are connected to the output terminal of the first power amplifier, the second end of the first winding is connected to the first potential terminal, the second end of the third winding is connected to the second potential terminal, the first end of the second winding is connected to the input terminal of the second power amplifier, the second end of the second winding is connected to the input terminal of the third power amplifier, the first end of the fourth winding is connected to the input terminal of the fourth power amplifier, and the second end of the fourth winding is connected to the input terminal of the fifth power amplifier, where the first potential terminal is a power supply terminal or a ground terminal, and the second potential terminal is a power supply terminal or a ground terminal.

[0098] In at least one embodiment, the first voltage synthesis unit includes a first balun, and the first balun includes a first winding and a second winding which are mutually coupled. By adjusting the turns ratio between the first winding and the second winding, the impedance conversion ratio between the input end and the output end of the first voltage synthesis unit can be flexibly adjusted, so as to flexibly adjust the impedance matching. The second voltage synthesis unit includes a second balun, and the second balun includes a third winding and a fourth winding which are mutually coupled. By adjusting the turns ratio between the third winding and the fourth winding, the impedance conversion ratio between the input end and the output end of the second voltage synthesis unit can be flexibly adjusted, so as to flexibly adjust the impedance matching.

[0099] In at least one embodiment, the winding manner of the first winding and the second winding can adopt any existing implementable manner. The winding manner of the third winding and the fourth winding can adopt any existing implementable manner. The first winding and the second winding can be wound on the same metal layer to achieve in-layer coupling, and / or wound on different metal layers to achieve upper and lower layer coupling. The third winding and the fourth winding can be wound on the same metal layer to achieve in-layer coupling, and / or wound on different metal layers to achieve upper and lower layer coupling.

[0100] In at least one embodiment, when no capacitive element is connected in series on the series branch between the first power amplifier and the first differential amplifier circuit and the second differential amplifier circuit, the first potential terminal and the second potential terminal are power supply terminals. When a capacitive element is connected in series on the series branch between the first power amplifier and the first differential amplifier circuit and the second differential amplifier circuit, the first potential terminal and the second potential terminal are ground terminals.

[0101] In at least one embodiment, the second power amplifier is configured to amplify a first radio frequency signal, the third power amplifier is configured to amplify a second radio frequency signal, the fourth power amplifier is configured to amplify a third radio frequency signal, and the fifth power amplifier is configured to amplify a fourth radio frequency signal. Among them, the phase of the first radio frequency signal and the phase of the fourth radio frequency signal are a first phase, and the phase of the second radio frequency signal and the phase of the third radio frequency signal are a second phase.

[0102] In at least one embodiment, since the second power amplifier and the third power amplifier form a first differential amplification circuit, the phase of the first radio frequency signal and the phase of the second radio frequency signal differ by approximately 180 degrees. The fourth power amplifier and the fifth power amplifier form a second differential amplification circuit, so the phase of the third radio frequency signal and the phase of the fourth radio frequency signal differ by approximately 180 degrees. In this embodiment, the phase of the first radio frequency signal and the phase of the fourth radio frequency signal are the same, both being the first phase P (e.g., 0 degrees), and the phase of the second radio frequency signal and the phase of the third radio frequency signal are the same, both being the second phase N (e.g., 180 degrees). It can be seen therefrom that the types of the second power amplifier and the fifth power amplifier in this embodiment are the same, the third power amplifier and the fourth power amplifier are the same, and the first differential amplification circuit and the second differential amplification circuit are mirror-symmetrical, thereby optimizing the overall symmetry of the radio frequency power amplifier.

[0103] This embodiment also provides a radio frequency power amplifier, which includes a first-stage amplification circuit, a second-stage amplification circuit, an inter-stage conversion circuit, and a capacitance matching network. The first-stage amplification circuit includes a first power amplifier. The second-stage amplification circuit includes a first differential amplification circuit and a second differential amplification circuit. The inter-stage conversion circuit includes a first voltage synthesis unit and a second voltage synthesis unit. The first input terminal of the first voltage synthesis unit and the first input terminal of the second voltage synthesis unit are connected to form a first connection node. The output terminal of the first power amplifier is connected to the first connection node. The input terminal of the first power amplifier is connected to a signal input terminal. The output terminal of the first voltage synthesis unit is connected to the first differential amplification circuit. The output terminal of the second voltage synthesis unit is connected to the second differential amplification circuit. The capacitance matching unit is disposed between the first-stage amplification circuit and the second-stage amplification circuit.

[0104] Among them, the first-stage amplification circuit includes a first power amplifier 10, that is, the first power amplifier 10 is a driving-stage power amplifier. The implementation manner and function of the first power amplifier 10 in this embodiment are the same as those of the first power amplifier 10 in the above embodiment, and will not be repeated here.

[0105] Among them, the second-stage amplification circuit includes a first differential amplification circuit and a second differential amplification circuit, that is, the first differential amplification circuit and the second differential amplification circuit are amplification-stage power amplification circuits. The implementation manner and function of the first differential amplification circuit and the second differential amplification circuit in this embodiment are the same as those of the first differential amplification circuit and the second differential amplification circuit in the above embodiment, and will not be repeated here.

[0106] Understandably, the RF power amplifier in this embodiment includes at least two stages of amplification circuits. Among them, the first-stage amplification circuit includes a first power amplifier 10, that is, the first-stage amplification circuit is a single-ended amplification circuit. The second-stage amplification circuit includes a first differential amplification circuit and the second differential amplification circuit, that is, the second-stage amplification circuit is composed of two differential amplification circuits (dual differential amplification circuit). And the inter-stage conversion circuit between the first-stage amplification circuit and the second-stage amplification circuit includes a first voltage synthesis unit and a second voltage synthesis unit; the first input terminal of the first voltage synthesis unit and the first input terminal of the second voltage synthesis unit are connected to form a first connection node, and the output terminal of the first power amplifier is connected to the first connection node, that is, the inter-stage conversion circuit in this embodiment adopts a combination of current combining and voltage combining methods.

[0107] Among them, the first voltage synthesis unit 31 is a voltage conversion unit that can convert a single-ended signal into a pair of differential signals. The second voltage synthesis unit 41 is a voltage conversion unit that can convert a single-ended signal into a pair of differential signals. As an example, the first voltage synthesis unit 31 is a first balun, the unbalanced terminal of the first balun is connected to the output terminal of the first power amplifier 10, and the two balanced terminals of the first balun are connected to the input terminals of the first differential amplification circuit. The second voltage synthesis unit 41 is a second balun, the unbalanced terminal of the second balun is connected to the output terminal of the first power amplifier 10, and the two balanced terminals of the second balun are respectively connected to the input terminals of the second differential amplification circuit.

[0108] In at least one embodiment, since the inter-stage conversion circuit between the first-stage amplification circuit and the second-stage amplification circuit in this embodiment adopts a combination of current combining and voltage combining methods, compared with the related art that only adopts the current combining method, this embodiment can ensure the performance and occupied area of the first voltage synthesis unit 31 and the second voltage synthesis voltage 41 while making the impedance at the output terminal of the first power amplifier match to a lower impedance; and compared with the related art that only adopts the voltage combining method, the impedance matching of the RF power amplifier in this embodiment is more flexible, that is, the impedance of each input node / output node in the circuit can be adjusted more flexibly.

[0109] Among them, the capacitance matching network 50 can be a network composed of capacitance elements or a network that can be equivalent to capacitance characteristics. The capacitance matching network 50 includes at least one capacitance element (which can be a physical capacitance element or a specific structure equivalent to a capacitance element, etc.). In this embodiment, the capacitance matching network 50, the first voltage synthesis unit 31, and the second voltage synthesis unit 41 are all inter-stage circuits that are arranged between the first power amplifier and the first differential amplification circuit and the second differential amplification circuit and participate in impedance matching. Optionally, the capacitance elements in the capacitance matching network 50 can be chip capacitors or multilayer capacitors.

[0110] In at least one embodiment, by connecting a capacitance matching network between the first-stage amplification circuit and the second-stage amplification circuit, the impedance of the radio frequency power amplifier can be adjusted more flexibly. For example: when the output impedance of the radio frequency power amplifier needs to meet the requirement of a capacitive impedance, the inductive impedance of the first input end of the first voltage synthesis unit and the inductive impedance of the first input end of the second voltage synthesis unit can be converted into the capacitive impedance of the input end of the first power amplifier through the capacitance matching network; or, when the output impedance of the radio frequency power amplifier needs to be resistive (i.e., the imaginary part impedance is zero), the inductive impedance of the first input end of the first voltage synthesis unit and the inductive impedance of the first input end of the second voltage synthesis unit can be converted into a resistive impedance with an imaginary part impedance of zero at the output end of the first power amplifier through the capacitance matching network.

[0111] In this embodiment, the radio frequency power amplifier includes a first-stage amplification circuit, a second-stage amplification circuit, an inter-stage conversion circuit, and a capacitance matching network. The first-stage amplification circuit includes a first power amplifier. The second-stage amplification circuit includes a first differential amplification circuit and a second differential amplification circuit. The inter-stage conversion circuit includes a first voltage synthesis unit and a second voltage synthesis unit. The first input ends of the first voltage synthesis unit and the second voltage synthesis unit are connected to form a first connection node. The output end of the first power amplifier is connected to the first connection node. The input end of the first power amplifier is connected to the signal input end. The output end of the first voltage synthesis unit is connected to the first differential amplification circuit. The output end of the second voltage synthesis unit is connected to the second differential amplification circuit. The capacitance matching unit is arranged between the first-stage amplification circuit and the second-stage amplification circuit. Since the inter-stage conversion circuit adopts a combination of current merging and voltage merging, the inter-stage matching is easier to match to a low impedance, the impedance matching adjustment is more flexible, and by connecting a capacitance matching network between the first-stage amplification circuit and the second-stage amplification circuit, the bandwidth performance of the radio frequency power amplifier is better.

[0112] In a specific embodiment, the capacitive matching network includes a first matching capacitor. The first end of the first matching capacitor is connected to the first connection node, and the second end of the first matching capacitor is grounded.

[0113] In at least one embodiment, since the first input end of the first voltage synthesizing unit and the first input end of the second voltage synthesizing unit are connected to form a first connection node and then connected to the output end of the first power amplifier, therefore, in this embodiment, only a first matching capacitor C1 grounded is connected at the first connection node, and there is no need to respectively connect capacitors grounded at the first input end of the first voltage synthesizing unit and the first input end of the second voltage synthesizing unit. Thus, while ensuring the circuit performance, the circuit components are reduced, and further the occupied area is reduced and the circuit architecture is simplified.

[0114] In a specific embodiment, the capacitive matching network includes a second matching capacitor and a third matching capacitor;

[0115] The first end of the second matching capacitor is connected to the first input end of the first voltage synthesizing unit, and the second end is connected to the output end of the first power amplifier; the first end of the third matching capacitor is connected to the first input end of the second voltage synthesizing unit, and the second end is connected to the output end of the first power amplifier;

[0116] Alternatively, the first end of the second matching capacitor is connected to the second input end of the first voltage synthesizing unit, and the second end is grounded; the first end of the third matching capacitor is connected to the second input end of the second voltage synthesizing unit, and the second end is grounded.

[0117] In at least one embodiment, as follows Figure 5 As shown, by connecting a second matching capacitor C2 in series between the output end of the first power amplifier 10 and the first input end of the first voltage synthesizing unit 31, and connecting a third matching capacitor C3 in series between the output end of the first power amplifier 10 and the first input end of the second voltage synthesizing unit 41, the second matching capacitor C2 and the third matching capacitor C3 participate in inter-stage matching and are respectively configured to adjust the impedance of the first input end of the first voltage synthesizing unit 31 and the impedance of the first input end of the second voltage synthesizing unit 41. Thus, not only can the impedance be flexibly adjusted, but also the symmetry is good. Among them, the capacitance values of the second matching capacitor C2 and the second matching capacitor may be the same or different. In the case where better symmetry needs to be satisfied, the capacitance values of the second matching capacitor C2 and the second matching capacitor are the same.

[0118] In at least one embodiment, as follows Figure 6As shown, by connecting a second matching capacitor C2 between the second input terminal of the first voltage synthesis unit 31 and ground, and connecting a third matching capacitor C3 between the second input terminal of the second voltage synthesis unit 41 and ground, the second matching capacitor C2 and the third matching capacitor C3 participate in inter-stage matching, so that not only can the impedance be flexibly adjusted, but also the symmetry is good. Among them, the capacitance values of the second matching capacitor C2 and the second matching capacitor may be the same or different. When better symmetry needs to be satisfied, the capacitance values of the second matching capacitor C2 and the second matching capacitor are the same.

[0119] In a specific embodiment, as follows Figure 7 As shown, the capacitance matching network includes a fourth matching capacitor C4. The first end of the fourth matching capacitor C4 is connected to the output terminal of the first power amplifier, and the second end of the fourth matching capacitor C4 is connected to the first connection node.

[0120] In at least one embodiment, since the first input terminals of the first voltage synthesis unit and the second voltage synthesis unit are connected to form a first connection node and then connected to the output terminal of the first power amplifier, therefore, in this embodiment, only a fourth matching capacitor C4 needs to be connected between the first connection node and the output terminal of the first power amplifier, so as to reduce the circuit components while ensuring the circuit performance, and further reduce the occupied area and simplify the circuit architecture.

[0121] This embodiment also provides a radio frequency front-end module, including a first chip and the radio frequency power amplifier as described in the above embodiment, and the radio frequency power amplifier is disposed on the first chip. Among them, the first chip can be a chip implemented by any manufacturing process in the prior art. As an example, the first chip is an HBT (heterojunction bipolar transistor) chip, that is, the first chip is implemented by the HBT (heterojunction bipolar transistor) manufacturing process technology.

[0122] In at least one embodiment, since each amplification transistor in the first-stage amplification circuit and each amplification transistor in the second-stage amplification circuit need to be integrated on the chip, in order to improve the integration degree and reduce the wiring, the inter-stage conversion circuit and the capacitance matching network disposed between the first-stage amplification circuit and the second-stage amplification circuit are both disposed on the chip together, so that not only can the performance loss caused by excessive wiring be avoided, but also the integration degree of the radio frequency front-end module can be improved.

[0123] This embodiment also provides a radio frequency front-end module, as follows Figure 8As shown, it includes a first-stage amplification circuit, a second-stage amplification circuit, and an inter-stage conversion circuit. The first-stage amplification circuit includes a first power amplifier 10. The second-stage amplification circuit includes a first differential amplification circuit and a second differential amplification circuit. The inter-stage conversion circuit includes a first voltage synthesis unit 31 and a second voltage synthesis unit 41. The first input terminal of the first voltage synthesis unit 31 and the first input terminal of the second voltage synthesis unit 41 are connected to form a first connection node. The output terminal of the first power amplifier 10 is connected to the first connection node. The input terminal of the first power amplifier 10 is connected to a signal input terminal. The output terminal of the first voltage synthesis unit 31 is connected to the first differential amplification circuit. The output terminal of the second voltage synthesis unit 41 is connected to the second differential amplification circuit. Among them, the first voltage synthesis unit 31 and the second voltage synthesis unit 41 are arranged on opposite sides of the first power amplifier 10.

[0124] Among them, the first-stage amplification circuit includes a first power amplifier 10, that is, the first power amplifier 10 is a driving-stage power amplifier. The implementation manner and function of the first power amplifier 10 in this embodiment are the same as those of the first power amplifier 10 in the above embodiment, and will not be repeated here.

[0125] Among them, the second-stage amplification circuit includes a first differential amplification circuit and a second differential amplification circuit. The first differential amplification circuit includes a second power amplifier 21 and a third power amplifier 22. The second differential amplification circuit includes a fourth power amplifier 23 and a fifth power amplifier 24. The first output terminal of the first voltage synthesis unit 31 is connected to the input terminal of the second power amplifier 21. The second output terminal of the first voltage synthesis unit 31 is connected to the input terminal of the third power amplifier 22. The first output terminal of the second voltage synthesis unit 41 is connected to the input terminal of the fourth power amplifier 23. The second output terminal of the second voltage synthesis unit 41 is connected to the input terminal of the fifth power amplifier 24.

[0126] The implementation manner and function of the second power amplifier 21, the third power amplifier 22, the fourth power amplifier 23, and the fifth power amplifier 24 in this embodiment are the same as those of the second power amplifier 21, the third power amplifier 22, the fourth power amplifier 23, and the fifth power amplifier 24 in the above embodiment, and will not be repeated here.

[0127] Among them, the first voltage synthesis unit 31 is a voltage conversion unit that can convert a single-ended signal into a pair of differential signals. The second voltage synthesis unit 41 is a voltage conversion unit that can convert a single-ended signal into a pair of differential signals. As an example, the first voltage synthesis unit 31 is a first balun, the unbalanced terminal of the first balun is connected to the output terminal of the first power amplifier 10, and the two balanced terminals of the first balun are connected to the input terminals of the first differential amplification circuit. The second voltage synthesis unit 41 is a second balun, the unbalanced terminal of the second balun is connected to the output terminal of the first power amplifier 10, and the two balanced terminals of the second balun are respectively connected to the input terminals of the second differential amplification circuit.

[0128] In at least one embodiment, since the inter-stage conversion circuit between the first-stage amplification circuit and the second-stage amplification circuit in this embodiment adopts a combination of current combining and voltage combining, compared with the related art that only adopts current combining, this embodiment can, while ensuring the performance and occupied area of the first voltage synthesis unit 31 and the second voltage synthesis unit 41, match the impedance at the output terminal of the first power amplifier to a lower impedance; and compared with the related art that only adopts voltage combining, the impedance matching of the RF power amplifier in this embodiment is more flexible, that is, the impedance of each input node / output node in the circuit can be adjusted more flexibly, and the layout is more symmetrical.

[0129] In at least one embodiment, the first voltage synthesis unit 31 and the second voltage synthesis unit 41 are disposed on opposite sides of the first power amplifier 10. It should be noted that the first voltage synthesis unit 31 and the second voltage synthesis unit 41 being disposed on opposite sides of the first power amplifier 10 in this embodiment includes, but is not limited to, the first voltage synthesis unit 31, the first power amplifier 10, and the second voltage synthesis unit 41 being sequentially disposed on the same horizontal line or vertical line. For example: The first voltage synthesis unit 31, the first power amplifier 10, and the second voltage synthesis unit 41 may also be respectively disposed on different horizontal lines or vertical lines, or the first voltage synthesis unit 31 and the second voltage synthesis unit 41 are disposed on the same horizontal line or vertical line, but are disposed on different horizontal lines or vertical lines from the first power amplifier 10, that is, the first voltage synthesis unit 31 and the second voltage synthesis unit 41 only need to be disposed on opposite sides of the first power amplifier 10. Additionally, in this embodiment, no specific limitation is imposed on the distance between the first voltage synthesis unit 31 and the first power amplifier 10, and the distance between the second voltage synthesis unit 41 and the first power amplifier 10. The distance between the first voltage synthesis unit 31 and the first power amplifier 10 and the distance between the second voltage synthesis unit 41 and the first power amplifier 10 may be the same or different.

[0130] In this embodiment, a radio frequency front-end module includes a first-stage amplification circuit, a second-stage amplification circuit, and an inter-stage conversion circuit. The first-stage amplification circuit includes a first power amplifier, the second-stage amplification circuit includes a first differential amplification circuit and a second differential amplification circuit, and the inter-stage conversion circuit includes a first voltage synthesis unit and a second voltage synthesis unit; a first input end of the first voltage synthesis unit and a first input end of the second voltage synthesis unit are connected to form a first connection node, an output end of the first power amplifier is connected to the first connection node, an input end of the first power amplifier is connected to a signal input end, an output end of the first voltage synthesis unit is connected to the first differential amplification circuit, and an output end of the second voltage synthesis unit is connected to the second differential amplification circuit, wherein the first voltage synthesis unit and the second voltage synthesis unit are disposed on opposite sides of the first power amplifier; in this embodiment, by disposing the first voltage synthesis unit and the second voltage synthesis unit on opposite sides of the first power amplifier, on the premise of realizing flexible adjustment of the impedance matching of the radio frequency power amplifier, the symmetry of the radio frequency front-end module can be made better.

[0131] In a specific embodiment, the center points of the first voltage synthesis unit and the second voltage synthesis unit are located on the same straight line. Among them, the same straight line in this embodiment includes but is not limited to the same vertical line or the same horizontal line, and can also be a straight line at any angle.

[0132] In at least one embodiment, in order to further improve the symmetry of the first voltage synthesis unit and the second voltage synthesis unit, in this embodiment, by making the center points of the first voltage synthesis unit and the second voltage synthesis unit located on the same straight line, not only can the symmetry of the first voltage synthesis unit and the second voltage synthesis unit be improved, but also the transmission line distance when the first input end of the first voltage synthesis unit and the first input end of the second voltage synthesis unit are connected to the first connection node can be optimized, so that the first transmission line when the first input end of the first voltage synthesis unit is connected to the first connection node is as close as possible to the second transmission line when the first input end of the second voltage synthesis unit is connected to the first connection node.

[0133] It should be noted that this embodiment does not further limit the positional relationship between the center point of the first power amplifier and the center points of the first voltage synthesis unit and the second voltage synthesis unit. In this embodiment, the center point of the first power amplifier and the center points of the first voltage synthesis unit and the second voltage synthesis unit may be located on the same straight line or on different straight lines.

[0134] In a specific embodiment, the output end of the first power amplifier, the first input end of the first voltage synthesis unit, and the first input end of the second voltage synthesis unit are located on the same straight line.

[0135] In at least one embodiment, since the first connection node formed by connecting the first input end of the first voltage synthesis unit and the first input end of the second voltage synthesis unit is connected to the output end of the first power amplifier, therefore, in order to optimize the routing distance between the first input end of the first voltage synthesis unit and the first input end of the second voltage synthesis unit and the output end of the first power amplifier, in this embodiment, by making the input end of the first power amplifier, the first input end of the first voltage synthesis unit, and the first input end of the second voltage synthesis unit located on the same straight line, on the premise of ensuring balance symmetry, the routing length when the output end of the first power amplifier is connected to the first input end of the first voltage synthesis unit and the first input end of the second voltage synthesis unit can also be reduced, thereby avoiding the loss caused by too long routing, and making the layout between the first power amplifier, the first voltage synthesis unit, and the second voltage synthesis unit more compact and reasonable, and the layout more symmetrical.

[0136] In a specific embodiment, the first power amplifier is disposed in the central region between the first voltage synthesizing unit and the second voltage synthesizing unit.

[0137] In at least one embodiment, since the first input terminal of the first voltage synthesizing unit and the second input terminal of the second voltage synthesizing unit both need to be connected to the output terminal of the first power amplifier, therefore, in order to make the length of the first transmission line when the first input terminal of the first voltage synthesizing unit is connected to the output terminal of the first power amplifier as close as possible to the length of the second transmission line when the first input terminal of the second voltage synthesizing unit is connected to the output terminal of the first power amplifier, in this embodiment, by disposing the first power amplifier in the central region between the first voltage synthesizing unit and the second voltage synthesizing unit, the symmetry of the RF front-end module is further improved.

[0138] In a specific embodiment, the length of the transmission line connecting the output terminal of the first power amplifier to the first input terminal of the first voltage synthesizing unit is the same as the length of the transmission line connecting the output terminal of the first power amplifier to the first input terminal of the second voltage synthesizing unit.

[0139] In at least one embodiment, the length of the transmission line connecting the output terminal of the first power amplifier to the first input terminal of the first voltage synthesizing unit is the same as the length of the transmission line connecting the output terminal of the first power amplifier to the first input terminal of the second voltage synthesizing unit, thereby not only optimizing the routing of the connection between the first input terminal of the first voltage synthesizing unit and the first input terminal of the second voltage synthesizing unit to the output terminal of the first power amplifier, but also further improving the symmetry of the RF front-end module.

[0140] In a specific embodiment, the RF front-end module further includes a capacitive matching network, and the capacitive matching network is disposed between the first voltage synthesizing unit and the second voltage synthesizing unit.

[0141] Wherein, the capacitive matching network can be a network composed of capacitive elements, or a network that can be equivalent to capacitive characteristics. The capacitive matching network 50 includes at least one capacitive element (which can be a physical capacitive element or a specific structure equivalent to a capacitive element, etc.). In this embodiment, the capacitive matching network 50, the first voltage synthesizing unit 31, and the second voltage synthesizing unit 41 are all inter-stage circuits participating in impedance matching disposed between the first power amplifier and the first differential amplifying circuit and the second differential amplifying circuit. Optionally, the capacitive elements in the capacitive matching network 50 can be chip capacitors or stacked capacitors.

[0142] In at least one embodiment, by disposing the capacitance matching network between the first voltage synthesizing unit and the second voltage synthesizing unit, and by reasonably utilizing the area between the first voltage synthesizing unit and the second voltage synthesizing unit, it is not only possible to more flexibly adjust the impedance of the radio frequency power amplifier, making the bandwidth performance of the radio frequency power amplifier better, but also to improve the symmetry of the radio frequency front-end module and make the layout of the radio frequency front-end module more compact.

[0143] In a specific embodiment, as follows Figure 8 As shown, the second input terminal of the first voltage synthesizing unit 31 is connected to the first power supply terminal VCC1, the first input terminal of the second voltage synthesizing unit 41 is connected to the second power supply terminal VCC2, the first power supply terminal VCC1 is disposed on a side of the first voltage synthesizing unit 31 away from the first power amplifier 10, and the second power supply terminal VCC2 is disposed on a side of the second voltage synthesizing unit 41 away from the first power amplifier 10.

[0144] In at least one embodiment, the power supply signal output by the first power supply terminal VCC1 supplies power to the first power amplifier 10 through the first voltage synthesizing unit 31, and the power supply signal output by the second power supply terminal VCC2 supplies power to the first power amplifier 10 through the second voltage synthesizing unit 41; in this embodiment, since the first input terminal of the first voltage synthesizing unit 31 and the first input terminal of the second voltage synthesizing unit 41 are connected to the first power amplifier 10, the first power supply terminal VCC1 is connected to the second input terminal of the first voltage synthesizing unit 31, and the second power supply terminal VCC2 is connected to the second input terminal of the second voltage synthesizing unit 41, therefore, by disposing the first power supply terminal VCC1 on a side of the first voltage synthesizing unit 31 away from the first power amplifier 10, and the second power supply terminal VCC2 on a side of the second voltage synthesizing unit 41 away from the first power amplifier 10, that is, the first power supply terminal VCC1 and the second power supply terminal VCC2 are also respectively disposed on two sides of the first power amplifier 10. Preferably, the first power supply terminal VCC1 and the second power supply terminal VCC2 are symmetrically disposed on two sides of the first power amplifier 10 respectively, so as to further optimize the symmetry of the radio frequency front-end module and make the layout of the radio frequency front-end module more compact and reasonable.

[0145] In a specific embodiment, as follows Figure 8As shown, the radio frequency power amplifier further includes a first decoupling capacitor C11 and a second decoupling capacitor C21. One end of the first decoupling capacitor C11 is connected to the first power supply terminal VCC1, and the other end is connected to the ground terminal; one end of the second decoupling capacitor C21 is connected to the second power supply terminal VCC2, and the other end is connected to the ground terminal. Wherein, the first decoupling capacitor C11 is arranged adjacent to the first power supply terminal VCC1, and the second decoupling capacitor C21 is arranged adjacent to the second power supply terminal VCC2.

[0146] Wherein, the first decoupling capacitor C11 and the second decoupling capacitor C21 are respectively used to reduce the jitter and noise of the power supply signals output by the first power supply terminal VCC1 and the second power supply terminal VCC2, and ensure the stability of the power supply signals.

[0147] In at least one embodiment, by arranging the first decoupling capacitor C11 adjacent to the first power supply terminal VCC1 and the second decoupling capacitor C21 adjacent to the second power supply terminal VCC2, that is, the first decoupling capacitor C11 and the second decoupling capacitor C21 are also respectively arranged on both sides of the first power amplifier 10. Preferably, the first decoupling capacitor C11 and the second decoupling capacitor C21 are symmetrically arranged on both sides of the first power amplifier 10, so that not only can the traces connecting the first decoupling capacitor C11 to the first power supply terminal VCC1 and the second decoupling capacitor C12 to the second power supply terminal VCC2 be reduced, but also the symmetry of the radio frequency front-end module can be further optimized, making the layout of the radio frequency front-end module more compact and reasonable.

[0148] In a specific embodiment, as follows Figure 10 As shown, the radio frequency front-end module further includes a third power supply terminal VCC, and the third power supply terminal VCC is connected to the output terminal of the first power amplifier 10. Wherein, the third power supply terminal VCC is arranged between the first voltage synthesis unit 31 and the second voltage synthesis unit 41.

[0149] In at least one embodiment, the third power supply terminal VCC is connected to the output terminal of the first power amplifier 10, and the power supply signal output through the third power supply terminal VCC is transmitted to the first power amplifier 10 to supply power to the first power amplifier 10. By reasonably utilizing the area between the first voltage synthesis unit 31 and the second voltage synthesis unit 41, the third power supply terminal VCC is arranged between the first voltage synthesis unit 31 and the second voltage synthesis unit 41, so that not only can the traces between the third power supply terminal VCC and the first power amplifier 10 be optimized, but also the symmetry of the radio frequency front-end module can be further optimized, making the layout of the radio frequency front-end module more compact and reasonable.

[0150] In a specific embodiment, as follows Figure 9 As shown, the capacitance matching network includes a first matching capacitor C1. The first end of the first matching capacitor C1 is connected to the output end of the first power amplifier 10. The first matching capacitor C1 is connected to the ground end. The first matching capacitor C1 is disposed between the first voltage synthesis unit 31 and the second voltage synthesis unit 41.

[0151] In at least one embodiment, by connecting a first matching capacitor C1 to the ground at the output end of the first power amplifier 10, flexible impedance matching is achieved. And by reasonably utilizing the area between the first voltage synthesis unit 31 and the second voltage synthesis unit 41, the first matching capacitor C1 is disposed between the first voltage synthesis unit 31 and the second voltage synthesis unit 41. Thereby, not only can the trace between the first matching capacitor C1 and the first power amplifier 10 be optimized, but also the symmetry of the RF front-end module can be further optimized, making the layout of the RF front-end module more compact and reasonable.

[0152] In a specific embodiment, as follows Figure 9 As shown, the first matching capacitor C1 is disposed in the central region between the first voltage synthesis unit 31 and the second voltage synthesis unit 41.

[0153] In at least one embodiment, by disposing the first matching capacitor C1 in the central region between the first voltage synthesis unit 31 and the second voltage synthesis unit 41, the symmetry of the RF front-end module is further optimized, making the layout of the RF front-end module more compact and reasonable.

[0154] In a specific embodiment, referring to the following Figure 10 As shown, the capacitance matching network further includes a second matching capacitor C2 and a third matching capacitor C3. The first end of the second matching capacitor C2 is connected to the output end of the first power amplifier 10. The second end of the second matching capacitor C2 is connected to the first input end of the first voltage synthesis unit 31. The first end of the third matching capacitor C3 is connected to the output end of the first power amplifier 10. The second end of the third matching capacitor C3 is connected to the first input end of the second voltage synthesis unit 41. Wherein, the second matching capacitor C2 is disposed between the third power supply terminal VCC and the first voltage synthesis unit 31, and the third matching capacitor C3 is disposed between the third power supply terminal VCC and the second voltage synthesis unit 41.

[0155] Preferably, the second matching capacitor C2 and the third matching capacitor C3 are symmetrically disposed on both sides of the third power supply terminal VCC.

[0156] Among them, the second matching capacitor C2 and the third matching capacitor C3 are components for impedance matching provided between the first power amplifier 10, the first voltage synthesis unit 31, and the second voltage synthesis unit 41. Since the third power supply terminal VCC is provided between the first voltage synthesis unit 31 and the second voltage synthesis unit 41, in order to ensure that the third power supply terminal VCC can supply power to the first power amplifier 10 normally, there should be no capacitive element between the third power supply terminal VCC and the first power amplifier 10. In this embodiment, the second matching capacitor C2 is provided between the third power supply terminal VCC and the first voltage synthesis unit 31, and the third matching capacitor C3 is provided between the third power supply terminal VCC and the second voltage synthesis unit 41; preferably, not only can it ensure that the third power supply terminal VCC can supply power to the first power amplifier 10 normally, but also the area between the third power supply terminal VCC, the first voltage synthesis unit 31, and the second voltage synthesis unit 41 can be reasonably utilized, the wiring between the second matching capacitor C2, the third matching capacitor C3 and other components (such as the first voltage synthesis unit 31, the second voltage synthesis unit 41, and the first power amplifier 10) can be optimized, and the symmetry of the RF front-end module can be further optimized, making the layout of the RF front-end module more compact and reasonable.

[0157] In a specific embodiment, referring to the following Figure 11 As shown, the capacitive matching network further includes a fourth matching capacitor C4. One end of the fourth matching capacitor C4 is connected to the output end of the first power amplifier 10, and the other end is connected to the first connection node. Among them, the fourth matching capacitor C4 is provided between the first power amplifier 10 and the first connection node.

[0158] In at least one embodiment, the first connection node is the node where the first end of the first voltage synthesis unit and the first end of the second voltage synthesis unit are connected. It can be understood that the first connection node is the node on the transmission line where the first voltage synthesis unit and the second voltage synthesis unit are connected. Preferably, the first connection node is the central node on the transmission line where the first voltage synthesis unit and the second voltage synthesis unit are connected. Since one end of the fourth matching capacitor C4 is connected to the output end of the first power amplifier 10 and the other end is connected to the first connection node, in order to reduce the wiring when the fourth matching capacitor C4 is connected to the first power amplifier 10 and the first connection node and reduce the occupied area, in this embodiment, the fourth matching capacitor C4 is provided between the first power amplifier 10 and the first connection node, so that not only can the wiring be reduced, but also the overall layout of the RF front-end module can be more compact and the layout pattern can be more symmetrical.

[0159] In a specific embodiment, as follows Figure 9 As shown, the RF front-end module further includes a fifth matching capacitor C5 and a sixth matching capacitor C6. The first end of the fifth matching capacitor C5 is connected to the second input end of the first voltage synthesis unit 31, the second end of the fifth matching capacitor C5 is connected to the ground end, the first end of the sixth matching capacitor C6 is connected to the second input end of the second voltage synthesis unit 41, and the second end of the sixth matching capacitor C6 is connected to the ground end; wherein, the fifth matching capacitor C5 is arranged on the side of the first voltage synthesis unit 31 away from the first power amplifier, and the sixth matching capacitor C6 is arranged on the side of the second voltage synthesis unit 41 away from the first power amplifier.

[0160] In at least one embodiment, the fifth matching capacitor C5 and the sixth matching capacitor C6 participate in impedance matching to achieve flexible adjustment of the impedance. Since the first end of the fifth matching capacitor C5 is connected to the second input end of the first voltage synthesis unit 31 and the other end is grounded, and the first end of the sixth matching capacitor C6 is connected to the second input end of the second voltage synthesis unit 41 and the other end is grounded, therefore, in order to reduce wiring and optimize the layout, the fifth matching capacitor C5 is arranged on the side of the first voltage synthesis unit 31 away from the first power amplifier, and the sixth matching capacitor C6 is arranged on the side of the second voltage synthesis unit 41 away from the first power amplifier, that is, the fifth matching capacitor C5 and the sixth matching capacitor C6 are also respectively arranged on both sides of the first power amplifier 10. The fifth matching capacitor C5 is arranged adjacent to the first voltage synthesis unit 31, and the sixth matching capacitor C6 is arranged adjacent to the second voltage synthesis unit 41. Preferably, the fifth matching capacitor C5 and the sixth matching capacitor C6 are symmetrically arranged on both sides of the first power amplifier 10 respectively, so as to further optimize the symmetry of the RF front-end module and make the layout of the RF front-end module more compact and reasonable.

[0161] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements on some of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included in the protection scope of the present invention.

Claims

1. A radio frequency power amplifier, characterized in that, It includes a first-stage amplification circuit, a second-stage amplification circuit and an inter-stage conversion circuit. The first-stage amplification circuit includes a first power amplifier. The second-stage amplification circuit includes a first differential amplification circuit and a second differential amplification circuit. The inter-stage conversion circuit includes a first voltage synthesis unit and a second voltage synthesis unit. The first input terminal of the first voltage synthesis unit and the first input terminal of the second voltage synthesis unit are connected to form a first connection node. The output terminal of the first power amplifier is connected to the first connection node. The input terminal of the first power amplifier is connected to a signal input terminal. The first differential amplification circuit includes a second power amplifier and a third power amplifier. The second differential amplification circuit includes a fourth power amplifier and a fifth power amplifier. The first output terminal of the first voltage synthesis unit is connected to the input terminal of the second power amplifier. The second output terminal of the first voltage synthesis unit is connected to the input terminal of the third power amplifier. The first output terminal of the second voltage synthesis unit is connected to the input terminal of the fourth power amplifier. The second output terminal of the second voltage synthesis unit is connected to the input terminal of the fifth power amplifier.

2. The RF power amplifier according to claim 1, characterized in that, The first voltage synthesis unit and the second voltage synthesis unit are configured such that the real part range of the load impedance at the output terminal of the first power amplifier is [5 ohms to 25 ohms].

3. The RF power amplifier according to claim 1, wherein The first power amplifier is a current amplifier.

4. The RF power amplifier according to claim 1, characterized in that, The RF power amplifier further includes a capacitor matching network, and the capacitor matching network is provided between the first power amplifier and the first differential amplification circuit and the second differential amplification circuit.

5. The RF power amplifier according to claim 4, wherein The capacitor matching network is configured to convert the inductive impedance at the first input terminal of the first voltage synthesis unit and the inductive impedance at the first input terminal of the second voltage synthesis unit into a capacitive impedance at the output terminal of the first power amplifier.

6. The radio frequency power amplifier according to claim 4, characterized in that, The capacitor matching network includes a first matching capacitor. The first end of the first matching capacitor is connected to the first connection node, and the second end of the first matching capacitor is grounded.

7. The radio frequency power amplifier according to claim 6, characterized in that, The second end of the first voltage synthesis unit is connected to a first power supply terminal, and the second end of the second voltage synthesis unit is connected to a second power supply terminal.

8. The RF power amplifier according to claim 4, wherein The capacitor matching network includes a second matching capacitor and a third matching capacitor; The first end of the second matching capacitor is connected to the first input terminal of the first voltage synthesis unit, and the second end is connected to the output terminal of the first power amplifier. The first end of the third matching capacitor is connected to the first input terminal of the second voltage synthesis unit, and the second end is connected to the output terminal of the first power amplifier. Alternatively, the first end of the second matching capacitor is connected to the second input terminal of the first voltage synthesis unit, and the second end is grounded. The first end of the third matching capacitor is connected to the second input terminal of the second voltage synthesis unit, and the second end is grounded.

9. The RF power amplifier according to claim 4, wherein, The capacitor matching network includes a fourth matching capacitor. The first end of the fourth matching capacitor is connected to the output terminal of the first power amplifier, and the second end of the fourth matching capacitor is connected to the first connection node.

10. The radio frequency power amplifier according to claim 8 or 9, characterized in that, The radio frequency power amplifier further includes a third power supply terminal, and the third power supply terminal is connected to the output terminal of the first power amplifier.

11. The radio frequency power amplifier according to claim 1, characterized in that, The first voltage synthesis unit includes a first balun, and the first balun includes a first winding and a second winding that are mutually coupled. The second voltage synthesis unit includes a second balun, and the second balun includes a third winding and a fourth winding that are mutually coupled. The first end of the first winding and the first end of the third winding are connected to the output terminal of the first power amplifier. The second end of the first winding is connected to a first potential terminal, and the second end of the third winding is connected to a second potential terminal. The first end of the second winding is connected to the input terminal of the second power amplifier, the second end of the second winding is connected to the input terminal of the third power amplifier, the first end of the fourth winding is connected to the input terminal of the fourth power amplifier, and the second end of the fourth winding is connected to the input terminal of the fifth power amplifier. Wherein, the first potential terminal is a power supply terminal or a ground terminal, and the second potential terminal is a power supply terminal or a ground terminal.

12. The RF power amplifier according to claim 1, characterized in that, The second power amplifier is configured to amplify a first radio frequency signal, the third power amplifier is configured to amplify a second radio frequency signal, the fourth power amplifier is configured to amplify a third radio frequency signal, and the fifth power amplifier is configured to amplify a fourth radio frequency signal. Wherein, the phase of the first radio frequency signal and the phase of the fourth radio frequency signal are a first phase, and the phase of the second radio frequency signal and the phase of the third radio frequency signal are a second phase.

13. A radio frequency front-end module, characterized in that, It includes a first-stage amplification circuit, a second-stage amplification circuit, and an inter-stage conversion circuit. The first-stage amplification circuit includes a first power amplifier, the second-stage amplification circuit includes a first differential amplification circuit and a second differential amplification circuit, and the inter-stage conversion circuit includes a first voltage synthesis unit and a second voltage synthesis unit. The first input terminal of the first voltage synthesis unit and the first input terminal of the second voltage synthesis unit are connected to form a first connection node. The output terminal of the first power amplifier is connected to the first connection node, the input terminal of the first power amplifier is connected to a signal input terminal, the output terminal of the first voltage synthesis unit is connected to the first differential amplification circuit, and the output terminal of the second voltage synthesis unit is connected to the second differential amplification circuit. Wherein, the first voltage synthesis unit and the second voltage synthesis unit are arranged on opposite sides of the first power amplifier. The first differential amplification circuit includes a second power amplifier and a third power amplifier, and the second differential amplification circuit includes a fourth power amplifier and a fifth power amplifier. The first output terminal of the first voltage synthesis unit is connected to the input terminal of the second power amplifier, and the second output terminal of the first voltage synthesis unit is connected to the input terminal of the third power amplifier. The first output terminal of the second voltage synthesis unit is connected to the input terminal of the fourth power amplifier, and the second output terminal of the second voltage synthesis unit is connected to the input terminal of the fifth power amplifier.

14. The RF front-end module according to claim 13, wherein , The center points of the first voltage synthesis unit and the second voltage synthesis unit are located on the same straight line.

15. The RF front-end module according to claim 13, wherein , The output terminal of the first power amplifier, the first input terminal of the first voltage synthesis unit, and the first input terminal of the second voltage synthesis unit are located on the same straight line.

16. The radio frequency front-end module according to claim 13, wherein the first power amplifier is disposed in a central region between the first voltage synthesis unit and the second voltage synthesis unit.

17. The RF front-end module according to claim 13, characterized in that, The transmission line length between the output terminal of the first power amplifier and the first input terminal of the first voltage synthesis unit is the same as the transmission line length between the output terminal of the first power amplifier and the first input terminal of the second voltage synthesis unit.

18. The RF front-end module according to claim 13, wherein, The radio frequency front-end module further includes a capacitance matching network, and the capacitance matching network is disposed between the first voltage synthesis unit and the second voltage synthesis unit.

19. The radio frequency front-end module according to claim 14, wherein The radio frequency power amplifier further includes a first decoupling capacitor and a second decoupling capacitor. The second input terminal of the first voltage synthesis unit is connected to a first power supply terminal, the first input terminal of the second voltage synthesis unit is connected to a second power supply terminal. One end of the first decoupling capacitor is connected to the first power supply terminal, and the other end is connected to the ground terminal; one end of the second decoupling capacitor is connected to the second power supply terminal, and the other end is connected to the ground terminal. Wherein, the first decoupling capacitor is disposed adjacent to the first power supply terminal and on a side of the first voltage synthesis unit away from the first power amplifier, and the second decoupling capacitor is disposed adjacent to the second power supply terminal and on a side of the second voltage synthesis unit away from the first power amplifier.

20. The radio frequency front-end module according to claim 18, wherein The radio frequency front-end module further includes a third power supply terminal, and the third power supply terminal is connected to the output terminal of the first power amplifier. Wherein, the third power supply terminal is disposed between the first voltage synthesis unit and the second voltage synthesis unit.

21. The radio frequency front-end module according to claim 18, wherein, The capacitance matching network includes a first matching capacitor. The first end of the first matching capacitor is connected to the output terminal of the first power amplifier, and the first matching capacitor is connected to the ground terminal. The first matching capacitor is disposed in a central region between the first voltage synthesis unit and the second voltage synthesis unit.

22. The radio frequency front-end module according to claim 20, wherein, The capacitance matching network further includes a second matching capacitor and a third matching capacitor. The first end of the second matching capacitor is connected to the output terminal of the first power amplifier, the second end of the second matching capacitor is connected to the first input terminal of the first voltage synthesis unit, the first end of the third matching capacitor is connected to the output terminal of the first power amplifier, and the second end of the third matching capacitor is connected to the first input terminal of the second voltage synthesis unit. Wherein, the second matching capacitor is disposed between the third power supply terminal and the first voltage synthesis unit, and the third matching capacitor is disposed between the third power supply terminal and the second voltage synthesis unit.

23. The RF front-end module according to claim 18, wherein, The capacitance matching network further includes a fourth matching capacitor. One end of the fourth matching capacitor is connected to the output end of the first power amplifier, and the other end is connected to the first connection node. Wherein, the fourth matching capacitor is disposed between the first power amplifier and the first connection node.

24. The radio frequency front-end module according to claim 13, wherein, The RF front-end module further includes a fifth matching capacitor and a sixth matching capacitor. The first end of the fifth matching capacitor is connected to the second input end of the first voltage synthesizing unit, and the second end of the fifth matching capacitor is connected to the ground terminal. The first end of the sixth matching capacitor is connected to the second input end of the second voltage synthesizing unit, and the second end of the sixth matching capacitor is connected to the ground terminal. Wherein, the fifth matching capacitor is disposed on a side of the first voltage synthesizing unit away from the first power amplifier, and the sixth matching capacitor is disposed on a side of the second voltage synthesizing unit away from the first power amplifier.

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