High-density and adjustable focusing wafer-level photosensitive packaging structure

Abstract

The present invention discloses a high-density and adjustable-focus wafer-level photosensitive packaging structure, comprising a wafer packaging layer, a silicon interposer, a first chip, a second chip, and an encapsulation adhesive layer; the bottom surface of the silicon interposer is attached to the wafer packaging layer, the first chip and the second chip are encapsulated on the top surface of the silicon interposer via the encapsulation adhesive layer, and the first chip and the second chip are isolated by an opaque encapsulation adhesive layer; a first trough body and a second trough body are formed on the encapsulation adhesive layer, the bottom of the first trough body matches and is located on the first chip, and the top of the first trough body upwardly penetrates the encapsulation adhesive layer; the bottom of the second trough body matches and is located on the second chip, and the top of the second trough body upwardly penetrates the encapsulation adhesive layer; the first chip and the second chip are electrically connected to the wafer packaging layer respectively via the silicon interposer. The present invention relates to the field of sensor packaging technology and can solve technical problems in the prior art.

Description

Technical Field

[0001] The present invention relates to the field of sensor packaging technology, and in particular to a high-density and adjustable focusing wafer-level photosensor packaging structure. Background Art

[0002] Please see the attached Figure 1 The traditional optical sensor package structure includes a substrate 8, a housing 9, a glass cover 10, a light-emitting chip 11, and a light-receiving chip 12. The housing 9 is fixed to the substrate 8 by gluing. A partition wall 13 forms two separate chambers within the housing 9, housing the light-emitting chip 11 and the light-receiving chip 12, respectively. The light-emitting chip 11 and the light-receiving chip 12 are electrically connected to the substrate 8 via gold wires 14. The top of the housing 9 has a light-transmitting opening above the light-emitting chip 11 and the light-receiving chip 12, and the glass cover 10 covers the top of the housing. The glass cover 10 uses a spherical protrusion 15 on the top to meet the requirements of light emission and focusing.

[0003] The traditional optical sensor packaging structure has the following shortcomings:

[0004] 1. The adhesive portion between the substrate and the shell is prone to light leakage, affecting the accuracy of the light sensor. At the same time, the adhesive portion between the substrate and the shell is prone to glue overflow during production, affecting the appearance of the packaging structure.

[0005] 2. The light-emitting chip and the light-receiving chip are electrically connected to the substrate through gold wires. Since the gold wires have a certain curvature when bonding, the height requirement for the shell is relatively high, resulting in a larger volume of the entire packaging structure.

[0006] 3. A spherical protrusion is set on the top of the glass cover. Although it can meet the emission and focusing requirements of light to a certain extent, it further increases the height and volume of the entire packaging structure. In addition, the spherical protrusion cannot be accurately aligned with the chip position, resulting in the problem of light spot offset.

[0007] 4. When cutting the shell, there is a 30-100um burr problem, which affects the overall quality of the packaging structure.

[0008] Therefore, it is necessary to provide a high-density and adjustable focusing wafer-level photosensitive packaging structure that can solve the above-mentioned technical problems in the prior art. Summary of the Invention

[0009] The purpose of the present invention is to provide a high-density and adjustable focusing wafer-level photosensitive packaging structure that can solve the above-mentioned technical problems in the prior art.

[0010] The present invention is achieved in that:

[0011] A high-density and adjustable focus wafer-level photosensor packaging structure comprises a wafer packaging layer, a silicon interposer, a first chip, a second chip and a packaging adhesive layer; the bottom surface of the silicon interposer is adhered to the wafer packaging layer, the first chip and the second chip are encapsulated on the top surface of the silicon interposer via the packaging adhesive layer, and the first chip and the second chip are isolated from each other by the opaque packaging adhesive layer; a first trough body and a second trough body are formed on the packaging adhesive layer at intervals, the bottom of the first trough body matches and is located on the first chip, and the top of the first trough body upwardly penetrates the packaging adhesive layer, the bottom of the second trough body matches and is located on the second chip, and the top of the second trough body upwardly penetrates the packaging adhesive layer; the first chip and the second chip are electrically connected to the wafer packaging layer respectively via the silicon interposer.

[0012] The first slot body is a trapezoidal slot body that is wide at the top and narrow at the bottom, and the bottom size of the trapezoidal slot body matches the size of the emitting end of the first chip.

[0013] The second trough body includes an upper trough body and a lower trough body. The upper trough body is a trapezoidal trough body that is narrow at the top and wide at the bottom. The lower trough body is a V-shaped trough body, and the upper end width of the lower trough body is consistent with the lower end width of the upper trough body, so that the upper trough body and the lower trough body are connected to form a focusing trough.

[0014] The upper trough body is formed by micro-cutting with an outward-expanding knife, and the lower trough body is formed by laser cutting, and the bottom tip of the lower trough body is aligned with the receiving end of the second chip.

[0015] A sputtered metal layer is arranged at the edges of the first chip and the second chip and on the top surface of the silicon interposer. A chip metal pad is provided on the first chip and the second chip. A first through silicon via is formed in the silicon interposer and is electrically connected to the wafer packaging layer, so that one end of the sputtered metal layer is electrically connected to the chip metal pad, and the other end of the sputtered metal layer is electrically connected to the wafer packaging layer through the first through silicon via.

[0016] A second through silicon via is formed in the silicon interposer, one end of the second through silicon via is electrically connected to the wafer packaging layer, and the other end of the second through silicon via passes through the side end of the silicon interposer.

[0017] Compared with the prior art, the present invention has the following beneficial effects:

[0018] 1. The present invention has a wafer packaging layer, so there is no need to set up a substrate. The thickness of the traditional substrate is about 200-300um, and the thickness of the wafer packaging layer is only about 10um, which can greatly reduce the height of the entire packaging structure, thereby reducing the volume of the packaging structure.

[0019] 2. Since the present invention is provided with a packaging glue layer, the packaging glue layer can be injection-molded on the silicon interposer in one step using black plastic glue to form a natural light barrier. There is no need to set up a shell and partition wall, which avoids light leakage and glue overflow at the bonding part of the shell and quality problems such as burrs when the shell is cut. This is beneficial to ensuring the accuracy of the light sensor, and can also arrange the first chip and the second chip with the minimum spacing, thereby improving the layout density of the packaging structure, reducing the volume of the packaging structure, and reducing the packaging processing cost.

[0020] 3. Since the present invention is provided with a packaging glue layer, the first groove body and the second groove body are opened according to the position of the transmitting end of the first chip and the receiving end of the second chip during the injection molding of the packaging glue layer. The position of the transmitting and receiving end and the position of the groove body can be accurately aligned according to actual needs, thereby improving the problem of light spot offset; at the same time, the lower groove body of the V-shaped structure of the second groove body can have a focusing effect on the light beam, further ensuring the accuracy of the light sensor.

[0021] 4. Since the present invention is provided with a sputtered metal layer, a chip metal pad and a first through-silicon via, the sputtered metal layer, the chip metal pad and the first through-silicon via replace the gold wire to realize the electrical connection function between the chip and the wafer packaging layer. The sputtered metal layer and the chip metal pad are attached to the surface of the chip, and the first through-silicon via runs through the silicon interposer, which does not occupy additional height of the packaging structure and is also conducive to the compact layout of the first chip and the second chip, thereby further reducing the volume of the packaging structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 is a cross-sectional view of a light sensor packaging structure in the prior art;

[0023] Figure 2 It is a cross-sectional view of the high-density and adjustable focusing wafer-level photosensor packaging structure of the present invention.

[0024] In the figure, 1 is a wafer packaging layer, 2 is a silicon interposer, 201 is a first through silicon via, 202 is a second through silicon via, 3 is a first chip, 4 is a second chip, 5 is a packaging adhesive layer, 501 is a first tank body, 502 is a second tank body, 6 is a sputtered metal layer, 7 is a chip metal pad, 8 is a substrate, 9 is a shell, 10 is a glass cover, 11 is a light emitting chip, 12 is a light receiving chip, 13 is a partition wall, 14 is a gold wire, and 15 is a spherical protrusion. DETAILED DESCRIPTION

[0025] The present invention will be further described below with reference to the accompanying drawings and specific embodiments.

[0026] Please see the attached Figure 2, a high-density and adjustable focus wafer-level photosensitive packaging structure, including a wafer packaging layer 1, a silicon interposer 2, a first chip 3, a second chip 4 and a packaging glue layer 5; the bottom surface of the silicon interposer 2 is attached to the wafer packaging layer 1, and the first chip 3 and the second chip 4 are encapsulated on the top surface of the silicon interposer 2 through the packaging glue layer 5, and the first chip 3 and the second chip 4 are isolated by the opaque packaging glue layer 5; a first groove body 501 and a second groove body 502 are formed on the packaging glue layer 5 at intervals, the bottom of the first groove body 501 is matched and located on the first chip 3, and the top of the first groove body 501 upwardly penetrates the packaging glue layer 5, the bottom of the second groove body 502 is matched and located on the second chip 4, and the top of the second groove body 502 upwardly penetrates the packaging glue layer 5; the first chip 3 and the second chip 4 are electrically connected to the wafer packaging layer 1 through the silicon interposer 2 respectively.

[0027] Preferably, the encapsulation glue layer 5 can be made of black plastic sealant. The black plastic sealant of the present invention can be directly encapsulated on the silicon interposer 2 to form a natural light barrier and play a role in blocking light. There is no need to glue the traditional shell to connect, thereby avoiding the problems of light leakage and glue overflow at the gluing part. At the same time, the black plastic sealant can directly isolate the first chip 3 and the second chip 4 without setting a partition wall, thereby ensuring that the first chip 3 and the second chip 4 do not interfere with each other while making the gap between the first chip 3 and the second chip 4 as close as possible, making the layout structure of the packaging structure more compact and higher in density, and reducing processing costs.

[0028] A groove is directly cut into the encapsulating adhesive layer 5, forming a first groove 501 above the first chip 3 to facilitate the emission of light from the transmitting end of the first chip 3. A second groove 502 is formed above the second chip 4 to facilitate the reception of light from the receiving end of the second chip 4. While maintaining the optical sensor's beam transmission and reception capabilities, this invention eliminates the need for a traditional glass cover, further reducing processing costs and avoiding the issues of increased height and bulk associated with the inclusion of spherical protrusions. The first chip 3 and the second chip 4, separated by black plastic encapsulating adhesive, can be arranged with minimal spacing, further reducing the overall package size.

[0029] The first groove body 501 can be opened according to the position of the transmitting end of the first chip 3 when the packaging glue layer 5 is injected, and the second groove body 502 can be opened according to the position of the receiving end of the second chip 4 when the packaging glue layer 5 is injected, thereby ensuring that the groove position of the first groove body 501 matches the transmitting end of the first chip 3 and the groove position of the second groove body 502 matches the receiving end of the second chip 4, which can solve the problem of light spot offset caused by the deviation of the spherical protrusion in the prior art.

[0030] The encapsulation adhesive layer 5 is injection molded in one step without cutting, thus avoiding the burr problem caused by shell cutting in the prior art.

[0031] By setting the wafer packaging layer 1 (usually 10um thick), there is no need to set a substrate (usually 200-300um thick), which reduces the height of the packaging structure. At the same time, the electrical connection requirements between the first chip 3 and the second chip 4 and the wafer packaging layer 1 can be met through the silicon interposer 2, without the need for gold wire connection, which is conducive to further reducing the height and volume of the packaging structure.

[0032] The first slot body 501 is a trapezoidal slot body that is wide at the top and narrow at the bottom. The bottom size of the trapezoidal slot body matches the size of the emitting end of the first chip 3 .

[0033] The shape, size, and position of the trapezoidal trough can be adjusted according to the actual first chip 3 used, which increases the packaging flexibility and helps ensure the alignment accuracy between the first trough 501 and the emission end of the first chip 3. At the same time, the trapezoidal trough, which is wide at the top and narrow at the bottom, can better ensure the light beam emission of the first chip 3.

[0034] The second trough body 502 includes an upper trough body and a lower trough body. The upper trough body is a trapezoidal trough body that is narrow at the top and wide at the bottom. The lower trough body is a V-shaped trough body, and the upper end width of the lower trough body is consistent with the lower end width of the upper trough body, so that the upper trough body and the lower trough body are connected to form a focusing trough.

[0035] The shape of the upper groove body can be adaptively adjusted according to the actual light collection requirements. The V-shaped gradually narrowing structure of the lower groove body can focus the light beam entering the second groove body 502, which is beneficial to improving the accuracy and sensitivity of the light sensor.

[0036] Preferably, the upper trough body can be formed by micro-cutting with an outward-expanding knife, and the lower trough body can be formed by laser cutting, and the bottom tip of the lower trough body is aligned with the receiving end of the second chip 4.

[0037] The bottom tip of the lower groove body of the V-shaped structure can be accurately aligned with the receiving end of the second chip 4, ensuring the focusing effect of the light beam at the receiving end of the second chip 4, which is beneficial to improving the accuracy of the optical sensor.

[0038] The sizes and positions of the first slot body 501 and the second slot body 502 can be flexibly adjusted according to actual use requirements to ensure the accuracy of the optical sensor.

[0039] A sputtered metal layer 6 is arranged at the edges of the first chip 3 and the second chip 4 and on the top surface of the silicon interposer 2. A chip metal pad 7 is provided on the first chip 3 and the second chip 4. A first through-silicon via 201 electrically connected to the wafer packaging layer 1 is formed in the silicon interposer 2, so that one end of the sputtered metal layer 6 is electrically connected to the chip metal pad 7, and the other end of the sputtered metal layer 6 is electrically connected to the wafer packaging layer 1 through the first through-silicon via 201.

[0040] The first through-silicon via 201 is formed in the silicon interposer 2 according to the circuit design using the existing through-silicon via (TSV) technology, so that the lower end of the first through-silicon via 201 passes through the bottom surface of the silicon interposer 2 and is electrically connected to the corresponding port of the wafer packaging layer 1, and the upper end of the first through-silicon via 201 passes through the top surface of the silicon interposer 2 and is located next to the first chip 3 and the second chip 4.

[0041] Taking the arrangement of the first chip 3 on the left and the second chip 4 on the right as an example: a chip metal pad 7 is arranged at the position on the left side of the top of the first chip 3 where electrical connection is required, and a sputtered metal layer 6 is formed at the left edge of the first chip 3 through a metal sputtering process. The sputtered metal layer 6 extends to the first through-silicon via 201 on the top surface of the silicon interposer 2. The sputtered metal layer 6 is formed by sputtering a metal with conductive properties, thereby achieving electrical connection between the first chip 3 and the corresponding port of the wafer packaging layer 1. Similarly, a chip metal pad 7 is arranged at the position on the right side of the top of the second chip 4 where electrical connection is required, and a sputtered metal layer 6 is formed at the right edge of the second chip 4 through a metal sputtering process. The sputtered metal layer 6 extends to the first through-silicon via 201 on the top surface of the silicon interposer 2. The sputtered metal layer 6 is formed by sputtering a metal with conductive properties, thereby achieving electrical connection between the second chip 4 and the corresponding port of the wafer packaging layer 1.

[0042] The chip metal pad 7, sputtered metal layer 6, and first through-silicon via 201 replace traditional gold wire connections. The chip metal pad 7 and sputtered metal layer 6 adhere to the chip surface, significantly reducing the layout height requirement compared to traditional gold wires. The chip metal pad 7 can be made of a thin conductive metal sheet, which does not affect the height of the package structure.

[0043] A second TSV 202 is formed in the silicon interposer 2 . One end of the second TSV 202 is electrically connected to the wafer packaging layer 1 , and the other end of the second TSV 202 passes through a side end of the silicon interposer 2 .

[0044] According to the electrical connection requirements between the packaging structure and other components, a corresponding number of second silicon vias 202 can be set in the silicon interposer 2, and the second silicon vias 202 can be led out from the side of the silicon interposer 2, so as to facilitate the electrical connection between the wafer packaging layer 1 and other components through the second silicon vias 202.

[0045] The above are only preferred embodiments of the present invention and are not intended to limit the scope of protection of the invention. Therefore, any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A high-density and adjustable-focus wafer-level photosensitive packaging structure, characterized by: The invention comprises a wafer packaging layer (1), a silicon intermediate layer (2), a first chip (3), a second chip (4) and a packaging adhesive layer (5); the bottom surface of the silicon intermediate layer (2) is attached to the wafer packaging layer (1), the first chip (3) and the second chip (4) are packaged on the top surface of the silicon intermediate layer (2) through the packaging adhesive layer (5), and the first chip (3) and the second chip (4) are isolated by the light-proof packaging adhesive layer (5); a first trough (501) and a second trough (502) are formed on the packaging adhesive layer (5) at intervals, the bottom of the first trough (501) is matched and located on the first chip (3), the top of the first trough (501) passes through the packaging adhesive layer (5) upwards, the bottom of the second trough (502) is matched and located on the second chip (4), and the top of the second trough (502) passes through the packaging adhesive layer (5) upwards; the first chip (3) and the second chip (4) are electrically connected to the wafer packaging layer (1) respectively through the silicon intermediate layer (2); A sputtered metal layer (6) is provided at the edges of the first chip (3) and the second chip (4) and on the top surface of the silicon interposer (2); a chip metal pad (7) is provided on the first chip (3) and the second chip (4); a first through-silicon via (201) electrically connected to the wafer packaging layer (1) is formed in the silicon interposer (2), so that one end of the sputtered metal layer (6) is electrically connected to the chip metal pad (7), and the other end of the sputtered metal layer (6) is electrically connected to the wafer packaging layer (1) through the first through-silicon via (201).

2. The high-density and adjustable-focus wafer-level photosensitive packaging structure according to claim 1 is characterized by: The first slot body (501) is a trapezoidal slot body that is wide at the top and narrow at the bottom, and the bottom size of the trapezoidal slot body matches the size of the emission end of the first chip (3).

3. The high-density and adjustable-focus wafer-level photosensitive packaging structure according to claim 1 is characterized by: The second trough body (502) includes an upper trough body and a lower trough body, the upper trough body is a trapezoidal trough body that is narrow at the top and wide at the bottom, and the lower trough body is a V-shaped trough body, and the upper end width of the lower trough body is consistent with the lower end width of the upper trough body, so that the upper trough body and the lower trough body are connected to form a focusing trough.

4. The high-density and adjustable-focus wafer-level photosensitive packaging structure according to claim 3 is characterized by: The upper trough body is formed by micro-cutting with an outward-expanding knife, and the lower trough body is formed by laser cutting, and the bottom tip of the lower trough body is aligned with the receiving end of the second chip (4).

5. The high-density and adjustable-focus wafer-level photosensitive packaging structure according to claim 1 is characterized by: A second through-silicon via (202) is formed in the silicon interposer (2), one end of the second through-silicon via (202) is electrically connected to the wafer packaging layer (1), and the other end of the second through-silicon via (202) passes through the side end of the silicon interposer (2).

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