An anti-reverse-flow intelligent power switch system and electronic equipment

Abstract

The present invention proposes an anti-backflow intelligent power switch system and electronic equipment, wherein the first end of the target switch tube is connected to one end of the first resistor, the first end of the anti-backflow circuit is connected to the output end of the processing unit, the second end of the anti-backflow circuit is connected to the other end of the first resistor, and the second end of the target switch tube is connected to an inductor element; one end of the clamping module is connected to the first end of the target switch tube, and the other end of the clamping module is connected to the second end of the target switch tube. When the control signal is at a high level, the anti-backflow circuit switches to a conducting state, thereby providing a driving voltage to the intelligent power switch to drive the intelligent power switch to switch to an on state. When the control signal is at a low level, the anti-backflow circuit switches to a disconnected state to avoid the situation in which the current flows back from the clamping module to the processing unit due to the continuous current of the inductor element, thereby playing a role in preventing backflow and completing the protection of the processing unit.

Description

Technical Field

[0001] The present invention relates to the field of electronic circuits, and in particular to an anti-backflow intelligent power switch system and electronic equipment. Background Art

[0002] Intelligent power devices, also known as electronic switches, use power semiconductor devices, thyristor electronic switches to replace traditional contact control devices. Compared with traditional contactors, thermal relays, and circuit breaker systems, they have no contacts or mechanical mechanisms, and do not have arcs, contact wear, or welding problems, thus improving the quality of electricity and the reliability of electricity protection and control. With the development of the electrical system of motor vehicles, intelligent power devices are gradually replacing fuses and discrete components with more complete functions, higher cost-effectiveness, stronger applicability, and higher reliability.

[0003] Intelligent power devices can perform state switching control based on electrical signals. When the intelligent power device is connected to an inductive load, the intelligent power device switches from on to off. Since the inductive load's continuous current will trigger the voltage clamping function of the intelligent power device, current backflow may occur. Summary of the invention

[0004] The object of the present invention is to provide an anti-backflow intelligent power switch system and an electronic device to at least partially improve the above-mentioned problem.

[0005] In order to achieve the above purpose, the technical solution adopted by the embodiment of the present invention is as follows:

[0006] In a first aspect, an embodiment of the present invention provides an anti-backflow intelligent power switch system, the anti-backflow intelligent power switch system comprising a processing unit, an anti-backflow circuit and an intelligent power switch;

[0007] The intelligent power switch comprises a first resistor, a target switch tube and a clamping module, wherein a first end of the target switch tube is connected to one end of the first resistor, a first end of the anti-backfeed circuit is connected to an output end of the processing unit, a second end of the anti-backfeed circuit is connected to the other end of the first resistor, a second end of the target switch tube is used to connect an inductor element, and a third end of the target switch tube is used to be grounded;

[0008] One end of the voltage clamping module is connected to the first end of the target switch tube, and the other end of the voltage clamping module is connected to the second end of the target switch tube;

[0009] The anti-backflow circuit is used to provide a driving voltage to the intelligent power switch when the processing unit outputs a high level, and to prevent current backflow when the processing unit outputs a low level.

[0010] Optionally, the anti-backflow circuit includes a first NMOS transistor, a second NMOS transistor, a third NMOS transistor, a first PMOS transistor, a second PMOS transistor, a third PMOS transistor, a second resistor and a third resistor;

[0011] The gate of the first NMOS transistor, the gate of the second NMOS transistor and the gate of the first PMOS transistor are connected to the output end of the processing unit;

[0012] The source of the first PMOS tube and the source of the third PMOS tube are connected to the driving voltage, the drain of the first PMOS tube is connected to the drain of the first NMOS tube, and the gate of the third PMOS tube and the gate of the third NMOS tube are connected between the drain of the first PMOS tube and the drain of the first NMOS tube;

[0013] The gate of the second PMOS tube is connected to the drain of the second NMOS tube, and the drain of the second PMOS tube is connected to the drain of the third PMOS tube;

[0014] One end of the second resistor is connected to the first resistor, the other end of the second resistor is connected to the gate of the second PMOS tube, the drain of the third NMOS tube, the source of the second PMOS tube and one end of the third resistor are connected between the first resistor and the second resistor;

[0015] The source of the first NMOS transistor, the source of the second NMOS transistor, the source of the third NMOS transistor and the other end of the third resistor are all grounded.

[0016] Optionally, the target switch tube is an NMOS tube, the first end of the target switch tube is the gate of the NMOS tube, the second end of the target switch tube is the drain of the NMOS tube, and the third end of the target switch tube is the source of the NMOS tube.

[0017] Optionally, the voltage clamping module is a voltage regulator diode component, the anode of the voltage regulator diode component is connected to the first end of the target switch tube, and the cathode of the voltage regulator diode component is connected to the second end of the target switch tube.

[0018] Optionally, the intelligent power switch further includes an over-temperature protection module, a first end of the over-temperature protection module is connected between the first resistor and the target switch tube, and a second end of the over-temperature protection module is grounded;

[0019] The over-temperature protection module is used to monitor the temperature information of the target switch tube and determine whether to trigger the over-temperature protection based on the temperature information. If the over-temperature protection is triggered, it switches to the on state to make the first end and the second end of the over-temperature protection module conductive.

[0020] Optionally, the intelligent power switch further includes an overcurrent protection module, a first end of the overcurrent protection module is connected between the first resistor and the target switch tube, and a second end of the overcurrent protection module is grounded;

[0021] The overcurrent protection module is used to monitor the current information of the target switch tube and determine whether to trigger the overcurrent protection based on the current information. If the overcurrent protection is triggered, it switches to the on state to connect the first end and the second end of the overcurrent protection module.

[0022] Optionally, the anti-backflow intelligent power switch system further includes a balancing circuit, a first end of the balancing circuit is connected between the first resistor and the target switch tube, and a second end of the balancing circuit is grounded;

[0023] The balancing circuit is used to switch to an open state when the control signal of the intelligent power switch is at a high level, and to switch to a closed state when the control signal of the intelligent power switch is at a low level.

[0024] In a second aspect, an embodiment of the present invention provides an electronic device, comprising the anti-backflow intelligent power switch system and an inductor element as described in the first aspect, wherein the second end of the target switch tube is connected to the inductor element.

[0025] Optionally, the anti-backflow circuit includes a first NMOS transistor, a second NMOS transistor, a third NMOS transistor, a first PMOS transistor, a second PMOS transistor, a third PMOS transistor, a second resistor and a third resistor;

[0026] The gate of the first NMOS transistor, the gate of the second NMOS transistor and the gate of the first PMOS transistor are connected to the output end of the processing unit;

[0027] The source of the first PMOS tube and the source of the third PMOS tube are connected to the driving voltage, the drain of the first PMOS tube is connected to the drain of the first NMOS tube, and the gate of the third PMOS tube and the gate of the third NMOS tube are connected between the drain of the first PMOS tube and the drain of the first NMOS tube;

[0028] The gate of the second PMOS tube is connected to the drain of the second NMOS tube, and the drain of the second PMOS tube is connected to the drain of the third PMOS tube;

[0029] One end of the second resistor is connected to the first resistor, the other end of the second resistor is connected to the gate of the second PMOS tube, the drain of the third NMOS tube, the source of the second PMOS tube and one end of the third resistor are connected between the first resistor and the second resistor;

[0030] The source of the first NMOS transistor, the source of the second NMOS transistor, the source of the third NMOS transistor and the other end of the third resistor are all grounded.

[0031] Optionally, the target switch tube is an NMOS tube, the first end of the target switch tube is the gate of the NMOS tube, the second end of the target switch tube is the drain of the NMOS tube, and the third end of the target switch tube is the source of the NMOS tube.

[0032] Compared with the prior art, the embodiment of the present invention provides an anti-backflow intelligent power switch system and electronic equipment, the anti-backflow intelligent power switch system includes a processing unit, an anti-backflow circuit and an intelligent power switch; the intelligent power switch includes a first resistor, a target switch tube and a clamping module, the first end of the target switch tube is connected to one end of the first resistor, the first end of the anti-backflow circuit is connected to the output end of the processing unit, the second end of the anti-backflow circuit is connected to the other end of the first resistor, the second end of the target switch tube is used to connect an inductor element, and the third end of the target switch tube is used to ground; one end of the clamping module is connected to the first end of the target switch tube, and the other end of the clamping module is connected to the second end of the target switch tube; the anti-backflow circuit is used to provide a driving voltage to the intelligent power switch when the processing unit outputs a high level, and prevent current backflow when the processing unit outputs a low level. When the control signal is at a high level, the anti-backflow circuit switches to a conducting state, thereby providing a driving voltage to the intelligent power switch to drive the intelligent power switch to switch to an on state. When the control signal is at a low level, the anti-backflow circuit switches to an off state to prevent the current from flowing back from the clamping module to the processing unit due to the continuous current of the inductor components, thereby playing an anti-backflow role and completing the protection of the processing unit.

[0033] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, preferred embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0035] Figure 1 This is one of the structural schematic diagrams of the anti-backflow intelligent power switch system provided in an embodiment of the present invention.

[0036] Figure 2 A schematic diagram of the structure of an anti-backfeed circuit provided in an embodiment of the present invention.

[0037] Figure 3 The second structural schematic diagram of the intelligent power switch system provided in the embodiment of the present invention.

[0038] In the figure: 10-intelligent power switch; 11-voltage clamping module; 12-overtemperature protection module; 13-overcurrent protection module; 20-processing unit; 30-anti-backflow circuit. DETAILED DESCRIPTION

[0039] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings here can be arranged and designed in various different configurations.

[0040] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the invention claimed for protection, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0041] It should be noted that similar reference numerals and letters represent similar items in the following drawings, so once an item is defined in one drawing, it does not need to be further defined and explained in the subsequent drawings. At the same time, in the description of the present invention, the terms "first", "second", etc. are only used to distinguish the description and cannot be understood as indicating or implying relative importance.

[0042] In the description of the present invention, it is also necessary to explain that, unless otherwise clearly specified and limited, the terms "disposed" and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be an indirect connection through an intermediate medium, or it can be the internal communication of two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0043] Some embodiments of the present invention are described in detail below in conjunction with the accompanying drawings. In the absence of conflict, the following embodiments and features in the embodiments can be combined with each other.

[0044] Because the smart power switch is connected to an inductive component (inductive load), when the smart power device switches from on to off, the inductive load will trigger the voltage clamping function of the smart power device, and the voltage clamping module in the smart power switch will be turned on to discharge the inductive current. If the target switch tube in the smart power switch is directly connected to the pin (GPIO) of the processing unit, when the voltage clamping function is triggered, the current may flow back from the voltage clamping module to the processing unit, which may cause the processing unit to fail.

[0045] In order to solve the above problems, the present invention provides an optional implementation method, please refer to Figure 1 , Figure 1 The structure diagram of the anti-backfeeding intelligent power switch system provided by the embodiment of the present invention is one of the following: The anti-backfeeding intelligent power switch system comprises a processing unit 20 , an anti-backfeeding circuit 30 and an intelligent power switch 10 .

[0046] Among them, the processing unit 20 can be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), and a microcontroller unit (MCU); it can also be a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), or other programmable logic devices, discrete gates or transistor logic devices, and discrete hardware components.

[0047] The intelligent power switch 10 includes a first resistor R1, a target switch tube Q1 and a clamping module 11. The first end of the target switch tube Q1 is connected to one end of the first resistor R1, the first end of the anti-backfeed circuit 30 is connected to the output end of the processing unit 20, the second end of the anti-backfeed circuit 30 is connected to the other end of the first resistor R1, the second end of the target switch tube Q1 is used to connect an inductor element, and the third end of the target switch tube Q1 is used to be grounded.

[0048] One end of the voltage clamping module 11 is connected to the first end of the target switch tube Q1 , and the other end of the voltage clamping module 11 is connected to the second end of the target switch tube Q1 .

[0049] Optionally, the target switch tube Q1 is an NMOS tube, the first end of the target switch tube Q1 is the gate of the NMOS tube, the second end of the target switch tube Q1 is the drain of the NMOS tube, and the third end of the target switch tube Q1 is the source of the NMOS tube.

[0050] Optionally, the voltage clamping module 11 is a voltage regulator diode component, the anode of the voltage regulator diode component is connected to the first end of the target switch tube Q1, and the cathode of the voltage regulator diode component is connected to the second end of the target switch tube Q1.

[0051] The anti-backflow circuit 30 is used to provide a driving voltage to the intelligent power switch 10 when the processing unit 20 outputs a high level, and to prevent current backflow when the processing unit 20 outputs a low level.

[0052] The control signal output by the processing unit 20 is IN as shown in the figure.

[0053] In the anti-backfeeding intelligent power switch system provided by the embodiment of the present invention, when the control signal (IN) is at a high level, the anti-backfeeding circuit switches to the on state, thereby providing a driving voltage to the intelligent power switch to drive the intelligent power switch to switch to the on state. When the control signal (IN) is at a low level, the anti-backfeeding circuit switches to the off state to avoid the situation where the current flows back from the clamping module to the processing unit due to the continuous current of the inductor component, thereby playing the role of anti-backfeeding and completing the protection of the processing unit.

[0054] exist Figure 1 Based on the specific structure of the anti-backflow circuit, the embodiment of the present invention also provides an optional implementation method, please refer to Figure 2 , Figure 2 A schematic diagram of the structure of an anti-backfeed circuit provided in an embodiment of the present invention.

[0055] The anti-backflow circuit 30 includes a first NMOS transistor N1, a second NMOS transistor N2, a third NMOS transistor N3, a first PMOS transistor P1, a second PMOS transistor P2, a third PMOS transistor P3, a second resistor R2 and a third resistor R3.

[0056] The gate of the first NMOS transistor N1, the gate of the second NMOS transistor N2 and the gate of the first PMOS transistor P1 are connected to the output end of the processing unit 20. That is, the gate of the first NMOS transistor N1, the gate of the second NMOS transistor N2 and the gate of the first PMOS transistor P1 serve as the first end of the anti-backfeed circuit 30.

[0057] The source of the first PMOS tube P1 and the source of the third PMOS tube P3 are connected to the driving voltage (VDD), the drain of the first PMOS tube P1 is connected to the drain of the first NMOS tube N1, and the gate of the third PMOS tube P3 and the gate of the third NMOS tube N3 are connected between the drain of the first PMOS tube P1 and the drain of the first NMOS tube N1.

[0058] The gate of the second PMOS transistor P2 is connected to the drain of the second NMOS transistor N2 , and the drain of the second PMOS transistor P2 is connected to the drain of the third PMOS transistor P3 .

[0059] One end of the second resistor R2 is connected to the first resistor R1, the other end of the second resistor R2 is connected to the gate of the second PMOS transistor P2, the drain of the third NMOS transistor N3, the source of the second PMOS transistor P2 and one end of the third resistor R3 are connected between the first resistor R1 and the second resistor R2.

[0060] A connection terminal is led out between the second resistor R2 and the third resistor R3 as a second end of the anti-backfeed circuit 30 , and is connected to the other end of the first resistor R1 .

[0061] A source of the first NMOS transistor N1 , a source of the second NMOS transistor N2 , a source of the third NMOS transistor N3 , and the other end of the third resistor R3 are all grounded.

[0062] When the control signal (IN) is at a high level, the first NMOS tube N1 and the second NMOS tube N2 are turned on, and the first PMOS tube P1 is turned off. Because the first NMOS tube N1 and the second NMOS tube N2 are turned on, the gate of the third NMOS tube N3, the gate of the third PMOS tube P3 and the gate of the second PMOS tube P2 are pulled down, the gate of the third PMOS tube P3 and the gate of the second PMOS tube P2 are turned on, and the third NMOS tube N3 is turned off. The first end of the target switch tube Q1 is pulled up to the driving voltage (VDD), and the target switch tube Q1 is switched to the on state.

[0063] When the control signal (IN) is at a low level, the first NMOS tube N1 and the second NMOS tube N2 are turned off, and the first PMOS tube P1 is turned on. Because the first NMOS tube N1 is turned off and the first PMOS tube P1 is turned on, the gate of the third NMOS tube N3 is applied with a driving voltage (VDD), and the third NMOS tube N3 is turned on. At the same time, because the second NMOS tube N2 is turned off, the second PMOS tube P2 is also in a turned-off state. When the clamping function is triggered, the current can be prevented from being reversed through the body diode in the third PMOS tube P3. The first end of the target switch tube Q1 first passes through the first resistor R1, and then is pulled down to the ground through the third NMOS tube N3 and the third resistor R3 in parallel. When the control signal (IN) is logically low and the voltage can still ensure the operation of the tube, the third NMOS tube N3 is turned on and the third resistor R3 is pulled down in parallel. When the control signal (IN) is logically low, but the voltage cannot ensure the operation of the tube, the third NMOS tube N3 is not turned on and is only pulled down through the third resistor R3. As long as the control signal (IN) is logic low, the second NMOS transistor N2 is turned off.

[0064] In an optional implementation, the driving voltage (VDD) may be independent of the control signal (IN), and the driving voltage (VDD) may be a power supply voltage of the processing unit 20 .

[0065] Alternatively, a relay module (also called UVLO) is provided between the output end of the processing unit 20 and the first end of the anti-backfeed circuit 30, and the driving voltage (VDD) is directly connected to the output end of the processing unit 20, that is, the driving voltage (VDD) is the same as the control signal (IN) output by the processing unit 20. After being processed by the relay module, the control signal (IN) output by the processing unit 20 generates an IN_gate signal, which is output to the anti-backfeed circuit 30. When the control signal (IN) starts to rise from 0V, the IN_gate signal remains low in the range of 0-2.5V. When the control signal (IN) is greater than 2.5V, the IN_gate signal becomes high, the first NMOS tube N1 and the second NMOS tube N2 are turned on, and the third NMOS tube N3 is turned off. When the control signal (IN) starts to drop from the maximum value (for example, 5V), the IN_gate signal remains high in the interval between the maximum value and 2.3V. When the control signal (IN) is less than 2.3V, the IN_gate signal becomes low, the first NMOS tube N1 and the second NMOS tube N2 are turned off, and the third NMOS tube N3 is turned on. When the control signal (IN) is 0V, the first NMOS tube N1, the second NMOS tube N2, and the third NMOS tube N3 are all turned off. Regarding the structure of the intelligent power switch, the embodiment of the present invention also provides an optional implementation. Please refer to Figure 3 , Figure 3 The second structural schematic diagram of the intelligent power switch system provided in the embodiment of the present invention.

[0066] The intelligent power switch 10 further includes an over-temperature protection module 12 . A first end of the over-temperature protection module 12 is connected between the first resistor R1 and the target switch tube Q1 , and a second end of the over-temperature protection module 12 is grounded.

[0067] The over-temperature protection module 12 is used to monitor the temperature information of the target switch tube Q1 and determine whether to trigger the over-temperature protection based on the temperature information. If the over-temperature protection is triggered, it switches to the on state to connect the first end and the second end of the over-temperature protection module 12.

[0068] When the over-temperature protection module 12 is switched to the on state, the first end and the second end of the over-temperature protection module 12 are connected, so that point A in the figure is grounded, and the target switch tube Q1 is disconnected, thereby preventing its temperature from continuing to rise to achieve a protective effect.

[0069] Optionally, when the temperature of the target switch tube Q1 is higher than a preset temperature, over-temperature protection is determined to be triggered. Alternatively, the temperature rise slope of the target switch tube Q1 is determined based on the temperature information of the target switch tube Q1, and when the temperature rise slope is greater than a first preset slope, over-temperature protection is determined to be triggered.

[0070] Please continue to refer to Figure 3 In an optional implementation, the intelligent power switch 10 further includes an overcurrent protection module 13, a first end of the overcurrent protection module 13 is connected between the first resistor R1 and the target switch tube Q1, and a second end of the overcurrent protection module 13 is grounded.

[0071] The overcurrent protection module 13 is used to monitor the current information of the target switch tube Q1 and determine whether to trigger the overcurrent protection based on the current information. If the overcurrent protection is triggered, it switches to the on state to connect the first end and the second end of the overcurrent protection module 13.

[0072] When the overcurrent protection module 13 is switched to the on state, the first end and the second end of the overcurrent protection module 13 are connected, so that point A in the figure is grounded, and the target switch tube Q1 is disconnected, thereby preventing its temperature from continuing to rise to achieve a protective effect.

[0073] Optionally, when the current of the target switch tube Q1 is higher than a preset current value, it is determined that the overcurrent protection is triggered. Alternatively, the current rising slope of the target switch tube Q1 is determined based on the current information of the target switch tube Q1, and when the current rising slope is greater than a second preset slope, it is determined that the overcurrent protection is triggered.

[0074] Optionally, the overcurrent protection module 13 may implement current detection through a resistor connected in series between the third terminal of the target switch tube Q1 and the ground.

[0075] In an optional implementation, the intelligent power switch 10 system further includes a balancing circuit, which includes a first diode D1, a first capacitor C1, a fourth resistor R4, a fifth resistor R5, a fourth NMOS transistor N4, and a fifth NMOS transistor N5.

[0076] The anode of the first diode D1 and the gate of the fourth NMOS transistor N4 are both connected to the output end of the processing unit 20 to receive the control signal (IN) outputted by the processing unit 20 .

[0077] The cathode of the first diode D1 is connected to one electrode of the first capacitor C1 , and the other electrode of the first capacitor C1 is grounded.

[0078] One end of the fourth resistor R4 is connected between the first diode and the first capacitor, and the other end of the fourth resistor R4 is connected to the gate of the fifth NMOS transistor N5.

[0079] The drain of the fourth NMOS transistor N4 is connected between the fourth resistor R4 and the gate of the fifth NMOS transistor N5 , and the source of the fourth NMOS transistor N4 is grounded.

[0080] One end of the fifth resistor R5 is connected to the drain of the fifth NMOS transistor N5 , the other end of the fifth resistor R5 is connected between the first resistor R1 and the first end of the target switch transistor Q1 , and the source of the fifth NMOS transistor N5 is grounded.

[0081] The fifth resistor R5 is used to balance the start-up time and the shut-down time of the intelligent power switch.

[0082] When the control signal (IN) is at a high level, the fourth NMOS tube N4 is turned on and the fifth NMOS tube N5 is turned off, so that the balancing circuit is switched to an open state; when the control signal (IN) is at a low level, the fourth NMOS tube N4 is turned off and the fifth NMOS tube N5 is turned on, so that the balancing circuit is switched to a closed state, thereby accelerating the voltage drop speed and reducing the closing time.

[0083] An embodiment of the present invention further provides an electronic device, which includes the above-mentioned anti-backflow intelligent power switch system and an inductor element, wherein the second end of the target switch tube Q1 is connected to the inductor element.

[0084] Optionally, the anti-backflow circuit 30 includes a first NMOS transistor N1, a second NMOS transistor N2, a third NMOS transistor N3, a first PMOS transistor P1, a second PMOS transistor P2, a third PMOS transistor P3, a second resistor R2 and a third resistor R3.

[0085] The gate of the first NMOS transistor N1 , the gate of the second NMOS transistor N2 , and the gate of the first PMOS transistor P1 are connected to the output end of the processing unit 20 .

[0086] The source of the first PMOS tube P1 and the source of the third PMOS tube P3 are connected to the driving voltage, the drain of the first PMOS tube P1 is connected to the drain of the first NMOS tube N1, and the gate of the third PMOS tube P3 and the gate of the third NMOS tube N3 are connected between the drain of the first PMOS tube P1 and the drain of the first NMOS tube N1.

[0087] The gate of the second PMOS transistor P2 is connected to the drain of the second NMOS transistor N2 , and the drain of the second PMOS transistor P2 is connected to the drain of the third PMOS transistor P3 .

[0088] One end of the second resistor R2 is connected to the first resistor R1, the other end of the second resistor R2 is connected to the gate of the second PMOS transistor P2, the drain of the third NMOS transistor N3, the source of the second PMOS transistor P2 and one end of the third resistor R3 are connected between the first resistor R1 and the second resistor R2.

[0089] A source of the first NMOS transistor N1 , a source of the second NMOS transistor N2 , a source of the third NMOS transistor N3 , and the other end of the third resistor R3 are all grounded.

[0090] Optionally, the target switch tube Q1 is an NMOS tube, the first end of the target switch tube Q1 is the gate of the NMOS tube, the second end of the target switch tube Q1 is the drain of the NMOS tube, and the third end of the target switch tube Q1 is the source of the NMOS tube.

[0091] In summary, an anti-backflow intelligent power switch system and an electronic device provided by an embodiment of the present invention include a processing unit, an anti-backflow circuit and an intelligent power switch; the intelligent power switch includes a first resistor, a target switch tube and a clamping module, the first end of the target switch tube is connected to one end of the first resistor, the first end of the anti-backflow circuit is connected to the output end of the processing unit, the second end of the anti-backflow circuit is connected to the other end of the first resistor, the second end of the target switch tube is used to connect an inductor element, and the third end of the target switch tube is used to ground; one end of the clamping module is connected to the first end of the target switch tube, and the other end of the clamping module is connected to the second end of the target switch tube; the anti-backflow circuit is used to provide a driving voltage to the intelligent power switch when the processing unit outputs a high level, and prevent current backflow when the processing unit outputs a low level. When the control signal is at a high level, the anti-backflow circuit switches to a conducting state, thereby providing a driving voltage to the intelligent power switch to drive the intelligent power switch to switch to an on state. When the control signal is at a low level, the anti-backflow circuit switches to an off state to prevent the current from flowing back from the clamping module to the processing unit due to the continuous current of the inductor components, thereby playing an anti-backflow role and completing the protection of the processing unit.

[0092] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

[0093] It will be apparent to those skilled in the art that the invention is not limited to the details of the exemplary embodiments described above and that the invention can be implemented in other specific forms without departing from the spirit or essential features of the invention. Therefore, the embodiments should be considered exemplary and non-limiting in all respects, and the scope of the invention is defined by the appended claims rather than the foregoing description, and it is intended that all variations falling within the meaning and scope of the equivalent elements of the claims be included in the invention. Any reference numeral in a claim should not be considered as limiting the claim to which it relates.

Claims

1. An anti-backflow intelligent power switch system, characterized in that: The anti-backflow intelligent power switch system includes a processing unit, an anti-backflow circuit and an intelligent power switch; The intelligent power switch comprises a first resistor, a target switch tube and a clamping module, wherein a first end of the target switch tube is connected to one end of the first resistor, a first end of the anti-backfeed circuit is connected to an output end of the processing unit, a second end of the anti-backfeed circuit is connected to the other end of the first resistor, a second end of the target switch tube is used to connect an inductor element, and a third end of the target switch tube is used to be grounded; One end of the voltage clamping module is connected to the first end of the target switch tube, and the other end of the voltage clamping module is connected to the second end of the target switch tube; The anti-backflow circuit is used to provide a driving voltage to the intelligent power switch when the processing unit outputs a high level, and to prevent current backflow when the processing unit outputs a low level; The anti-backflow circuit includes a first NMOS tube, a second NMOS tube, a third NMOS tube, a first PMOS tube, a second PMOS tube, a third PMOS tube, a second resistor and a third resistor; The gate of the first NMOS transistor, the gate of the second NMOS transistor and the gate of the first PMOS transistor are connected to the output end of the processing unit; The source of the first PMOS tube and the source of the third PMOS tube are connected to the driving voltage, the drain of the first PMOS tube is connected to the drain of the first NMOS tube, and the gate of the third PMOS tube and the gate of the third NMOS tube are connected between the drain of the first PMOS tube and the drain of the first NMOS tube; The gate of the second PMOS tube is connected to the drain of the second NMOS tube, and the drain of the second PMOS tube is connected to the drain of the third PMOS tube; One end of the second resistor is connected to the first resistor, the other end of the second resistor is connected to the gate of the second PMOS tube, the drain of the third NMOS tube, the source of the second PMOS tube and one end of the third resistor are connected between the first resistor and the second resistor; The source of the first NMOS transistor, the source of the second NMOS transistor, the source of the third NMOS transistor and the other end of the third resistor are all grounded.

2. The anti-backflow intelligent power switch system according to claim 1, characterized in that: The target switch tube is an NMOS tube, the first end of the target switch tube is the gate of the NMOS tube, the second end of the target switch tube is the drain of the NMOS tube, and the third end of the target switch tube is the source of the NMOS tube.

3. The anti-backflow intelligent power switch system according to claim 1, characterized in that: The voltage clamping module is a voltage regulator diode component, the anode of the voltage regulator diode component is connected to the first end of the target switch tube, and the cathode of the voltage regulator diode component is connected to the second end of the target switch tube.

4. The anti-backflow intelligent power switch system according to claim 1, characterized in that: The intelligent power switch further includes an over-temperature protection module, a first end of the over-temperature protection module is connected between the first resistor and the target switch tube, and a second end of the over-temperature protection module is grounded; The over-temperature protection module is used to monitor the temperature information of the target switch tube and determine whether to trigger the over-temperature protection based on the temperature information. If the over-temperature protection is triggered, it switches to the on state to make the first end and the second end of the over-temperature protection module conductive.

5. The anti-backflow intelligent power switch system according to claim 1, characterized in that: The intelligent power switch further includes an overcurrent protection module, a first end of the overcurrent protection module is connected between the first resistor and the target switch tube, and a second end of the overcurrent protection module is grounded; The overcurrent protection module is used to monitor the current information of the target switch tube and determine whether to trigger the overcurrent protection based on the current information. If the overcurrent protection is triggered, it switches to the on state to connect the first end and the second end of the overcurrent protection module.

6. The anti-backflow intelligent power switch system according to claim 1, characterized in that: The anti-backflow intelligent power switch system further includes a balancing circuit, a first end of the balancing circuit is connected between the first resistor and the target switch tube, and a second end of the balancing circuit is grounded; The balancing circuit is used to switch to an open state when the control signal of the intelligent power switch is at a high level, and to switch to a closed state when the control signal of the intelligent power switch is at a low level.

7. An electronic device, characterized in that: It comprises the anti-backflow intelligent power switch system according to claim 1 and an inductor element, wherein the second end of the target switch tube is connected to the inductor element.

8. The electronic device according to claim 7, characterized in that: The target switch tube is an NMOS tube, the first end of the target switch tube is the gate of the NMOS tube, the second end of the target switch tube is the drain of the NMOS tube, and the third end of the target switch tube is the source of the NMOS tube.

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