Planar photoconductive switch and manufacturing method thereof

Abstract

The present invention discloses a planar photoconductive switch and a manufacturing method thereof. A conductive region or a conductive layer with relatively low resistance is introduced into the interior of the planar photoconductive switch to convert the current from surface transport to internal transport, which can effectively alleviate the current concentration phenomenon at the edge of the electrode, thereby significantly reducing the occurrence of surface flashover discharge phenomenon and improving the withstand voltage performance and service life of the planar photoconductive switch. In addition, in the on state, the photocurrent of the planar photoconductive switch with the conductive region or conductive layer introduced is significantly greater than that of the planar photoconductive switch without the conductive region or conductive layer introduced, indicating that the introduction of the conductive region or conductive layer reduces the on resistance.

Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductor structures, and in particular relates to a planar photoconductive switch and a manufacturing method thereof. Background Art

[0002] As one of the leaders of the third-generation semiconductors, Gallium nitride (GaN) has many excellent physical and chemical properties, such as a bandgap of 3.4 eV, a critical breakdown field of 3.3 MV / cm, a saturated electron migration velocity of 2.5×107 cm / s, a direct bandgap structure, and strong acid and alkali resistance, which ensures that it has broad application prospects in high frequency, high power, optoelectronic devices and other fields.

[0003] Iron-doped semi-insulating gallium nitride (SI-GaN:Fe) is a type of gallium nitride that can be used as an isolation layer between devices to improve breakdown characteristics and as a substrate for devices, so it has been widely studied. In addition, it is known as the most promising semiconductor material for studying high-frequency, high-power photoconductive switches due to its excellent light state (low on-resistance), dark state (low leakage current), and light-dark conversion performance (short carrier lifetime).

[0004] Photoconductive semiconductor switches (PCSS) are semiconductor switches that are triggered by a specific excitation light source. They have the advantages of small size, low loss, high output power, fast response speed, and high repetition frequency, and have broad application prospects in the fields of medicine, aerospace, etc. Photoconductive switch devices can be roughly divided into two types: vertical type and planar type.

[0005] Among them, the electrodes of the planar structure device are made on the same side of the substrate material (usually the Ga side). Its preparation method is simple and the device cost is low, so it is very popular. However, because the electrodes are on the same side of the substrate, the current will be concentrated at the edge of the electrode in the dark state, causing the switch to be easily broken down, greatly reducing the service life of the device. The conduction characteristics of the planar photoconductive switch are closely related to the surface dislocation density and crystal quality of the substrate material, and surface flashover is more likely to occur under high voltage. In addition, the photocurrent of the planar device in the on-state is too low and the on-resistance is large.

[0006] The information disclosed in this background technology section is only intended to enhance the understanding of the overall background of the invention and should not be regarded as an acknowledgment or any form of suggestion that the information constitutes the prior art already known to a person skilled in the art. Summary of the invention

[0007] The purpose of the present invention is to provide a planar photoconductive switch and a method for manufacturing the same, which can transform the current transported from the surface to the body, effectively alleviate the current concentration phenomenon at the edge of the electrode, improve the voltage resistance and service life of the device, and at the same time, significantly increase the photocurrent and reduce the on-resistance.

[0008] In order to achieve the above object, a technical solution provided by a specific embodiment of the present invention is as follows:

[0009] A planar photoconductive switch, comprising:

[0010] A substrate having a first doping source, the substrate having a first surface, a non-doped conductive region or a conductive region having a second doping source formed in the substrate, and a resistance of the conductive region being smaller than a resistance of the substrate;

[0011] an epitaxial layer having a third doping source, formed on the first surface and covering the conductive region, wherein a resistance of the epitaxial layer is greater than a resistance of the conductive region;

[0012] A first electrode formed on the epitaxial layer;

[0013] A second electrode is formed on the epitaxial layer and spaced apart from the first electrode;

[0014] Wherein, in the thickness direction of the substrate, the projection of the conductive area partially overlaps with the projection of the first electrode and the projection of the second electrode.

[0015] In one or more embodiments of the present invention, the material of the substrate includes GaN single crystal, and the first doping source includes Fe with a doping concentration of 1×10 18 cm -3 -1×10 19 cm -3 .

[0016] In one or more embodiments of the present invention, the material of the substrate includes GaN single crystal, the conductive region has a second doping source, and the second doping source includes Si and Ge, and the doping concentration is 5×10 17 cm -3 -1×10 19 cm -3 .

[0017] In one or more embodiments of the present invention, the material of the epitaxial layer includes GaN single crystal, and the third doping source includes Fe with a doping concentration of 1×10 18 cm -3 -1×10 19 cm -3 .

[0018] In one or more embodiments of the present invention, the resistivity of the substrate is in the range of 1×10 8 Ω·cm-1×10 9 Ω·cm, the carrier concentration range of the substrate is 1×10 8 cm -3 -1×10 9 cm -3 .

[0019] In one or more embodiments of the present invention, the thickness of the conductive region is in the range of 20 μm-100 μm.

[0020] In one or more embodiments of the present invention, the resistivity of the epitaxial layer is in the range of 1×10 8 Ω·cm-1×10 9 Ω·cm, the carrier concentration range of the epitaxial layer is 1×10 8 cm -3 -1×10 9 cm -3 .

[0021] In one or more embodiments of the present invention, the thickness of the epitaxial layer is in the range of 5 μm-50 μm.

[0022] In one or more embodiments of the present invention, the first electrode includes a first Ti layer, an Al layer, a second Ti layer, and an Au layer stacked in sequence on the epitaxial layer, the thickness of the first Ti layer is in the range of 5nm-30nm, the thickness of the Al layer is in the range of 80nm-130nm, the thickness of the second Ti layer is in the range of 50nm-100nm, and the thickness of the Au layer is in the range of 50nm-150nm.

[0023] In one or more embodiments of the present invention, edge corners of the first electrode are configured to be arc-shaped.

[0024] In one or more embodiments of the present invention, the second electrode includes a first Ti layer, an Al layer, a second Ti layer, and an Au layer stacked in sequence on the epitaxial layer, the thickness of the first Ti layer is in the range of 5nm-30nm, the thickness of the Al layer is in the range of 80nm-130nm, the thickness of the second Ti layer is in the range of 50nm-100nm, and the thickness of the Au layer is in the range of 50nm-150nm.

[0025] In one or more embodiments of the present invention, edge corners of the second electrode are configured to be arc-shaped.

[0026] A method for manufacturing a planar photoconductive switch, comprising:

[0027] providing a conductive structure having a second doping source or being undoped;

[0028] forming an epitaxial structure having a first doping source and / or a third doping source around the conductive structure, wherein the resistance of the epitaxial structure is greater than the resistance of the conductive structure;

[0029] forming a first electrode and a second electrode spaced apart from each other on the same surface of the epitaxial structure, wherein in a direction perpendicular to the first electrode and / or the second electrode, a projection of the first electrode and a projection of the second electrode both partially overlap with a projection of the conductive structure;

[0030] A method for manufacturing a planar photoconductive switch, comprising:

[0031] Providing a substrate having a first doping source, the substrate having a first surface;

[0032] forming a conductive region having a second doping source or being non-doped on the first surface, wherein the resistance of the conductive region is lower than the resistance of the substrate;

[0033] forming an epitaxial layer covering the conductive region and having a third doping source on the first surface, wherein the resistance of the epitaxial layer is greater than the resistance of the conductive region;

[0034] A first electrode and a second electrode spaced apart from each other are formed on the epitaxial layer.

[0035] A planar photoconductive switch, comprising:

[0036] A substrate having a first doping source, the substrate having a first surface;

[0037] a non-doped conductive layer or a conductive layer having a second doping source, formed on the first surface of the substrate, wherein the resistance of the conductive layer is lower than the resistance of the substrate;

[0038] an epitaxial layer having a third doping source, formed on the conductive layer, wherein the resistance of the epitaxial layer is greater than the resistance of the conductive layer;

[0039] A first electrode formed on the epitaxial layer;

[0040] The second electrode is formed on the epitaxial layer and spaced apart from the first electrode.

[0041] In one or more embodiments of the present invention, the material of the substrate includes GaN single crystal, and the first doping source includes Fe with a doping concentration of 1×10 18 cm -3 -1×10 19 cm -3 .

[0042] In one or more embodiments of the present invention, the material of the conductive layer includes GaN single crystal, and the conductive layer has a second doping source, and the second doping source includes Si and Ge, and the doping concentration is 5×10 17 cm -3 -1×10 19 cm -3 .

[0043] In one or more embodiments of the present invention, the material of the epitaxial layer includes GaN single crystal, and the third doping source includes Fe with a doping concentration of 1×10 18 cm -3 -1×10 19 cm -3 .

[0044] In one or more embodiments of the present invention, the resistivity of the substrate is in the range of 1×10 8 Ω·cm-1×10 9 Ω·cm, the carrier concentration range of the substrate is 1×10 8 cm -3 -1×10 9 cm -3 .

[0045] In one or more embodiments of the present invention, the thickness of the conductive layer is in the range of 20 μm-100 μm.

[0046] In one or more embodiments of the present invention, the resistivity of the epitaxial layer is in the range of 1×10 8 Ω·cm-1×10 9 Ω·cm, the carrier concentration range of the epitaxial layer is 1×10 8 cm -3 -1×10 9 cm -3 .

[0047] The thickness of the epitaxial layer is in the range of 5 μm to 50 μm.

[0048] In one or more embodiments of the present invention, the first electrode includes a first Ti layer, an Al layer, a second Ti layer, and an Au layer stacked in sequence on the epitaxial layer, the thickness of the first Ti layer is in the range of 5nm-30nm, the thickness of the Al layer is in the range of 80nm-130nm, the thickness of the second Ti layer is in the range of 50nm-100nm, and the thickness of the Au layer is in the range of 50nm-150nm.

[0049] In one or more embodiments of the present invention, edge corners of the first electrode are configured to be arc-shaped.

[0050] In one or more embodiments of the present invention, the second electrode includes a first Ti layer, an Al layer, a second Ti layer, and an Au layer stacked in sequence on the epitaxial layer, the thickness of the first Ti layer is in the range of 5nm-30nm, the thickness of the Al layer is in the range of 80nm-130nm, the thickness of the second Ti layer is in the range of 50nm-100nm, and the thickness of the Au layer is in the range of 50nm-150nm.

[0051] In one or more embodiments of the present invention, edge corners of the second electrode are configured to be arc-shaped.

[0052] A method for manufacturing a planar photoconductive switch, comprising:

[0053] Providing a substrate having a first doping source, the substrate having a first surface;

[0054] forming a non-doped conductive layer or a conductive layer having a second doping source on the first surface, wherein the resistance of the conductive layer is lower than the resistance of the substrate;

[0055] forming an epitaxial layer having a third doping source on the conductive layer, wherein the resistance of the epitaxial layer is greater than the resistance of the conductive layer;

[0056] A first electrode and a second electrode spaced apart from each other are formed on the epitaxial layer.

[0057] Compared with the prior art, the planar photoconductive switch and the manufacturing method thereof of the present invention can transform the current from surface transport to internal transport by introducing an internal conductive area or a conductive layer, which can effectively alleviate the current concentration phenomenon at the edge of the electrode and improve the voltage resistance and service life of the device. At the same time, the introduction of the conductive area or the conductive layer can significantly increase the photocurrent and reduce the on-resistance. BRIEF DESCRIPTION OF THE DRAWINGS

[0058] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0059] Figure 1 Schematic diagram of the structure of the planar photoconductive switch in Embodiment 1 of the present invention;

[0060] Figure 2 A top view of the structure of a planar photoconductive switch in Embodiment 1 of the present invention;

[0061] Figure 3 is a process flow chart of manufacturing a planar photoconductive switch in Embodiment 1 of the present invention;

[0062] Figure 4 is another process flow chart for manufacturing the planar photoconductive switch in Embodiment 1 of the present invention;

[0063] Figure 5 Schematic diagram of the structure of a planar photoconductive switch in Embodiment 2 of the present invention;

[0064] Figure 6 A top view of the structure of a planar photoconductive switch in Embodiment 2 of the present invention;

[0065] Figure 7 is a process flow chart of manufacturing a planar photoconductive switch in Embodiment 2 of the present invention;

[0066] Figure 8a This is a simulation diagram of the dark state internal current of an existing planar photoconductive switch;

[0067] Figure 8b This is a simulation diagram of the dark state internal current of the planar photoconductive switch of the present invention;

[0068] Fig. 9 It is a comparison diagram of the on-state photocurrent simulation of the planar photoconductive switch of the present invention and the existing planar photoconductive switch. DETAILED DESCRIPTION

[0069] In order to enable those skilled in the art to better understand the technical solutions in the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0070] As mentioned in the background technology, in the dark state of the existing planar photoconductive switch, the current is mainly transported through the surface and concentrated at the edge of the electrode, which can easily lead to surface flashover discharge, causing the electrode edge to be broken down, affecting the voltage resistance and service life of the device.

[0071] Based on this, the present invention provides a planar photoconductive switch and a method for manufacturing the same. A conductive region or layer with relatively low resistance is introduced into the interior of the planar photoconductive switch to convert the current from surface transport to internal transport, which can effectively alleviate the current concentration phenomenon at the electrode edge, thereby significantly reducing the occurrence of surface flashover discharge phenomenon and improving the withstand voltage performance and service life of the planar photoconductive switch. In addition, in the on state, the photocurrent of the planar photoconductive switch with the conductive region or layer introduced is significantly greater than that of the planar photoconductive switch without the conductive region or layer introduced, indicating that the introduction of the conductive region or layer reduces the on resistance.

[0072] refer to Figure 1 and Figure 2 As shown, Embodiment 1 of the present invention provides a planar photoconductive switch, comprising a substrate 10 having a first doping source, a conductive region 20 which is undoped or has a second doping source, an epitaxial layer 30 having a third doping source, a first electrode 40, and a second electrode 50. The conductive region 20 is formed in the substrate 10, and the resistance of the conductive region 20 is less than the resistance of the substrate 10. The epitaxial layer 30 is formed on the surface of the substrate 10 and covers the conductive region 20, and the resistance of the epitaxial layer 30 is higher than the resistance of the conductive region 20. The first electrode 40 and the second electrode 50 are formed on the surface of the epitaxial layer 30, and the first electrode 40 and the second electrode 50 are arranged at intervals. The arrangement positions of the first electrode 40 and the second electrode 50 satisfy that: in the thickness direction of the substrate 10, the projection of the conductive region 20 partially overlaps with the projection of the first electrode 40 and the projection of the second electrode 50.

[0073] The substrate 10 has a first surface 10a. The material of the substrate 10 is GaN single crystal, the first doping source is Fe, and the doping concentration range of Fe is 1×10 18 cm -3 -1×10 19 cm -3 , preferably 2×10 18 cm -3 -5×10 18 cm -3 , for example 5×10 18 cm -3 The substrate 10 has the first doping source Fe in all regions except the conductive region 20. After Fe doping, the substrate 10 presents a high resistance state, so that the substrate 10 has a semi-insulating property and a high resistance. The resistivity range of the substrate 10 at room temperature (300 K) is 1×10 8 Ω·cm-1×10 9 Ω·cm, preferably 1×10 8 Ω·cm, the carrier concentration range is 1×10 8 cm -3 -1×10 9 cm -3 , preferably 6.2×10 8 cm -3 The size of the substrate 10 is preferably 10 mm×10 mm.

[0074] The conductive region 20 is formed in the middle region of the first surface 10a of the substrate 10 and extends deep into the substrate 10. The conductive region 20 has a second doping source or the conductive region 20 is undoped. When the conductive region 20 has a second doping source, the second doping source includes Si and Ge, and the doping concentration is 5×10 17 cm -3 -1×1019 cm -3 After Si or Ge doping is performed on the conductive region 20 , the resistance will be significantly reduced, so that the conductive region 20 has a lower resistance than the substrate 10 , so as to form a conductive channel between the first electrode 40 and the second electrode 50 .

[0075] It can be understood that when the conductive region 20 is undoped, since other regions of the substrate 10 are Fe-doped, the resistance of the undoped conductive region 20 is still smaller than that of the other Fe-doped regions.

[0076] The thickness of the conductive region 20 is smaller than the thickness of the substrate 10. The thickness of the conductive region 20 ranges from 20 μm to 100 μm.

[0077] The epitaxial layer 30 is formed on the first surface 10a of the substrate 10 and completely covers the conductive region 20. The epitaxial layer 30 is also made of GaN single crystal, and the third doping source is Fe, and the doping concentration of Fe is in the range of 1×10 18 cm -3 -1×10 19 cm -3 , preferably 2×10 18 cm -3 -5×10 18 cm -3 , for example 5×10 18 cm -3 , which is the same as the doping concentration of the substrate 10. Similarly, after Fe doping, the epitaxial layer 30 presents a high resistance state like the substrate 10, so that the epitaxial layer 30 also has semi-insulating properties and high resistance, so that the entire device forms a low resistance area where the conductive area 20 is located, forming a conductive channel for easier current transmission. The resistivity range of the epitaxial layer 30 at room temperature (300 K) is 1×10 8 Ω·cm-1×10 9 Ω·cm, preferably 1×10 8 Ω·cm, the carrier concentration range is 1×10 8 cm -3 -1×10 9 cm -3 , preferably 6.2×10 8 cm -3 The thickness of the epitaxial layer 30 is in the range of 5 μm to 50 μm.

[0078] The first electrode 40 is formed on the epitaxial layer 30, and the first electrode 40 includes a first Ti layer, an Al layer, a second Ti layer, and an Au layer stacked in sequence. The thickness of the first Ti layer ranges from 5nm to 30nm, preferably 20nm. The thickness of the Al layer ranges from 80nm to 130nm, preferably 130nm. The thickness of the second Ti layer ranges from 50nm to 100nm, preferably 50nm. The thickness of the Au layer ranges from 50nm to 150nm, preferably 150nm.

[0079] The second electrode 50 is formed on the epitaxial layer 30, and the second electrode 50 includes a first Ti layer, an Al layer, a second Ti layer, and an Au layer stacked in sequence. The thickness of the first Ti layer ranges from 5nm to 30nm, preferably 20nm. The thickness of the Al layer ranges from 80nm to 130nm, preferably 130nm. The thickness of the second Ti layer ranges from 50nm to 100nm, preferably 50nm. The thickness of the Au layer ranges from 50nm to 150nm, preferably 150nm.

[0080] In the above technical solution, by introducing the conductive region 20 inside the device to form a conductive channel, the current is converted from surface transport to body transport, which can effectively alleviate the current concentration phenomenon at the edge of the electrode and reduce the on-resistance.

[0081] In order to further effectively alleviate the electric field concentration and prevent the first electrode 40 and the second electrode 50 from being broken down, the edge corners of the first electrode 40 and the second electrode 50 are both configured to be arc-shaped.

[0082] Exemplarily, the first electrode 40 and the second electrode 50 are arranged in a rounded rectangle, the rounded rectangle is 7 mm long and 3 mm wide, and the first electrode 40 and the second electrode 50 are spaced 1 mm apart.

[0083] refer to Figure 3 As shown, the present invention also provides a method for manufacturing the above-mentioned planar photoconductive switch, which specifically comprises the following steps:

[0084] S1, providing a conductive structure having a second doping source or a non-doped conductive structure.

[0085] S2, forming an epitaxial structure having a first doping source and / or a third doping source on a peripheral surface of the conductive structure, wherein a resistance of the epitaxial structure is greater than a resistance of the conductive structure.

[0086] S3, forming a first electrode and a second electrode spaced apart on the same surface of the epitaxial structure, wherein in a direction perpendicular to the first electrode and / or the second electrode, a projection of the first electrode and a projection of the second electrode partially overlap with a projection of the conductive structure.

[0087] Wherein, in step S1, when the conductive structure has a second doping source, a conductive layer having the second doping source can be directly grown by HVPE epitaxy, and then the surroundings of the conductive layer can be etched to form the desired conductive structure, and the conductive structure can be used as a conductive region in a subsequent device, or the surroundings of the conductive layer can be not etched, and it can be directly used as a conductive region in a subsequent device. Alternatively, an undoped conductive layer can be directly grown by HVPE epitaxy, and then the second doping source can be doped in the conductive layer by ion implantation or the like, and finally the undoped region of the conductive layer can be etched to form the desired conductive structure. When the conductive structure is undoped, a conductive layer can be directly grown by epitaxy, and the surroundings of the conductive layer can be etched to form the desired conductive structure, or the surroundings of the conductive layer can be not etched, and it can be directly used as a conductive region in a subsequent device.

[0088] The conductive structure is made of GaN, the second doping source is Si and Ge, and the doping concentration range is 5×10 17 cm -3 -1×10 19 cm -3 , the thickness of the conductive structure ranges from 20μm to 100μm.

[0089] In step S2, an epitaxial structure having the first doping source and / or the third doping source can be directly grown on each peripheral surface of the conductive structure by HVPE epitaxy, wherein the epitaxial structure includes a substrate having the first doping source and an epitaxial layer having the third doping source, and the epitaxial structure completely covers the conductive structure. Alternatively, an undoped epitaxial structure can be directly grown on each peripheral surface of the conductive structure by HVPE epitaxy, and then the epitaxial structure is doped with the first doping source and / or the third doping source by ion implantation or the like.

[0090] The material of the epitaxial structure is GaN, the first doping source and the third doping source are both Fe, and the doping concentration range is 1×10 18 cm -3 -1×10 19 cm -3 , preferably 2×10 18 cm -3 -5×10 18 cm -3 , for example 5×10 18 cm -3 , the resistivity range of the epitaxial structure is 1×10 8 Ω·cm-1×10 9 Ω·cm, preferably 1×10 8 Ω·cm, the carrier concentration range of the epitaxial structure is 1×10 8 cm -3 -1×10 9 cm -3, preferably 6.2×10 8 cm -3 .

[0091] refer to Figure 4 As shown, the present invention also provides another method for manufacturing the above-mentioned planar photoconductive switch, which specifically includes the following steps:

[0092] S10, providing a substrate having a first doping source, wherein the substrate has a first surface.

[0093] S20, forming a conductive region having a second doping source or a non-doped region on the first surface, wherein a resistance of the conductive region is smaller than a resistance of the substrate;

[0094] S30, forming an epitaxial layer covering the conductive region and having a third doping source on the first surface, wherein the resistance of the epitaxial layer is greater than the resistance of the conductive region.

[0095] S40, forming a first electrode and a second electrode spaced apart from each other on the epitaxial layer.

[0096] In step S10, a substrate with the first doping source may be directly grown by HVPE epitaxy, or an undoped substrate may be directly grown by HVPE epitaxy, and then the substrate may be doped with the first doping source by ion implantation or the like.

[0097] The substrate material is GaN, the first doping source is Fe, and the doping concentration range is 1×10 18 cm -3 -1×10 19 cm -3 , preferably 2×10 18 cm -3 -5×10 18 cm -3 , for example 5×10 18 cm -3 , the substrate resistivity range is 1×10 8 Ω·cm-1×10 9 Ω·cm, preferably 1×10 8 Ω·cm, the substrate carrier concentration range is 1×10 8 cm -3 -1×10 9 cm -3 , preferably 6.2×10 8 cm -3 .

[0098] In step S20, when the conductive structure has a second doping source, a conductive structure having a second doping source can be directly grown in the middle region of the first surface of the substrate by HVPE epitaxy, and the edge of the conductive structure exposes the first surface of the substrate, and the conductive structure is used as a conductive region in a subsequent device, or a conductive layer having a second doping source is directly grown on the first surface of the substrate, and then the surrounding of the conductive layer is etched to form a conductive structure located in the middle of the first surface of the substrate. Alternatively, an undoped conductive structure is directly grown by HVPE epitaxy, and the edge of the conductive structure exposes the first surface of the substrate, and then the conductive structure is doped with the second doping source by ion implantation or the like, or an undoped conductive layer is directly grown by HVPE epitaxy, and then a partial region of the conductive layer is doped with the second doping source by ion implantation or the like, and finally the undoped region of the conductive layer is etched to form a conductive structure. Alternatively, the second doping source is directly doped into the substrate from the middle region on the first surface of the substrate by ion implantation or the like to form a conductive region. When the conductive structure is undoped, a conductive layer can be directly grown in the middle area of ​​the first surface of the substrate by epitaxy, or in step S1, when the substrate is doped with ions of a first doping source by ion implantation, a mask is used to retain an undoped area in the substrate to form a conductive area.

[0099] The material of the conductive structure (conductive area) is GaN, and the second doping source is Si and Ge, with a doping concentration range of 5×10 17 cm -3 -1×10 19 cm -3 The thickness of the conductive structure (conductive area) ranges from 20 μm to 100 μm.

[0100] In step S30, an epitaxial layer having a third doping source may be directly grown on the first surface of the substrate by HVPE epitaxy, and the epitaxial layer completely covers the conductive structure. Alternatively, an undoped epitaxial layer may be directly grown on the first surface of the substrate by HVPE epitaxy, and then the epitaxial layer may be doped with the first doping source by ion implantation or the like.

[0101] The epitaxial layer material is GaN, the third doping source is Fe, and the doping concentration range is 1×10 18 cm -3 -1×10 19 cm -3 , preferably 2×10 18 cm -3 -5×10 18 cm -3 , for example 5×10 18 cm -3 , the resistivity range of the epitaxial layer is 1×10 8Ω·cm-1×10 9 Ω·cm, preferably 1×10 8 Ω·cm, the carrier concentration range of the epitaxial layer is 1×10 8 cm -3 -1×10 9 cm -3 , preferably 6.2×10 8 cm -3 .

[0102] refer to Figure 5 and Figure 6 As shown, Embodiment 2 of the present invention provides a planar photoconductive switch, comprising a substrate 10 having a first doping source, a conductive layer 200 which is undoped or has a second doping source, an epitaxial layer 30 having a third doping source, a first electrode 40, and a second electrode 50. The conductive layer 200 is formed on the surface of the substrate 10, and the resistance of the conductive layer 200 is less than the resistance of the substrate 10. The epitaxial layer 30 is formed on the surface of the conductive layer 200, and the resistance of the epitaxial layer 30 is higher than the resistance of the conductive layer 200. The first electrode 40 and the second electrode 50 are formed on the surface of the epitaxial layer 30, and the first electrode 40 and the second electrode 50 are arranged at intervals.

[0103] The substrate 10 has a first surface 10a. The material of the substrate 10 is GaN single crystal, the first doping source is Fe, and the doping concentration range of Fe is 1×10 18 cm -3 -1×10 19 cm -3 , preferably 2×10 18 cm -3 -5×10 18 cm -3 , for example 5×10 18 cm -3 After Fe doping, the substrate 10 presents a high resistance state, so that the substrate 10 has a semi-insulating property and a high resistance. The resistivity range of the substrate 10 at room temperature (300 K) is 1×10 8 Ω·cm-1×10 9 Ω·cm, preferably 1×10 8 Ω·cm, the carrier concentration range is 1×10 8 cm -3 -1×10 9 cm -3 , preferably 6.2×10 8 cm -3 The size of the substrate 10 is preferably 10 mm×10 mm.

[0104] The conductive layer 200 is formed on the first surface 10a of the substrate 10. The conductive layer 200 has a second doping source or the conductive layer 200 is undoped. When the conductive layer 200 has a second doping source, the second doping source includes Si and Ge, and the doping concentration is 5×10 17 cm -3 -1×10 19 cm -3 After Si or Ge doping, the resistance of the conductive layer 200 will be significantly reduced, so that the conductive layer 200 has a lower resistance than the substrate 10 , so as to form a conductive channel between the first electrode 40 and the second electrode 50 .

[0105] It can be understood that when the conductive layer 200 is undoped, since the substrate 10 is Fe-doped, the resistance of the undoped conductive layer 200 is still lower than the resistance of the Fe-doped substrate 10 .

[0106] The thickness of the conductive layer 200 is smaller than that of the substrate 10. The thickness of the conductive layer 200 ranges from 20 μm to 100 μm.

[0107] The epitaxial layer 30 is formed on the conductive layer 200. The epitaxial layer 30 is also made of GaN single crystal, and the third doping source is Fe, with a doping concentration range of 1×10 18 cm -3 -1×10 19 cm -3 , preferably 2×10 18 cm -3 -5×10 18 cm -3 , for example 5×10 18 cm -3 , which is the same as the doping concentration of the substrate 10. Similarly, after Fe doping, the epitaxial layer 30 presents a high resistance state like the substrate 10, so that the epitaxial layer 30 also has semi-insulating properties and high resistance, so that the entire device forms a low resistance in the conductive layer 200, constructing a conductive channel for easier current transmission. The resistivity range of the epitaxial layer 30 at room temperature (300 K) is 1×10 8 Ω·cm-1×10 9 Ω·cm, preferably 1×10 8 Ω·cm, the carrier concentration range is 1×10 8 cm -3 -1×10 9 cm -3 , preferably 6.2×10 8 cm -3 The thickness of the epitaxial layer 30 is in the range of 5 μm to 50 μm.

[0108] The first electrode 40 is formed on the epitaxial layer 30, and the first electrode 40 includes a first Ti layer, an Al layer, a second Ti layer, and an Au layer stacked in sequence. The thickness of the first Ti layer ranges from 5nm to 30nm, preferably 20nm. The thickness of the Al layer ranges from 80nm to 130nm, preferably 130nm. The thickness of the second Ti layer ranges from 50nm to 100nm, preferably 50nm. The thickness of the Au layer ranges from 50nm to 150nm, preferably 150nm.

[0109] The second electrode 50 is formed on the epitaxial layer 30, and the second electrode 50 includes a first Ti layer, an Al layer, a second Ti layer, and an Au layer stacked in sequence. The thickness of the first Ti layer ranges from 5nm to 30nm, preferably 20nm. The thickness of the Al layer ranges from 80nm to 130nm, preferably 130nm. The thickness of the second Ti layer ranges from 50nm to 100nm, preferably 50nm. The thickness of the Au layer ranges from 50nm to 150nm, preferably 150nm.

[0110] In the above technical solution, a conductive channel is formed by introducing a conductive layer 200 inside the device to convert current from surface transport to internal transport, which can effectively alleviate the current concentration phenomenon at the edge of the electrode and reduce the on-resistance.

[0111] In order to further effectively alleviate the electric field concentration and prevent the first electrode 40 and the second electrode 50 from being broken down, the edge corners of the first electrode 40 and the second electrode 50 are both configured to be arc-shaped.

[0112] Exemplarily, the first electrode 40 and the second electrode 50 are arranged in a rounded rectangle, the rounded rectangle is 7 mm long and 3 mm wide, and the first electrode 40 and the second electrode 50 are spaced 1 mm apart.

[0113] refer to Figure 7 As shown, the present invention also provides another method for manufacturing the above-mentioned planar photoconductive switch, which specifically includes the following steps:

[0114] S100, providing a substrate having a first doping source, wherein the substrate has a first surface.

[0115] S200, forming a non-doped conductive layer or a conductive layer having a second doping source on the first surface, wherein the resistance of the conductive layer is less than the resistance of the substrate;

[0116] S300, forming an epitaxial layer having a third doping source on the conductive layer, wherein the resistance of the epitaxial layer is greater than the resistance of the conductive layer;

[0117] S400 , forming a first electrode and a second electrode spaced apart from each other on the epitaxial layer.

[0118] In step S100, a substrate with the first doping source may be directly grown by HVPE epitaxy, or an undoped substrate may be directly grown by HVPE epitaxy, and then the substrate may be doped with the first doping source by ion implantation or the like.

[0119] The substrate material is GaN, the first doping source is Fe, and the doping concentration range is 1×10 18 cm -3 -1×10 19 cm -3 , preferably 2×10 18 cm -3 -5×10 18 cm -3 , for example 5×10 18 cm -3 , the substrate resistivity range is 1×10 8 Ω·cm-1×10 9 Ω·cm, preferably 1×10 8 Ω·cm, the substrate carrier concentration range is 1×10 8 cm -3 -1×10 9 cm -3 , preferably 6.2×10 8 cm -3 .

[0120] In step S200, when the conductive layer has a second doping source, the conductive layer having the second doping source can be directly grown on the first surface of the substrate by HVPE epitaxy. Alternatively, an undoped conductive layer can be directly grown by HVPE epitaxy, and then the conductive layer is doped with the second doping source by ion implantation or the like. When the conductive layer is undoped, the conductive layer can be directly grown on the first surface of the substrate by epitaxy.

[0121] The conductive layer is made of GaN, and the second doping source is Si and Ge, with a doping concentration range of 5×10 17 cm -3 -1×10 19 cm -3 The thickness of the conductive layer ranges from 20 μm to 100 μm.

[0122] In step S300, an epitaxial layer with the third doping source may be grown directly on the conductive layer by HVPE epitaxy. Alternatively, an undoped epitaxial layer may be grown directly on the conductive layer by HVPE epitaxy, and then the epitaxial layer may be doped with the first doping source by ion implantation or the like.

[0123] The epitaxial layer material is GaN, the third doping source is Fe, and the doping concentration range is 1×10 18 cm -3 -1×10 19 cm -3 , preferably 2×10 18 cm -3 -5×10 18 cm -3 , for example 5×10 18 cm -3 , the resistivity range of the epitaxial layer is 1×10 8 Ω·cm-1×10 9 Ω·cm, preferably 1×10 8 Ω·cm, the carrier concentration range of the epitaxial layer is 1×10 8 cm -3 -1×10 9 cm -3 , preferably 6.2×10 8 cm -3 .

[0124] Figure 8a This is a simulation diagram of the dark state internal current of an existing planar photoconductive switch. Figure 8b This is a simulation diagram of the dark state internal current of the planar photoconductive switch of the present invention, wherein the horizontal axis is the device length and the vertical axis is the device height, both in micrometers. Figure 8a and Figure 8b By comparison, it can be seen that in the existing planar photoconductive switch without a conductive area or conductive layer, the current is mainly concentrated at the edge of the electrode, while in the planar photoconductive switch of the present invention that introduces a conductive area or conductive layer (conductive channel), the current is mainly concentrated inside the device, and the current is transformed from surface transport to internal transport.

[0125] Fig. 9 This is a comparison diagram of the on-state photocurrent simulation of the planar photoconductive switch of the present invention and the existing planar photoconductive switch. Fig. 9 It can be seen that, after the conductive area or conductive layer (conductive channel) is introduced into the planar photoconductive switch of the present invention, the peak value of the photocurrent increases significantly, which means that the introduction of the conductive area or conductive layer (conductive channel) can significantly reduce the on-resistance.

[0126] Compared with the prior art, the planar photoconductive switch and the manufacturing method thereof of the present invention can transform the current from surface transport to internal transport by introducing an internal conductive area or a conductive layer, which can effectively alleviate the current concentration phenomenon at the edge of the electrode and improve the voltage resistance and service life of the device. At the same time, the introduction of the conductive area or the conductive layer can significantly increase the photocurrent and reduce the on-resistance.

[0127] It will be apparent to those skilled in the art that the invention is not limited to the details of the exemplary embodiments described above and that the invention can be implemented in other specific forms without departing from the spirit or essential features of the invention. Therefore, the embodiments should be considered exemplary and non-limiting in all respects, and the scope of the invention is defined by the appended claims rather than the foregoing description, and it is intended that all variations falling within the meaning and scope of the equivalent elements of the claims be included in the invention. Any reference numeral in a claim should not be considered as limiting the claim to which it relates.

[0128] In addition, it should be understood that although the present specification is described according to implementation modes, not every implementation mode contains only one independent technical solution. This description of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment may also be appropriately combined to form other implementation modes that can be understood by those skilled in the art.

Claims

1. A planar photoconductive switch, characterized in that: include: A substrate having a first doping source, the substrate having a first surface, a non-doped conductive region or a conductive region having a second doping source formed in the substrate, and a resistance of the conductive region being smaller than a resistance of the substrate; an epitaxial layer having a third doping source, formed on the first surface and covering the conductive region, wherein a resistance of the epitaxial layer is greater than a resistance of the conductive region; A first electrode formed on the epitaxial layer; A second electrode is formed on the epitaxial layer and spaced apart from the first electrode; Wherein, in the thickness direction of the substrate, the projection of the conductive area partially overlaps with the projection of the first electrode and the projection of the second electrode.

2. The planar photoconductive switch according to claim 1, characterized in that: The material of the substrate includes GaN single crystal, and the first doping source includes Fe with a doping concentration of 1×10 18 cm -3 -1×10 19 cm -3 and / or, The material of the substrate includes GaN single crystal, the conductive region has a second doping source, and the second doping source includes Si and Ge, with a doping concentration of 5×10 17 cm -3 -1×10 19 cm -3 and / or, The material of the epitaxial layer includes GaN single crystal, and the third doping source includes Fe with a doping concentration of 1×10 18 cm -3 -1×10 19 cm -3 .

3. The planar photoconductive switch according to claim 1, characterized in that: The resistivity of the substrate is in the range of 1×10 8 Ω·cm-1×10 9 Ω·cm, the carrier concentration range of the substrate is 1×10 8 cm -3 -1×10 9 cm -3 and / or, The thickness of the conductive area is in the range of 20 μm to 100 μm; and / or, The resistivity of the epitaxial layer is in the range of 1×10 8 Ω·cm-1×10 9 Ω·cm, the carrier concentration range of the epitaxial layer is 1×10 8 cm -3 -1×10 9 cm -3 and / or, The thickness of the epitaxial layer is in the range of 5 μm to 50 μm.

4. The planar photoconductive switch according to claim 1, characterized in that: The first electrode comprises a first Ti layer, an Al layer, a second Ti layer, and an Au layer which are sequentially stacked on the epitaxial layer, the first Ti layer has a thickness range of 5nm-30nm, the Al layer has a thickness range of 80nm-130nm, the second Ti layer has a thickness range of 50nm-100nm, and the Au layer has a thickness range of 50nm-150nm; and / or, The edge corner of the first electrode is configured to be arc-shaped; and / or, The second electrode comprises a first Ti layer, an Al layer, a second Ti layer, and an Au layer which are sequentially stacked on the epitaxial layer, wherein the thickness of the first Ti layer is in the range of 5nm-30nm, the thickness of the Al layer is in the range of 80nm-130nm, the thickness of the second Ti layer is in the range of 50nm-100nm, and the thickness of the Au layer is in the range of 50nm-150nm; and / or, The edge corner of the second electrode is configured to be arc-shaped.

5. A method for manufacturing a planar photoconductive switch, characterized in that: include: providing a conductive structure having a second doping source or being undoped; forming an epitaxial structure having a first doping source and / or a third doping source around the conductive structure, wherein the resistance of the epitaxial structure is greater than the resistance of the conductive structure; forming a first electrode and a second electrode spaced apart from each other on the same surface of the epitaxial structure, wherein in a direction perpendicular to the first electrode and / or the second electrode, a projection of the first electrode and a projection of the second electrode both partially overlap with a projection of the conductive structure; or, Providing a substrate having a first doping source, the substrate having a first surface; Forming a conductive region having a second doping source or a non-doped region on the first surface, wherein the conductive region is formed in a middle region of the first surface of the substrate, and the resistance of the conductive region is less than the resistance of the substrate; forming an epitaxial layer covering the conductive area and having a third doping source on the first surface, wherein the epitaxial layer completely covers the conductive area, and the resistance of the epitaxial layer is greater than the resistance of the conductive area; A first electrode and a second electrode spaced apart from each other are formed on the epitaxial layer.

6. A planar photoconductive switch, characterized in that: include: A substrate having a first doping source, the substrate having a first surface; a non-doped conductive layer or a conductive layer having a second doping source, formed on the first surface of the substrate, wherein the resistance of the conductive layer is lower than the resistance of the substrate; an epitaxial layer having a third doping source, formed on the conductive layer, wherein the resistance of the epitaxial layer is greater than the resistance of the conductive layer; A first electrode formed on the epitaxial layer; The second electrode is formed on the epitaxial layer and spaced apart from the first electrode.

7. The planar photoconductive switch according to claim 6, characterized in that: The material of the substrate includes GaN single crystal, and the first doping source includes Fe with a doping concentration of 1×10 18 cm -3 -1×10 19 cm -3 and / or, The conductive layer is made of GaN single crystal, and the conductive layer has a second doping source, which includes Si and Ge, with a doping concentration of 5×10 17 cm -3 -1×10 19 cm -3 and / or, The material of the epitaxial layer includes GaN single crystal, and the third doping source includes Fe with a doping concentration of 1×10 18 cm -3 -1×10 19 cm -3 .

8. The planar photoconductive switch according to claim 6, characterized in that: The resistivity of the substrate ranges from 1×10 8 Ω·cm-1×10 9 Ω·cm, the carrier concentration range of the substrate is 1×10 8 cm -3 -1×10 9 cm -3 and / or, The thickness of the conductive layer is in the range of 20 μm to 100 μm; and / or, The resistivity of the epitaxial layer is in the range of 1×10 8 Ω·cm-1×10 9 Ω·cm, the carrier concentration range of the epitaxial layer is 1×10 8 cm -3 -1×10 9 cm -3 and / or, The thickness of the epitaxial layer is in the range of 5 μm to 50 μm.

9. The planar photoconductive switch according to claim 6, characterized in that: The first electrode comprises a first Ti layer, an Al layer, a second Ti layer, and an Au layer which are sequentially stacked on the epitaxial layer, the first Ti layer has a thickness range of 5nm-30nm, the Al layer has a thickness range of 80nm-130nm, the second Ti layer has a thickness range of 50nm-100nm, and the Au layer has a thickness range of 50nm-150nm; and / or, The edge corner of the first electrode is configured to be arc-shaped; and / or, The second electrode comprises a first Ti layer, an Al layer, a second Ti layer, and an Au layer which are sequentially stacked on the epitaxial layer, wherein the thickness of the first Ti layer is in the range of 5nm-30nm, the thickness of the Al layer is in the range of 80nm-130nm, the thickness of the second Ti layer is in the range of 50nm-100nm, and the thickness of the Au layer is in the range of 50nm-150nm; and / or, The edge corner of the second electrode is configured to be arc-shaped.

10. A method for manufacturing a planar photoconductive switch, characterized in that: include: Providing a substrate having a first doping source, the substrate having a first surface; Growing a non-doped conductive layer or a conductive layer having a second doping source on the first surface, wherein the resistance of the conductive layer is less than the resistance of the substrate; growing an epitaxial layer having a third doping source on the conductive layer, wherein the resistance of the epitaxial layer is greater than the resistance of the conductive layer; A first electrode and a second electrode spaced apart from each other are formed on the epitaxial layer.

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