A test system and method for driving chip fault recognition function

Abstract

The application discloses a kind of test system and method of drive chip fault identification function, it is related to chip fault detection technical field, the output pin of all of the test system's drive chip is connected with the input pin of load chip, control device is connected with drive chip and load chip respectively, and it is configured as each input pin of drive chip and load chip is set according to different test working condition, the voltage of the feedback pin of drive chip and load chip is collected, and whether the voltage of the feedback pin of drive chip and load chip is the preset voltage of corresponding test working condition is judged, according to the result of judgment, whether the fault identification function of the test working condition corresponding to the drive chip is normal is determined.The test system of the application tests the fault identification function of drive chip, can determine the accuracy of drive chip fault identification according to test result, prevent chip false alarm to appear error control relay to lead to whole vehicle function anomaly, ensure the reliability of chip.

Description

Technical Field

[0001] This invention relates to the field of chip fault detection technology, and in particular to a test system and method for driving chip fault identification function. Background Technology

[0002] Currently, there are a large number of intelligent driver chips, such as the BD8LA700 low-side driver chip that sets the switch between the load and ground, and the BTS5030 high-side driver chip that sets the switch between the power supply and the load. While fulfilling basic driving functions, they also integrate output diagnostic and protection functions. They can identify chip output abnormalities and enter output protection mode to reduce risks. The diagnostic function includes the ability to identify operating conditions such as output short circuit to power supply, output short circuit to ground, and output open circuit. Then, the controller takes corresponding measures based on the diagnostic identification results of the driver chip to reduce harm.

[0003] In existing technologies, the driver chip is used directly, and the response is based on the driver chip's diagnostic and identification functions. However, existing driver chips are difficult to test their own fault identification functions, making it difficult to determine the accuracy of the driver chip's fault identification. This can lead to the chip falsely reporting faulty control relays, resulting in abnormal vehicle functions. Summary of the Invention

[0004] This invention provides a test system and method for the fault identification function of a driver chip, in order to solve the technical problem that existing driver chips in the related art are difficult to test their own fault identification function, and it is difficult to determine the accuracy of the fault identification of the driver chip, which leads to the chip falsely reporting the presence of erroneous control relays, resulting in abnormal vehicle functions.

[0005] Firstly, a test system for driver chip fault identification function is provided, including:

[0006] Control device and load chip;

[0007] All output pins of the driver chip are connected to one input pin of the load chip;

[0008] The control device is connected to both the driver chip and the load chip, and is configured as follows:

[0009] The input pins of the driver chip and the load chip are set according to different test conditions, the voltages of the feedback pins of the driver chip and the load chip are collected, and it is determined whether the voltages of the feedback pins of the driver chip and the load chip are the preset voltages of the corresponding test conditions.

[0010] Based on the judgment result, determine whether the fault identification function of the corresponding test condition of the driver chip is normal.

[0011] In some embodiments, the step of setting the input pins of the driver chip and the load chip according to different test conditions, acquiring the voltages of the feedback pins of the driver chip and the load chip, and determining whether the voltages of the feedback pins of the driver chip and the load chip are preset voltages for the corresponding test conditions includes:

[0012] When the test condition is to shut down the output of the driver chip, the first input pin of the driver chip and the second input pin of the load chip are set to the first preset value, and the second input pin of the driver chip and the first and third input pins of the load chip are set to the second preset value.

[0013] The voltages of the feedback pins of the driver chip and the load chip are collected, and it is determined whether the voltages of the feedback pins of the driver chip and the load chip are the first voltage value.

[0014] In some embodiments, the step of setting the input pins of the driver chip and the load chip according to different test conditions, acquiring the voltages of the feedback pins of the driver chip and the load chip, and determining whether the voltages of the feedback pins of the driver chip and the load chip are preset voltages for the corresponding test conditions includes:

[0015] When the test condition is to enable the output of the driver chip, the second input pin of the load chip is set to the first preset value, and the first input pin, the second input pin of the driver chip, and the first input pin and the third input pin of the load chip are set to the second preset value.

[0016] The voltages of the feedback pins of the driver chip and the load chip are collected, and it is determined whether the voltage of the feedback pin of the driver chip is less than a second voltage value, and whether the voltage of the feedback pin of the load chip is the power supply voltage.

[0017] In some embodiments, the step of setting the input pins of the driver chip and the load chip according to different test conditions, acquiring the voltages of the feedback pins of the driver chip and the load chip, and determining whether the voltages of the feedback pins of the driver chip and the load chip are preset voltages for the corresponding test conditions includes:

[0018] When the test condition is that the output of the driver chip is open, the third input pin of the load chip is set to a first preset value, and the first input pin and the second input pin of the driver chip are set to a second preset value.

[0019] The voltages of the feedback pins of the driver chip and the load chip are collected, and it is determined whether the voltage of the feedback pin of the driver chip is less than a third voltage value and whether the voltage of the feedback pin of the load chip is a first voltage value.

[0020] In some embodiments, the step of setting the input pins of the driver chip and the load chip according to different test conditions, acquiring the voltages of the feedback pins of the driver chip and the load chip, and determining whether the voltages of the feedback pins of the driver chip and the load chip are preset voltages for the corresponding test conditions includes:

[0021] When the test condition is that the output power of the driver chip is short-circuited, the first input pin of the driver chip and the first input pin and the second input pin of the load chip are set to the first preset value, and the second input pin of the driver chip and the third input pin of the load chip are set to the second preset value.

[0022] The voltages of the feedback pins of the driver chip and the load chip are collected, and it is determined whether the voltage of the feedback pin of the driver chip is the power supply voltage and whether the voltage of the feedback pin of the load chip is the first voltage value.

[0023] In some embodiments, the step of setting the input pins of the driver chip and the load chip according to different test conditions, acquiring the voltages of the feedback pins of the driver chip and the load chip, and determining whether the voltages of the feedback pins of the driver chip and the load chip are preset voltages for the corresponding test conditions includes:

[0024] When the test condition is that the output of the driver chip is short-grounded, the first input pin, the second input pin of the driver chip, and the first input pin, the second input pin, and the third input pin of the load chip are all set to the second preset value;

[0025] The voltages of the feedback pins of the driver chip and the load chip are collected, and it is determined whether the voltage of the feedback pin of the driver chip is the fourth voltage value and whether the voltage of the feedback pin of the load chip is the first voltage value.

[0026] In some embodiments, determining whether the fault identification function of the test condition corresponding to the driver chip is normal based on the judgment result includes:

[0027] If the voltage of the feedback pin of the driver chip and the load chip is the preset voltage of the corresponding test condition, then the fault identification function of the driver chip for the corresponding test condition is normal.

[0028] In some embodiments, the step of determining whether the fault identification function of the test condition corresponding to the driver chip is normal based on the judgment result further includes:

[0029] If the voltage of the feedback pin of the driver chip and the load chip is not the preset voltage of the corresponding test condition, then the fault identification function of the driver chip for the corresponding test condition is abnormal.

[0030] In some embodiments, the control device is a microcontroller or a single-chip microcomputer.

[0031] Secondly, a test method for driver chip fault identification function is provided, using the aforementioned test system for driver chip fault identification function, including:

[0032] Set the input pins of the driver chip and load chip according to different test conditions, collect the voltage of the feedback pins of the driver chip and load chip, and determine whether the voltage of the feedback pins of the driver chip and load chip is the preset voltage of the corresponding test condition.

[0033] Based on the judgment results, determine whether the fault identification function of the corresponding test condition of the driver chip is normal.

[0034] The beneficial effects of the technical solution provided by this invention include:

[0035] This invention provides a testing system and method for the fault identification function of a driver chip. The testing system includes a control device and a load chip. All output pins of the driver chip are connected to one input pin of the load chip. The control device is connected to both the driver chip and the load chip and is configured to: set the input pins of the driver chip and the load chip according to different test conditions; collect the voltages of the feedback pins of the driver chip and the load chip; determine whether the voltages of the feedback pins of the driver chip and the load chip are preset voltages for the corresponding test conditions; and determine whether the fault identification function of the driver chip for the corresponding test condition is normal based on the determination result. This testing system for the fault identification function of the driver chip, through the control device setting the input pins of the driver chip and the load chip according to different test conditions and detecting the voltages of the feedback pins of the driver chip and the load chip, determines whether the voltage of the feedback pin is the output voltage value corresponding to the test condition, thereby testing the fault identification function of the driver chip itself. The accuracy of the fault identification can be determined based on the test results, preventing false alarms from the chip causing erroneous control relays that could lead to abnormal vehicle functions, thus ensuring the reliability of the chip. Attached Figure Description

[0036] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0037] Figure 1A circuit diagram of a test system for driver chip fault identification function provided in an embodiment of the present invention;

[0038] Figure 2 A flowchart of a test method for driver chip fault identification function provided in an embodiment of the present invention. Detailed Implementation

[0039] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0040] This invention provides a test system and method for the fault identification function of a driver chip, which can solve the technical problem in the related art that the existing driver chips are difficult to test their own fault identification function, and it is difficult to determine the accuracy of the fault identification of the driver chip, which leads to the chip falsely reporting the presence of erroneous control relays, resulting in abnormal vehicle functions.

[0041] Figure 1 This invention provides a test system for the fault identification function of a driver chip, comprising: a control device and a load chip. All output pins of the driver chip are connected to one input pin of the load chip. The control device is connected to both the driver chip and the load chip and is configured to: set the input pins of the driver chip and the load chip according to different test conditions; acquire the voltage of the feedback pins of the driver chip and the load chip; determine whether the voltage of the feedback pins of the driver chip and the load chip is a preset voltage for the corresponding test condition; and determine whether the fault identification function of the driver chip for the corresponding test condition is normal based on the determination result.

[0042] The test system for driver chip fault identification function according to an embodiment of the present invention includes a control device and a load chip. All output pins of the driver chip are connected to one input pin of the load chip. The control device is connected to both the driver chip and the load chip and is configured to: set the input pins of the driver chip and the load chip according to different test conditions; acquire the voltages of the feedback pins of the driver chip and the load chip; determine whether the voltages of the feedback pins of the driver chip and the load chip are preset voltages for the corresponding test conditions; and determine the fault identification function of the driver chip for the corresponding test condition based on the determination result. To determine if the function is normal, the load chip TMUX6104 is a simulated load. The control device sets the input pins of the driver chip BTS5030_1EJA and the load chip TMUX6104 according to different test conditions, and detects the voltage of the feedback pins of the driver chip and the load chip. It determines whether the voltage of the feedback pin is the output voltage value corresponding to the test condition, thereby testing the fault identification function of the driver chip itself. The accuracy of the fault identification of the driver chip can be determined based on the test results, preventing the chip from falsely reporting incorrect control relays that could cause abnormal vehicle functions, thus ensuring the reliability of the chip.

[0043] As an optional implementation, in one embodiment of the invention, see [link to relevant documentation]. Figure 1 As shown, the step of setting the input pins of the driver chip and the load chip according to different test conditions, collecting the voltages of the feedback pins of the driver chip and the load chip, and determining whether the voltages of the feedback pins of the driver chip and the load chip are the preset voltages of the corresponding test conditions includes: when the test condition is that the output of the driver chip is turned off, setting the first input pin of the driver chip and the second input pin of the load chip to a first preset value, setting the second input pin of the driver chip and the first and third input pins of the load chip to a second preset value, collecting the voltages of the feedback pins of the driver chip and the load chip, and determining whether the voltages of the feedback pins of the driver chip and the load chip are the first voltage value.

[0044] Specifically, see Figure 1As shown, when the test condition is that the driver chip output is turned off, the driver chip's output pin OUT has no output. The driver chip's output pins OUT1, OUT2, and OUT3 are all connected to the load chip's input pin D. Setting the driver chip's first input pin IN (output control pin) to the first preset value 0 turns off the driver chip's output function. Since the driver chip has no output, the load chip's input pin D also has no input value. Setting the driver chip's second input pin DEN (test enable control pin) to the second preset value 1 turns on the driver chip's test function. Setting the load chip's second input pin A1 (channel selection pin) to the first preset value 0, and setting the load chip's first input pin A0 (channel selection pin) and third input pin EN (operation enable pin) to the second preset value 1... If the value is set to 1, the load chip is activated, and the output channel S3 of the load chip is turned on. The output channel pin S3 of the load chip is connected to the test load circuit and is also connected to the control device pin M_RELAY_FB as the feedback pin of the load chip to test the normal output function of the driver chip. Then, the voltage of the feedback pin IS of the driver chip (M_HSD_IS) and the voltage of the feedback pin M_RELAY_FB of the load chip are collected, and it is determined whether the voltage of the feedback pin IS of the driver chip (M_HSD_IS) and the voltage of the feedback pin M_RELAY_FB of the load chip are both 0V. Since neither the driver chip nor the load chip has an output, when the output of the driver chip is turned off, the voltage of the feedback pins of the driver chip and the load chip are both 0V.

[0045] As an optional implementation, in one embodiment of the invention, see [link to relevant documentation]. Figure 1 As shown, the step of setting the input pins of the driver chip and the load chip according to different test conditions, collecting the voltages of the feedback pins of the driver chip and the load chip, and determining whether the voltages of the feedback pins of the driver chip and the load chip are the preset voltages of the corresponding test conditions includes: when the test condition is that the driver chip output is enabled, setting the second input pin of the load chip to a first preset value, setting the first and second input pins of the driver chip and the first and third input pins of the load chip to a second preset value, collecting the voltages of the feedback pins of the driver chip and the load chip, and determining whether the voltage of the feedback pin of the driver chip is less than the second voltage value, and whether the voltage of the feedback pin of the load chip is the power supply voltage.

[0046] Specifically, see Figure 1As shown, when the test condition is that the driver chip output is enabled, the driver chip's output pin OUT has an output. Setting the first input pin IN and the second input pin DEN of the driver chip to the second preset value 1 enables the driver chip's output and test functions. Setting the second input pin A1 of the load chip to the first preset value 0, and setting the first input pin A0 and the third input pin EN of the load chip to the second preset value 1, activates the load chip and selects the load chip's output channel S3 to be turned on. The output channel pin S3 of the load chip is connected to the test load circuit and is also connected to the control device's pin M_RELAY_FB to form the load chip. The feedback pins of the chip are used to test the normal output function of the driver chip. The output pins OUT1, OUT2, and OUT3 of the driver chip output a 12V power supply voltage to the input pin D of the load chip. The output pin S3 of the load chip, i.e., the feedback pin M_RELAY_FB, should also output a 12V power supply voltage. The voltage of the feedback pin of the load chip is collected, and it is determined whether the voltage of the feedback pin M_RELAY_FB of the load chip is the 12V power supply voltage. The voltage of the feedback pin of the driver chip is collected, and it is determined whether the voltage of the feedback pin IS, i.e., M_HSD_IS, of the driver chip is less than the second voltage value of 0.122mV. Since the typical current detection ratio K of the driver chip is... ILIS For 2150, I L This refers to the actual output current of the driver chip's output pin OUT when the driver chip's output is enabled for normal output function testing.

[0047]

[0048] Where R5 = 15KΩ, R6 = 10KΩ, R7 = 47KΩ, and R3 = 1.2KΩ.

[0049] As an optional implementation, in one embodiment of the invention, see [link to relevant documentation]. Figure 1 As shown, the step of setting the input pins of the driver chip and the load chip according to different test conditions, collecting the voltages of the feedback pins of the driver chip and the load chip, and determining whether the voltages of the feedback pins of the driver chip and the load chip are the preset voltages of the corresponding test conditions includes: when the test condition is that the output of the driver chip is open, setting the third input pin of the load chip to a first preset value, setting the first input pin and the second input pin of the driver chip to a second preset value, collecting the voltages of the feedback pins of the driver chip and the load chip, and determining whether the voltage of the feedback pin of the driver chip is less than a third voltage value and whether the voltage of the feedback pin of the load chip is the first voltage value.

[0050] Specifically, see Figure 1 As shown, when the test condition is that the driver chip output is open, the load chip is turned off to construct the driver chip output open circuit condition. The third input pin EN of the load chip is set to the first preset value 0, thus turning off the load chip and making the driver chip unloaded. The first input pin IN and the second input pin DEN of the driver chip are set to the second preset value 1, thus enabling the output and test functions of the driver chip. When the load chip is turned off, the voltage of the load chip feedback pin should be 0V. The voltage of the load chip feedback pin is collected, and it is determined whether the voltage of the load chip feedback pin M_RELAY_FB is 0V. When the driver chip output is open, the output current I of the driver chip feedback pin IS is... IS(OL) The voltage is 5.6uA, and the output voltage of the feedback pin IS of the driver chip is I. IS(OL) • R3 = 5.6uA • 1200Ω = 6mV, collect the voltage of the feedback pin of the driver chip and determine whether the voltage of the feedback pin IS, i.e., M_HSD_IS, is less than the third voltage value of 6mV.

[0051] As an optional implementation, in one embodiment of the invention, see [link to relevant documentation]. Figure 1 As shown, the step of setting the input pins of the driver chip and the load chip according to different test conditions, collecting the voltages of the feedback pins of the driver chip and the load chip, and determining whether the voltages of the feedback pins of the driver chip and the load chip are the preset voltages of the corresponding test conditions includes: when the test condition is that the driver chip outputs a short-circuited power supply, setting the first input pin of the driver chip and the first and second input pins of the load chip to a first preset value, setting the second input pin of the driver chip and the third input pin of the load chip to a second preset value, collecting the voltages of the feedback pins of the driver chip and the load chip, and determining whether the voltage of the feedback pin of the driver chip is the power supply voltage and whether the voltage of the feedback pin of the load chip is the first voltage value.

[0052] Specifically, see Figure 1As shown, when the test condition is that the output of the driver chip is short-circuited, the output terminal of the load chip is short-circuited to the power supply VS pin to construct the short-circuit power supply condition of the driver chip. Setting the first input pin IN of the driver chip to the first preset value 0 disables the output function of the driver chip. Since the driver chip has no output, the input pin D of the load chip also has no input value. Setting the second input pin DEN of the driver chip to the second preset value 1 enables the test function of the driver chip. Setting the first input pin A0 and the second input pin A1 of the load chip to the first preset value 0, and setting the third input pin EN of the load chip to the second preset value 1... If the preset value is 1, the load chip is activated, and the output channel S1 of the load chip is turned on. The output channel S1 of the load chip is connected to the power supply VS pin of the driver chip. The output terminal of the load chip is short-circuited to the power supply VS pin, thus establishing the short-power supply condition of the driver chip output. The voltage of the feedback pin M_RELAY_FB of the load chip is 0V. The voltage of the feedback pin of the load chip is collected, and it is determined whether the voltage of the feedback pin M_RELAY_FB of the load chip is the first voltage value of 0V. The voltage of the feedback pin of the driver chip is collected, and it is determined whether the voltage of the feedback pin M_HSD_IS of the driver chip is the power supply voltage of 12V.

[0053] As an optional implementation, in one embodiment of the invention, see [link to relevant documentation]. Figure 1 As shown, the step of setting the input pins of the driver chip and the load chip according to different test conditions, collecting the voltages of the feedback pins of the driver chip and the load chip, and determining whether the voltages of the feedback pins of the driver chip and the load chip are the preset voltages of the corresponding test conditions includes: when the test condition is that the output of the driver chip is short-grounded, setting the first input pin, the second input pin of the driver chip and the first input pin, the second input pin and the third input pin of the load chip to the second preset value, collecting the voltages of the feedback pins of the driver chip and the load chip, and determining whether the voltage of the feedback pin of the driver chip is the fourth voltage value and whether the voltage of the feedback pin of the load chip is the first voltage value.

[0054] Specifically, see Figure 1As shown, when the test condition is that the driver chip output is short-grounded, the load chip is short-grounded, thus constructing the short-ground condition of the driver chip output. Setting the first input pin IN and the second input pin DEN of the driver chip to the second preset value 1 enables the output and test functions of the driver chip. Setting the first input pin A0, the second input pin A1, and the third input pin EN of the load chip to the second preset value 1 activates the load chip and selects the output channel S4 of the load chip to be turned on. The output channel S4 of the load chip is connected to ground through a pull-down resistor, thus short-grounding the load chip and constructing the short-ground condition of the driver chip output. The voltage of the feedback pin M_RELAY_FB of the load chip is 0V. The voltage of the feedback pin of the load chip is collected, and it is determined whether the voltage of the feedback pin M_RELAY_FB of the load chip is the first voltage value of 0V. When the driver chip output is short-grounded, the output current I of the feedback pin IS of the driver chip... IS(fault) The current is 15mA, and the output voltage of the feedback pin IS of the driver chip is V. IS(fault) =I IS(fault) • R3 = 15mA • 1200Ω = 18V, collect the voltage of the feedback pin of the driver chip and determine whether the voltage of the feedback pin IS, i.e., M_HSD_IS, is the fourth voltage value of 18V.

[0055] As an optional implementation, in one embodiment of the invention, see [link to relevant documentation]. Figure 1 As shown, determining whether the fault identification function of the test condition corresponding to the driver chip is normal based on the judgment result includes: if the voltage of the feedback pin of the driver chip and the load chip is the preset voltage of the corresponding test condition, then the fault identification function of the test condition corresponding to the driver chip is normal; if it is determined that the fault identification function of the test condition corresponding to the driver chip is normal, then the control device sets the test result flag bit st_hsd_fail to 0 and records the test results of the driver chip fault identification function being normal for different test conditions.

[0056] As an optional implementation, in one embodiment of the invention, see [link to relevant documentation]. Figure 1As shown, the step of determining whether the fault identification function of the test condition corresponding to the driver chip is normal based on the judgment result further includes: if the voltage of the feedback pin of the driver chip and the load chip is not the preset voltage of the corresponding test condition, then the fault identification function of the test condition corresponding to the driver chip is abnormal; if the voltage of the feedback pin of the driver chip and the load chip is not the preset voltage of the corresponding test condition, then the load chip is turned off and turned on again, that is, the third input pin EN of the load chip, i.e., the working enable pin, is set to 0, and then the third input pin EN of the load chip, i.e., the working enable pin, is set to 1. Then, according to different test conditions, each input pin of the driver chip and the load chip is set again, the voltage of the feedback pin of the driver chip and the load chip is collected, and it is judged again whether the voltage of the feedback pin of the driver chip and the load chip is the preset voltage of the corresponding test condition. This test step is repeated three times. If the voltage of the feedback pin of the driver chip and the load chip is not the preset voltage of the corresponding test condition three times, then it is determined that the fault identification function of the test condition corresponding to the driver chip is abnormal; if there is a problem with the driver chip and the load chip, then the fault identification function of the test condition corresponding to the driver chip is abnormal. If the voltage at the feedback pin of the drive chip is the preset voltage for the corresponding test condition, then the fault identification function of the corresponding test condition of the drive chip is normal, and the test result flag st_hsd_fail is set to 0. When it is determined that the fault identification function of the corresponding test condition of the drive chip is abnormal, the control device sets the test result flag st_hsd_fail to the corresponding value according to different test conditions. For example, when the fault identification function of the drive chip is abnormal due to output shutdown, the test result flag st_hsd_fail is set to 1; when the drive chip is abnormal due to output shutdown, the test result flag st_hsd_fail is set to 1. When the fault identification function malfunctions, the test result flag st_hsd_fail is set to 2; when the driver chip outputs an open-circuit fault identification function malfunctions, the test result flag st_hsd_fail is set to 4; when the driver chip outputs a short-circuit power supply fault identification function malfunctions, the test result flag st_hsd_fail is set to 8; when the driver chip outputs a short-to-ground fault identification function malfunctions, the test result flag st_hsd_fail is set to 16. The test results of the driver chip's fault identification function malfunctions under different test conditions are recorded.

[0057] As an optional implementation, in one embodiment of the invention, see [link to relevant documentation]. Figure 1As shown, the control device is a microcontroller or a single-chip microcomputer. The IN, DEN, and IS pins of the driver chip BTS5030_1EJA are all connected to the microcontroller or single-chip microcomputer. The A0, A1, EN, and feedback pins of the load chip TMUX6104 are all connected to the microcontroller or single-chip microcomputer. The microcontroller or single-chip microcomputer sets the IN and DEN pins of the driver chip and the A0, A1, and EN pins of the load chip according to different test conditions. Then, it collects the voltage of the feedback pin IS (M_HSD_IS) of the driver chip and the voltage of the feedback pin M_RELAY_FB of the load chip, and determines whether the voltages of the driver chip and the feedback pin of the load chip are the preset voltages of the corresponding test conditions.

[0058] This invention also provides a test method for the fault identification function of a driver chip, see [link to relevant documentation]. Figure 2 As shown, it includes the following steps:

[0059] Step S10: Set the input pins of the driver chip and the load chip according to different test conditions, collect the voltage of the feedback pins of the driver chip and the load chip, and determine whether the voltage of the feedback pins of the driver chip and the load chip is the preset voltage of the corresponding test condition.

[0060] Step S20: Determine whether the fault identification function of the corresponding test condition of the driver chip is normal based on the judgment result.

[0061] The test method for the fault identification function of the drive chip in this embodiment of the invention uses a control device to set the input pins of the drive chip and the load chip according to different test conditions, and detects the voltage of the feedback pins of the drive chip and the load chip to determine whether the voltage of the feedback pin is the output voltage value corresponding to the test condition. This tests the fault identification function of the drive chip itself, and the accuracy of the fault identification can be determined based on the test results. This prevents the chip from falsely reporting errors in the control relays, which could lead to abnormal vehicle functions and ensures the reliability of the chip.

[0062] In the description of this invention, it should be noted that the terms "upper," "lower," etc., indicating the orientation or positional relationship are based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing the invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the invention. Unless otherwise expressly specified and limited, the terms "installed," "connected," and "linked" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication between two elements. For those skilled in the art, the specific meaning of the above terms in this invention can be understood according to the specific circumstances.

[0063] It should be noted that in this invention, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0064] The above description is merely a specific embodiment of the present invention, enabling those skilled in the art to understand or implement the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the present invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features of the invention herein.

Claims

1. A test system for driver chip fault identification function, characterized in that, include: Control device and load chip; All output pins of the driver chip are connected to one input pin of the load chip; The control device is connected to both the driver chip and the load chip, and is configured as follows: The input pins of the driver chip and the load chip are set according to different test conditions, the voltages of the feedback pins of the driver chip and the load chip are collected, and it is determined whether the voltages of the feedback pins of the driver chip and the load chip are the preset voltages of the corresponding test conditions. The different test conditions are: the driver chip output is off, the driver chip output is on, the driver chip output is open, the driver chip output is shorted to the power supply, and the driver chip output is shorted to ground. Based on the judgment result, determine whether the fault identification function of the corresponding test condition of the driver chip is normal; When the test condition is to shut down the output of the driver chip, the first input pin of the driver chip and the second input pin of the load chip are set to the first preset value, and the second input pin of the driver chip and the first and third input pins of the load chip are set to the second preset value. The voltages of the feedback pins of the driver chip and the load chip are collected, and it is determined whether the voltages of the feedback pins of the driver chip and the load chip are the first voltage value. When the test condition is to enable the output of the driver chip, the second input pin of the load chip is set to the first preset value, and the first input pin, the second input pin of the driver chip, and the first input pin and the third input pin of the load chip are set to the second preset value. The voltages of the feedback pins of the driver chip and the load chip are collected, and it is determined whether the voltage of the feedback pin of the driver chip is less than the second voltage value, and whether the voltage of the feedback pin of the load chip is the power supply voltage. When the test condition is that the output of the driver chip is open, the third input pin of the load chip is set to a first preset value, and the first input pin and the second input pin of the driver chip are set to a second preset value. The voltages of the feedback pins of the driver chip and the load chip are collected, and it is determined whether the voltage of the feedback pin of the driver chip is less than a third voltage value and whether the voltage of the feedback pin of the load chip is a first voltage value. When the test condition is that the output power of the driver chip is short-circuited, the first input pin of the driver chip and the first input pin and the second input pin of the load chip are set to the first preset value, and the second input pin of the driver chip and the third input pin of the load chip are set to the second preset value. The voltages of the feedback pins of the driver chip and the load chip are collected, and it is determined whether the voltage of the feedback pin of the driver chip is the power supply voltage and whether the voltage of the feedback pin of the load chip is the first voltage value. When the test condition is that the output of the driver chip is short-grounded, the first input pin, the second input pin of the driver chip, and the first input pin, the second input pin, and the third input pin of the load chip are all set to the second preset value; The voltages of the feedback pins of the driver chip and the load chip are collected, and it is determined whether the voltage of the feedback pin of the driver chip is the fourth voltage value and whether the voltage of the feedback pin of the load chip is the first voltage value.

2. The test system for driver chip fault identification function according to claim 1, characterized in that, The step of determining whether the fault identification function of the test condition corresponding to the driver chip is normal based on the judgment result includes: If the voltage of the feedback pin of the driver chip and the load chip is the preset voltage of the corresponding test condition, then the fault identification function of the driver chip for the corresponding test condition is normal.

3. The test system for driver chip fault identification function according to claim 2, characterized in that, The step of determining whether the fault identification function of the test condition corresponding to the driver chip is normal based on the judgment result also includes: If the voltage of the feedback pin of the driver chip and the load chip is not the preset voltage of the corresponding test condition, then the fault identification function of the driver chip for the corresponding test condition is abnormal.

4. The test system for driver chip fault identification function according to claim 1, characterized in that: The control device is a microcontroller or a single-chip microcomputer.

5. A test method for driver chip fault identification function, using the test system for driver chip fault identification function as described in claim 1, characterized in that, include: Set the input pins of the driver chip and load chip according to different test conditions, collect the voltage of the feedback pins of the driver chip and load chip, and determine whether the voltage of the feedback pins of the driver chip and load chip is the preset voltage of the corresponding test condition. Based on the judgment results, determine whether the fault identification function of the corresponding test condition of the driver chip is normal.

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