Offset Calibration Circuits and Systems

Abstract

The present invention provides an offset calibration circuit and system, the offset calibration circuit comprising: when the first switch unit and the second switch unit of the normal working circuit are disconnected, and the third switch unit and the fourth switch unit are closed, the offset calibration circuit is turned on, the first mirror resistor and the third mirror resistor are connected to the negative input end of the comparator unit, and the second mirror resistor and the fourth mirror resistor are connected to the positive input end of the comparator unit; wherein, when the output of the output end of the comparator unit is at a low level, the fifth switch unit is closed, the first offset calibration branch is turned on, and the offset voltage input to the target circuit is calibrated by the first compensation parameter provided by the adjustable compensation unit; when the output of the output end of the comparator unit is at a high level, the sixth switch unit is closed, the second offset calibration branch is turned on, and the offset voltage input to the target circuit is calibrated by the second compensation parameter provided by the adjustable compensation unit. The technical solution disclosed in the present invention can reduce the power consumption of offset calibration.

Description

Technical Field

[0001] The present invention relates to the technical field of high-speed signal transmission, and in particular to an offset calibration circuit and system. Background Art

[0002] With the continuous reduction of the feature size of the complementary metal-oxide-semiconductor (CMOS) manufacturing process and the demand for high-speed chip performance, the offset voltage problem of analog front-end circuits has become increasingly prominent. The offset voltage will eat up the input signal swing, reduce the sensitivity of the circuit, and in severe cases will cause signal reception errors. In the related technology, the offset calibration technology is introduced to determine the positive and negative of the offset voltage by judging the initial state level of the offset voltage, and then gradually adjust the current injected by the adjustable current source to eliminate the influence of the offset voltage on the circuit when the positive input terminal of the comparator unit is equal to the negative input terminal. However, in high-speed circuits, when the input offset voltage is large, the power consumption of the offset calibration is high. Summary of the invention

[0003] The purpose of the present invention is to provide an offset calibration circuit and system, which can reduce the current required for offset calibration under the same offset voltage by disposing a mirror resistor of a resistor in a normal working circuit at the front end of the offset calibration circuit, thereby reducing the power consumption of the offset calibration.

[0004] In a first aspect, the present invention provides an offset calibration circuit for calibrating an offset voltage input to a high-speed transmitting circuit, the offset calibration circuit comprising: a third switch unit, a fourth switch unit, a fifth switch unit, a sixth switch unit, a comparator unit, an adjustable compensation unit, and a first mirror resistor, a second mirror resistor, a third mirror resistor, and a fourth mirror resistor deployed at the front end of the offset calibration circuit; wherein the first mirror resistor is a mirror resistor of a first resistor in a normal working circuit, the second mirror resistor is a mirror resistor of a second resistor in a normal working circuit, the third mirror resistor is a mirror resistor of a third resistor in a normal working circuit, and the fourth mirror resistor is a mirror resistor of a fourth resistor in a normal working circuit;

[0005] When the first switch unit and the second switch unit of the normal working circuit are disconnected, and the third switch unit and the fourth switch unit are closed, the offset calibration circuit is turned on, the first mirror resistor and the third mirror resistor are connected to the negative input terminal of the comparator unit, and the second mirror resistor and the fourth mirror resistor are connected to the positive input terminal of the comparator unit; wherein,

[0006] When the output of the output terminal of the comparator unit is at a low level, the fifth switch unit is closed, the first offset calibration branch is turned on, and the offset voltage input to the target circuit is calibrated by the first compensation parameter provided by the adjustable compensation unit;

[0007] When the output of the output terminal of the comparator unit is at a high level, the sixth switch unit is closed to connect the second offset calibration branch, and the offset voltage input to the target circuit is calibrated by the second compensation parameter provided by the adjustable compensation unit.

[0008] In some embodiments, the fifth switch unit is closed to connect the first offset calibration branch, including: adjusting the offset voltage of the target circuit according to the first compensation parameter provided by the adjustable compensation unit until the positive input terminal of the comparator unit is equal to the negative input terminal, and the comparator unit outputs a calibration completion signal.

[0009] In some embodiments, the sixth switch unit is closed to turn on the second offset calibration circuit, including: adjusting the offset voltage of the target circuit according to the second compensation parameter provided by the adjustable compensation unit until the positive input terminal of the comparator unit is equal to the negative input terminal, and the comparator unit outputs a calibration completion signal.

[0010] In some embodiments, the first compensation parameter is a six-bit binary value. The compensation parameter of the adjustable compensation unit is adjusted until the positive input terminal of the comparator unit is equal to the negative input terminal to determine the first compensation parameter; the first compensation parameter is used to compensate the positive input terminal of the comparator to suppress the offset voltage in the target circuit.

[0011] In some embodiments, the second compensation parameter is a six-bit binary value. The compensation parameter of the adjustable compensation unit is adjusted until the positive input terminal of the comparator unit is equal to the negative input terminal to determine the second compensation parameter; the second compensation parameter is used to compensate the negative input terminal of the comparator to suppress the offset voltage in the target circuit.

[0012] In some embodiments, when the first switch unit and the second switch unit are closed and the third switch unit and the fourth switch unit are opened, the normal operating circuit includes: a first resistor, a second resistor, a third resistor and a fourth resistor; the front end of the offset calibration circuit is disposed with a first mirror resistor, a second mirror resistor, a third mirror resistor and a fourth mirror resistor, wherein the first mirror resistor is a mirror resistor of the first resistor, the second mirror resistor is a mirror resistor of the second resistor, the third mirror resistor is a mirror resistor of the third resistor, and the fourth mirror resistor is a mirror resistor of the fourth resistor.

[0013] In some embodiments, the third switch unit and the fourth switch unit are control switches of an offset calibration circuit.

[0014] In some embodiments, the fifth switch unit and the sixth switch unit are direction control switches of the offset calibration circuit.

[0015] In some embodiments, the offset calibration circuit further includes: a buffer unit, the buffer unit is used to ensure that the common mode voltage of the first mirror resistor, the second mirror resistor, the third mirror resistor and the fourth mirror resistor of the offset calibration circuit is the same as that of a normal working circuit.

[0016] In a second aspect, the present invention provides an offset calibration system, the offset calibration system comprising: an offset calibration circuit and a logic control module;

[0017] The offset calibration circuit comprises: a third switch unit, a fourth switch unit, a fifth switch unit, a sixth switch unit, a comparator unit, an adjustable compensation unit, and a first mirror resistor, a second mirror resistor, a third mirror resistor, and a fourth mirror resistor disposed at the front end of the offset calibration circuit; when the first switch unit and the second switch unit of the normal working circuit are disconnected and the third switch unit and the fourth switch unit are closed, the offset calibration circuit is turned on, the first mirror resistor and the third mirror resistor are connected to the negative input end of the comparator unit, and the second mirror resistor and the fourth mirror resistor are connected to the positive input end of the comparator unit;

[0018] The logic control module is used to control the third switch unit, the fourth switch unit, the fifth switch unit, the sixth switch unit, the first compensation parameter and the second compensation parameter of the adjustable compensation unit in the offset calibration circuit according to the first aspect.

[0019] The beneficial effect of the solution provided by the embodiment of the present disclosure is that by disposing a mirror resistor of a resistor in a normal working circuit at the front end of the offset calibration circuit, the current required for offset calibration can be reduced under the same offset voltage, thereby reducing the power consumption of the offset calibration. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 A circuit diagram of offset calibration in the prior art;

[0021] Figure 2 A circuit diagram of an offset calibration circuit provided by an embodiment of the present invention;

[0022] Figure 3 A schematic diagram of a process for determining a first compensation parameter and a second compensation parameter provided by an embodiment of the present invention;

[0023] Figure 4 A schematic diagram of the structure of an offset calibration system provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0024] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention. Unless otherwise defined, the technical terms or scientific terms used herein should be understood by people with general skills in the field to which the present invention belongs. "Including" and similar words used in this article mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects.

[0025] Before introducing the technical solutions of the embodiments of the present disclosure, the technical terms that may be used in the present disclosure are further explained:

[0026] CMOS: An integrated circuit manufacturing process used to manufacture microprocessors, microcontrollers, static random-access memory (SRAM), programmable logic devices (PLD), and other digital logic circuits.

[0027] Offset calibration technology: A technology that eliminates or reduces offset voltage and offset error in instruments, circuit systems or electronic devices through a series of operations.

[0028] Offset Voltage: Offset voltage refers to a non-zero DC voltage at the output when the input is zero due to the imperfection of actual physical components (such as differences in the parameters of resistors, capacitors, transistors, etc.) in an ideally completely symmetrical or balanced circuit. This non-zero DC voltage is the offset voltage.

[0029] High-speed transmitting circuit: A circuit system that can process and transmit signals at high speed.

[0030] In the related technology, with the continuous reduction of the feature size of the CMOS manufacturing process and the demand for high-speed chip performance, the problem of offset voltage in the analog front-end circuit has become increasingly prominent. The offset voltage will eat up the input signal swing, reduce the sensitivity of the circuit, and in severe cases, cause signal reception errors.

[0031] Figure 1 A circuit diagram of the prior art offset calibration is shown. Figure 1As shown, the prior art introduces offset calibration technology. During calibration, S1 and S2 are disconnected, S3 and S4 are turned on, and the positive and negative of the offset voltage are determined by judging the initial state level of the output calibration voltage, and then the current injected into RL1 or RL2 by the adjustable current source (I_cali) is gradually adjusted. When the positive input terminal (ctle_outp) of the comparator is equal to the negative input terminal (ctle_outn) of the comparator, the influence of the offset voltage on the circuit is eliminated. However, in high-speed circuits, when the input offset voltage is large, the power consumption of the offset calibration is high. For example, if the offset voltage is 50 millivolts (mV) and RL1=RL2=50 ohms (Ohm), I_cali requires 1 milliampere (mA), and the power consumption of the offset calibration is high.

[0032] In order to at least partially solve one or more of the above problems and other potential problems, the present disclosure proposes an offset calibration circuit. When the first switch unit and the second switch unit of the normal working circuit are disconnected, and the third switch unit and the fourth switch unit are closed, the offset calibration circuit is turned on, the first mirror resistor and the third mirror resistor are connected to the negative input terminal of the comparator unit, and the second mirror resistor and the fourth mirror resistor are connected to the positive input terminal of the comparator unit; wherein, when the output of the output terminal of the comparator unit is at a low level, the fifth switch unit is closed, the first offset calibration branch is turned on, and the offset voltage input to the target circuit is calibrated by the first compensation parameter provided by the adjustable compensation unit; when the output of the output terminal of the comparator unit is at a high level, the sixth switch unit is closed, the second offset calibration branch is turned on, and the offset voltage input to the target circuit is calibrated by the second compensation parameter provided by the adjustable compensation unit. The technical solution of the present disclosure, by disposing the mirror resistor of the resistor in the normal working circuit at the front end of the offset calibration circuit, can reduce the current required for offset calibration under the same offset voltage, thereby reducing the power consumption of offset calibration.

[0033] An embodiment of the present disclosure provides an offset calibration circuit, which includes: a third switch unit, a fourth switch unit, a fifth switch unit, a sixth switch unit, a comparator unit, an adjustable compensation unit, and a first mirror resistor, a second mirror resistor, a third mirror resistor, and a fourth mirror resistor deployed at the front end of the offset calibration circuit; wherein the first mirror resistor is a mirror resistor of a first resistor in a normal working circuit, the second mirror resistor is a mirror resistor of a second resistor in a normal working circuit, the third mirror resistor is a mirror resistor of a third resistor in a normal working circuit, and the fourth mirror resistor is a mirror resistor of a fourth resistor in a normal working circuit;

[0034] When the first switch unit and the second switch unit of the normal working circuit are disconnected, and the third switch unit and the fourth switch unit are closed, the offset calibration circuit is turned on, the first mirror resistor and the third mirror resistor are connected to the negative input terminal of the comparator unit, and the second mirror resistor and the fourth mirror resistor are connected to the positive input terminal of the comparator unit; wherein,

[0035] When the output of the output terminal of the comparator unit is at a low level, the fifth switch unit is closed, the first offset calibration branch is turned on, and the offset voltage input to the target circuit is calibrated by the first compensation parameter provided by the adjustable compensation unit;

[0036] When the output of the output terminal of the comparator unit is at a high level, the sixth switch unit is closed to connect the second offset calibration branch, and the offset voltage input to the target circuit is calibrated by the second compensation parameter provided by the adjustable compensation unit.

[0037] In some embodiments, the offset calibration circuit includes: a third switch unit, a fourth switch unit, a fifth switch unit, a sixth switch unit, a comparator unit, an adjustable compensation unit, and a first mirror resistor, a second mirror resistor, a third mirror resistor, and a fourth mirror resistor deployed at the front end of the offset calibration circuit. Among them, the first switch unit and the second switch unit are control switches of the normal working circuit; when the first switch unit and the second switch unit are closed, the normal working circuit is turned on; the first switch unit and the second switch unit are usually in a closed state before the offset calibration, or in a closed state after the offset calibration is completed; when the first switch unit and the second switch unit are closed after the offset calibration, the influence of the input offset voltage is usually eliminated. The third switch unit and the fourth switch unit are control switches of the offset calibration circuit; when the third switch unit and the fourth switch unit are closed, the offset calibration circuit is turned on; when the first switch unit and the second switch unit are closed, the third switch unit and the fourth switch unit are closed. The fifth switch unit and the sixth switch unit are direction control switches of the offset calibration circuit; when the fifth switch unit is closed, the first offset calibration branch is connected to calibrate the offset voltage input by the target circuit; when the sixth switch unit is closed, the second offset calibration branch is connected to calibrate the offset voltage input by the target circuit. The first mirror resistor of the offset calibration circuit is the mirror resistor of the first resistor of the normal working circuit, and the first mirror resistor has the same magnitude as the first resistor; the second mirror resistor of the offset calibration circuit is the mirror resistor of the second resistor of the normal working circuit, and the second mirror resistor has the same magnitude as the second resistor; the third mirror resistor of the offset calibration circuit is the mirror resistor of the third resistor of the normal working circuit, and the third mirror resistor has the same magnitude as the third resistor; the fourth mirror resistor of the offset calibration circuit is the mirror resistor of the fourth resistor of the normal working circuit, and the fourth mirror resistor has the same magnitude as the fourth resistor. The comparator unit refers to a circuit or device that can compare the current or voltage of two input terminals. The comparator unit consists of two input terminals (Vi+ and Vi-) and an output terminal (Vout); the input terminal receives analog signals, while the output terminal outputs digital signals, and the output state is usually high or low. The adjustable compensation unit refers to a circuit unit used in a circuit to adjust or compensate for voltage to ensure stable operation of the circuit or eliminate the influence of offset voltage. Here, the number and model of devices in the offset calibration circuit are not limited, but they are not exhaustive.

[0038] In some embodiments, the comparator unit is a circuit or device capable of comparing the voltage or current of two input terminals; the output terminal of the comparator unit outputs a high level or a low level according to the comparison result of the input terminal voltage. The output judgment principle of the comparator unit includes: in the comparator unit, if the selected reference voltage (such as Vi-) is higher than another input voltage (such as Vi+), the output terminal usually outputs a low level. On the contrary, if Vi+ is higher than Vi-, a high level is output. Specifically, the output of the output terminal of the comparator unit is a low level, which means that during the operation of the comparator unit, the level presented by its output terminal is lower than a preset threshold, and the preset threshold can be set according to the requirements and external circuit design requirements. Low level: The low level is a low voltage state relative to the high level. For the comparator unit, when the output level is lower than the preset threshold, it is determined that the output of the comparator unit is a low level; the output of the output terminal of the comparator unit is a high level, which means that during the operation of the comparator unit, the level presented by its output terminal is higher than the preset threshold, and the preset threshold can be set according to the requirements and external circuit design requirements. High Level: The high level is a high voltage state relative to the low level; for the comparator unit, when the output level is higher than the preset threshold, the output is determined to be a high level.

[0039] In some embodiments, the first offset calibration branch is used to calibrate and eliminate the offset voltage in the circuit when the output of the output terminal of the comparator unit is at a low level (i.e., logic 0). The first offset calibration branch is part of the offset calibration circuit, and when the fifth switch unit is closed, the first offset calibration branch is turned on.

[0040] In some embodiments, the second offset calibration branch is used to calibrate and eliminate the offset voltage in the circuit when the output of the output terminal of the comparator unit is at a high level (i.e., logic 1). The second offset calibration branch is part of the offset calibration circuit, and when the sixth switch unit is closed, the second offset calibration branch is turned on.

[0041] Figure 2 shows a circuit schematic of the offset calibration circuit, as Figure 2As shown, the offset calibration circuit includes: a third switch unit (S3), a fourth switch unit (S4), a fifth switch unit (S5), a sixth switch unit (S6), a first mirror resistor (R1_mirror), a second mirror resistor (R2_mirror), a third mirror resistor (Rdu_mirror), a fourth mirror resistor (Rdd_mirror), a buffer unit, a comparator unit, and an adjustable compensation unit. The normal circuit includes: a differential input port (RX_P, RX_N), a first resistor (R1), a second resistor (R2), a third resistor (Rdu), a fourth resistor (Rdd), a first capacitor (C1), a second capacitor (C2), a first switch unit (S1), and a second switch unit (S2). Among them, the adjustable compensation unit includes: an adjustable current source, the adjustable current source is used to adjust the size of the output current, the current output by the adjustable current source passes through the first mirror resistor (R1_mirror), the second mirror resistor (R2_mirror), the third mirror resistor (Rdu_mirror), and the fourth mirror resistor (Rdd_mirror) and is converted into a compensation voltage to calibrate the offset voltage inputted by the target circuit. When the first switch unit (S1) and the second switch unit (S2) are disconnected, and the third switch unit (S3) and the fourth switch unit (S4) are closed, the offset calibration circuit is turned on; the first mirror resistor (R1_mirror) and the third mirror resistor (Rdu_mirror) are connected to the negative input terminal of the comparator unit, and the second mirror resistor (R2_mirror) and the fourth mirror resistor (Rdd_mirror) are connected to the positive input terminal of the comparator unit; when the output of the output terminal of the comparator unit is at a low level (i.e., logic 0), the fifth switch unit (S5) is closed, the first offset calibration branch is turned on, and the offset voltage input to the target circuit is calibrated by the first compensation parameter provided by the adjustable compensation unit; when the output of the output terminal of the comparator unit is at a high level (i.e., logic 1), the sixth switch unit (S6) is closed, the second offset calibration branch is turned on, and the offset voltage input to the target circuit is calibrated by the second compensation parameter provided by the adjustable compensation unit. Here, the fifth switch unit (S5) and the sixth switch unit (S6) determine the direction of the compensation voltage.

[0042] Figure 3 A schematic diagram of the process of determining the first compensation parameter and the second compensation parameter is shown. Figure 3 As shown, the process may include:

[0043] S301: Start;

[0044] S302: Disconnect the first switch unit and the second switch unit, and close the third switch unit and the fourth switch unit;

[0045] S303: the initial compensation parameter is offset_code<5:0>;

[0046] S304: Is the output of the comparator unit output terminal 0? If yes, execute S305; if no, execute S310;

[0047] S305: close the fifth switch unit;

[0048] S306: Adjust the compensation parameter offset_code+1;

[0049] S307: sampling the voltage outputted by the output terminal of the comparator unit;

[0050] S308: Is the output of the comparator unit output terminal 1? If yes, execute S309; ​​if no, execute S306;

[0051] S309: Output the first compensation parameter, and end;

[0052] S310: closing the sixth switch unit;

[0053] S311: Adjust compensation parameter offset_code+1;

[0054] S312: sampling the voltage outputted by the output terminal of the comparator unit;

[0055] S313: Is the output of the comparator unit output terminal 0? If yes, execute S314; if no, execute S311;

[0056] S314: Output the second compensation parameter, and end.

[0057] When the offset calibration is completed, the first switch unit and the second switch unit are closed, the third switch unit and the fourth switch unit are opened, and the normal working circuit is connected. The normal working circuit can perform a normal signal transmission process.

[0058] The technical solution disclosed in the present invention is that when the first switch unit and the second switch unit of the normal working circuit are disconnected, and the third switch unit and the fourth switch unit are closed, the offset calibration circuit is turned on, the first mirror resistor and the third mirror resistor are connected to the negative input end of the comparator unit, and the second mirror resistor and the fourth mirror resistor are connected to the positive input end of the comparator unit; wherein, when the output of the output end of the comparator unit is at a low level, the fifth switch unit is closed, the first offset calibration branch is turned on, and the offset voltage input to the target circuit is calibrated by the first compensation parameter provided by the adjustable compensation unit; when the output of the output end of the comparator unit is at a high level, the sixth switch unit is closed, the second offset calibration branch is turned on, and the offset voltage input to the target circuit is calibrated by the second compensation parameter provided by the adjustable compensation unit. In this way, by disposing the mirror resistor of the resistor in the normal working circuit at the front end of the offset calibration circuit, the current required for offset calibration can be reduced under the same offset voltage, thereby reducing the power consumption of offset calibration.

[0059] In the embodiment of the present disclosure, the fifth switch unit is closed and the first offset calibration branch is connected, including: adjusting the offset voltage of the target circuit according to the first compensation parameter provided by the adjustable compensation unit until the positive input terminal of the comparator unit is equal to the negative input terminal, and the comparator unit outputs a calibration completion signal.

[0060] In some embodiments, when the output of the output terminal of the comparator unit is at a low level, the fifth switch unit is closed and the first offset calibration branch is turned on to calibrate the offset voltage inputted by the target circuit; the adjustable current in the adjustable compensation unit outputs the current, and after the current passes through the first mirror resistor, the second mirror resistor, the third mirror resistor, and the fourth mirror resistor, it is converted into a voltage and inputted to the positive input terminal of the comparator unit; until the positive input terminal of the comparator unit is equal to the negative input terminal, the comparator unit outputs a calibration completion signal, the adjustable current source stops inputting current, and the calibration is completed. Exemplarily, at time t1, the first switch unit and the second switch unit are disconnected, and the third switch unit and the fourth switch unit are closed, and the offset calibration circuit is turned on; if at time t2, the output of the output end of the comparator unit is at a low level, then the adjustable current in the adjustable compensation unit outputs current, and after the current passes through the first mirror resistor, the second mirror resistor, the third mirror resistor, and the fourth mirror resistor, it is converted into a voltage and input to the positive input end of the comparator unit to perform the first offset voltage calibration; at time t3, the adjustable current in the adjustable compensation unit outputs current again, and after the current passes through the first mirror resistor, the second mirror resistor, the third mirror resistor, and the fourth mirror resistor, it is converted into a voltage and input to the positive input end of the comparator unit to perform the second offset voltage calibration; at time t4, the positive input end and the negative input end of the comparator unit are equal, the comparator unit outputs a calibration completion signal, the adjustable current source stops inputting current, and the calibration is completed.

[0061] In some embodiments, the calibration completion signal is used to indicate that the calibration process has ended. The specific embodiment of the calibration completion signal may vary depending on different application scenarios and design requirements. Here, the specific embodiment of the calibration completion signal is not specifically limited. The embodiment of the calibration completion signal may include:

[0062] 1. Level signal: After calibration is completed, the circuit may output a high or low level signal to indicate the change of calibration status. This level signal can be detected and responded by a microcontroller unit (MCU), a digital signal processor (DSP) or other logic circuits.

[0063] 2. Interrupt signal: In some complex systems, the completion of calibration may trigger an interrupt signal. This interrupt signal notifies the main processor or other control unit that the calibration process has ended and the next step can be taken. Interrupt signals usually have a higher priority to ensure timely processing.

[0064] 3. Status flag: Setting a status flag in a register or memory is also a way to signal that the calibration is complete. By reading the status of this flag, you can determine whether the calibration is complete. This method is very common in embedded systems and microcontrollers.

[0065] 4. Serial communication signal: In application scenarios that require remote monitoring or control, the calibration completion signal may be sent through a serial communication interface (such as Universal Asynchronous Receiver / Transmitter (UART), Serial Peripheral Interface (SPI), Inter-Integrated Circuit (I2C), etc.). The receiving device can obtain the calibration completion information by parsing these communication signals.

[0066] 5. Visual or auditory indication: In some user-friendly devices, the calibration completion may be notified to the user through flashing light emitting diodes (LEDs), sounding buzzers, or other forms of visual or auditory indications. Although this method is not directly reflected in the circuit signal, it is an indirect manifestation of the circuit calibration completion signal.

[0067] In this way, by accurately adjusting the first compensation parameter of the adjustable compensation unit, fine calibration of the offset voltage of the target circuit can be achieved, thereby improving the calibration accuracy of the entire target circuit.

[0068] In the embodiment of the present disclosure, the sixth switch unit is closed and the second offset calibration circuit is turned on, including: adjusting the offset voltage of the target circuit according to the second compensation parameter provided by the adjustable compensation unit until the positive input terminal of the comparator unit is equal to the negative input terminal, and the comparator unit outputs a calibration completion signal.

[0069] In some embodiments, when the output of the output terminal of the comparator unit is at a high level, the fifth switch unit is closed and the second offset calibration branch is turned on to calibrate the offset voltage inputted by the target circuit; the adjustable current in the adjustable compensation unit outputs the current, and after the current passes through the first mirror resistor, the second mirror resistor, the third mirror resistor, and the fourth mirror resistor, it is converted into a voltage and inputted to the negative input terminal of the comparator unit; until the positive input terminal of the comparator unit is equal to the negative input terminal, the comparator unit outputs a calibration completion signal, the adjustable current source stops inputting current, and the calibration is completed. Exemplarily, at time t1, the first switch unit and the second switch unit are disconnected, and the third switch unit and the fourth switch unit are closed, and the offset calibration circuit is turned on; if at time t2, the output of the output end of the comparator unit is at a high level, the adjustable current in the adjustable compensation unit outputs current, and the current is converted into a voltage after passing through the first mirror resistor, the second mirror resistor, the third mirror resistor, and the fourth mirror resistor, and is input to the negative input end of the comparator unit to perform the first offset voltage calibration; at time t3, the adjustable current in the adjustable compensation unit outputs current again, and the current is converted into a voltage after passing through the first mirror resistor, the second mirror resistor, the third mirror resistor, and the fourth mirror resistor, and is input to the negative input end of the comparator unit to perform the second offset voltage calibration; at time t4, the positive input end and the negative input end of the comparator unit are equal, the comparator unit outputs a calibration completion signal, the adjustable current source stops inputting current, and the calibration is completed.

[0070] In this way, by accurately adjusting the second compensation parameter of the adjustable compensation unit, fine calibration of the offset voltage of the target circuit can be achieved, thereby improving the calibration accuracy of the entire target circuit.

[0071] In the embodiment of the present disclosure, the first compensation parameter is a six-bit binary value. The compensation parameter of the adjustable compensation unit is adjusted until the positive input terminal of the comparator unit is equal to the negative input terminal, and the first compensation parameter is determined; the first compensation parameter is used to compensate the positive input terminal of the comparator to suppress the offset voltage in the target circuit.

[0072] The six-bit binary value of the first compensation parameter can represent 64 different calibration values. Each value corresponds to a specific offset voltage compensation amount in the adjustable compensation unit. By selecting a suitable calibration value, the offset voltage of the target circuit can be minimized or meet specific requirements.

[0073] In some embodiments, when the first switch unit and the second switch unit of the normal working circuit are disconnected, the third switch unit and the fourth switch unit are closed, and the offset calibration circuit is turned on, at this time, the initial compensation parameter of the adjustable compensation unit is 0 (i.e., offset_code<5:0>=000000); the comparator unit outputs a low level and closes the fifth switch unit; the initial compensation parameter is increased to adjust the initial compensation parameter (i.e., offset_code+1); until the positive input terminal of the comparator unit is equal to the negative input terminal, the first compensation parameter is determined.

[0074] In this way, by finely adjusting the offset voltage through the first compensation parameter of the six-bit binary value, accurate compensation of the offset voltage can be achieved, which helps to reduce the error caused by the offset voltage and improve the performance and reliability of the target circuit.

[0075] In the disclosed embodiment, the second compensation parameter is a six-bit binary value. The compensation parameter of the adjustable compensation unit is adjusted until the positive input terminal of the comparator unit is equal to the negative input terminal, and the second compensation parameter is determined; the second compensation parameter is used to compensate the negative input terminal of the comparator to suppress the offset voltage in the target circuit.

[0076] The six-bit binary value of the second compensation parameter can represent 64 different calibration values. Each value corresponds to a specific offset voltage compensation amount in the adjustable compensation unit. By selecting a suitable calibration value, the offset voltage of the target circuit can be minimized or meet specific requirements.

[0077] In some embodiments, when the first switch unit and the second switch unit of the normal working circuit are disconnected, the third switch unit and the fourth switch unit are closed, and the offset calibration circuit is turned on, at this time, the initial compensation parameter of the adjustable compensation unit is 0 (i.e., offset_code<5:0>=000000); the comparator unit outputs a high level and closes the sixth switch unit; the initial compensation parameter is increased to adjust the initial compensation parameter (i.e., offset_code+1); until the positive input terminal of the comparator unit is equal to the negative input terminal, the second compensation parameter is determined.

[0078] In this way, by finely adjusting the offset voltage through the second compensation parameter of the six-bit binary value, accurate compensation of the offset voltage can be achieved, which helps to reduce the error caused by the offset voltage and improve the performance and reliability of the target circuit.

[0079] In the embodiment of the present disclosure, when the first switch unit and the second switch unit are closed and the third switch unit and the fourth switch unit are opened, the normal working circuit includes: a first resistor, a second resistor, a third resistor and a fourth resistor; the front end of the offset calibration circuit is disposed with a first mirror resistor, a second mirror resistor, a third mirror resistor and a fourth mirror resistor, wherein the first mirror resistor is a mirror resistor of the first resistor, the second mirror resistor is a mirror resistor of the second resistor, the third mirror resistor is a mirror resistor of the third resistor, and the fourth mirror resistor is a mirror resistor of the fourth resistor.

[0080] Among them, the first resistor is equal to the first mirror resistor, the second resistor is equal to the second mirror resistor, the third resistor is equal to the third mirror resistor, and the fourth resistor is equal to the fourth mirror resistor. During calibration, the first switch unit and the second switch unit are disconnected, and the third switch unit and the fourth switch unit are closed; since the first mirror resistor + the third mirror resistor = the first resistor + the third resistor, the second mirror resistor + the fourth mirror resistor = the second resistor + the fourth resistor; therefore, the first resistor, the second resistor, the third resistor and the fourth resistor of the normal working circuit are copied to the offset calibration circuit, and the direction and magnitude of the equivalent inflow current are obtained at the end of the offset calibration, and the input offset voltage can be calibrated by flowing into the front-end resistor in the normal working circuit. Since the front-end resistor can be larger, the current required under the same offset voltage is smaller, that is, the power consumption is reduced. Specifically, if the first resistor is recorded as R1, the second resistor is recorded as R2, the third resistor is recorded as Rdu, and the fourth resistor is recorded as Rdd, R1=2.45kOhm, Rdu=50Ohm, and the input offset voltage is 50mV, then the required current is 50mV / 2.5KOhm=20 microamperes (microampere, uA). The power consumption of the buffer for calibrating the common-mode voltage is low, and it is only turned on during the calibration phase, and turned off after the calibration is completed, and is not included in the power consumption. Compared with the 1mA current required by the traditional structure, the power consumption required for input offset calibration is greatly reduced.

[0081] In this way, by disposing the same mirror resistor as that in the normal working circuit at the front end of the offset calibration circuit, the current required for calibration is reduced under the same offset voltage, thereby reducing the power consumption of the offset calibration.

[0082] In the embodiment of the present disclosure, the third switch unit and the fourth switch unit are offset calibration switches of the target circuit.

[0083] In this way, by performing offset calibration through the third switch unit and the fourth switch unit, the circuit maintenance process can be simplified, and the maintenance personnel only need to operate the two switch units to complete the calibration work without complicated circuit adjustment or component replacement.

[0084] In the embodiment of the present disclosure, the fifth switch unit and the sixth switch unit are directional switches of the offset calibration circuit.

[0085] In this way, by controlling the direction of the offset calibration through the fifth switch unit and the sixth switch unit, it is possible to ensure that the offset calibration is performed in a correct direction, thereby improving the accuracy and efficiency of the offset calibration.

[0086] In the disclosed embodiment, the offset calibration circuit further includes: a buffer unit, which is used to ensure that the common mode voltage of the first mirror resistor, the second mirror resistor, the third mirror resistor and the fourth mirror resistor of the offset calibration circuit is the same as that of the normal working circuit.

[0087] In some embodiments, the buffer unit is used to ensure that the common mode voltage of the mirror resistor in the offset calibration circuit is consistent with that of the normal working circuit during the calibration process. The role of the buffer unit in the offset calibration circuit may include:

[0088] 1. Ensure common mode voltage consistency

[0089] 1. Stable performance: The buffer unit can isolate the direct connection between the calibration circuit and the normal working circuit, thereby keeping the common mode voltage of the mirror resistor stable during the calibration process. This helps to reduce the impact of the calibration operation on the performance of the normal working circuit.

[0090] 2. Accurate calibration: By maintaining the consistency of the common-mode voltage, the accuracy and reliability of the measurement during the calibration process can be ensured. It helps to accurately adjust the value of the mirror resistor to achieve the desired circuit performance.

[0091] 2. Improve calibration efficiency

[0092] 1. Simplify the calibration process: The presence of the buffer unit makes the calibration process simpler and more direct. The calibrator only needs to focus on the output and input of the buffer unit without considering its impact on the entire circuit system.

[0093] 2. Fast response: The buffer unit usually has a fast response speed and can reach a stable state in a short time. It helps to shorten the calibration time and improve the calibration efficiency.

[0094] 3. Enhance circuit stability

[0095] 1. Isolation interference: As an isolation element in the circuit, the buffer unit can effectively isolate interference signals from the calibration circuit or other external circuits, which helps to maintain the stability and reliability of the normal working circuit.

[0096] 2. Protective circuit: In some cases, the buffer unit can also play the role of protecting the circuit. For example, during the calibration process, if the calibration voltage is too high or too low, the buffer unit can limit the transmission of these voltages, thereby protecting other components in the circuit from damage.

[0097] 4. Improve circuit performance

[0098] 1. Optimize signal transmission: The buffer unit can optimize the transmission performance of the signal in the circuit. By providing a stable common-mode voltage and low output impedance, the buffer unit can ensure that the signal maintains a high signal-to-noise ratio and low distortion during transmission.

[0099] 2. Enhanced driving capability: In some circuits that require high driving capability, the buffer unit can be used as part of the driving circuit to provide sufficient current and voltage to drive the load, which helps to improve the overall performance of the circuit.

[0100] In this way, by deploying a buffer unit in the offset calibration circuit, it is possible to ensure that the common mode voltage of the mirror resistor in the offset calibration circuit during the calibration process is consistent with that of the normal working circuit, thereby improving the stability of the offset calibration circuit.

[0101] Figure 4 The structure diagram of the offset calibration system is shown, and the offset calibration system is used to control the offset calibration circuit. The offset calibration system is located on an electronic device. The electronic device includes but is not limited to a fixed device and / or a mobile device. For example, the fixed device includes but is not limited to a server, and the server can be a cloud server or an ordinary server. For example, the mobile device includes but is not limited to: a mobile phone, a tablet computer, etc. Figure 4 As shown, the offset calibration system includes: an offset calibration circuit and a logic control module; the offset calibration circuit includes: a third switch unit, a fourth switch unit, a fifth switch unit, a sixth switch unit, a comparator unit, an adjustable compensation unit, and a first mirror resistor, a second mirror resistor, a third mirror resistor, and a fourth mirror resistor deployed at the front end of the offset calibration circuit. When the third switch unit and the fourth switch unit are closed, the first mirror resistor and the third mirror resistor are connected to the negative input end of the comparator unit, and the second mirror resistor and the fourth mirror resistor are connected to the positive input end of the comparator unit; the logic control module is used to control the first compensation parameter and the second compensation parameter of the third switch unit, the fourth switch unit, the fifth switch unit, the sixth switch unit, and the adjustable compensation unit in the above-mentioned offset calibration circuit.

[0102] In this way, by disposing a mirror resistor at the front end of the offset calibration circuit, the current required for calibration is reduced under the same offset voltage, thereby reducing the power consumption of the offset calibration.

[0103] Although the embodiments of the present invention are described in detail above, it is obvious to those skilled in the art that various modifications and variations can be made to these embodiments. However, it should be understood that such modifications and variations are within the scope and spirit of the present invention as described in the claims. Moreover, the present invention described herein may have other embodiments and may be implemented or realized in a variety of ways.

Claims

1. An offset calibration circuit for calibrating an offset voltage input to a high-speed transmitting circuit, characterized in that: The offset calibration circuit comprises: a third switch unit, a fourth switch unit, a fifth switch unit, a sixth switch unit, a comparator unit, an adjustable compensation unit, and a first mirror resistor, a second mirror resistor, a third mirror resistor, and a fourth mirror resistor disposed at the front end of the offset calibration circuit; wherein the first mirror resistor is a mirror resistor of a first resistor in a normal working circuit, the second mirror resistor is a mirror resistor of a second resistor in the normal working circuit, the third mirror resistor is a mirror resistor of a third resistor in the normal working circuit, and the fourth mirror resistor is a mirror resistor of a fourth resistor in the normal working circuit; When the first switch unit and the second switch unit of the normal working circuit are disconnected, and the third switch unit and the fourth switch unit are closed, the offset calibration circuit is turned on, the first mirror resistor and the third mirror resistor are connected to the negative input terminal of the comparator unit, and the second mirror resistor and the fourth mirror resistor are connected to the positive input terminal of the comparator unit; wherein, When the output of the output terminal of the comparator unit is at a low level, the fifth switch unit is closed to connect the first offset calibration branch, and the offset voltage input to the target circuit is calibrated by the first compensation parameter provided by the adjustable compensation unit; When the output of the output terminal of the comparator unit is at a high level, the sixth switch unit is closed to connect the second offset calibration branch, and the offset voltage input to the target circuit is calibrated by the second compensation parameter provided by the adjustable compensation unit.

2. The offset calibration circuit according to claim 1, characterized in that: The fifth switch unit is closed to connect the first offset calibration branch, including: According to the first compensation parameter provided by the adjustable compensation unit, the offset voltage of the target circuit is adjusted until the positive input terminal and the negative input terminal of the comparator unit are equal, and the comparator unit outputs a calibration completion signal.

3. The offset calibration circuit according to claim 1, characterized in that: The sixth switch unit is closed to connect the second offset calibration circuit, including: According to the second compensation parameter provided by the adjustable compensation unit, the offset voltage of the target circuit is adjusted until the positive input terminal and the negative input terminal of the comparator unit are equal, and the comparator unit outputs a calibration completion signal.

4. The offset calibration circuit according to claim 2, characterized in that: The first compensation parameter is a six-bit binary value. The compensation parameter of the adjustable compensation unit is adjusted until the positive input terminal of the comparator unit is equal to the negative input terminal to determine the first compensation parameter; the first compensation parameter is used to compensate the positive input terminal of the comparator to suppress the offset voltage in the target circuit.

5. The offset calibration circuit according to claim 3, characterized in that: The second compensation parameter is a six-bit binary value. The compensation parameter of the adjustable compensation unit is adjusted until the positive input terminal of the comparator unit is equal to the negative input terminal, and the second compensation parameter is determined; the second compensation parameter is used to compensate the negative input terminal of the comparator to suppress the offset voltage in the target circuit.

6. The offset calibration circuit according to claim 1, characterized in that: When the first switch unit and the second switch unit are closed, and the third switch unit and the fourth switch unit are opened, the normal working circuit includes: a first resistor, a second resistor, a third resistor and a fourth resistor; The first mirror resistor, the second mirror resistor, the third mirror resistor and the fourth mirror resistor are disposed at the front end of the offset calibration circuit, wherein the first mirror resistor is a mirror resistor of the first resistor, the second mirror resistor is a mirror resistor of the second resistor, the third mirror resistor is a mirror resistor of the third resistor, and the fourth mirror resistor is a mirror resistor of the fourth resistor.

7. The offset calibration circuit according to claim 1, characterized in that: The third switch unit and the fourth switch unit are control switches of the offset calibration circuit.

8. The offset calibration circuit according to claim 1, characterized in that: The fifth switch unit and the sixth switch unit are direction control switches of the offset calibration circuit.

9. The offset calibration circuit according to any one of claims 1 to 8, characterized in that: The offset calibration circuit further includes: a buffer unit, which is used to ensure that the common mode voltage of the first mirror resistor, the second mirror resistor, the third mirror resistor and the fourth mirror resistor of the offset calibration circuit is the same as that of the normal working circuit.

10. An offset calibration system, characterized in that: Including an offset calibration circuit and a logic control module; The offset calibration circuit comprises: a third switch unit, a fourth switch unit, a fifth switch unit, a sixth switch unit, a comparator unit, an adjustable compensation unit, and a first mirror resistor, a second mirror resistor, a third mirror resistor, and a fourth mirror resistor disposed at the front end of the offset calibration circuit; when the first switch unit and the second switch unit of the normal working circuit are disconnected and the third switch unit and the fourth switch unit are closed, the offset calibration circuit is turned on, the first mirror resistor and the third mirror resistor are connected to the negative input end of the comparator unit, and the second mirror resistor and the fourth mirror resistor are connected to the positive input end of the comparator unit; The logic control module is used to control the first compensation parameter and the second compensation parameter of the third switch unit, the fourth switch unit, the fifth switch unit, the sixth switch unit, and the adjustable compensation unit in the offset calibration circuit according to any one of claims 1 to 9.

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