Quantum chip packaging device, integrated circuit and assembly method

Abstract

The present invention provides a quantum chip packaging device, an integrated circuit, and an assembly method. The quantum chip packaging device includes: a transfer assembly including a first surface and a second surface opposite to each other, the first surface being electrically connected to the quantum chip, and a plurality of second electrical contacts formed on the second surface; a circuit board provided with a plurality of first electrical contacts; a plurality of connectors and a plurality of connection sockets, one end of each connector being inserted into a groove of each connection socket, the other end of each connector protruding from each connection socket being adapted to be electrically connected to one of the first electrical contact and the second electrical contact, and each connection socket being adapted to be electrically connected to the other of the first electrical contact and the second electrical contact; wherein the area where each connector contacts each groove is filled with a conductive filler to increase the electrical contact area between each connector and each groove, thereby reducing contact resistance and thereby reducing heat generation within the quantum chip packaging device.

Description

Technical Field

[0001] The present invention relates to the technical field of quantum chip packaging, and more particularly, to a quantum chip packaging device, an integrated circuit, and an assembly method. Background Art

[0002] The function of quantum chip packaging is to guide the quantum chip's control signals to the quantum chip and transmit the quantum chip's signals outward, acting as a bridge between the external environment and the quantum chip. The quantum chip and printed circuit board are usually connected using bonding wires or flip-chip soldering.

[0003] In the wire bonding method, Figure 1 As shown, the quantum chip and printed circuit board are assembled on a metal base, with the quantum chip located within the printed circuit board. Signals fan out through the edges of the quantum chip, and the number of fan-out ports is limited by the quantum chip's circumference. As the number of bits in superconducting quantum computing chips increases dramatically, the number of ports must also increase accordingly. Therefore, as the number of bits in a quantum chip increases, the increase in the number of ports is even greater, requiring a significant increase in the quantum chip's circumference, which in turn increases its size. However, two factors limit the size of quantum chips: the processing equipment required for the quantum chip and the resonant modes within the packaging structure.

[0004] Therefore, a flip-chip soldering connection method was proposed. Flip-chip soldering utilizes a fan-out method, which can reduce the size of the quantum chip. However, as the number of ports increases, the size of the printed circuit board increases, which makes flip-chip soldering inconvenient. Flip-chip soldering makes it difficult to independently assemble the quantum chip module and printed circuit board. Furthermore, once the quantum chip module and printed circuit board are assembled, it is difficult to replace the quantum chip module or printed circuit board in the event of a failure.

[0005] At present, based on the flip-chip welding method, it has been proposed to realize electrical connection between the quantum chip module and the printed circuit board through a transition component. However, there are contact points between the quantum chip module and the transition component, and between the transition component and the printed circuit board. The contact points will lead to the introduction of excessive contact resistance, which will cause the quantum chip package to heat up when current flows through these contact points. Summary of the Invention

[0006] To solve at least one of the technical problems in the prior art, embodiments of the present invention provide a quantum chip packaging device, an integrated circuit, and an assembly method, which can increase the electrical contact area between each connector and each groove, reduce the contact resistance, and thus reduce the heat generated in the quantum chip packaging device.

[0007] The present invention provides a packaging device for a quantum chip, comprising: a transfer assembly, comprising a first surface and a second surface opposite to each other, the first surface being electrically connected to the quantum chip, and a plurality of second electrical contacts being formed on the second surface; a circuit board, provided with a plurality of first electrical contacts; a plurality of connectors and a plurality of connection sockets, one end of each of the connectors being inserted into a groove of each of the connection sockets, the other end of each of the connectors protruding from each of the connection sockets being adapted to be electrically connected to one of the first electrical contact and the second electrical contact, and each of the connection sockets being adapted to be electrically connected to the other of the first electrical contact and the second electrical contact; wherein the area where each of the connectors contacts each of the grooves is filled with a conductive filler to increase the electrical contact area between each of the connectors and each of the grooves.

[0008] Optionally, the conductive filler is liquid metal.

[0009] Optionally, the adapter assembly includes: a first adapter plate, including the first surface and a third surface opposite to the first surface; a second adapter plate, including the second surface and a fourth surface opposite to the second surface; a plurality of electrical connection materials, electrically connected in an array between the quantum chip and the first surface to fan out the port surface of the quantum chip; wherein the third surface and the fourth surface are connected through the electrical connection material, and the second adapter plate is suitable for transmitting the signal output by the first adapter plate to the connecting member.

[0010] Optionally, the size of the second adapter plate is larger than that of the first adapter plate.

[0011] Optionally, the connecting member is configured as a cylinder or a cone.

[0012] Optionally, in the case where the above-mentioned connecting member is a cone, the cone bottoms of the multiple above-mentioned connecting members are electrically connected to the above-mentioned second surface in an array, the cone tops of the multiple above-mentioned connecting members are respectively arranged in the grooves of the multiple above-mentioned connecting seats, and the space formed between the above-mentioned cone tops and the above-mentioned grooves is filled with the above-mentioned conductive filler.

[0013] Optionally, in the case where the connecting member is a column, the diameter of the groove is set to 0.4 mm to 0.8 mm, and the diameter of the portion of the connecting member inserted into the groove is set to 0.2 mm to 0.6 mm.

[0014] Optionally, the connecting member and the connecting seat are both made of non-magnetic material, and the magnetism of the non-magnetic material is less than 10nT.

[0015] According to another aspect of the present invention, there is also provided an integrated circuit of a quantum chip, comprising: a quantum chip; a packaging device for the quantum chip, electrically connected to the quantum chip; and a support plate disposed at the bottom of the packaging device for the quantum chip, the support plate being adapted to transfer heat generated within the packaging device for the quantum chip to the outside.

[0016] According to another aspect of the present invention, a method for assembling a packaging device for the quantum chip is provided, comprising: for each connector among a plurality of connectors and each connector among a plurality of connector seats, connecting the connector and one of the connector seats to a second electrical contact on the second surface of the adapter assembly; electrically connecting the quantum chip to the first surface of the adapter assembly; electrically connecting the connector seat and another of the connectors to a first electrical contact on the circuit board; filling the grooves of the connector seats with conductive fillers respectively; aligning the connectors with the grooves of the connector seats respectively, and inserting them into the grooves, thereby obtaining a packaging device for the quantum chip.

[0017] According to an embodiment of the present invention, a quantum chip packaging device, an integrated circuit and an assembly method, the adapter component includes a first surface and a second surface relative to each other, the first surface is electrically connected to the quantum chip, a plurality of second electrical contacts are formed on the second surface, a plurality of first electrical contacts are provided on the circuit board, a plurality of connectors and a plurality of connector seats, one end of each connector is inserted into a groove of each connector seat, the other end of each connector protruding from each connector seat is suitable for electrically connecting to one of the first electrical contact and the second electrical contact, each connector seat is suitable for electrically connecting to the other of the first electrical contact and the second electrical contact, and the area where each connector contacts each groove is filled with a conductive filler to increase the electrical contact area between each connector and each groove, reduce the contact resistance, and thus reduce the heat generated in the packaging device of the quantum chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The above and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:

[0019] Figure 1 This is a cross-sectional diagram of the edge fan-out of a quantum chip in the prior art;

[0020] Figure 2 It is a cross-sectional view of the ideal contact between the transition assembly and the connected module;

[0021] Figure 3 It is a cross-sectional view of the actual contact between the transition assembly and the connected module;

[0022] Figure 4 is a cross-sectional view of a quantum chip packaging device and an integrated circuit according to an embodiment of the present invention;

[0023] Figure 5 is a cross-sectional view of a quantum chip packaging device and an integrated circuit according to another embodiment of the present invention;

[0024] Figure 6 is a cross-sectional view of signal connections of a quantum chip packaging device according to an embodiment of the present invention;

[0025] Figure 7 is a cross-sectional view of a quantum chip packaging device and an integrated circuit according to yet another embodiment of the present invention;

[0026] Figure 8 The figure is a flow chart of a method for assembling a packaging device for a quantum chip according to an embodiment of the present invention.

[0027] In the drawings, the meanings of the reference numerals are as follows:

[0028] 1. Quantum chips;

[0029] 100. Printed circuit boards;

[0030] 200, metal base;

[0031] 300, lead;

[0032] 400, transition component;

[0033] 500, concave and convex features;

[0034] 2. Electrical connection materials;

[0035] 3. Connectors;

[0036] 4. Connecting seat;

[0037] 5. First adapter plate;

[0038] 6. Second adapter plate;

[0039] 7. Circuit board;

[0040] 8. Conductive filler;

[0041] 9. Fixing parts;

[0042] 10. Support plate;

[0043] A. First side;

[0044] B. Second side;

[0045] C. Third side;

[0046] D. The fourth side. DETAILED DESCRIPTION

[0047] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the present invention. In the following detailed description, for ease of explanation, many specific details are set forth to provide a comprehensive understanding of embodiments of the present invention. However, it is apparent that one or more embodiments may also be implemented without these specific details. In addition, in the following description, descriptions of known structures and technologies are omitted to avoid unnecessary confusion of the concept of the present invention.

[0048] The terms used herein are only for describing specific embodiments and are not intended to limit the present invention. The terms "comprise", "include", etc. used herein indicate the presence of the features, steps, operations and / or components, but do not exclude the presence or addition of one or more other features, steps, operations or components.

[0049] All terms used herein (including technical and scientific terms) have the meanings commonly understood by those skilled in the art unless otherwise defined. It should be noted that the terms used herein should be interpreted as having a meaning consistent with the context of this specification and should not be interpreted in an idealized or overly rigid manner.

[0050] When expressions such as “at least one of A, B, and C, etc.” are used, they should generally be interpreted in accordance with the meaning commonly understood by those skilled in the art (for example, “a system having at least one of A, B, and C” should include but is not limited to systems having A alone, B alone, C alone, A and B, A and C, B and C, and / or A, B, and C, etc.). When expressions such as “at least one of A, B, or C, etc.” are used, they should generally be interpreted in accordance with the meaning commonly understood by those skilled in the art (for example, “a system having at least one of A, B, or C” should include but is not limited to systems having A alone, B alone, C alone, A and B, A and C, B and C, and / or A, B, and C, etc.).

[0051] Figure 1 It is a cross-sectional view of the edge fan-out of the quantum chip 1 in the prior art.

[0052] In the wire bonding method, Figure 1As shown, the quantum chip 1 and printed circuit board 100 are assembled on a metal base 200, with the printed circuit board 100 positioned around the periphery of the quantum chip 1. The quantum chip 1 and printed circuit board 100 are electrically connected by wires 300, typically thin metal wires, such as aluminum or gold wires with a diameter of 25μm. Signals fan out through the edges of the quantum chip 1, and the number of fan-out ports is limited by the circumference of the quantum chip 1. As the number of bits in superconducting quantum computing chips increases dramatically, the number of ports must also increase accordingly. In current chip designs, the ratio of the number of ports to the number of bits is generally approximately 3:1. Therefore, as the number of bits in the quantum chip 1 increases, the number of ports increases even more, requiring a significant increase in the circumference of the quantum chip 1, which in turn increases its size. However, two factors limit the size of the quantum chip 1: one is the processing equipment required for the quantum chip 1. Some processing equipment is not compatible with processing large samples, or the process stability and uniformity are poor, resulting in the performance of the processed quantum chip 1 not meeting the requirements. Second, there are resonant modes within the packaging structure. There are two resonant modes within the packaging structure: spatial resonance and parasitic capacitance and inductance resonance. These resonances can increase crosstalk between different circuits and introduce some stray signals within the operating frequency band of the quantum chip 1. This greatly complicates the calibration of the quantum chip 1 and may even cause the quantum chip 1 to fail to operate.

[0053] Therefore, a flip-chip soldering connection method was proposed. However, flip-chip soldering makes it difficult to independently assemble the quantum chip module and the printed circuit board. Moreover, once the quantum chip module and the printed circuit board are assembled, it is difficult to replace the quantum chip module or printed circuit board if a fault occurs.

[0054] At present, based on the flip-chip welding method, it has been proposed to realize electrical connection between the quantum chip module and the printed circuit board through a transition component. However, there are contact points between the quantum chip module and the transition component, and between the transition component and the printed circuit board. The contact points will lead to the introduction of excessive contact resistance, which will cause the quantum chip package to heat up when current flows through these contact points.

[0055] Figure 2 This is a cross-sectional view of the ideal contact between the transition assembly 400 and the connected module. Figure 3 It is a cross-sectional view showing the actual contact between the transition assembly 400 and the connected module.

[0056] In an ideal situation, if Figure 2 As shown, the contact between the quantum chip module and the transition component 400, and between the transition component 400 and the printed circuit board 100 (the quantum chip module and the printed circuit board 100 are collectively referred to as the connected module) is surface contact. In actual situations, Figure 3As shown, since the contact surface is not an ideal plane and has undulating concave and convex features 500, the contact position is generally point contact, and it is difficult to achieve surface contact. This results in the contact resistance in actual conditions being much larger than that in ideal conditions. For superconducting quantum chips that need to operate at extremely low temperatures (5mK-30mK), the cooling power of the refrigeration equipment at extremely low temperatures is very small. Figure 3 The point contact shown has a large contact resistance. When current flows through, it will generate a lot of heat, causing the temperature of the extremely low temperature environment to rise, which in turn causes the quantum chip to malfunction.

[0057] In order to solve the problem of excessive contact resistance, according to the inventive concept of one aspect of the present invention, the adapter assembly of the present invention includes a first surface and a second surface relative to each other, the first surface is electrically connected to the quantum chip, and a plurality of second electrical contacts are formed on the second surface. A plurality of first electrical contacts, a plurality of connectors and a plurality of connector seats are provided on the circuit board, one end of each connector is inserted into the groove of each connector seat, and the other end of each connector protruding from each connector seat is suitable for electrically connecting to one of the first electrical contact and the second electrical contact, and each connector seat is suitable for electrically connecting to the other of the first electrical contact and the second electrical contact. The area where each connector contacts each groove is filled with a conductive filler to increase the electrical contact area between each connector and each groove, thereby reducing the contact resistance and thus reducing the heat generated in the packaging device of the quantum chip.

[0058] Figure 4 4 is a cross-sectional view of a quantum chip packaging device and an integrated circuit according to an embodiment of the present invention.

[0059] According to one embodiment of the present invention, Figure 4 As shown, a packaging device for a quantum chip includes a transfer assembly, a circuit board 7, a plurality of connectors 3, and a plurality of connection bases 4. The transfer assembly includes a first surface A and a second surface B opposite to each other, and the first surface A is electrically connected to the quantum chip 1. The circuit board 7 is provided with a plurality of first electrical contacts. One end of each connector 3 is inserted into the groove of each connection base 4, and the other end of each connector 3 protruding from each connection base 4 is suitable for electrically connecting to the second electrical contact formed on the second surface B, and each connection base 4 is suitable for electrically connecting to the first electrical contact. The area where each connector 3 contacts each groove is filled with a conductive filler 8 to increase the electrical contact area between each connector 3 and each groove.

[0060] According to one embodiment of the present invention, the other ends of the multiple connectors 3 protruding from the multiple connecting seats 4 can be electrically connected in an array to the multiple second electrical contacts formed on the second surface B, and the multiple connecting seats 4 can be electrically connected in an array to the multiple first electrical contacts.

[0061] Figure 54 is a cross-sectional view of a quantum chip packaging device and an integrated circuit according to another embodiment of the present invention.

[0062] According to an alternative embodiment of the present invention, Figure 5 As shown, a packaging device for a quantum chip includes a transfer assembly, a circuit board 7, a plurality of connectors 3, and a plurality of connection bases 4. The transfer assembly includes a first surface A and a second surface B opposite to each other, and the first surface A is electrically connected to the quantum chip 1. The circuit board 7 is provided with a plurality of first electrical contacts. One end of each connector 3 is inserted into the groove of each connection base 4, and the other end of each connector 3 protruding from each connection base 4 is suitable for electrically connecting to the first electrical contact, and each connection base 4 is suitable for electrically connecting to the second electrical contact. The area where each connector 3 contacts each groove is filled with a conductive filler 8 to increase the electrical contact area between each connector 3 and each groove.

[0063] According to one embodiment of the present invention, the other ends of the multiple connectors 3 protruding from the multiple connecting seats 4 can be electrically connected to the multiple first electrical contacts in an array, and the multiple connecting seats 4 can be electrically connected to the multiple second electrical contacts in an array.

[0064] According to an embodiment of the present invention, the circuit board 7 may be a printed circuit board.

[0065] According to an embodiment of the present invention, the connector 3 may be a columnar pin, and the connector seat 4 may be a needle seat. The connector 3 and the connector seat 4 may serve as transition components of the packaging device of the quantum chip 1 .

[0066] According to an embodiment of the present invention, the setting of the transition component allows the structures of each layer of the quantum chip 1, the adapter component and the circuit board 7 to be connected without considering the influence of the temperature and process of the upper layer structure, so as to achieve decoupling between the quantum chip 1, the adapter component and the circuit board 7, reduce the mutual influence between the structures of each layer, and ensure stable signal transmission.

[0067] According to an embodiment of the present invention, a plurality of connectors 3 are electrically connected in an array to a plurality of second electrical contacts formed on the second surface B (see FIG. Figure 4 ) or a plurality of first electrical contacts (see Figure 5 ). The soldering material is tin-silver-copper alloy or tin-lead alloy.

[0068] According to an embodiment of the present invention, Figure 4 and Figure 5As shown, when the connector 3 is a cylindrical pin and the connector base 4 is a needle holder, in actual use, the pin diameter is relatively small. If the pin is damaged, repairing or replacing the pin will be difficult due to the fragility of the quantum chip 1 and the first adapter plate 5 of the adapter assembly (the first adapter plate 5 is described in detail below). However, the needle holder has a larger diameter relative to the pin and is less susceptible to damage. Therefore, the positions of the pins and needle holder can be interchanged, and multiple pins (connectors 3) are electrically connected in an array to multiple first electrical contacts on the circuit board 7, while multiple needle holders (connector base 4) are electrically connected in an array to multiple second electrical contacts formed on the second surface B. In the event of a fault in the circuit board 7 or a component in the adapter assembly, the pins can be separated from the circuit board 7 and the component in the circuit board 7 or adapter assembly can be replaced. This avoids the situation where a component in the quantum chip 1 packaging device cannot be repaired and needs to be replaced entirely.

[0069] According to an embodiment of the present invention, the adapter assembly includes a first surface A and a second surface B relative to each other, the first surface A is electrically connected to the quantum chip 1, a plurality of second electrical contacts are formed on the second surface B, a plurality of first electrical contacts are provided on the circuit board 7, one end of each connector 3 is inserted into the groove of each connector seat 4, and the other end of each connector 3 protruding from each connector seat 4 is suitable for electrically connecting to one of the first electrical contact and the second electrical contact, and each connector seat 4 is suitable for electrically connecting to the other of the first electrical contact and the second electrical contact. The area where each connector 3 contacts each groove is filled with a conductive filler 8 to increase the electrical contact area between each connector 3 and each groove, thereby reducing the contact resistance and thereby reducing the heat generation in the packaging device of the quantum chip 1, which can meet the fan-out requirements of large-scale quantum bits.

[0070] According to an embodiment of the present invention, the conductive filler 8 is liquid metal.

[0071] According to an embodiment of the present invention, when the conductive filler 8 is liquid metal, the conductive filler 8 is filled by injection or using a dispensing device, and the liquid metal can be gallium or gallium-indium alloy.

[0072] According to an embodiment of the present invention, the conductive filler 8 may also be a granular soft metal. The granular soft metal is placed in the groove and heated to change the granular state into a liquid state. The soft metal may be indium metal.

[0073] According to an embodiment of the present invention, the area where each connector 3 contacts each groove is filled with a conductive filler 8 to increase the electrical contact area between each connector 3 and each groove, thereby reducing the contact resistance and thereby reducing the heat generated in the packaging device of the quantum chip 1.

[0074] According to an embodiment of the present invention, Figure 4 and Figure 5 As shown, the adapter assembly includes a first adapter plate 5, a second adapter plate 6, and a plurality of electrical connection materials 2. The first adapter plate 5 includes a first surface A and a third surface C opposite the first surface A. The second adapter plate 6 includes a second surface B and a fourth surface D opposite the second surface B. The plurality of electrical connection materials 2 are electrically connected in an array between the quantum chip 1 and the first surface A to fan out the port surface of the quantum chip 1. The third surface C and the fourth surface D are connected by the electrical connection material 2. The second adapter plate 6 is adapted to transmit the signal output by the first adapter plate 5 to the connector 3.

[0075] According to an embodiment of the present invention, the first adapter plate 5 and the second adapter plate 6 are both insulating plates, and arrays of electrical contacts are evenly arranged on the upper and lower surfaces of the first adapter plate 5 and the second adapter plate 6. One end of the electrical connection material 2 electrically connected between the quantum chip 1 and the first surface A is electrically connected in an array to the electrical contacts on the surface of the quantum chip 1, and the other end is electrically connected in an array to the electrical contacts on the first surface A of the first adapter plate 5, thereby enabling signal transmission between the quantum chip 1 and the first adapter plate 5. One end of the electrical connection material 2 electrically connected between the third surface C and the fourth surface D is electrically connected in an array to the electrical contacts on the third surface C of the first adapter plate 5, and the other end is electrically connected in an array to the electrical contacts on the fourth surface D of the second adapter plate 6, thereby enabling signal transmission between the first adapter plate 5 and the second adapter plate 6. Signal transmission between the second adapter board 6 and the circuit board 7 is achieved through connectors 3 and connector sockets 4. One end of each connector 3 is inserted into a groove in each connector socket 4, and the other end of each connector 3, which protrudes from each connector socket 4, is adapted to be electrically connected to the first electrical contact and one of the second electrical contacts formed on the second surface. Each connector socket 4 is adapted to be electrically connected to the other of the first and second electrical contacts. The electrical contacts on the first surface A and the third surface C of the first adapter board 5 are connected via wiring on the first adapter board 5, and the electrical contacts on the second surface B and the fourth surface D of the second adapter board 6 are connected via wiring on the second adapter board 6.

[0076] According to an embodiment of the present invention, the ports of the quantum chip 1 are electrically connected to the first adapter plate 5 using the electrical connection material 2 in a port-face fan-out manner to enable signal transmission between the quantum chip 1 and the first adapter plate 5. The ports include, but are not limited to, signal output ports, signal input ports, power ports, and ground ports. Similarly, the first adapter plate 5 is electrically connected to the second adapter plate 6 using the electrical connection material 2 in a port-face fan-out manner to enable signal transmission between the first adapter plate 5 and the second adapter plate 6.

[0077] According to an embodiment of the present invention, the electrical connection material 2 is a conductor material. The electrical connection material 2 electrically connected between the quantum chip 1 and the first surface A of the first adapter plate 5 can be selected from indium metal; the electrical connection material 2 electrically connected between the third surface C of the first adapter plate 5 and the fourth surface D of the second adapter plate 6 can be selected from indium or indium tin alloy. For example, the electrical connection is achieved by using solder balls.

[0078] Figure 6 1 is a cross-sectional view of signal connections of a packaging device of a quantum chip 1 according to an embodiment of the present invention.

[0079] According to an embodiment of the present invention, the multiple electrical contacts provided on two opposite surfaces of the first adapter board 5 are electrically connected via multiple surface wirings; the multiple electrical contacts provided on two opposite surfaces of the second adapter board 6 are electrically connected via multiple surface wirings. In another embodiment, the multiple electrical contacts provided on two opposite surfaces of the first adapter board 5 are electrically connected via multiple conductive vias; the multiple electrical contacts provided on two opposite surfaces of the second adapter board 6 are electrically connected via multiple conductive vias. In another embodiment, the multiple electrical contacts provided on two opposite surfaces of the first adapter board 5 are electrically connected via a mixture of multiple surface wirings and multiple conductive vias; the multiple electrical contacts provided on two opposite surfaces of the second adapter board 6 are electrically connected via a mixture of multiple surface wirings and multiple conductive vias.

[0080] According to an embodiment of the present invention, the electrical connection material 2 electrically connected between the quantum chip 1 and the first surface A and the electrical connection material 2 electrically connected between the third surface C and the fourth surface D both provide two connection functions, one is signal connection and the other is ground connection, and the signal connection and the ground connection are arranged alternately.

[0081] According to an embodiment of the present invention, Figure 6 As shown, the signal connection is one-to-one corresponding, and can be a correspondence between the top and the bottom, that is, the electrical connection material 2 as a signal connection function between the quantum chip 1 and the first surface A can be connected in a one-to-one correspondence with the electrical connection material 2 as a signal connection function between the third surface C and the fourth surface D, and the number of electrical connection materials 2 as a signal connection function between the quantum chip 1 and the first surface A is equal to the number of electrical connection materials 2 as a signal connection function between the third surface C and the fourth surface D. In other embodiments, the electrical connection material 2 as a signal connection function between the quantum chip 1 and the first surface A can also be connected to the electrical connection material 2 as a signal connection function between the third surface C and the fourth surface D without corresponding connection between the top and the bottom. As shown in FIG. Figure 6As shown, the electrical connection material 2 between the quantum chip 1 and the first surface A as a ground connection function can be connected one-to-one with the electrical connection material 2 between the third surface C and the fourth surface D as a ground connection function, but it is not limited to this. In other embodiments, the ground connection does not necessarily have to be as follows. Figure 6 The one-to-one connection shown is not necessarily the same as the number of electrical connection materials 2 between the quantum chip 1 and the first surface A serving as a ground connection and the number of electrical connection materials 2 between the third surface C and the fourth surface D serving as a ground connection.

[0082] According to an embodiment of the present invention, Figure 6 As shown, the signal connection is one-to-one corresponding, which can be the correspondence between the top and the bottom, that is, the electrical connection material 2 between the third surface C and the fourth surface D as the signal connection function can be connected one-to-one with the connector 3 as the signal connection function, and the number of the electrical connection materials 2 between the third surface C and the fourth surface D as the signal connection function is equal to the number of the connectors 3 as the signal connection function. In other embodiments, the electrical connection material 2 between the third surface C and the fourth surface D as the signal connection function can also be connected to the connector 3 as the signal connection function in a non-corresponding manner between the top and the bottom. Figure 6 As shown, the electrical connection material 2 between the third surface C and the fourth surface D as the ground connection function can be connected to the connector 3 as the ground connection function in a one-to-one correspondence, but is not limited to this. In other embodiments, the ground connection does not necessarily have to be as shown. Figure 6 The one-to-one connection shown and the number of the electrical connection materials 2 between the third surface C and the fourth surface D as the ground connection function and the number of the connectors 3 as the ground connection function are not necessarily equal.

[0083] According to an embodiment of the present invention, the size of the second riser board 6 is larger than that of the first riser board 5 .

[0084] According to an embodiment of the present invention, the first adapter plate 5 is used in conjunction with the quantum chip 1. Therefore, the size of the first adapter plate 5 is limited by the number of ports and wiring requirements of the quantum chip 1. The size of the second adapter plate 6 is larger than the first adapter plate 5 to better connect the adapter assembly and the connector 3. The size of the second adapter plate 6 needs to adapt to the number of connectors 3 or connector sockets 4.

[0085] According to an embodiment of the present invention, the thermal expansion coefficient of the second adapter plate 6 is greater than the thermal expansion coefficient of the first adapter plate 5 and smaller than the thermal expansion coefficient of the circuit board 7, which can achieve a better thermal matching effect between the adapter assembly and the circuit board 7. At the same time, the structural strength of the second adapter plate 6 is higher.

[0086] According to an embodiment of the present invention, the adapter assembly also includes a fixing member 9, an opening is provided in the middle of the fixing member 9, and the fixing member 9 is arranged at the edge of the fourth surface D of the second adapter plate 6 to apply pressure to the second adapter plate 6, so that the connecting member 3 inserted into the groove can fit tightly with the inner wall of the groove.

[0087] According to an embodiment of the present invention, the fixing member 9 is made of a non-magnetic material having a magnetic property of less than 10 nT. The use of the non-magnetic material can avoid affecting the performance of the superconducting quantum bit.

[0088] According to an embodiment of the present invention, the connecting member 3 is configured as a cylinder or a cone.

[0089] Figure 7 FIG. 4 is a cross-sectional view of a packaging device and an integrated circuit of a quantum chip 1 according to another embodiment of the present invention.

[0090] According to an embodiment of the present invention, Figure 7 As shown, in the case where the connector 3 is a cone, the cone bottoms of multiple connectors 3 are electrically connected in an array on the second surface B, the cone tops of multiple connectors 3 are respectively arranged in the grooves of multiple connecting seats 4, and the space formed between the cone tops and the grooves is filled with conductive filler 8.

[0091] According to an embodiment of the present invention, selecting a conical connecting member 3 can reduce the vulnerability of the connecting member 3 .

[0092] According to an embodiment of the present invention, Figure 4 and Figure 5 As shown, in the case where the connecting member 3 is a column, the diameter of the groove is set to 0.4 mm to 0.8 mm, and the diameter of the portion of the connecting member 3 inserted into the groove is set to 0.2 mm to 0.6 mm.

[0093] According to an embodiment of the present invention, the connecting member 3 and the connecting seat 4 are both made of non-magnetic material, and the magnetic properties of the non-magnetic material are less than 10nT.

[0094] According to an embodiment of the present invention, the use of non-magnetic materials can avoid affecting the performance of superconducting quantum bits.

[0095] According to another embodiment of the present invention, Figure 4 、 Figure 5 and Figure 7 As shown, an integrated circuit based on a quantum chip 1 is provided, comprising the quantum chip 1, a packaging device for the quantum chip 1 according to the above-described embodiment, and a support plate 10. The packaging device for the quantum chip 1 is electrically connected to the quantum chip 1. The support plate 10 is disposed at the bottom of the packaging device for the quantum chip 1 and is adapted to transfer heat generated within the packaging device for the quantum chip 1 to the outside.

[0096] According to an embodiment of the present invention, the material for making the support plate 10 can be metal. The support plate 10 can support the packaging device of the quantum chip 1 and dissipate heat for the packaging device of the quantum chip 1 .

[0097] Figure 8 FIG. 1 is a flow chart of a method for assembling a packaging device for a quantum chip 1 according to an embodiment of the present invention.

[0098] According to another embodiment of the present invention, Figure 8 As shown, a method for assembling a packaging device for a quantum chip 1 includes the following steps S1 to S5.

[0099] Step S1: For each connector 3 among the plurality of connectors 3 and each connector socket 4 among the plurality of connector sockets 4 , connect one of the connector 3 and the connector socket 4 to the second electrical contact of the second surface B of the adapter assembly.

[0100] Step S2: electrically connecting the quantum chip 1 and the first surface A of the adapter component.

[0101] Step S3 : electrically connecting the connecting base 4 and the other one of the connecting members 3 to the first electrical contact of the circuit board 7 .

[0102] Step S4: Fill the grooves of the connection base 4 with conductive fillers 8 respectively.

[0103] Step S5: Align the connectors 3 with the grooves of the connector base 4 respectively, and insert them into the grooves, thereby obtaining a packaging device for the quantum chip.

[0104] According to an embodiment of the present invention, if the Figure 4 The packaging device of the quantum chip 1 shown first implants a plurality of spherical electrical connection materials 2 on the third surface C of the first adapter plate 5, welds a plurality of connectors 3 on the second surface B of the second adapter plate 6, uses a plurality of electrical connection materials 2 to connect the first surface A of the first adapter plate 5 to the quantum chip 1, and then connects the third surface C to the fourth surface D of the second adapter plate 6 by welding, fixes the circuit board 7 on the support plate 10 by welding or screw fastening, and welds a plurality of connection bases 4 on the circuit board 7, fills the conductive fillers 8 into the grooves of the plurality of connection bases 4 respectively, aligns the plurality of connectors 3 with the grooves of the plurality of connection bases 4 respectively, and inserts them into the grooves, and sets the fixing member 9 at the edge on the fourth surface D to complete the assembly.

[0105] According to an embodiment of the present invention, if the Figure 5The packaging device of the quantum chip 1 shown first implants a plurality of spherical electrical connection materials 2 on the third surface C of the first adapter plate 5, welds a plurality of connection seats 4 on the second surface B of the second adapter plate 6, uses a plurality of electrical connection materials 2 to connect the first surface A of the first adapter plate 5 to the quantum chip 1, and then connects the third surface C to the fourth surface D of the second adapter plate 6 by welding, fixes the circuit board 7 on the support plate 10 by welding or screw fastening, and welds a plurality of connectors 3 on the circuit board 7, fills the conductive fillers 8 into the grooves of the plurality of connection seats 4 respectively, aligns the plurality of connectors 3 with the grooves of the plurality of connection seats 4 respectively, and inserts them into the grooves, and sets the fixing member 9 at the edge on the fourth surface D to complete the assembly.

[0106] According to an embodiment of the present invention, the assembly process between the quantum chip 1, the first adapter plate 5, and the second adapter plate 6 is independent of the assembly process between the circuit board 7 and the support plate 10, preventing them from interfering with each other. Furthermore, the packaging device of the quantum chip 1, the circuit board 7, and the support member 10 can be placed integrally in the dilution refrigerator system, reducing the need for disassembly and assembly between the cryogenic circuitry and the circuit board 7 and improving the reliability of the cryogenic transmission system.

[0107] The above describes embodiments of the present invention. However, these embodiments are for illustrative purposes only and are not intended to limit the scope of the present invention. Although each embodiment has been described separately above, this does not mean that the measures in each embodiment cannot be advantageously used in combination. The scope of the present invention is defined by the appended claims and their equivalents. Without departing from the scope of the present invention, those skilled in the art may make various substitutions and modifications, which are intended to fall within the scope of the present invention.

Claims

1. A quantum chip packaging device, characterized in that: include: The adapter assembly includes a first surface and a second surface opposite to each other, wherein the first surface is electrically connected to the quantum chip, and a plurality of second electrical contacts are formed on the second surface; A circuit board having a plurality of first electrical contacts; a plurality of connectors and a plurality of connector bases, wherein one end of each connector is inserted into a groove of each connector base, the other end of each connector protruding from each connector base is adapted to be electrically connected to one of the first electrical contact and the second electrical contact, and each connector base is adapted to be electrically connected to the other of the first electrical contact and the second electrical contact; The area where each of the connectors contacts each of the grooves is filled with a conductive filler to increase the electrical contact area between each of the connectors and each of the grooves.

2. The quantum chip packaging device according to claim 1, characterized in that: The conductive filler is liquid metal.

3. The quantum chip packaging device according to claim 1, characterized in that: The adapter assembly includes: a first adapter plate, comprising the first surface and a third surface opposite to the first surface; a second adapter plate, comprising the second surface and a fourth surface opposite to the second surface; a plurality of electrical connection materials electrically connected in an array between the quantum chip and the first surface to fan out the port surface of the quantum chip; The third surface and the fourth surface are connected via the electrical connection material, and the second adapter board is adapted to transmit the signal output by the first adapter board to the connector.

4. The quantum chip packaging device according to claim 3, characterized in that: The size of the second adapter plate is larger than that of the first adapter plate.

5. The quantum chip packaging device according to claim 2, characterized in that: The connecting element is configured as a cylinder or a cone.

6. The quantum chip packaging device according to claim 5, characterized in that: In the case where the connecting member is a cone, the cone bases of the multiple connecting members are electrically connected to the second surface in an array, the cone tops of the multiple connecting members are respectively arranged in the grooves of the multiple connecting seats, and the space formed between the cone tops and the grooves is filled with the conductive filler.

7. The quantum chip packaging device according to claim 5, characterized in that: In the case where the connecting member is a column, the diameter of the groove is set to 0.4 mm to 0.8 mm, and the diameter of the portion of the connecting member inserted into the groove is set to 0.2 mm to 0.6 mm.

8. The quantum chip packaging device according to claim 4, characterized in that: The connecting piece and the connecting seat are both made of non-magnetic material, and the magnetism of the non-magnetic material is less than 10nT.

9. An integrated circuit of a quantum chip, characterized in that: include: quantum chips; The quantum chip packaging device according to any one of claims 1 to 8, electrically connected to the quantum chip; A support plate is arranged at the bottom of the quantum chip packaging device, and the support plate is suitable for transferring heat generated in the quantum chip packaging device to the outside.

10. A method for assembling a packaging device for a quantum chip according to any one of claims 1 to 8, characterized in that: include: For each of the plurality of connectors and each of the plurality of connector sockets, connecting the connector and one of the connector sockets to a second electrical contact on the second surface of the adapter assembly; electrically connecting the quantum chip and the first surface of the adapter assembly; electrically connecting the connecting base and the other of the connecting member to the first electrical contact of the circuit board; Filling the conductive fillers into the grooves of the connection base respectively; The connecting members are respectively aligned with the grooves of the connecting base and inserted into the grooves, thereby obtaining a packaging device for the quantum chip.

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