Finite element mesh unit CPU parallel coloring grouping method, device and equipment

Abstract

The present invention relates to the field of electronic technology, and discloses a finite element mesh unit CPU parallel coloring grouping method, device and equipment. The method determines multiple first unit groups based on at least one associated unit associated with each unit, each first unit group includes at least two first target units, different first target units in the same first unit group are mutually associated, and different first target units in the same first unit group correspond to the same thread. The multiple first unit groups are determined based on at least one associated unit associated with each unit, and there is an association relationship between different units in the first unit group and they belong to the same thread. The unit coloring core function is called, and the unit grouping parallel algorithm is executed to color the first target units in each first unit group, and the unit coloring grouping is efficiently realized in parallel. Compared with the previous serial algorithm, the grouping time when the number of units is large is greatly saved, and the unit grouping coloring efficiency is improved.

Description

Technical Field

[0001] The present invention relates to the field of electronic technology, and in particular to a finite element grid unit CPU parallel coloring grouping method, device and equipment. Background Art

[0002] The finite element method is a numerical analysis method widely used in the engineering field, which can effectively solve the mechanical response problems of complex structures. With the continuous increase in the scale of engineering, the traditional finite element serial calculation can no longer meet the demand for calculation efficiency. The parallel computing power of computers can significantly improve the efficiency of finite element calculation.

[0003] In finite element parallel calculation, the parallel assembly of the overall stiffness matrix is ​​a key step in the calculation process. If the units calculated by different threads at the same time are adjacent at a certain moment, that is, there are common nodes, then there is a high probability that data read and write conflicts will occur when the unit stiffness matrix is ​​assembled into the overall stiffness matrix. In order to ensure that there is no conflict between threads when the overall stiffness matrix is ​​assembled in parallel, the grid units are usually quickly colored and grouped so that any two adjacent units have different colors, and all units of the same color are not adjacent to each other. In this way, calculations can be performed according to color groups during subsequent parallel grouping, ensuring that different threads access different positions of the overall stiffness matrix, preventing potential data conflicts, and improving the parallelism of the overall stiffness matrix assembly process.

[0004] Finite element element coloring grouping is a preprocessing step for the subsequent parallel assembly of the overall stiffness matrix, and this step is generally performed on the CPU. Previous studies on element coloring algorithms have mostly focused on serial algorithms, ignoring the fact that as the element size gradually increases, the time cost of element grouping also gradually increases. Summary of the invention

[0005] In view of this, the present invention provides a finite element mesh unit CPU parallel coloring grouping method, device and equipment to solve the problem of high time cost of unit coloring through serial algorithm in the related art.

[0006] In the first aspect, the present invention provides a finite element mesh unit CPU parallel coloring grouping method, the method comprising: obtaining a target linked list of a to-be-grouped coloring structure, the to-be-grouped coloring structure comprising a plurality of units and a plurality of nodes, the target linked list being used to characterize unit information associated with each node; determining a thread of each unit based on a plurality of threads and a plurality of units participating in parallel computing; determining at least one associated unit associated with each unit based on unit information associated with each node; determining a plurality of first unit groups based on at least one associated unit associated with each unit, each first unit group comprising at least two first target units, different first target units within the same first unit group being associated with each other, and corresponding threads of different first target units within the same first unit group being the same; calling a unit coloring core function, executing a unit grouping parallel algorithm, coloring the first target units in each first unit group, and obtaining a first coloring grouping result.

[0007] The finite element mesh unit CPU parallel coloring grouping method provided by the present invention determines the thread of each unit based on multiple threads and multiple units involved in parallel calculation; determines at least one associated unit associated with each unit based on unit information associated with each node; determines multiple first unit groups based on at least one associated unit associated with each unit, each first unit group includes at least two first target units, different first target units in the same first unit group are mutually associated, and different first target units in the same first unit group have the same corresponding threads; calls the unit coloring core function, executes the unit grouping parallel algorithm, and colors the first target units in each first unit group to obtain the first coloring grouping result. The method provided by the present invention determines multiple first unit groups based on at least one associated unit associated with each unit, different units in the first unit group have an association relationship and belong to the same thread, calls the unit coloring core function, executes the unit grouping parallel algorithm, colors the first target units in each first unit group, and obtains the first coloring grouping result, and efficiently realizes unit coloring grouping in parallel. Compared with the previous serial algorithm, this parallel algorithm can greatly save the grouping time when the number of units is large, and improves the grouping coloring efficiency of the units.

[0008] In an optional embodiment, the step of obtaining a target linked list of the structure to be grouped and dyed includes: obtaining topological data of the structure to be grouped and dyed, the topological data being used to characterize the association between units and nodes; establishing an array of derived data types containing pointers based on the topological data of the structure to be grouped and dyed, the dimension of the array of derived data types containing pointers being equal to the number of multiple nodes; and constructing the target linked list using the array of derived data types.

[0009] The method provided in this optional implementation manner facilitates the extraction of unit information associated with each node by constructing a target linked list.

[0010] In an optional embodiment, the method also includes: determining multiple second unit groups based on at least one associated unit associated with each unit, each second unit group includes at least two second target units, different second target units in the same second unit group are associated with each other, and different second target units in the same second unit group correspond to different threads; calling the target thread to serially dye the second target units in each second unit group to obtain a second dyeing grouping result.

[0011] The method provided by this optional implementation manner, if a unit and its associated units belong to two different threads, there may be conflicts between threads during the dyeing process, and such units are selected to be uniformly grouped for serial dyeing in the second round, thereby effectively avoiding possible conflicts between threads.

[0012] In an optional embodiment, the method further includes: judging whether the associated units are of the same color based on the first staining result and the second staining result to obtain a judgment result; and determining whether the unit staining grouping is successful based on the judgment result.

[0013] The method provided in this optional implementation manner can check the unit dyeing grouping results to ensure the validity of the grouping.

[0014] In an optional implementation, the thread of each unit is determined based on multiple threads and multiple units participating in parallel computing, including: based on the number of threads of the multiple threads participating in parallel computing and the number of multiple units, the multiple units are divided into multiple blocks in order according to the unit numbers, the same block contains at least one unit, and the number of multiple blocks is the same as the number of threads; according to preset rules, the multiple blocks are allocated to corresponding threads to obtain allocation results; based on the allocation results, the threads of the unit are determined.

[0015] In an optional embodiment, the step of calling the unit coloring core function, executing the unit grouping parallel algorithm, coloring the first target units in each first unit grouping, and obtaining the first coloring grouping result includes: determining the initial coloring number based on the number of first target units in each first unit grouping; calling the unit coloring core function, executing the unit grouping parallel algorithm, coloring the first target units in each first unit grouping according to the initial coloring number, and obtaining the first coloring grouping result.

[0016] In a second aspect, the present invention provides a finite element mesh unit CPU parallel coloring grouping device, the device comprising: an acquisition module, used to obtain a target linked list of a to-be-grouped coloring structure, the to-be-grouped coloring structure comprising a plurality of units and a plurality of nodes, the target linked list being used to characterize unit information associated with each node; a first determination module, used to determine the thread of each unit based on a plurality of threads and a plurality of units participating in parallel calculations; a second determination module, used to determine at least one associated unit associated with each unit based on unit information associated with each node; a third determination module, used to determine a plurality of first unit groups based on at least one associated unit associated with each unit, each first unit group comprising at least two first target units, different first target units within the same first unit group being associated with each other, and corresponding threads of different first target units within the same first unit group being the same; a first coloring module, used to call a unit coloring core function, execute a unit grouping parallel algorithm, color the first target units in each first unit group, and obtain a first coloring grouping result.

[0017] In a third aspect, the present invention provides a computer device comprising: a memory and a processor, the memory and the processor being communicatively connected to each other, the memory storing computer instructions, and the processor executing the finite element mesh unit CPU parallel coloring grouping method of the first aspect or any corresponding embodiment thereof by executing the computer instructions.

[0018] In a fourth aspect, the present invention provides a computer-readable storage medium having computer instructions stored thereon, the computer instructions being used to enable a computer to execute the finite element mesh unit CPU parallel coloring grouping method of the first aspect or any corresponding embodiment thereof.

[0019] In a fifth aspect, the present invention provides a computer program product, comprising computer instructions for causing a computer to execute the finite element mesh unit CPU parallel coloring grouping method of the first aspect or any corresponding embodiment thereof. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0021] Figure 1 is a flow chart of a CPU parallel coloring grouping method for finite element mesh units according to an embodiment of the present invention;

[0022] Figure 2is a flow chart of another finite element mesh unit CPU parallel coloring grouping method according to an embodiment of the present invention;

[0023] Figure 3 is a structural block diagram of a finite element grid unit CPU parallel coloring grouping device according to an embodiment of the present invention;

[0024] Figure 4 It is a schematic diagram of the hardware structure of a computer device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0025] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0026] In the related art, finite element unit coloring grouping is a preprocessing step for the subsequent parallel assembly of the overall stiffness matrix, and this step is generally performed on the CPU. Previous studies on unit coloring algorithms have mostly focused on serial algorithms, ignoring the fact that as the unit scale gradually increases, the time cost of unit grouping also gradually increases.

[0027] In view of this, a finite element mesh unit CPU parallel coloring grouping method provided in an embodiment of the present application can be applied to a server to realize parallel coloring grouping of finite element mesh units. The method provided by the present invention determines multiple first unit groups based on at least one associated unit associated with each unit. There is an association relationship between different units in the first unit group and they belong to the same thread. The unit coloring core function is called, and the unit grouping parallel algorithm is executed. The first target unit in each first unit group is colored to obtain the first coloring grouping result, and the unit coloring grouping is realized efficiently and in parallel. Compared with the previous serial algorithm, this parallel algorithm can greatly save the grouping time when the number of units is large, and improve the grouping coloring efficiency of the unit.

[0028] According to an embodiment of the present invention, an embodiment of a finite element mesh unit CPU parallel coloring grouping method is provided. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and although the logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from that shown here.

[0029] In this embodiment, a finite element mesh unit CPU parallel coloring grouping method is provided, which can be used for the above-mentioned server. Figure 1is a flow chart of a CPU parallel coloring grouping method for finite element mesh units according to an embodiment of the present invention. Figure 1 As shown, the process includes the following steps:

[0030] Step S101, obtaining a target linked list of structures to be grouped and dyed.

[0031] Exemplarily, the structure to be grouped and colored includes a plurality of units and a plurality of nodes, and the target linked list is used to represent unit information associated with each node.

[0032] Step S102: determining a thread of each unit based on multiple threads and multiple units participating in parallel computing.

[0033] Exemplarily, in an embodiment of the present application, each unit is allocated to multiple threads participating in parallel computing, thereby determining the thread of each unit. The embodiment of the present application does not limit the specific allocation method, and those skilled in the art can determine it according to needs.

[0034] Step S103: determining at least one associated unit associated with each unit based on the unit information associated with each node.

[0035] For example, a node is used to connect units, has a certain degree of freedom and has mutual physical interaction. The association relationship between each unit and other units can be determined through the unit information associated with each node, thereby determining at least one associated unit associated with each unit.

[0036] Step S104: determining a plurality of first unit groups based on at least one associated unit associated with each unit.

[0037] Exemplarily, in an embodiment of the present application, multiple first unit groupings can be obtained based on at least one associated unit associated with each unit, each first unit grouping includes at least two first target units, different first target units in the same first unit group are associated with each other, and different first target units in the same first unit group have the same corresponding threads.

[0038] Step S105 , calling the unit coloring core function, executing the unit grouping parallel algorithm, coloring the first target unit in each first unit group, and obtaining a first coloring grouping result.

[0039] Exemplarily, in an embodiment of the present application, shared memory parallel programming (OpenMP) can be used to loop and group all units in parallel to achieve unit parallel coloring grouping. In the outermost layer of the loop body, only OpenMP compilation instructions need to be added! $OMP PARALLEL DO and! $OMP END PARALLEL DO to achieve CPU parallelism of such loops, as shown in the following pseudo code. Among them, PRIVATE() and SHARED() are used to declare the scope of variables in the Do loop body. PRIVATE() indicates that the variable is a thread private variable, and only the thread can access and modify it. SHARED() indicates that the variable is a public variable and all threads have access rights. The specific logic is as follows:

[0040] ! $OMP PARALLEL DO PRIVATE()SHARED()

[0041] The first layer of loop Do: loop for all units

[0042] Get the thread number that processes the unit

[0043] The second layer of loop Do: loop all nodes inside the unit

[0044] Get the unit information associated with the node

[0045] The third layer loop Do: loop the unit associated with the node

[0046] Determine whether the association unit and the first-layer loop unit belong to the same thread processing,

[0047] If it belongs to two threads, in order to avoid conflicts between threads, choose to jump out of the loop, the first layer of loop units will not be dyed this round, and serial dyeing will be performed in the second round

[0048] The third loop End Do

[0049] Second layer loop End Do

[0050] Call the unit coloring core function, execute the unit grouping parallel algorithm, and color the unit. The specific algorithm is: loop all nodes of the unit, mark all the unit colors associated with the unit, and determine whether there are remaining colors to be allocated. If the number of colors is exhausted, it means that the number of colors initially allocated is insufficient, and return to the first step to re-determine the number of colors. If there are colors to be allocated, the color with the least number of units is allocated to the unit to ensure that the number of units of each color is relatively balanced, and the number of units corresponding to the color is increased by 1. At this point, the unit is dyed.

[0051] First layer loop End Do

[0052] !$OMP END PARALLEL DO

[0053] After the CPU parallel unit coloring algorithm is executed, the number of units assigned to each color by each thread is merged to obtain the unit information corresponding to each color after the first round of unit coloring is completed.

[0054] The finite element mesh unit CPU parallel coloring grouping method provided in this embodiment determines multiple first unit groups based on at least one associated unit associated with each unit. Different units in the first unit group are associated with each other and belong to the same thread. The unit coloring core function is called to execute the unit grouping parallel algorithm, and the first target unit in each first unit group is colored to obtain the first coloring grouping result. The unit coloring grouping is realized efficiently and in parallel. Compared with the previous serial algorithm, this parallel algorithm can greatly save the grouping time when the number of units is large, and improve the grouping coloring efficiency of the units.

[0055] In this embodiment, a finite element mesh unit CPU parallel coloring grouping method is provided, which can be used for the above-mentioned server. Figure 2 is a flow chart of a CPU parallel coloring grouping method for finite element mesh units according to an embodiment of the present invention. Figure 2 As shown, the process includes the following steps:

[0056] Step S201, obtain the target linked list of the to-be-grouped coloring structure, the to-be-grouped coloring structure includes multiple units and multiple nodes, and the target linked list is used to represent the unit information associated with each node. Figure 1 Step S101 of the illustrated embodiment will not be described in detail here.

[0057] Specifically, the above step S201 includes:

[0058] Step S2011, obtaining topological data of the group structure to be colored.

[0059] Exemplarily, topological data is used to characterize the association relationship between units and nodes.

[0060] Step S2012: establishing a derived data type array containing pointers based on the topological data of the to-be-grouped colored structure, wherein the dimension of the derived data type array containing pointers is equal to the number of the plurality of nodes.

[0061] Exemplarily, in the embodiment of the present application, a derived data type array containing pointers is established, and its dimension is equal to the number of all nodes. In the process of forming a node-associated unit linked list, it is used to mark the starting position of each node-associated unit information in the linked list. By utilizing the characteristic that the array can directly and quickly access the internal elements, a pointer variable pointing to the first address of any fragment desired by the user in the linked list can be directly obtained through the derived data type array, so that the starting position of each node-associated unit information in the linked list can be directly accessed, shortening the search time.

[0062] Step S2013, constructing a target linked list using an array of derived data types.

[0063] Exemplarily, in the embodiment of the present application, a linked list is constructed with the aid of a derived data type array, and the specific process is as follows:

[0064] The first layer of loop Do: loop for all units

[0065] The second layer of loop Do: loop all nodes inside the unit

[0066] Locate the starting position of the unit information associated with the node in the linked list, allocate space, insert the unit number, and increase the number of units associated with the node by 1

[0067] Second layer loop End Do

[0068] First layer loop End Do

[0069] Finally, the linked list is output to the array, the linked list is released, and the space is reclaimed.

[0070] Step S202: determining a thread of each unit based on multiple threads and multiple units participating in parallel computing.

[0071] Specifically, the above step S202 includes:

[0072] Step S2021, based on the number of threads participating in the parallel computing and the number of units, the units are divided into multiple blocks in order according to the unit numbers, and the same block contains at least one unit, and the number of the multiple blocks is the same as the number of threads.

[0073] Step S2022: Allocate multiple blocks to corresponding threads according to preset rules to obtain an allocation result.

[0074] Exemplarily, the embodiments of the present application do not limit the specific content of the preset rules, as long as the allocation of blocks can be achieved. In the embodiments of the present application, OpenMP is used to loop and group all units in parallel. First, according to the number of threads NThreads of the CPU participating in parallel computing, all units are divided into NThreads blocks in order according to the unit number, and the size of each block is BlockSize = total number of units Nelem / number of threads NThreads, that is, thread 0 processes units 1 to BlockSize, thread 1 processes units BlockSize+1 to BlockSize*2, and so on until the last block is allocated to the last thread.

[0075] Step S2023: determine the thread of the unit based on the allocation result.

[0076] Exemplarily, the thread of each unit is determined based on the allocation result.

[0077] Step S203: Determine at least one associated unit associated with each unit based on the unit information associated with each node. Figure 1 Step S103 of the illustrated embodiment will not be described in detail here.

[0078] Step S204: Determine multiple first unit groups based on at least one associated unit associated with each unit, each first unit group includes at least two first target units, different first target units in the same first unit group are associated with each other, and different first target units in the same first unit group have the same corresponding threads. For details, please refer to Figure 1 Step S104 of the illustrated embodiment will not be described in detail here.

[0079] Step S205 , calling the unit coloring core function, executing the unit grouping parallel algorithm, coloring the first target unit in each first unit grouping, and obtaining a first coloring grouping result.

[0080] Step S2051, determining an initial dyeing number based on the number of first target units in each first unit group.

[0081] Exemplarily, in the embodiment of the present application, according to the information of all node-associated units obtained by pre-treatment, the maximum number of associated units of the node is determined, and the principle of different colors of adjacent units in unit grouping is considered, and the maximum number of associated units of the node is the minimum number of colors. Because the marking method of the minimum color requires a certain algorithm to calculate, and the time consumed by the calculation will be unacceptable, if the unit grouping is directly performed with the minimum number of colors, it is very likely that the number of unit colors is insufficient. Therefore, it can be appropriately amplified on the basis of the minimum number of colors, so as to determine the initial number of colors participating in the unit grouping. It is called the initial number of colors because in the subsequent unit grouping process, it cannot be guaranteed that the number of colors is sufficient. Whether the number of colors is sufficient is marked by a variable in the code. Once the number of colors cannot meet the demand, a new round of color numbers is re-determined.

[0082] Step S2052, calling the unit coloring core function, executing the unit grouping parallel algorithm, coloring the first target unit in each first unit group according to the initial coloring number, and obtaining the first coloring grouping result.

[0083] For example, the specific algorithm of coloring grouping is as follows: loop through all nodes of the unit, mark all the unit colors associated with the unit, and determine whether there are any remaining colors to be assigned. If the number of colors is exhausted, it means that the number of colors initially assigned is insufficient, and return to the first step to re-determine the number of colors. If there are colors to be assigned, the color with the least number of units is assigned to the unit to ensure that the number of units of each color is relatively balanced, and the number of units corresponding to the color is increased by 1. At this point, the unit is dyed. For the specific dyeing grouping process, please refer to Figure 1 Step S105 of the illustrated embodiment will not be described in detail here.

[0084] In some optional embodiments, the method further comprises:

[0085] Step a1: determining a plurality of second unit groups based on at least one associated unit associated with each unit.

[0086] Exemplarily, each second unit group includes at least two second target units, different second target units in the same second unit group are associated with each other, and different second target units in the same second unit group correspond to different threads.

[0087] Step a2, calling the target thread to perform serial dyeing on the second target units in each second unit group to obtain a second dyeing grouping result.

[0088] Exemplarily, the target thread can be any thread that can achieve serial dyeing. The embodiment of the present application does not specifically limit the target thread, and those skilled in the art can determine it according to the needs. In the embodiment of the present application, in the first round of unit parallel dyeing, if a unit and its associated unit belong to two different threads, in order to avoid possible conflicts between threads during the dyeing process, such units are selected to be uniformly serially grouped in the second round. Therefore, the second round of unit dyeing focuses on the areas at the junction of the processing unit blocks. Since these areas are being processed by more than one thread, it is easy to cause conflicts between threads, resulting in errors in the unit dyeing results. The serial dyeing algorithm is basically the same as the parallel dyeing algorithm, and the only difference is that the serial algorithm only calls thread 0 for serial operation, and there is no problem of conflict between threads. After the second round of unit dyeing is completed, a global array is allocated to record unit dyeing information, including the number of units of each color and the specific unit number. When the subsequent total rigid matrix is ​​assembled in parallel, it is convenient to call the unit dyeing information in time.

[0089] In some optional embodiments, the method further comprises:

[0090] Step b1, judging whether the associated units have the same color based on the first staining result and the second staining result, and obtaining a judgment result.

[0091] Step b2, determining whether the unit dyeing grouping is successful based on the judgment result.

[0092] For example, in the embodiment of the present application, OpenMP can be used to add compilation instructions !$OMP PARALLELDO and !$OMP END PARALLEL DO to implement the CPU to check in parallel whether the unit grouping is valid and ensure that adjacent units are different colors. The specific pseudo code is as follows:

[0093] ! $OMP PARALLEL DO PRIVATE()SHARED()

[0094] The first layer of loop Do: loop for all units

[0095] The second layer of loop Do: loop all nodes inside the unit

[0096] Get the unit information associated with the node

[0097] The third layer loop Do: loop the unit associated with the node

[0098] Get the colors of the association unit and the first-layer recurrent unit to determine whether they are the same color;

[0099] If the colors are the same, an error message will be displayed and the unit needs to be re-colored.

[0100] The third loop End Do

[0101] Second layer loop End Do

[0102] First layer loop End Do

[0103] !$OMP END PARALLEL DO

[0104] By quickly and in parallel checking the unit coloring grouping results, the validity of the grouping is ensured to ensure that adjacent units are different colors and units of the same color are not adjacent to each other.

[0105] In the present embodiment, a finite element grid unit CPU parallel dyeing grouping device is also provided, and the device is used to realize the above-mentioned embodiment and preferred implementation mode, and the description that has been made will not be repeated. As used below, the term "module" can realize the combination of software and / or hardware of predetermined functions. Although the device described in the following embodiments is preferably realized with software, the realization of hardware, or the combination of software and hardware is also possible and conceived.

[0106] This embodiment provides a finite element grid unit CPU parallel coloring grouping device, such as Figure 3 As shown, including:

[0107] An acquisition module 301 is used to acquire a target linked list of a to-be-grouped dyeing structure, where the to-be-grouped dyeing structure includes a plurality of units and a plurality of nodes, and the target linked list is used to represent unit information associated with each node;

[0108] A first determining module 302, configured to determine a thread of each unit based on multiple threads and multiple units participating in parallel computing;

[0109] A second determination module 303, configured to determine at least one associated unit associated with each unit based on unit information associated with each node;

[0110] A third determining module 304 is configured to determine a plurality of first unit groups based on at least one associated unit associated with each unit, each first unit group including at least two first target units, different first target units in the same first unit group being associated with each other, and different first target units in the same first unit group corresponding to the same thread;

[0111] The first coloring module 305 is used to call the unit coloring core function, execute the unit grouping parallel algorithm, color the first target unit in each first unit group, and obtain a first coloring grouping result.

[0112] In some optional embodiments, the above device further includes:

[0113] a fourth determining module, configured to determine a plurality of second unit groups based on at least one associated unit associated with each unit, each second unit group including at least two second target units, different second target units in the same second unit group being associated with each other, and different second target units in the same second unit group corresponding to different threads;

[0114] The second dyeing module is used to call the target thread to perform serial dyeing on the second target units in each second unit group to obtain a second dyeing grouping result.

[0115] In some optional embodiments, the device further comprises:

[0116] A judgment module, used for judging whether the associated units have the same color based on the first staining result and the second staining result, and obtaining a judgment result;

[0117] The fifth determination module is used to determine whether the unit dyeing grouping is successful based on the judgment result.

[0118] In some optional implementations, the acquisition module 301 includes:

[0119] An acquisition submodule is used to acquire topological data of the group structure to be dyed, and the topological data is used to characterize the association relationship between units and nodes;

[0120] A submodule is established, which is used to establish an array of derived data types containing pointers based on the topological data of the to-be-grouped dyeing structure, wherein the dimension of the array of derived data types containing pointers is equal to the number of the plurality of nodes;

[0121] Build submodule for building target linked list using array of derived data type.

[0122] In some optional implementations, the first determining module 302 includes:

[0123] A partitioning submodule is used to divide the multiple units into multiple blocks in order according to the unit numbers based on the number of threads of the multiple threads participating in the parallel computing and the number of the multiple units, wherein the same block contains at least one unit, and the number of the multiple blocks is the same as the number of threads;

[0124] The allocation submodule is used to allocate multiple blocks to corresponding threads according to preset rules to obtain allocation results;

[0125] The first determining submodule is used to determine the thread of the unit based on the allocation result.

[0126] In some optional embodiments, the first dyeing module 305 includes:

[0127] A second determination submodule is used to determine the initial dyeing number based on the number of first target units in each first unit group;

[0128] The dyeing submodule is used to call the unit dyeing core function, execute the unit grouping parallel algorithm, dye the first target unit in each first unit group according to the initial dyeing number, and obtain the first dyeing grouping result.

[0129] The further functional description of each of the above modules and units is the same as that of the above corresponding embodiments and will not be repeated here.

[0130] The finite element grid unit CPU parallel coloring grouping device in this embodiment is presented in the form of a functional unit, where the unit refers to an ASIC (Application Specific Integrated Circuit) circuit, a processor and memory that executes one or more software or fixed programs, and / or other devices that can provide the above functions.

[0131] The embodiment of the present invention also provides a computer device having the above Figure 3 The finite element mesh unit CPU parallel coloring grouping device shown.

[0132] See also Figure 4 , Figure 4 is a schematic diagram of the structure of a computer device provided by an optional embodiment of the present invention, such as Figure 4 As shown, the computer device includes: one or more processors 10, a memory 20, and interfaces for connecting various components, including high-speed interfaces and low-speed interfaces. Various components are connected to each other using different buses for communication, and can be installed on a common mainboard or installed in other ways as needed. The processor can process the instructions executed in the computer device, including instructions stored in or on the memory to display the graphical information of the GUI on an external input / output device (such as, a display device coupled to the interface). In some optional embodiments, if necessary, multiple processors and / or multiple buses can be used together with multiple memories and multiple memories. Similarly, multiple computer devices can be connected, and each device provides some necessary operations (for example, as a server array, a group of blade servers, or a multi-processor system). Figure 4 A processor 10 is taken as an example.

[0133] The processor 10 may be a central processing unit, a network processor or a combination thereof. The processor 10 may further include a hardware chip. The hardware chip may be a dedicated integrated circuit, a programmable logic device or a combination thereof. The programmable logic device may be a complex programmable logic device, a field programmable gate array, a general purpose array logic or any combination thereof.

[0134] The memory 20 stores instructions executable by at least one processor 10, so that the at least one processor 10 executes the method shown in the above embodiment.

[0135] The memory 20 may include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application required for at least one function; the data storage area may store data created according to the use of the computer device, etc. In addition, the memory 20 may include a high-speed random access memory, and may also include a non-transient memory, such as at least one disk storage device, a flash memory device, or other non-transient solid-state storage device. In some optional embodiments, the memory 20 may optionally include a memory remotely arranged relative to the processor 10, and these remote memories may be connected to the computer device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0136] The memory 20 may include a volatile memory, such as a random access memory; the memory may also include a non-volatile memory, such as a flash memory, a hard disk or a solid state drive; the memory 20 may also include a combination of the above types of memory.

[0137] The computer device further comprises a communication interface 30 for the computer device to communicate with other devices or a communication network.

[0138] The embodiment of the present invention also provides a computer-readable storage medium. The method according to the embodiment of the present invention can be implemented in hardware, firmware, or can be implemented as a computer code that can be recorded in a storage medium, or can be implemented as a computer code that is originally stored in a remote storage medium or a non-temporary machine-readable storage medium and will be stored in a local storage medium through a network download, so that the method described herein can be stored in such software processing on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware. Among them, the storage medium can be a magnetic disk, an optical disk, a read-only storage memory, a random access memory, a flash memory, a hard disk or a solid-state hard disk, etc.; further, the storage medium can also include a combination of the above types of memories. It can be understood that a computer, a processor, a microprocessor controller, or programmable hardware includes a storage component that can store or receive software or computer code. When the software or computer code is accessed and executed by a computer, a processor, or hardware, the method shown in the above embodiment is implemented.

[0139] A part of the present invention may be applied as a computer program product, such as a computer program instruction, which, when executed by a computer, can call or provide the method and / or technical solution according to the present invention through the operation of the computer. Those skilled in the art should understand that the existence of the computer program instruction in a computer-readable medium includes, but is not limited to, a source file, an executable file, an installation package file, etc., and accordingly, the way in which the computer program instruction is executed by the computer includes, but is not limited to: the computer directly executes the instruction, or the computer compiles the instruction and then executes the corresponding compiled program, or the computer reads and executes the instruction, or the computer reads and installs the instruction and then executes the corresponding installed program. Here, the computer-readable medium may be any available computer-readable storage medium or communication medium accessible to the computer.

[0140] Although the embodiments of the present invention have been described in conjunction with the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the present invention, and such modifications and variations are all within the scope defined by the appended claims.

Claims

1. A finite element mesh unit CPU parallel coloring grouping method, characterized in that: The method comprises: Obtaining a target linked list of a to-be-grouped dyeing structure, wherein the to-be-grouped dyeing structure includes a plurality of units and a plurality of nodes, and the target linked list is used to represent unit information associated with each node; Determine a thread for each unit based on a plurality of threads participating in parallel computing and the plurality of units; Determine at least one associated unit associated with each unit based on the unit information associated with each node; Determine a plurality of first unit groups based on at least one associated unit associated with each of the units, each first unit group includes at least two first target units, different first target units in the same first unit group are associated with each other, and different first target units in the same first unit group have the same corresponding threads; The unit coloring core function is called to execute the unit grouping parallel algorithm to color the first target unit in each first unit grouping to obtain the first coloring grouping result.

2. The method according to claim 1, characterized in that The steps of obtaining the target linked list of structures to be grouped and dyed include: Acquire topological data of the group structure to be colored, wherein the topological data is used to characterize the association relationship between units and nodes; Establishing a derived data type array containing pointers based on the topological data of the to-be-grouped dyeing structure, wherein the dimension of the derived data type array containing pointers is equal to the number of the plurality of nodes; The target linked list is constructed using the derived data type array.

3. The method according to claim 1, characterized in that The method further comprises: Determine a plurality of second unit groups based on at least one associated unit associated with each of the units, each second unit group includes at least two second target units, different second target units in the same second unit group are associated with each other, and different second target units in the same second unit group correspond to different threads; The target thread is called to perform serial dyeing on the second target units in each second unit group to obtain a second dyeing grouping result.

4. The method according to claim 3, characterized in that The method further comprises: Based on the first staining result and the second staining result, it is determined whether the associated units have the same color, and a determination result is obtained; Whether the unit dyeing grouping is successful is determined based on the judgment result.

5. The method according to claim 3, characterized in that: Determining a thread of each unit based on a plurality of threads participating in parallel computing and the plurality of units includes: Based on the number of the multiple threads participating in the parallel computing and the number of the multiple units, the multiple units are divided into multiple blocks in order according to the unit numbers, and the same block contains at least one unit, and the number of the multiple blocks is the same as the number of the threads; Allocate multiple blocks to corresponding threads according to preset rules to obtain allocation results; A thread of the unit is determined based on the allocation result.

6. The method according to claim 4, characterized in that The steps of calling the unit coloring core function, executing the unit grouping parallel algorithm, coloring the first target unit in each first unit group, and obtaining the first coloring grouping result include: determining an initial staining number based on the number of first target units in each first unit grouping; The unit coloring core function is called to execute the unit grouping parallel algorithm, and the first target unit in each first unit group is colored according to the initial coloring number to obtain a first coloring grouping result.

7. A finite element grid unit CPU parallel coloring grouping device, characterized in that: The device comprises: An acquisition module, used for acquiring a target linked list of a to-be-grouped dyeing structure, wherein the to-be-grouped dyeing structure comprises a plurality of units and a plurality of nodes, and the target linked list is used for representing unit information associated with each node; A first determining module, configured to determine a thread of each unit based on a plurality of threads participating in parallel computing and the plurality of units; A second determination module, configured to determine at least one associated unit associated with each unit based on the unit information associated with each node; A third determining module is used to determine a plurality of first unit groups based on at least one associated unit associated with each of the units, each of the first unit groups includes at least two first target units, different first target units in the same first unit group are associated with each other, and different first target units in the same first unit group have the same corresponding threads; The first dyeing module is used to call the unit dyeing core function, execute the unit grouping parallel algorithm, dye the first target unit in each first unit group, and obtain the first dyeing grouping result.

8. A computer device, characterized in that: include: A memory and a processor, wherein the memory and the processor are communicatively connected to each other, the memory stores computer instructions, and the processor executes the finite element mesh unit CPU parallel coloring grouping method according to any one of claims 1 to 6 by executing the computer instructions.

9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a computer to execute the finite element mesh unit CPU parallel coloring grouping method according to any one of claims 1 to 6.

10. A computer program product, characterized in that The method comprises computer instructions for causing a computer to execute the finite element mesh unit CPU parallel coloring grouping method according to any one of claims 1 to 6.

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