High-precision and efficient error measurement method for approximate computing circuits

Abstract

The application discloses a high-precision and high-efficiency error measurement method of an approximate calculation circuit, comprising the following steps: step 1, the approximate calculation circuit is represented by a data flow graph (DFG), and the output of each node in the DFG is used as the input of the next stage node; step 2, an error measurement model of an adder or a multiplier is used to replace the corresponding node in the DFG, the error measurement model located at each node from the circuit input to the main output is traversed in a topological manner, error generation and propagation are performed on each node, and the final output error measurement is obtained. Through in-depth exploration of error generation and propagation caused by the integration of an approximate unit in the circuit design, the error measurement of the internal nodes and the output in the circuit is evaluated, the interaction between input statistics, error propagation characteristics and the hardware properties of the approximate unit is considered, and the output quality of the approximate circuit design can be quickly and accurately estimated.

Description

Technical Field

[0001] This invention belongs to the field of space exploration technology for approximate circuit design, specifically involving a high-precision and efficient error measurement method for approximate calculation circuits. Background Technology

[0002] Through the explicit fault-tolerance characteristics of various applications, approximate computing techniques significantly improve hardware efficiency by introducing a tolerable loss of accuracy. At the circuit level, improving circuit performance requires modifications to the circuit logic, primarily for designing approximate arithmetic units such as adders and multipliers. Approximate computing has become a viable method for improving circuit energy efficiency by balancing quality of service and hardware cost. In this design paradigm, a key aspect is estimating the output error to ensure the desired level of accuracy is achieved. The effectiveness of approximate circuit design largely depends on the performance gains achieved by adjusting accuracy and the output quality degradation due to errors.

[0003] From the perspective of approximate computation, the combination of computational accuracy becomes a new aspect of the design framework. Therefore, participation in design space exploration (DSE) becomes a necessary condition for systematically achieving optimal approximation design. This involves determining an appropriate configuration among approximate elements with different error characteristics to ensure resource minimization while not exceeding user-defined error constraints.

[0004] To determine whether the introduced approximation units exceed user-defined error constraints, the circuit's output error must be evaluated. Traditional methods typically rely on approximate estimation models or exhaustive / Monte Carlo simulations for this evaluation. However, these methods are limited by the necessity of approximation units and their configuration in analog circuits, resulting in considerable runtime requirements and potentially lengthy evaluation times for assessing output quality tradeoffs, especially for complex circuits. To mitigate this time redundancy challenge, developing an efficient and accurate error estimation method is essential for effectively probing output quality. Summary of the Invention

[0005] The technical problem to be solved by the present invention is to provide a high-precision and efficient error measurement method for approximate calculation circuits, which addresses the shortcomings of the prior art. By deeply exploring the error generation and propagation caused by integrating approximation units in circuit design, the error measurement structure of internal nodes and outputs in the circuit is evaluated. The method takes into account the interaction between input statistics, error propagation characteristics and hardware attributes of approximation units, and can quickly and accurately estimate the output quality of approximate circuit designs.

[0006] To achieve the above-mentioned technical objectives, the technical solution adopted by the present invention is as follows:

[0007] A high-precision and efficient error measurement method for approximate calculation circuits, specifically including:

[0008] Step 1: Represent the approximate calculation circuit using a Data Flow Graph (DFG), where the output of each node in the DFG serves as the input to the next level node.

[0009] Step 2: Using the error metric model of adder or multiplier, replace the corresponding node in DFG, and traverse the error metric model located at each node in DFG from circuit input to main output in a topological manner. Perform error generation and propagation on each node to obtain the final output error metric.

[0010] To optimize the above technical solution, the specific measures also include:

[0011] In the aforementioned DFG, the output error is determined by the input value, the input error, and the error generated by approximate addition or multiplication operations, and is expressed as follows: and This represents the input to the operation node. and Represents the exact input value. and They respectively represent the origins of and Input error, This represents the error generated by the operation node. This represents the output of the operation node, which includes error-free output values. and the output error of the operation node ;

[0012] The aforementioned approximate calculation circuit includes approximate adder and approximate multiplier operation nodes, and the output error of the approximate adder operation node is... Equation (1) represents the output error of the approximate multiplier operation node. This is expressed by equation (2);

[0013]

[0014]

[0015] The aforementioned error measurement model includes an output module, an error module, and an error propagation module; the inputs to the output module and the error module are both probability distribution functions of the input values ​​of each operational unit in the actual circuit. and The probability distribution function of the output values ​​of the nodes generated by the output module The error module generates error metrics. and The error propagation module utilizes the error metric obtained from the error module, along with the average of the input precise values. , and mean square value , and average , and mean square value , To calculate the average of the exact output values and mean square value and the average value of the output error. and mean square value The output metric serves as the input to the next-level error propagation module, calculating the error metric for the next-level computational unit. Through iteration, the average error, mean square error, and signal-to-noise ratio are ultimately obtained using the mean and mean square values. and In the case of node representation of precise operations, all are equal to 0.

[0016] The output module described above separately distributes the output of the precise and approximate components, specifically as follows: the output of each bit within the approximate segment is associated with the previous bit. Using the PEMACX model, with sum vectors Replace the output error vector This facilitates obtaining an approximate output distribution, and the highest bit of the approximate part is used... replace ,in The input vector is used as the carry vector. Then, based on the input distribution and the bit width of the approximate part, the input distribution responsible for the exact addition is obtained. This input distribution is convolved to obtain the exact part output distribution. The output distribution of the approximate part is convolved with the output distribution of the exact part to obtain the final output distribution.

[0017] The output module described above utilizes the Modified Interval Algorithm (MIA) to accelerate the calculation of the output distribution.

[0018] The error module described above uses a lookup table (LUT) as a pre-representation library to estimate the approximate error metric.

[0019] The aforementioned error metrics include mean error (ME), signal-to-noise ratio (SNR), and mean square error (MSE).

[0020] The expression for the mean error ME is:

[0021]

[0022] The expressions for signal-to-noise ratio (SNR) and mean square error (MSE) are:

[0023]

[0024]

[0025] In step 2 above, using formulas (1) and (3), the mean error of the output error of the approximate adder operation node is derived as follows:

[0026]

[0027] Using formulas (1) and (5), the mean square error of the adder operation node output error is determined as follows:

[0028]

[0029] Using formulas (2) and (3), the mean error of the output error of the approximate multiplier operation node is obtained as follows:

[0030]

[0031] Using formulas (2) and (5), the mean square error of the output error of the approximate multiplier operation node is calculated:

[0032]

[0033] when , and When considered independent, the mean square error of the adder and multiplier operation node output errors is derived from (7) and (9) as follows:

[0034]

[0035]

[0036] The present invention has the following beneficial effects:

[0037] This invention proposes a comprehensive method for estimating error propagation in approximate circuits using Data Flow Graph (DFG) analysis. The study delves into the fundamental principles of error generation and propagation in circuit designs incorporating approximate components. Furthermore, it explores the interactions between input distribution, error propagation dynamics, and the hardware properties of approximate units. The final output error assessment relies on an existing error module used to measure the error of the approximate arithmetic unit. This method exhibits high accuracy and efficiency in computation. The proposed method outperforms Monte Carlo simulations in terms of time, achieving an average speedup of three orders of magnitude. Moreover, the results obtained by applying the proposed model to a digital signal processor are almost identical to actual results.

[0038] This invention significantly reduces runtime overhead by using a dedicated propagation distribution instead of requiring actual computation similar to pure simulation, and because the model input values ​​are consistent with the true values, the estimated values ​​almost match the actual output values. Attached Figure Description

[0039] Figure 1 To provide a high-precision and high-efficiency evaluation model for approximate circuit error measurement;

[0040] Figure 2 It consists of addition and multiplication node errors;

[0041] Figure 3 A time comparison graph of simulation and estimation for accumulator and multiply-accumulator instances;

[0042] Figure 4 A comparison chart showing the accuracy of simulation and estimation for an example of an FIR filter. Detailed Implementation

[0043] The embodiments of the present invention will be described in further detail below with reference to the accompanying drawings.

[0044] The present invention provides a high-precision and efficient error measurement method for approximate calculation circuits, specifically comprising:

[0045] Step 1: Represent the approximate calculation circuit using a Data Flow Graph (DFG), where the output of each node in the DFG serves as the input to the next level node.

[0046] Step 2: Using the error metric model of adder or multiplier, replace the corresponding node in DFG, and traverse the error metric model located at each node in DFG from circuit input to main output in a topological manner. Perform error generation and propagation on each node to obtain the final output error metric.

[0047] The error metric model consists of three smaller modules: the error module, the output module, and the error propagation module.

[0048] In approximate circuit systems, the quality of the circuit is determined by the final output error metric. Designers primarily focus on the final output error metric. A single-node propagation rule can serve as a basic construction model. Through a connection model, this invention quickly traverses all nodes from the circuit input to the main output to obtain the final output error metric.

[0049] The approximate circuit can be represented using a data flow graph (DFG). The output of each node can serve as the input to the next subsequent node. The corresponding node is replaced using the error propagation model of a specified adder or multiplier. Therefore, the error model of each node within the approximate DFG can be systematically traversed in a topological manner. A rule module performs error generation and propagation at each node, ultimately calculating the error metric (EM) at its main output node. By specifically propagating the distribution, rather than requiring actual computation similar to pure simulation, this approach significantly reduces runtime overhead.

[0050] A basic model of error propagation across a single node consists of three smaller modules: an output module, an error module, and an error propagation module, such as... Figure 1 As shown. and These represent the probability distribution functions of the input values. They affect both the output module and the error module, generating the output values ​​of the nodes. and error measurement and The probability distribution.

[0051] The error propagation module utilizes the error metric obtained from the error module, as well as the average of the input precise values. , and mean square value , and average , and mean square value , To calculate the average of the exact output values and mean square value and the average value of the output error. and mean square value In the case where nodes represent precise operations, and All equal 0.

[0052] In this embodiment, the error module and output module employ existing modeling methods and algorithms.

[0053] To demonstrate the error propagation model of the approximate adder, an AMA low-power approximate adder is used as an example.

[0054] For the error module, the PEMACx model accurately estimates the error distribution of the AMA adder, thus obtaining the average error. and mean square error .

[0055] For the output module, the output distribution of the exact and approximate components of the adder is performed separately. Similar to the study of the error module, the output of each bit within the approximate segment of the LPA adder is associated with the previous bit. Based on the truth table of the full adder, using the PEMACX model, and with the sum vector... Replace the output error vector This facilitates obtaining an approximate output distribution. To prevent carry-over vectors in the approximate portion... The impact on the calculation of the precise part, and the use of the highest bit of the approximate part. replace Then, based on the input distribution and the bit width of the approximate portion, the input distribution responsible for exact addition is obtained. Convolving this new input distribution yields the exact output distribution. Finally, convolving the output distribution of the approximate portion with the output distribution of the exact segment yields the final output distribution.

[0056] This section demonstrates the error propagation model of an approximate multiplier, primarily using a truncated input approximate multiplier as an example. For the error module, a lookup table (LUT) is generated as a pre-representation library for estimating the approximate multiplication error metric.

[0057] For the output module, this invention utilizes the Modified Interval Algorithm (MIA) to accelerate the calculation of the multiplication output distribution.

[0058] In this embodiment, mutually independent assumptions are proposed in the error propagation module to facilitate subsequent calculations.

[0059] The output error is determined by the input value, the input error, and the error caused by approximate addition or multiplication operations, such as... Figure 2 As shown. and This represents the input to the operation node. and This represents the precise input value, while and They respectively represent the origins of and Input error. Furthermore... This represents the error generated by the operation node. The output of the operation node is denoted as... Including error-free output values and the output error of the operation node Approximate adder output error Equation (1) indicates that, in the case of approximate multiplication, the output error... Depend on In approximate multipliers. Compared to other terms, it can be ignored, so the expression for the output error of the approximate multiplier can be simplified to equation (2), which is convenient for subsequent error measurement calculation.

[0060]

[0061]

[0062] Error metrics include a range of error-related indicators used to evaluate the accuracy of approximate designs. These indicators include mean error (ME), signal-to-noise ratio (SNR), and mean square error (MSE).

[0063] The mean error (ME) relates to the magnitude of the error. This invention defines ME as the signed average difference between correct and incorrect results, which can be expressed as the mathematical expectation of the error. The expression is (3).

[0064]

[0065] Signal-to-noise ratio (SNR) is an important indicator of output quality, representing the ratio between the relative strength or power of a signal and the noise present. A higher SNR indicates that the signal is stronger relative to the noise and is associated with better quality output. SNR is often used in conjunction with mean square error (MSE). Its expression is given by (4) and (5).

[0066]

[0067]

[0068] Drawing upon the mathematical analysis discussed earlier, and focusing on the two common arithmetic operations of addition and multiplication, this invention develops methods for measuring node output error. These methods are capable of calculating the output error metric of nodes containing adder or multiplier units.

[0069] Using the composition of the approximate adder node error and the error measurement formula (3) described in formula (1), this invention can derive the mean error (ME) of the approximate adder node output error. Since , and All of them are random variables. By decomposing them using the properties of mathematical expectation, we can obtain formula (6).

[0070]

[0071] The mean square error (MSE) of the adder node output error can be determined using formulas (1) and (5). Since , and All of them are random variables, and through factorization, we can obtain formula (7).

[0072]

[0073] Similar to the method used in approximate adders, the mean error (ME) of the approximate multiplier nodes is decomposed using formulas (2) and (3). Furthermore, considering... and as well as and The independence between them can be obtained by formula (8) through the mathematical expectation property.

[0074]

[0075] The mean square error (MSE) of the output error of the approximate multiplier node can be calculated using formulas (2) and (5). , and All of them are random variables, and formula (9) can be obtained through factorization.

[0076]

[0077] The value is influenced by both the characteristics of the approximate node itself and the input values ​​of its two input ports. If a fit can be achieved... Then we can combine (7) and (9). / Convert to / This is to facilitate subsequent calculations. (This was achieved by generating...) and , A scatter plot between them shows the relationship with There is no obvious correlation trend or function between input error and the problem. To simplify the problem, this invention may tend to assume... , and They are independent of each other, even There is a correlation between input error and input error.

[0078] when , and When considered as independent, (7) and (9) can be further analyzed. The MSE equations (10) and (11) for the adder and multiplier are derived.

[0079]

[0080]

[0081] By providing a set of precise values ​​and a set of error values ​​for the input ports of the approximate adder and multiplier nodes, this invention observes the estimated output port and the approximate node error metric obtained through simulation. The results show that the error metric estimated by the proposed method is very close to the simulation results, with a maximum deviation of no more than 3%. This indicates that the independence assumption does not introduce significant bias into the error estimation method.

[0082] The error propagation model for adders and multipliers is obtained using the above derivation formula.

[0083] The model was evaluated using the aforementioned computational units in the accumulator (ACC) and multiply-accumulator (MAC). Experiments with the accumulator and multiply-accumulator were conducted to assess the accuracy and performance of the error propagation model. [Further details are needed for a complete translation.] The accuracy and runtime performance of Monte Carlo (MC) simulation methods for a sample size were compared. The input data for both experiments followed either a Gaussian or uniform distribution.

[0084] In the experiment, the approximation of the circuit was gradually increased by replacing precise units with approximate units. For MC simulations, the estimation time is affected by computational complexity. The runtime of MC simulations increases linearly with computational complexity. However, the error propagation model is largely unaffected. Regarding speed, as... Figure 3 As shown, an average speedup of three orders of magnitude can be achieved. Furthermore, utilizing multiple approximate units may yield even greater benefits.

[0085] This invention evaluates the accuracy of the proposed model by comparing the estimates obtained from the error propagation model with those obtained from MC simulations. For circuits consisting of adders or multipliers, the estimation method and simulation results are in very good agreement. The deviation values ​​remain essentially within the range of... the following.

[0086] The practicality of the model is verified in an FIR filter circuit using the Signal-to-Noise Ratio (SNR), a common quality indicator in communication systems. The model only calculates the distribution and requires no actual computation. It achieves a speedup of three orders of magnitude while maintaining a deviation below 0.3 dB. The method of this invention achieves high accuracy while maintaining fast operation speed, without deviating from simulation results, such as... Figure 4 As shown.

[0087] The above are merely preferred embodiments of the present invention. The scope of protection of the present invention is not limited to the above embodiments. All technical solutions falling within the scope of the present invention's concept are within the scope of protection of the present invention. It should be noted that for those skilled in the art, any improvements and modifications made without departing from the principles of the present invention should be considered within the scope of protection of the present invention.

Claims

1. A high-precision and efficient error measurement method for approximate calculation circuits, characterized in that: Specifically, it includes: Step 1: Represent the approximate calculation circuit using a Data Flow Graph (DFG), where the output of each node in the DFG serves as the input to the next level node. Step 2: Using the error metric model of adder or multiplier, replace the corresponding node in DFG, and traverse the error metric model located at each node in DFG from circuit input to main output in a topological manner. Perform error generation and propagation at each node to obtain the final output error metric. In the DFG, the output error is determined by the input value, the input error, and the error generated by approximate addition or multiplication operations, and is expressed as follows: and This represents the input to the operation node. and Represents the exact input value. and They respectively represent the origins of and Input error, This represents the error generated by the operation node. This represents the output of the operation node, which includes error-free output values. and the output error of the operation node ; The error measurement model includes an output module, an error module, and an error propagation module; the inputs to the output module and the error module are both probability distribution functions of the input values ​​of each operational unit in the actual circuit. and The probability distribution function of the output values ​​of the nodes generated by the output module The error module generates error metrics. and ; The error propagation module utilizes the error metric obtained from the error module, along with the average of the input precise values. , and mean square value , and average , and mean square value , To calculate the average of the exact output values and mean square value and the average value of the output error. and mean square value , , As an output metric, it is input to the next-level error propagation module to calculate the error metric of the next-level arithmetic unit. Through iteration, the average error, mean square error, and signal-to-noise ratio are finally obtained using the mean and mean square values. and In the case of node representation of precise operations, all are equal to 0.

2. The high-precision and high-efficiency error measurement method for approximate calculation circuits according to claim 1, characterized in that, The approximate calculation circuit includes approximate adder and approximate multiplier operation nodes, and the output error of the approximate adder operation node is... Equation (1) represents the output error of the approximate multiplier operation node. This is expressed by equation (2); ； 。 3. The high-precision and efficient error measurement method for approximate calculation circuits according to claim 2, characterized in that, The output module separately distributes the output of precise and approximate components, specifically as follows: the output of each bit within the approximate segment is associated with the previous bit; based on the truth table of the full adder, using the PEMACX model, and employing a sum vector... Replace the output error vector This facilitates obtaining an approximate output distribution, and the highest bit of the approximate part is used... replace ,in The input vector is used as the carry vector. Then, based on the input distribution and the bit width of the approximate part, the input distribution responsible for the exact addition is obtained. This input distribution is convolved to obtain the exact part output distribution. The output distribution of the approximate part is convolved with the output distribution of the exact part to obtain the final output distribution.

4. The high-precision and high-efficiency error measurement method for approximate calculation circuits according to claim 2, characterized in that, The output module utilizes the Modified Interval Algorithm (MIA) to accelerate the calculation of the output distribution.

5. The high-precision and efficient error measurement method for approximate calculation circuits according to claim 2, characterized in that, The error module uses a lookup table (LUT) as a pre-representation library to estimate the approximate error metric.

6. The high-precision and high-efficiency error measurement method for approximate calculation circuits according to claim 2, characterized in that, The error metrics include mean error (ME), signal-to-noise ratio (SNR), and mean square error (MSE). The expression for the mean error ME is: ； The expressions for signal-to-noise ratio (SNR) and mean square error (MSE) are: ； 。 7. The high-precision and efficient error measurement method for approximate calculation circuits according to claim 6, characterized in that, In step 2, using formulas (1) and (3), the mean error of the output error of the approximate adder operation node is derived as follows: ； Using formulas (1) and (5), the mean square error of the output error of the approximate adder operation node is determined as follows: （7）； Using formulas (2) and (3), the mean error of the output error of the approximate multiplier operation node is obtained as follows: ； Using formulas (2) and (5), the mean square error of the output error of the approximate multiplier operation node is calculated: （9）。 8. The high-precision and efficient error measurement method for approximate calculation circuits according to claim 7, characterized in that, when , and When considered independent, the mean square error of the output error of the approximate adder and approximate multiplier operation nodes is derived from (7) and (9) as follows: （10） （11）。

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