Display control method, display driving chip and electronic device
By sending multiple TE signals within the hold interval of the display driver chip, adaptive adjustment of the display frame rate is achieved, solving the stuttering problem caused by untimely frame rate switching in traditional technology, improving user experience and reducing power consumption.
Patent Information
- Application Number
- CN202411118195.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-11-17
- Publication Date
- 2025-11-07
- Estimated Expiration
- 2043-11-17
AI Technical Summary
In traditional solutions, the diverse range of applications at the application layer makes it difficult to accurately identify application scenarios, resulting in untimely frame rate switching on the display, stuttering issues, and negatively impacting the user experience.
By sending multiple TE signals to the processor during the hold interval of the refresh period, the display driver chip DDIC can adaptively adjust the frame rate of the display screen. The processor sends image data according to the required frame rate, and DDIC refreshes in response to the received image data.
It achieves adaptive adjustment of the display frame rate, reducing stuttering, improving user experience, and reducing power consumption.
Smart Images

Figure CN118968922B_ABST
Abstract
Description
[0001] This application is a divisional application, the original application number is 202311548717.5, the original application date is November 17, 2023, and the entire contents of the original application are incorporated herein by reference. TECHNICAL FIELD
[0002] The present application relates to the field of image display, and in particular to a display control method, a display driving chip and an electronic device. BACKGROUND
[0003] With the popularity of low temperature polycrystalline oxide (LTPO) display screens, low temperature poly-silicon (LTPS) display screens and other organic light-emitting diode (OLED) display screens, the display screens of many electronic devices support switching between different frame rates.
[0004] The traditional solution is to determine the frame rate of the display screen according to the application scenario of the current electronic device by the upper layer, and then send a command to the display driving chip (DDIC) to set the frame rate of the display screen. However, since there are many types of application programs (APPs) in the application layer, it is difficult to accurately identify the application scenario, so it is not possible to accurately determine the frame rate of the display screen, or the time delay of identifying the application scenario is too large, resulting in that the frame rate of the display screen is not switched in time, thereby causing the display screen to appear a lag problem, affecting the user experience. SUMMARY
[0005] Embodiments of the present application provide a display control method, a display driving chip and an electronic device, which are used to realize adaptive adjustment of the frame rate of the display screen by the DDIC.
[0006] To achieve the above-mentioned purpose, the embodiments of the present application adopt the following technical solutions:
[0007] In a first aspect, a display control method is provided, comprising: step S1, receiving image data; step S2, in a first scanning interval in a first refresh period, scanning a display screen according to the image data; the period after the first scanning interval in the first refresh period is a first holding interval, and the first scanning interval refers to the minimum time for completing the scanning of one frame of image; step S3, in the first holding interval, sending a plurality of tearing effect (TE) signals, the TE signal being used to indicate that the image data has completed refreshing; step S4, if new image data is received in the first holding interval, starting to execute from step S2 again.
[0008] The display control method provided by the embodiments of the present application is that, in the holding interval of the refresh period, the DDIC sends multiple TE signals to the processor, instead of sending the TE signal after the refresh period ends. The reciprocal of the time from the beginning of the scanning interval of the refresh period to the sending of any TE signal is equal to a frame rate (the frame rate is also essentially a frequency). When the processor needs the display screen to refresh at a certain frame rate, it does not need to directly instruct the DDIC to set the frame rate of the display screen, but only needs to send image data to the DDIC in response to the TE signal corresponding to the frame rate. That is, the DDIC provides multiple TE signals for the processor to select in the holding interval of the refresh period, and the processor can send new image data to the DDIC in response to any TE signal at any time, and the DDIC refreshes the display screen in response to the received new image data. That is, the frequency at which the processor sends image data (i.e., the frame rate expected by the processor) determines the frame rate at which the DDIC refreshes the display screen, thereby achieving adaptive adjustment of the frame rate of the display screen by the DDIC.
[0009] In a possible implementation, the method further includes: if no new image data is received in the first holding interval, maintaining the image displayed on the display screen in the first holding interval. Since the DDIC sends multiple TE signals in the first holding interval, it is possible that new image data is received in the first holding interval. If no new image data is received, the current frame is maintained, and there is no need to frequently refresh, thereby reducing power consumption.
[0010] In a possible implementation, the method further includes: sending the TE signal before the first scanning interval ends. At the end of the first scanning interval, the DDIC can be ready to receive new image data, and when the new image data is received, the first scanning interval can be returned to for refreshing, thereby achieving the highest base frame rate (the reciprocal of the length of the first scanning interval).
[0011] In a possible implementation, if no new image data is received in the first holding interval, the method further includes: in a second scanning interval in a second refresh period after the first refresh period, scanning the display screen according to the most recently received image data; a period after the second scanning interval in the second refresh period is a second holding interval; in the second holding interval, multiple TE signals are sent; and if new image data is received in the second holding interval, the method starts to be executed from step S2 again. More frame rates can be selected for self-refreshing.
[0012] In a possible implementation, the method further includes: if no new image data is received in the second holding interval, holding the image displayed on the display screen in the second holding interval. Since the DDIC sends a plurality of TE signals in the second holding interval, it is possible to receive new image data in the second holding interval, and if no new image data is received, the current frame is held, and it is not necessary to frequently refresh, thereby reducing power consumption.
[0013] In a possible implementation, the method further includes: sending the TE signal before the end of the second scanning interval. At the end of the first scanning interval, the DDIC can be ready to receive new image data, and when the new image data is received, the first scanning interval can be returned to refresh, and the response time of the DDIC can be shortened.
[0014] In a possible implementation, a difference between a length of the second holding interval and a length of the first holding interval is m times a period of the TE signal, and m is a positive integer. The length of the holding interval between different refresh periods is stepped by the period of the TE signal, so that the holding interval exactly accommodates an integer number of periods of the TE signal, and the utilization of the holding interval can be improved.
[0015] In a possible implementation, a period of the TE signal is k times a period of an EM signal, and k is a positive integer. The EM signal is used to control the pixel of the display screen to emit light. That is, the frequency of the EM signal is k times the frequency of the TE signal.
[0016] In a second aspect, a display control method is provided, including: step S1, a processor sends image data to a display driving chip (DDIC); step S2, the DDIC scans a display screen according to the image data in a first scanning interval in a first refresh period; a period after the first scanning interval in the first refresh period is a first holding interval; the first scanning interval refers to the minimum time for completing scanning of one frame of image; step S3, in the first holding interval, the DDIC sends a plurality of tearing effect (TE) signals to the processor, the TE signal is used to indicate that the image data has completed refresh; step S4, the processor sends new image data to the DDIC in the first holding interval in response to any TE signal in the first holding interval; if the DDIC receives the new image data in the first holding interval, the execution is restarted from step S2.
[0017] In a possible implementation, the method further includes: if no new image data is received in the first holding interval, holding the image displayed on the display screen in the first holding interval.
[0018] In a possible implementation, the method further includes: sending the TE signal by the DDIC to the processor before the end of the first scanning interval.
[0019] In a possible implementation, if the DDIC does not receive new image data in the first holding interval, the method further includes: in a second scanning interval in a second refresh period after the first refresh period, the DDIC scans the display screen according to the latest received image data; a period after the second scanning interval in the second refresh period is a second holding interval; in the second holding interval, the DDIC sends a plurality of TE signals to the processor; the processor sends new image data to the DDIC in the first holding interval in response to any TE signal in the second holding interval; and if the DDIC receives new image data in the second holding interval, the method is executed again from step S2.
[0020] In a possible implementation, the method further includes: if the DDIC does not receive new image data in the second holding interval, the method further includes: maintaining the image displayed on the display screen in the second holding interval.
[0021] In a possible implementation, the method further includes: before the second scanning interval ends, the DDIC sends a TE signal to the processor.
[0022] In a possible implementation, a difference between a length of the second holding interval and a length of the first holding interval is m times a period of the TE signal, and m is a positive integer.
[0023] In a possible implementation, the period of the TE signal is k times a period of an EM signal, and k is a positive integer, the EM signal being used to control the pixel points of the display screen to emit light.
[0024] In a third aspect, a display driving chip is provided, which is configured to execute the method in the first aspect and any implementation thereof.
[0025] In a fourth aspect, an electronic device is provided, which includes a processor, a display screen, and a DDIC as described in the third aspect and any implementation thereof. The processor is configured to send image data to the DDIC. The DDIC is configured to scan the display screen according to the image data in a first scanning interval in a first refresh period. A period after the first scanning interval in the first refresh period is a first holding interval. The first scanning interval refers to a minimum time for completing scanning of one frame of image. The DDIC is further configured to send a plurality of tearing effect (TE) signals to the processor in the first holding interval, the TE signal being used to indicate that the image data has been refreshed. The processor is further configured to send new image data to the DDIC in the first holding interval in response to any TE signal in the first holding interval. The DDIC is further configured to return to the first scanning interval in the first refresh period to scan the display screen according to the new image data if the new image data is received in the first holding interval.
[0026] In a fifth aspect, a computer-readable storage medium is provided, including instructions, when the instructions are executed on an electronic device, causing the electronic device to perform the method according to the first aspect and any one of the implementations thereof, or the method according to the second aspect and any one of the implementations thereof.
[0027] In a sixth aspect, a computer program product is provided, including instructions, when the instructions are executed on the above-mentioned electronic device, causing the electronic device to perform the method according to the first aspect and any one of the implementations thereof, or the method according to the second aspect and any one of the implementations thereof.
[0028] The technical effects of the second aspect to the sixth aspect refer to the technical effects of the first aspect and any one of the implementations thereof, which are not repeated here. BRIEF DESCRIPTION OF DRAWINGS
[0029] Figure 1 A structural schematic diagram of an electronic device provided by an embodiment of the present application is provided.
[0030] Figure 2 A structural schematic diagram of a display control circuit provided by an embodiment of the present application is provided.
[0031] Figure 3 A schematic diagram of the relationship between a tearing effect (TE) signal and the frame rate of a display screen provided by an embodiment of the present application is provided.
[0032] Figure 4 A schematic diagram of the display screen refreshing by rows provided by an embodiment of the present application is provided.
[0033] Figure 5 A schematic diagram of the DDIC refreshing by different sequences of frame rates provided by an embodiment of the present application is provided.
[0034] Figure 6 A schematic diagram of a software architecture provided by an embodiment of the present application is provided.
[0035] Figure 7 A schematic diagram of switching the frame rate of a display screen provided by an embodiment of the present application is provided.
[0036] Figure 8 A schematic diagram of a display control method provided by an embodiment of the present application is provided.
[0037] Figure 9 A schematic diagram of the TE signal transmission frequency provided by an embodiment of the present application is provided.
[0038] Figure 10 A schematic diagram of another TE signal transmission frequency provided by an embodiment of the present application is provided.
[0039] Figure 11 Another schematic diagram of a software architecture provided by an embodiment of the present application is shown in FIG. 3.
[0040] Figure 12 Another schematic diagram of a display control method provided by an embodiment of the present application is shown in FIG. 4. DETAILED DESCRIPTION
[0041] First, some concepts involved in the present application are described.
[0042] The terms "first", "second", and the like in embodiments of the present application are used only for the purpose of distinguishing similar objects, and should not be understood as indicating relative importance, quantity, order, etc.
[0043] The terms "exemplary" or "for example" in embodiments of the present application are used to mean "an example of" or "an example", and not "preferred" or "superior" over other embodiments. In other words, the terms "exemplary" or "for example" are not used to designate important over other embodiments. Rather, the terms "exemplary" or "for example" are simply used in their ordinary sense to indicate that the named item is an example, and does not imply any other special significance.
[0044] The terms "coupled" and "connected" in embodiments of the present application should be interpreted broadly, for example, can refer to physical or electrical connection, or indirect connection through electronic devices, such as connection through resistors, inductors, capacitors or other electronic devices.
[0045] Embodiments of the present application provide an electronic device. The electronic device can be a device with a display screen. The electronic device can be mobile or fixed. The electronic device can be deployed on land (for example, indoors or outdoors, handheld or vehicle-mounted, etc.), water (for example, ships, etc.), or air (for example, airplanes, balloons, satellites, etc.). The electronic device can be referred to as a user equipment (UE), an access terminal, a terminal unit, a subscriber unit, a terminal station, a mobile station (MS), a mobile terminal, a terminal agent, or a terminal device, etc. For example, the electronic device can be a mobile phone, a tablet computer, a notebook computer, a smart bracelet, a smart screen, a smart watch, a virtual reality (VR) device, an augmented reality (AR) device, a terminal in industrial control, a terminal in self driving, a terminal in remote medical treatment, a terminal in smart grid, a terminal in transportation safety, a terminal in smart city, a terminal in smart home, etc. Embodiments of the present application do not limit the specific type and structure of the electronic device. A possible structure of the electronic device is described below.
[0046] Taking the electronic device as a mobile phone as an example, Figure 1 A possible structure of the electronic device 101 is shown. The electronic device 101 can include a processor 210, an external memory interface 220, an internal memory 221, a universal serial bus (USB) interface 230, a power management module 240, a battery 241, a wireless charging coil 242, an antenna 1, an antenna 2, a mobile communication module 250, a wireless communication module 260, an audio module 270, a speaker 270A, a receiver 270B, a microphone 270C, a headset interface 270D, a sensor module 280, a key 290, a motor 291, an indicator 292, a camera 293, a display screen 294, and a subscriber identification module (SIM) card interface 295, etc. Optionally, in some embodiments, an audio digital signal processor (ADSP) 243 is further included.
[0047] It can be understood that the structure shown in the embodiments of the present application does not constitute a specific limitation on the electronic device 101. In other embodiments of the present application, the electronic device 101 can include more or fewer components than shown, or combine certain components, or split certain components, or different arrangement of components. The components shown can be implemented in hardware, software or a combination of software and hardware.
[0048] The processor 210 can include one or more processing units, for example: the processor 210 can be a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), a system on chip (SoC), a central processing unit (CPU), an application processor (AP), a network processor (NP), a digital signal processor (DSP), a microcontroller unit (MCU), a programmable logic device (PLD), a modem processor, a graphics processing unit (GPU), an image signal processor (ISP), a controller, a video codec, a baseband processor, and a neural-network processing unit (NPU), etc. Different processing units can be independent devices or integrated in one or more processors. For example, the processor 210 can be an application processor AP. Or, the above processor 210 can be integrated in a system on chip (SoC). Or, the above processor 210 can be integrated in an integrated circuit (IC) chip. The processor 210 can include an analog front end (AFE) and a micro-controller unit (MCU) in the IC chip.
[0049] The processor 210 executes the display control method provided by the embodiments of the present application by executing programs, computer instructions stored in the internal memory 221.
[0050] The processor 210 can also include a memory for storing computer instructions and data. In some embodiments, the memory in the processor 210 is a cache memory. The memory can hold computer instructions or data that the processor 210 has just used or recycled. If the processor 210 needs to use the computer instructions or data again, it can be directly called from the memory. This avoids repeated access and reduces the waiting time of the processor 210, thus improving the efficiency of the system.
[0051] In some embodiments, the processor 210 can include one or more interfaces. The interfaces can include an inter-integrated circuit (I2C) interface, an inter-integrated circuit sound (I2S) interface, a pulse code modulation (PCM) interface, a universal asynchronous receiver / transmitter (UART) interface, a mobile industry processor interface (MIPI), a general-purpose input / output (GPIO) interface, a subscriber identity module (SIM) interface, and / or a USB interface, etc.
[0052] The ADSP 243 can be coupled with the audio module 270 and the sensor module 280, and can be used to process audio signals and also process sensor data. When the processor is in a sleep state, the ADSP 243 can still work, thereby reducing the power consumption of the electronic device.
[0053] It can be understood that the interface connection relationship between the modules shown in the embodiments of the present application is only illustrative and does not constitute a structural limitation of the electronic device 101. In other embodiments of the present application, the electronic device 101 can also use different interface connection methods or combinations of multiple interface connection methods in the above embodiments.
[0054] The wireless communication function of the electronic device 101 can be realized through the antenna 1, the antenna 2, the mobile communication module 250, the wireless communication module 260, the modem processor, and the baseband processor, etc.
[0055] Antennas 1 and 2 are used to transmit and receive electromagnetic wave signals. Each antenna in electronic device 101 can be used to cover a single or multiple communication frequency bands. Different antennas can also be multiplexed to improve the utilization of antennas. For example, antenna 1 can be multiplexed as a diversity antenna for wireless local area networks. In some other embodiments, antennas can be used in combination with tuning switches.
[0056] Mobile communication module 250 can provide a solution for wireless communication including 2G / 3G / 4G / 5G, etc. applied to electronic device 101. Wireless communication module 260 can provide a solution for wireless communication including wireless local area networks (WLAN) (such as wireless fidelity (Wi-Fi) networks), Bluetooth (BT), global navigation satellite system (GNSS), frequency modulation (FM), near field communication (NFC), infrared (IR) technology, etc. applied to electronic device 101. In some embodiments, antenna 1 of electronic device 101 is coupled with mobile communication module 250, and antenna 2 is coupled with wireless communication module 260, so that electronic device 101 can communicate with networks and other devices through wireless communication technologies.
[0057] External memory interface 220 can be used to connect an external memory card, such as a micro SanDisk (Micro SD) card, to realize the expansion of the storage capacity of electronic device 101. The external memory card communicates with processor 210 through external memory interface 220 to realize the data storage function. For example, files such as music and videos are saved in the external memory card.
[0058] Internal memory 221 can be used to store computer executable program codes, which include computer instructions. Processor 210 executes various functional applications and data processing of electronic device 101 by running the computer instructions stored in internal memory 221. In addition, internal memory 221 can include a high-speed random access memory, and can also include a non-volatile memory, such as at least one magnetic disk storage device, a flash memory device, a universal flash storage (UFS), etc.
[0059] The memory to which embodiments of the present application are directed can be volatile memory or non-volatile memory, or can include both volatile and non-volatile memory. Among them, the non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically EPROM (EEPROM), or flash memory. The volatile memory can be random access memory (RAM) used as an external cache. By way of example, but not limitation, many forms of RAM are available, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous dynamic RAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchlink DRAM (SLDRAM), and direct Rambus RAM (DR RAM). It should be noted that the memory of the system and method described herein is intended to include, but not be limited to, these and any other suitable types of memory.
[0060] The electronic device 101 can implement an audio function through the audio module 270, the speaker 270A, the receiver 270B, the microphone 270C, the earphone interface 270D, and the application processor, etc. For example, music playback, recording, etc.
[0061] The audio module 270 is configured to convert digital audio information into an analog audio signal output, and to convert an analog audio input into a digital audio signal. In some embodiments, the audio module 270 can be disposed in the processor 210, or some functional modules of the audio module 270 can be disposed in the processor 210. The speaker 270A, also referred to as a "loudspeaker", is configured to convert an audio electrical signal into a sound signal. The receiver 270B, also referred to as a "earpiece", is configured to convert an audio electrical signal into a sound signal. The microphone 270C, also referred to as a "microphone", "microphone", is configured to convert a sound signal into an electrical signal. The electronic device 101 can be provided with at least one microphone 270C. The earphone interface 270D is configured to connect a wired earphone. The earphone interface 270D can be a USB interface 230, or a 3.5mm open mobile terminal platform (OMTP) standard interface, a cellular telecommunications industry association of the USA (CTIA) standard interface.
[0062] The keys 290 include a power key, a volume key, and the like. The keys 290 can be mechanical keys. Alternatively, the keys 290 can be touch keys. The electronic device 101 can receive a key input, and generate a key signal input related to user settings and function control of the electronic device 101. The motor 291 can generate a vibration prompt. The motor 291 can be used for incoming call vibration prompts, and can also be used for touch vibration feedback. The indicator 292 can be an indicator light, and can be used to indicate a charging state, a power change, and can also be used to indicate a message, a missed call, a notification, and the like. The SIM card interface 295 is configured to connect a SIM card. The SIM card can be inserted into or removed from the SIM card interface 295 to achieve contact and separation with the electronic device 101. The electronic device 101 can support one or N SIM card interfaces, N being a positive integer greater than 1. The SIM card interface 295 can support a Nano SIM card, a Micro SIM card, a SIM card, and the like. In some embodiments, the electronic device 101 uses an embedded SIM (eSIM) card, which can be embedded in the electronic device 101 and cannot be separated from the electronic device 101.
[0063] The electronic device 101 can implement a photographing function through an ISP, a camera 293, a video codec, a GPU, a display 294, and an application processor, etc. The ISP is used to process data fed back by the camera 293. In some embodiments, the ISP can be disposed in the camera 293. The camera 293 is used to capture a still image or a video. In some embodiments, the electronic device 101 can include 1 or N cameras 293, where N is a positive integer greater than 1.
[0064] The electronic device 101 can implement a display function through a GPU, a display 294, and an application processor, etc. The GPU is a microprocessor for image processing, connected to the display 294 and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. The processor 210 can include one or more GPUs that execute computer instructions to generate or change display information.
[0065] The sensor module 280 can include a pressure sensor, a gyro sensor, a barometric sensor, a magnetic sensor, an acceleration sensor, a distance sensor, a proximity light sensor, a fingerprint sensor, a temperature sensor, a touch sensor, an ambient light sensor, an angle sensor, etc. When the display 294 is a folding screen, the angle sensor can detect the folding angle of the display 294, and the folding angle ranges from 0 to 180 degrees.
[0066] The battery 241 can include one or more batteries to power the load.
[0067] The power management module 240 is used to receive charging input from a charger. The charger can be a wireless charger, such as a wireless charging base, another electronic device 101 with a reverse wireless charging function, etc. The power management module 240 can receive wireless charging input through the wireless charging coil 242 of the electronic device. The charger can also be a wired charger, for example, the power management module 240 can receive charging input from a wired charger through the USB interface 230. The power management module 240 is also called a charging chip.
[0068] The power management module 240 can supply power to the electronic device while charging the battery 241. The power management module 240 receives input from the battery 241 to power the processor 210, the internal memory 221, the external memory interface 220, the display 294, the camera 293, and the wireless communication module 260, etc. The power management module 240 can also be used to monitor parameters such as the capacity, voltage, battery cycle count, and battery health state (leakage, impedance) of the battery 241. In other embodiments, the power management module 240 can also be disposed in the processor 210.
[0069] The display screen 294 is configured to display images, videos, and the like. The display screen 294 includes a display panel. In some embodiments, the electronic device 101 can include one or more display screens 294. The display screen involved in the embodiments of the present application can be a frame rate variable OLED display screen. With the popularization of OLED display screens such as LTPO display screens and LTPS display screens, many OLED display screens can support switching between different frame rates. In particular, the LTPO display screen supports a lower frame rate, for example, can support frame rates of 120hz, 90hz, 90hz, 30hz, 10hz, and even support a 1hz flicker-free frame rate. The reason is that the OLED display screen includes a thin film transistor (TFT) for driving the light-emitting pixel points, but the TFT in the LTPS display screen is prone to leakage, and the TFT in the LTPO display screen adopts an indium gallium zinc oxide (IGZO) process, so that the leakage current generated by the TFT is very small after the capacitor coupled to the gate of the TFT completes a charging, ensuring that the voltage applied to the gate of the TFT can be kept constant for a long time, and the pixel point driven by the TFT can keep emitting light for a long time, thereby realizing a very low frame rate.
[0070] As shown in Figure 2 , the display screen 294 can be connected to a display driver IC (DDIC) 31 through a flexible circuit board, and the processor 210 sends image data to the DDIC 31 through a display serial interface (DSI) interface, and the DDIC 31 refreshes the image displayed by the display screen 294 according to the image data. As shown in Figure 2 and Figure 3 , after completing the refresh of a frame of image data, the DDIC 31 feeds back a frame synchronization signal, a tearing effect (TE) signal, to the processor 210, indicating that a frame of image data has been refreshed. After completing the drawing and composition of the next frame of image data, the processor 210 does not send the next frame of image data to the DDIC 31 until it receives the TE signal corresponding to the previous frame of image data. Therefore, the frequency of the TE signal changes with the frame rate of the display screen 294.
[0071] The TE signal can achieve frame synchronization between the processor 210 and the DDIC 31, that is, prevent the image data sent by the processor 210 to the DDIC 31 from being out of synchronization with the image data refreshed by the DDIC 31 to the display screen 294, and prevent the display screen 294 from displaying tearing (some areas of the display screen 294 display the previous frame of image, and the remaining areas display the next frame of image). As shown in Figure 4As shown, since the display screen 294 refreshes a frame of image by row, the time when the DDIC 31 sends the TE signal cannot be too early, otherwise the new image data is received before the refresh of the previous frame of image is completed, which causes the display tearing problem described above. Ideally, the DDIC 31 receives the image data of the next frame after the refresh of the previous frame of image is completed, and then starts the refresh of the next frame of image. Therefore, the DDIC 31 can send the TE signal as early as when the last few rows of pixels of the display screen 294 are refreshed, so that the DDIC 31 receives the new image data as early as possible.
[0072] The DDIC 31 can or can not include a graphics random access memory (GRAM). The present application is described by way of example with the DDIC 31 including a GRAM, but is not intended to be limited thereto.
[0073] When the DDIC 31 does not include a GRAM, the display screen 294 is referred to as a video display screen, and the DDIC 31 cannot store image data and cannot refresh the display screen 294 by itself. After the processor 210 sends the image data to the DDIC 31, the DDIC 31 can refresh the image displayed on the display screen 294 based on the image data.
[0074] When the DDIC 31 includes a GRAM, the GRAM can be used to store image data and can refresh the display screen 294 by itself. In this case, the display screen 294 is referred to as a command display screen. After the processor 210 completes the drawing and composition of a frame of image data, the processor 210 sends a command to the DDIC 31 to indicate that image data is to be written to the GRAM in the DDIC 31, and the position coordinates of the image data to be written. Then the processor 210 writes the image data to the GRAM in the DDIC 31, and the DDIC 31 reads the image data from the GRAM to refresh the image displayed on the display screen 294. If the processor 210 does not send new image data to the DDIC 31, the DDIC 31 can read the image data of the previous frame of image from the GRAM by itself, and continuously refresh the display screen 294 to display the previous frame of image, thereby achieving self-refresh of the display screen 294.
[0075] As shown, since the display screen 294 refreshes a frame of image by row, the time when the DDIC 31 sends the TE signal cannot be too early, otherwise the new image data is received before the refresh of the previous frame of image is completed, which causes the display tearing problem described above. Ideally, the DDIC 31 receives the image data of the next frame after the refresh of the previous frame of image is completed, and then starts the refresh of the next frame of image. Therefore, the DDIC 31 can send the TE signal as early as when the last few rows of pixels of the display screen 294 are refreshed, so that the DDIC 31 receives the new image data as early as possible. Figure 5As shown, in the prior art, when the processor 210 does not send new image data to the DDIC 31, the DDIC 31 continuously self-refreshes the previous frame of image according to the frame rate corresponding to different sequences (essentially different refresh periods) in turn. Generally, the frame rates corresponding to different sequences can be set to be different, for example, the frame rates corresponding to each sequence gradually decrease, so that the power consumption can be reduced on the basis of ensuring the smoothness of the image. In addition, the number of repetitions can be set for each sequence, which is used to indicate the number of times of repeatedly self-refreshing according to the frame rate corresponding to the sequence. That is, the DDIC 31 can continuously self-refresh multiple times according to the same frame rate. After each self-refresh is performed, the DDIC 31 sends a TE signal to the processor 210.
[0076] For example, the different sequences can include sequence 1 to sequence 8, etc., and the specific sequence is not limited. Taking sequence 1 to sequence 5 as an example, the frame rate of sequence 1 can be set to 120hz, and the number of repetitions is 0 times (i.e., 1 time of self-refreshing is performed according to the frame rate); the frame rate of sequence 2 is 60hz, and the number of repetitions is 2 times (i.e., 3 times of self-refreshing is performed according to the frame rate); the frame rate of sequence 3 is 30hz, and the number of repetitions is 2 times (i.e., 3 times of self-refreshing is performed according to the frame rate); the frame rate of sequence 4 is 10hz, and the number of repetitions is 2 times (i.e., 3 times of self-refreshing is performed according to the frame rate); the frame rate of sequence 5 is 1hz, and the number of repetitions is 2 times (i.e., 3 times of self-refreshing is performed according to the frame rate). In fact, the frame rates of the DDIC 31 self-refreshing from sequence 1 to sequence 5 are: 120hz->60hz->60hz->60hz->30hz->30hz->30hz->10hz->10hz->10hz->5hz->5hz->5hz->1hz->1hz->1hz.
[0077] The time consumed to complete one refresh is called a refresh period, so one sequence can include one or more refresh periods. Each refresh period includes at least a scanning interval, and optionally includes a holding interval. In the scanning interval, the DDIC 31 scans the display screen according to the recently received image data, that is, controls the TFT driving the pixel points to turn on row by row. The scanning interval is the minimum time to complete the scanning of one frame of image, and the reciprocal of the scanning interval is called the basic frame rate (or base frequency), that is, no matter how the frame rate of the display screen is switched, the frame rate of the display screen will not be higher than the basic frame rate, otherwise it is not enough in time to complete the scanning of one frame of image. In the holding interval, the DDIC 31 holds the image displayed by the display screen, that is, controls the TFT driving the pixel points to maintain the on state after scanning, so that the display screen continuously displays the last frame of image.
[0078] If DDIC 31 does not receive new image data from processor 210 after performing a self-refresh of the last refresh period of the last sequence (e.g., the third refresh period of sequence 5), DDIC 31 will maintain the refresh rate of that sequence (e.g., 1 Hz) to achieve self-refresh with minimal power consumption. If new image data is received from processor 210 during the self-refresh process of DDIC 31, it will jump back to the first sequence and repeat the above process.
[0079] Besides DDIC 31 controlling the display's self-refresh at a certain frame rate, processor 210 can also control DDIC 31 to switch the display's frame rate. For example, when a user performs a swipe operation on the display, a frame rate of 120Hz or 90Hz is desired to avoid display stuttering. When displaying video, a frame rate of 60Hz or 30Hz is desired to reduce power consumption while ensuring smooth image display. When displaying still images, the frame rate is further reduced. For example, when the video includes on-screen display (OSD) elements such as bullet comments and user experience (UX) interactions, a frame rate of 60Hz is desired; when the video lacks bullet comments or UX elements, a frame rate of 30Hz is desired, and so on. The frame rate switching control logic is relatively complex and requires the display's frame rate to switch rapidly.
[0080] The following section explains, from the perspective of the processor 210's software architecture, how the processor 210 executes the frame rate switching control logic in the prior art.
[0081] From a software architecture perspective, the programs run by processor 210 can be based on an operating system, such as Android. Apple (iOS) Windows Etc. For example Figure 6 As shown, the program running on processor 210 is based on Android. For example, the programs running on the processor 210 are layered according to their functions, which may include the kernel layer, the hardware abstraction layer (HAL), and the application layer.
[0082] The kernel layer includes the operating system (OS) kernel and hardware drivers that drive hardware resources, such as display drivers. The OS kernel manages system processes, memory, drivers, file systems, and network systems. The display driver facilitates communication between the processor 210 and the DDIC 31. HAL provides a set of device function interface specifications to implement a virtual hardware platform that abstracts the hardware, hiding hardware interface details, making the code hardware-independent and portable across multiple platforms. For example, HAL includes a rendering service (SurfaceFlinger), which periodically renders and draws image data. The application layer can include apps that need to display images, such as photo album apps and video apps.
[0083] like Figure 6 and Figure 7 As shown, in the prior art, the control logic for switching the display frame rate in the processor 210 is as follows: The application layer APP in the processor 210 performs drawing and rendering to obtain image data, and sends it to the rendering service (SurfaceFlinger). The rendering service (SurfaceFlinger) identifies the application scenario of the electronic device (e.g., the user performing a swipe operation on the display screen, or displaying video, or displaying a static image, as mentioned above), determines the frame rate of the display screen based on the identified application scenario, and sends a frame rate setting command and image data to the DDIC 31 through the display driver. The frame rate setting command instructs the DDIC 31 to set the display frame rate. The DDIC 31 sets the display frame rate according to the frame rate setting command. After refreshing one frame of image based on the image data, it sends a TE signal to the processor 210. The frequency of the TE signal is equal to the frame rate of the display screen. The display driver sends a vertical synchronization (VSYNC) signal to the APP through the rendering service (SurfaceFlinger). The frequency of the VSYNC signal is equal to the frequency of the TE signal, which is also equal to the frame rate of the display screen. After receiving the VSYNC signal, the APP draws and renders a frame of image to obtain new image data, and sends it to the rendering service (SurfaceFlinger) to refresh the next frame of image, thereby realizing frame synchronization between the processor 210 and DDIC 31.
[0084] However, since there are many types of application programs (APPs) in the application layer, the SurfaceFlinger is difficult to accurately identify the application scenario, so as to accurately determine the frame rate of the display screen, or the time delay of identifying the application scenario is too large, resulting in that the frame rate of the display screen cannot be switched in time, thereby causing the display screen to appear to be stuck, and affecting the user experience.
[0085] The display control method provided by the embodiments of the present application is that, in the holding interval of sequence 1 of self-refresh, the DDIC sends a plurality of TE signals to the processor, instead of sending the TE signal after the self-refresh of the sequence is executed. The reciprocal of the time from the scanning interval of sequence 1 to the time when any TE signal is sent is equal to a frame rate (the frame rate is also a frequency in nature). When the processor needs the display screen to be refreshed at a certain frame rate, the DDIC does not need to be instructed to set the frame rate of the display screen, but only needs to be fixedly responsive to the TE signal corresponding to the frame rate to send image data to the DDIC. In this way, the DDIC receives the image data at the frame rate (i.e. the frequency), and after receiving the image data each time, jumps back to the scanning interval of sequence 1, and scans the display screen according to the new image data. That is, the DDIC provides a plurality of TE signals with finer granularity in the holding interval of sequence 1 for the processor to select, the processor can at any time respond to a certain TE signal to send new image data to the DDIC, and the DDIC responds to the received new image data to refresh the display screen. That is, the frequency at which the processor sends the image data (i.e. the frame rate expected by the processor) determines the frame rate at which the DDIC refreshes the display screen, thereby realizing adaptive adjustment of the frame rate of the display screen by the DDIC. As shown in the figure, the display control method comprises the following steps. Figure 8
[0086] S1, the processor sends image data to the DDIC.
[0087] Correspondingly, the DDIC receives the image data from the processor.
[0088] S2, in the first scanning interval in the first refresh period, the DDIC performs line-by-line scanning on the display screen according to the most recently received image data.
[0089] The first refresh period is sequence 1 described above. As shown in the figure, Figure 9 and Figure 10 As shown, the first refresh period includes a first scan interval and a first hold interval following the first scan interval. During the first scan interval, the DDIC scans the display screen line by line based on the most recently received image data to complete the scan of one frame. If no new image data is received during the first refresh period, the DDIC holds the image displayed on the screen during the first hold interval, that is, it controls the TFTs driving the pixels to maintain their on-state after scanning, and the display screen continues to display the most recent frame.
[0090] The duration of the first refresh period is equal to the reciprocal of the lowest frame rate in sequence 1. For example, as... Figure 9 and Figure 10 As shown, assuming a minimum frame rate of 30Hz in the most common application scenario, the duration of the first refresh interval is equal to 33.33ms. The duration of the first scan interval is equal to the reciprocal of the base frame rate. For example, as... Figure 9 and Figure 10 As shown, assuming a base frame rate of 120Hz, the duration of the first scan interval is 8.33ms. The base frame rate is described above and will not be repeated here.
[0091] S3. During the first refresh period, DDIC sends multiple TE signals to the processor.
[0092] like Figure 9 As shown, DDIC can send multiple TE signals to the processor during the entire first refresh period, which can be referred to as high-frequency TE signals (e.g., 360Hz). Or, as... Figure 10 As shown, the DDIC can send a TE signal A (e.g., 120 Hz) to the processor just before the end of the first scan interval, and send multiple high-frequency TE signals (e.g., 360 Hz) to the processor during the first hold interval, thereby forming a hybrid TE signal including different frequencies (e.g., 120 Hz and 360 Hz). The frequency of the TE signal refers to the reciprocal of the time between sending two adjacent TE signals.
[0093] Multiple TE signals can be transmitted at equal intervals, thus exhibiting periodic transmission. Figure 9 (as shown); or, multiple TE signals do not exhibit periodic transmission or exhibit partially periodic transmission (as shown). Figure 10 (as shown), etc. This application uses the periodic or partial periodic transmission of multiple TE signals as an example, but is not intended to be limited thereto. The period of the TE signal is k times the period of the transmission (EM) signal, where k is a positive integer. For example, Figure 9 In this example, the period of the TE signal is one time the period of the ordinary EM signal and six times the period of the high-frequency EM signal. The duration of the first hold interval is n times the period of the TE signal, where n is a positive integer. For example,Figure 10 and Figure 9 In the above, the length of the first holding interval is 9 times the period of the TE signal.
[0094] The EM signal is used to control the turn-on and turn-off of the TFT in the OLED driving circuit, thereby controlling whether the pixel point emits light. Since the TFT is usually a PMOS structure, when the EM signal is at a high level, the TFT is turned off so that the OLED pixel point driven by the TFT does not emit light, and when the EM signal is at a low level, the TFT is turned on so that the OLED pixel point driven by the TFT emits light.
[0095] When direct current (DC) dimming is used, the EM signal is at a low level, and the OLED brightness is adjusted by adjusting the power of the OLED driving circuit. When pulse width modulation (PWM) dimming is used, the EM signal can be a PWM signal with a variable duty cycle, and the OLED brightness is adjusted by adjusting the duty cycle of the EM signal. For PWM dimming, since the scanning actions such as refreshing, resetting, compensating, and charging each row of OLED pixel points are performed when the OLED pixel points are not emitting light (i.e., the EM signal is at a high level), the frequency of the TE signal and the frequency of the EM signal have a multiple relationship, i.e., the frequency of the EM signal is k times the frequency of the TE signal, or the period of the TE signal is k times the period of the EM signal, where k is a positive integer.
[0096] For example, assuming that the base frame rate (the reciprocal of the length of the scanning interval) described above is 120hz, and that high-frequency PWM dimming requires 18 EM signal pulses to complete the scanning of one frame of image, then the frequency of the EM signal is 2160hz (120*18=2160hz), and the frequency of the TE signal can be 360hz, the length of the TE signal is 1 / 360=2.778ms, and the length of each TE signal corresponds to the length of 6 EM signals.
[0097] It should be noted that the present application is not limited to the above example of a base frame rate of 120hz and a TE signal frequency of 360hz. The base frame rate and the frequency of the TE signal can be flexibly set according to actual product requirements. For example, the base frame rate can also be 90hz, 144hz, etc., and the frequency of the TE signal can also be 120hz, 240hz, 360hz, 480hz, etc.
[0098] In addition, Figure 9 The scheme shown has the advantage that Figure 10 The scheme shown has the advantage that Figure 10The scheme of the DDIC receiving new image data in the holding interval (e.g., the first holding interval) and not receiving new image data in the scanning interval (e.g., the first scanning interval) is implemented. The reason is that even if the DDIC sends a TE signal in the scanning interval, so that the DDIC receives new image data in the scanning interval, the DDIC cannot respond and refresh the image data in turn, otherwise it will interrupt the current scanning process, causing image tearing or other display abnormalities. Instead, the above-mentioned image data needs to be processed after entering the holding interval. Thus, the risk of the DDIC being abnormally interrupted when scanning in the scanning interval can be effectively avoided.
[0099] S4, the processor sends new image data to the DDIC in the first refresh period in response to any TE signal in the first refresh period. If the DDIC receives new image data in the first refresh period, it starts to execute from step S2 after a first preset time.
[0100] As shown in Figure 9 After the DDIC 31 sends a high-frequency TE signal or a mixed TE signal to the processor 210, the display screen driver of the processor 210 sends a vertical synchronization (VSYNC) signal to the APP through the drawing rendering service (SurfaceFlinger) in response to any TE signal (e.g., the most recently received TE signal) in the plurality of TE signals, and the frequency of the VSYNC signal is equal to the frame rate that the processor expects the display screen to refresh, such as 120hz, 90hz or 60hz, etc. After the APP receives the VSYNC signal, it draws and renders a frame of image to obtain new image data, and sends the new image data to the drawing rendering service (SurfaceFlinger) after receiving the TE signal corresponding to the required frame rate, and then sends it to the display screen driver. The display screen driver sends the new image data to the DDIC 31. The DDIC can refresh the display screen according to the sending frequency of the image data. Compared with the traditional scheme shown in Figure 9 , the response is more timely and the performance is better.
[0101] The first preset time refers to the later of the following two times: the time when the image data is most recently received, and the time when the first holding interval starts.
[0102] That is, if the DDIC receives new image data in the first scanning interval, after waiting for the first scanning interval to end to complete scanning of the previous frame of image, the execution is restarted from step S2 to re-enter the first scanning interval to scan the next frame of image. If the DDIC receives new image data in the first holding interval, the holding of the previous frame of image can be stopped directly, and the execution is restarted from step S2 to re-enter the first scanning interval to scan the next frame of image.
[0103] The display control method is described below in connection with Figure 11 or Figure 6 examples.
[0104] When the DDIC receives image data from the processor, it starts to refresh the display screen according to sequence 1 (corresponding to the first refresh period). First, the DDIC completes scanning of the display screen in the first scanning interval, and sends a TE signal A (with a frequency of 120 hz) to the processor before the first scanning interval is about to end. When the processor sends image data to the DDIC in response to the TE signal A, the frequency of sending image data by the processor is actually also 120 hz. The DDIC receives new image data from the processor after the TE signal A, re-enters the first scanning interval, and completes scanning of a new frame of image, at which time the frame rate of the display screen is adapted to be 120 hz.
[0105] If the TE signal A of the DDIC is not responded by the processor, the DDIC sends a TE signal to the processor periodically in the first holding interval. When the processor sends new image data to the DDIC in response to a TE signal B (with a frequency of 90 hz) in the first holding interval, the frequency of sending image data by the processor is actually also 90 hz. The DDIC receives new image data from the processor after the TE signal B, re-enters the first scanning interval, and completes scanning of a new frame of image, at which time the frame rate of the display screen is adapted to be 90 hz.
[0106] Similarly, when the processor sends new image data to the DDIC in response to a TE signal C (with a frequency of 60 hz) in the first holding interval, the frequency of sending image data by the processor is actually also 60 hz. The DDIC receives new image data from the processor after the TE signal C, re-enters the first scanning interval, and completes scanning of a new frame of image, at which time the frame rate of the display screen is adapted to be 60 hz.
[0107] When the processor sends new image data to the DDIC in response to the TE signal D (the frequency of which is 30hz) in the first holding interval, the frequency at which the processor actually sends image data is also 30hz. The DDIC receives new image data from the processor after the TE signal D, re-enters the first scanning interval, and completes scanning of a new frame of image, at which time the frame rate of the display screen is adaptively 30hz.
[0108] In actual use, the DDIC can continuously send TE signals at one or two frequencies, such as 360hz, 120hz, 90hz, 60hz, 120hz&360hz (a mixture of 120hz and 360hz). The frequency of the TE signal determines the highest frequency at which the AP sends image data and the highest frame rate at which the display screen refreshes, i.e., the base frame rate. The display control method described above can theoretically achieve adaptive adjustment of the frame rate in the range from the base frame rate to 1 / [(1 / base frame rate)+n*(1 / TE signal frequency)], where n is the length of the first holding interval described above, which is n times the period of the TE signal. For example, Figure 9 In the example shown, n is 9, the DDIC sends TE signals at 120hz, and the frequency range at which the AP sends image data and the frame rate range of the display screen are both: 120hz to 1 / [(1 / 120)+n*(1 / 360)] hz, i.e., 120hz-60hz-40hz-30hz, etc., frequencies or frame rates that can be divided by 120hz. Similarly, if the DDIC sends TE signals at 60hz, the frequency range at which the AP sends image data and the frame rate range of the display screen are both 60hz-30hz-20hz-10hz, etc., frequencies or frame rates that can be divided by 60hz.
[0109] Optionally, as shown in Figure 10 If the DDIC does not receive new image data in the first refresh period (including the first holding interval) corresponding to sequence 1, the self-refresh of the subsequent sequence is performed. Specifically, the display control method described above further includes:
[0110] S5, in the second scanning interval in the second refresh period after the first refresh period, the DDIC scans the display screen according to the most recently received image data.
[0111] The second refresh period can refer to other sequences (such as sequences 2 to 8, etc.) other than sequence 1 of the self-refresh. Similar to the first refresh period, as shown in Figure 9 and Figure 12As shown, the second refresh period includes a second scanning interval and a second holding interval after the second scanning interval. In the second scanning interval, the DDIC performs line-by-line scanning on the display screen according to the most recently received image data to complete scanning of one frame of image. If no new image data is received within the second refresh period, the DDIC holds the image displayed on the display screen in the second holding interval, i.e. controls the TFT driving the pixel points to maintain the on state after scanning, at which time the display screen continuously displays the most recent frame of image.
[0112] The length of each second refresh period is equal to the reciprocal of the lowest frame rate of the sequence corresponding to the refresh period. The lowest frame rate of each sequence can be the same or different, and in particular, the lowest frame rate of each sequence can decrease in turn, so that the length of the refresh period corresponding to each sequence increases in turn. For example, the lowest frame rate of sequence 1 is 30hz, the lowest frame rate of sequence 2 is 24hz, the lowest frame rate of sequence 3 is 20hz, the lowest frame rate of sequence 4 is 15hz, the lowest frame rate of sequence 5 is 10hz, the lowest frame rate of sequence 6 is 5hz, and the lowest frame rate of sequence 7 is 1hz. At this time, the difference between the length of the second holding interval and the length of the first holding interval is m times the period of the TE signal, and m is a positive integer.
[0113] S6, the DDIC sends a plurality of TE signals within the second refresh period.
[0114] Similarly to step S3, as shown in Figure 9 , the DDIC can send a plurality of TE signals to the processor within the entire second refresh period, at which time it can be referred to as a high-frequency TE signal (e.g. a frequency of 360hz). Alternatively, as shown in Figure 10 , the DDIC can send one TE signal (e.g. a frequency of 120hz) to the processor before the second scanning interval is about to end, and send a plurality of high-frequency TE signals (e.g. a frequency of 360hz) to the processor within the second holding interval, thereby forming a Hybrid TE signal including different frequencies (e.g. 120hz and 360hz).
[0115] Other contents of step S6 are described in step S3, and will not be described here.
[0116] S7, the processor sends new image data to the DDIC within the second refresh period in response to any TE signal within the second refresh period. If the DDIC receives new image data within the second refresh period, it re-executes from step S2 after a second predetermined time. If the DDIC does not receive new image data within the second refresh period, it re-executes from step S5.
[0117] Regarding the processor 210 sending new image data to the DDIC 31 in response to the TE signal, reference is made toFigure 9 The relevant description is not repeated here. The second preset time refers to the later of the time at which the image data is most recently received and the time at which the second holding interval begins.
[0118] That is, if the DDIC receives new image data in the second scanning interval, after waiting for the second scanning interval to end to complete scanning of the previous frame of image, the execution is restarted from step S2 to re-enter the first scanning interval to scan the next frame of image. If the DDIC receives new image data in the second holding interval, the holding of the previous frame of image can be stopped directly, and the execution is restarted from step S2 to re-enter the first scanning interval to scan the next frame of image. If the DDIC does not receive new image data in the second refresh period, the next second refresh period is entered, and the self-refresh is restarted.
[0119] The number of repetitions can also be set for each sequence as needed, for example, the number of repetitions of sequence 1 is set to 1 time, and the number of repetitions of sequences 2 to 7 is set to 3 times. Therefore, the next second refresh period can refer to the next sequence, for example, from sequence 2 to sequence 3, or the next second refresh period can also refer to the same sequence, for example, entering sequence 2 repeatedly according to the number of repetitions. For example, when the DDIC does not receive new image data from the processor at all times, the DDIC can self-refresh from sequence 1 to sequence 7, and the frame rate of the self-refresh is: 120hz->30hz->24hz->24hz->24hz->20hz->20hz->20hz->15hz->15hz->15hz->10hz->10hz->10hz->5hz->5hz->5hz->1hz in turn, and then the DDIC maintains the refresh rate of the last sequence (for example, 1hz) all the time, so as to realize self-refresh with the lowest power consumption. Adaptive adjustment of the frame rate from dynamic brushing to static no-brushing can be realized.
[0120] In addition, since the DDIC sends the high-frequency TE signal in the holding interval in each refresh period (i.e., sequence), it is not necessary to wait for the entire refresh period to end before sending the TE signal, so after any TE signal, the DDIC can respond to new image data from the processor to re-enter the first scanning interval to refresh the new image data at a faster speed.
[0121] The display control method provided by the embodiments of the present application is that, in the holding interval of the refresh period, the DDIC sends multiple TE signals to the processor, instead of sending the TE signal after the refresh period ends. The reciprocal of the time from the start of the scanning interval of the refresh period to the sending of any TE signal is equal to a frame rate (the frame rate is also essentially a frequency). When the processor needs the display screen to refresh at a certain frame rate, the processor does not need to directly instruct the DDIC to set the frame rate of the display screen, but only needs to send image data to the DDIC in response to the TE signal corresponding to the frame rate. That is, the DDIC provides multiple TE signals for the processor to select in the holding interval of the refresh period, the processor can send new image data to the DDIC in response to any TE signal at any time, and the DDIC refreshes the display screen in response to the received new image data. That is, the frequency at which the processor sends image data (i.e., the frame rate expected by the processor) determines the frame rate at which the DDIC refreshes the display screen, thereby realizing adaptive adjustment of the frame rate of the display screen by the DDIC.
[0122] The embodiments of the present application also provide a computer-readable storage medium including instructions, when the instructions are executed on the above-mentioned electronic device, the electronic device performs each step in the above-mentioned method embodiments, for example, executes the method shown in Figure 10 and Figure 11 .
[0123] The embodiments of the present application also provide a computer program product including instructions, when the instructions are executed on the above-mentioned electronic device, the electronic device performs each step in the above-mentioned method embodiments, for example, executes the method shown in Figure 8 and Figure 12 Figure 8 Figure 12 .
[0124] The technical effects of the computer-readable storage medium and the computer program product are referred to the technical effects of the above-mentioned method embodiments.
[0125] It should be understood that, in various embodiments of the present application, the size of the serial number of each process does not mean the order of execution, the execution order of each process should be determined according to its function and inherent logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.
[0126] Those skilled in the art can appreciate that the modules and algorithm steps of the examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware or a combination of computer software and electronic hardware. Whether the functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. A person skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.
[0127] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working process of the system, device and module described above can refer to the corresponding process in the foregoing method embodiments, and will not be repeated here.
[0128] In several embodiments provided in the present application, it should be understood that the disclosed system, device and method can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the modules is only a logical function division. In actual implementation, another division mode can be used. For example, a plurality of modules or components can be combined or integrated into another device, or some features can be omitted or not executed. In addition, the coupling or direct coupling or communication connection between the displayed or discussed modules can be indirect coupling or communication connection through some interfaces, devices or modules, which can be electrical, mechanical or other forms.
[0129] The modules described as separate components can or can not be physically separated, and the components displayed as modules can or can not be physical modules, that is, they can be located in one device or distributed to multiple devices. Part or all of the modules can be selected according to actual needs to achieve the purpose of the embodiment scheme.
[0130] In addition, the functional modules in each embodiment of the present application can be integrated in one device, or each module can exist physically, or two or more modules can be integrated in one device.
[0131] In the above embodiments, all or part of the embodiments can be implemented by software, hardware, firmware or any combination thereof. When implemented by using a software program, all or part of the embodiments can be implemented in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of the present application are generated. The computer can be a general purpose computer, a special purpose computer, a computer network, or other programmable apparatus. The computer instructions can be stored in a computer readable storage medium or transmitted from one computer readable storage medium to another computer readable storage medium, for example, the computer instructions can be transmitted from one website, computer, server or data center to another website, computer, server or data center through wired (such as coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (such as infrared, wireless, microwave, etc.) manner. The computer readable storage medium can be any available medium that can be accessed by a computer or data storage device including one or more servers, data centers, etc. integrated with the medium. The available medium can be a magnetic medium (such as a floppy disk, a hard disk, a magnetic tape), an optical medium (such as a DVD), or a semiconductor medium (such as a solid state disk (SSD)), etc.
[0132] The above description is merely a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art can easily think of changes or replacements within the technical range disclosed in the present application, which should be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.
Claims
1. A display control method characterized by comprising: Comprising: receiving first image data; in a first refresh period corresponding to the first image data, scanning a display screen according to the first image data in a first scanning interval corresponding to the first image data; in the first refresh period corresponding to the first image data, a time period after the first scanning interval corresponding to the first image data is a first holding interval corresponding to the first image data; the first scanning interval corresponding to the first image data is used to complete scanning of a frame of image; in the first holding interval corresponding to the first image data, a plurality of first tearing effect (TE) signals are sent, the first TE signals being used to indicate that the first image data has completed refreshing; if the second image data is received in the first holding interval corresponding to the first image data, in a first refresh period corresponding to the second image data, scanning the display screen according to the second image data in a first scanning interval corresponding to the second image data; in the first refresh period corresponding to the second image data, a time period after the first scanning interval corresponding to the second image data is a first holding interval corresponding to the second image data; the first scanning interval corresponding to the second image data is used to complete scanning of a frame of image; in the first holding interval corresponding to the second image data, a plurality of second TE signals are sent, the second TE signals being used to indicate that the second image data has completed refreshing; if the second image data is not received in the first holding interval corresponding to the first image data, in a second refresh period corresponding to the first image data, scanning the display screen according to the first image data in a second scanning interval corresponding to the first image data; in the second refresh period corresponding to the first image data, a time period after the second scanning interval corresponding to the first image data is a second holding interval corresponding to the first image data; in the second holding interval corresponding to the first image data, a plurality of the first TE signals are sent; if the second image data is received in the second holding interval corresponding to the first image data, jumping to a first refresh period corresponding to the second image data, in the first refresh period corresponding to the second image data, scanning the display screen according to the second image data in a first scanning interval corresponding to the second image data; in the first holding interval corresponding to the second image data, a plurality of the second TE signals are sent; wherein a lowest frame rate of the first refresh period is greater than a lowest frame rate of the second refresh period, a time length of the second refresh period is greater than a time length of the first refresh period, and the second refresh period is used for self-refreshing.
2. The method of claim 1, wherein, Further comprising: if the second image data is not received in the first holding interval corresponding to the first image data, maintaining the image displayed on the display screen in the first holding interval corresponding to the first image data.
3. The method according to claim 1 or 2, characterized in that, Further comprising: sending the first TE signal before the first scanning interval corresponding to the first image data is about to end.
4. The method according to claim 1 or 2, characterized in that, Further comprising: If the second image data is not received in the second holding interval corresponding to the first image data, the image displayed on the display screen is held in the second holding interval corresponding to the first image data.
5. The method according to claim 1 or 2, characterized in that, Further comprising: The first TE signal is sent before the second scanning interval corresponding to the first image data is about to end.
6. The method of claim 1 or 2, wherein, The difference between the length of the second holding interval corresponding to the first image data and the length of the first holding interval corresponding to the first image data is m times of the period of the first TE signal, m being a positive integer.
7. The method according to claim 1 or 2, characterized in that, The period of the first TE signal is k times of the period of the EM signal used for controlling the pixel points of the display screen to emit light, k being a positive integer.
8. A display control method characterized by comprising: Comprising: The processor sends first image data to a display driving chip (DDIC); The DDIC scans the display screen according to the first image data in the first scanning interval corresponding to the first image data in the first refresh period corresponding to the first image data; In the first refresh period corresponding to the first image data, the period after the first scanning interval corresponding to the first image data is the first holding interval corresponding to the first image data; The first scanning interval corresponding to the first image data is used to complete the scanning of one frame of image; In the first holding interval corresponding to the first image data, the DDIC sends a plurality of first tearing effect (TE) signals to the processor, the first TE signal being used to indicate that the first image data has completed refresh; The processor sends second image data to the DDIC in the first holding interval corresponding to the first image data in response to any first TE signal in the first holding interval corresponding to the first image data; If the DDIC receives the second image data in the first holding interval corresponding to the first image data, the DDIC scans the display screen according to the second image data in the first scanning interval corresponding to the second image data in the first refresh period corresponding to the second image data; In the first refresh period corresponding to the second image data, the period after the first scanning interval corresponding to the second image data is the second holding interval corresponding to the second image data; The first scanning interval corresponding to the second image data is used to complete the scanning of one frame of image; In the second holding interval corresponding to the second image data, the DDIC sends a plurality of second TE signals to the processor, the second TE signal being used to indicate that the second image data has completed refresh; If the DDIC does not receive the second image data in the first holding interval corresponding to the first image data, the DDIC scans the display screen according to the first image data in the second scanning interval corresponding to the first image data in the second refresh period corresponding to the first image data; In the second refresh period corresponding to the first image data, the period after the second scanning interval corresponding to the first image data is the second holding interval corresponding to the first image data; The DDIC sends a plurality of the first TE signals to the processor in a second holding interval corresponding to the first image data; The processor sends the second image data to the DDIC in a first holding interval corresponding to the first image data in response to any first TE signal in a second holding interval corresponding to the first image data; if the DDIC receives the second image data in the second holding interval corresponding to the first image data, jump to a first refreshing period corresponding to the second image data, and scan the display screen according to the second image data in a first scanning interval corresponding to the second image data; The DDIC sends a plurality of the second TE signals in a first holding interval corresponding to the second image data; The lowest frame rate of the first refreshing period is greater than the lowest frame rate of the second refreshing period, and the time length of the second refreshing period is greater than the time length of the first refreshing period, and the second refreshing period is used for self-refreshing.
9. The method of claim 8, wherein, Further comprising: If the DDIC does not receive the second image data in the first holding interval corresponding to the first image data, the image displayed on the display screen is held in the first holding interval corresponding to the first image data.
10. The method according to claim 8 or 9, characterized in that, Further comprising: The DDIC sends the first TE signal to the processor before the first scanning interval corresponding to the first image data is about to end.
11. The method according to claim 8 or 9, characterized in that, Further comprising: If the DDIC does not receive the second image data in the second holding interval corresponding to the first image data, the image displayed on the display screen is held in the second holding interval corresponding to the first image data.
12. The method of claim 8 or 9, wherein, Further comprising: The DDIC sends the first TE signal to the processor before the second scanning interval corresponding to the first image data is about to end.
13. The method of claim 8 or 9, wherein, The difference between the time length of the second holding interval corresponding to the first image data and the time length of the first holding interval corresponding to the first image data is m times of the period of the first TE signal, and m is a positive integer.
14. The method of claim 8 or 9, wherein, The period of the first TE signal is k times of the period of an EM signal, and k is a positive integer, and the EM signal is used for controlling the pixel points of the display screen to emit light.
15. A display driving chip, characterized in that, The display driving chip is used for executing the method of any one of claims 1-7.
16. An electronic device, comprising: The display driving chip comprises a processor, a display screen, and the display driving chip of claim 15. The processor is used for sending first image data to the DDIC; The DDIC is used for scanning the display screen according to the first image data in a first scanning interval corresponding to the first image data in a first refreshing period corresponding to the first image data; In the first refreshing period corresponding to the first image data, the period after the first scanning interval corresponding to the first image data is a first holding interval corresponding to the first image data, and the first scanning interval corresponding to the first image data is used for completing the scanning of one frame of image. The DDIC is also configured to send a plurality of first tearing effect (TE) signals to the processor in a first holding interval corresponding to the first image data, the first TE signals being used to indicate that the first image data has completed refreshing. The processor is also configured to send second image data to the DDIC in the first holding interval corresponding to the first image data in response to any first TE signal in the first holding interval corresponding to the first image data. The DDIC is also configured to scan the display according to the second image data in a first scanning interval corresponding to the second image data in a first refreshing time period corresponding to the second image data if the second image data is received in the first holding interval corresponding to the first image data. In the first refreshing time period corresponding to the second image data, a time period after the first scanning interval corresponding to the second image data is a second holding interval corresponding to the second image data. The first scanning interval corresponding to the second image data is used to complete scanning of one frame of image. The DDIC sends a plurality of second TE signals to the processor in the first holding interval corresponding to the second image data, the second TE signals being used to indicate that the second image data has completed refreshing. If the DDIC does not receive the second image data in the first holding interval corresponding to the first image data, the DDIC scans the display according to the first image data in a second scanning interval corresponding to the first image data in a second refreshing time period corresponding to the first image data. In the second refreshing time period corresponding to the first image data, a time period after the second scanning interval corresponding to the first image data is a second holding interval corresponding to the first image data. The DDIC sends a plurality of first TE signals to the processor in the second holding interval corresponding to the first image data. The processor sends the second image data to the DDIC in the first holding interval corresponding to the first image data in response to any first TE signal in the second holding interval corresponding to the first image data, and jumps to scanning the display according to the second image data in a first scanning interval corresponding to the second image data in a first refreshing time period corresponding to the second image data if the DDIC receives the second image data in the second holding interval corresponding to the first image data. A plurality of second TE signals are sent in the first holding interval corresponding to the second image data. The lowest frame rate of the first refreshing time period is greater than the lowest frame rate of the second refreshing time period, the time length of the second refreshing time period is greater than the time length of the first refreshing time period, and the second refreshing time period is used for self-refreshing.
17. A computer-readable storage medium, characterized in that, The instructions, when executed on an electronic device, cause the electronic device to perform the method of any one of claims 1-7, or the method of any one of claims 8-14.
Citation Information
Patent Citations
Display screen frequency conversion method, display driving integrated circuit chip and application processor
CN113160748A