A glass passivation process for mesa semiconductor devices

Abstract

The present invention relates to the technical field of semiconductor glass passivation, in particular to a glass passivation process for mesa semiconductor devices, including S1: Loading the carrier wafer, the semiconductor device is placed into the heating furnace of the chemical vapor deposition equipment, and then the heating furnace is closed; S2: Depositing the passivation layer, starting the heating furnace, when the temperature of the heating furnace reaches the set value, inputting reaction gases into the heating furnace for reaction deposition; S3: Residual gas replacement, inputting inert gas to replace the residual reaction gases in the heating furnace; S4: Annealing treatment, heating the deposited semiconductor device to a relatively high temperature, then maintaining for a period of time, and then cooling at an appropriate speed; S5: Taking out the carrier wafer. The present invention solves the problem that after the deposition step in the glass passivation process of semiconductor devices, using the vacuum pumping method to clean the residual gases in the heating furnace will affect the quality and stability of the passivation layer, while using the inert gas replacement method has high cost and low efficiency.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor glass passivation, and particularly to a glass passivation process for mesa semiconductor devices. Background Art

[0002] In the advanced manufacturing process of mesa semiconductor devices, in addition to the glass passivation layer formed by traditional glass powder coating and sintering, chemical vapor deposition (CVD) technology, as an innovative passivation method, is gradually showing its unique advantages and potential. The CVD deposition passivation process directly forms a high-quality passivation layer in the PN junction mesa trench by precisely controlling the chemical reaction of gaseous reactants on the device surface, which not only improves production efficiency but also enhances the uniformity and density of the passivation layer.

[0003] After the CVD deposition passivation step is completed, there are still residual reaction gases in the heating furnace, which will continue to react in the heating furnace, thus affecting the uniformity and integrity of the deposited passivation layer, and may also form unwanted by-products or cause a decline in the quality of the deposited layer. Therefore, after the reaction gas supply stops, it is necessary to clean the residual reaction gases in the heating furnace in a timely manner. There are currently two cleaning methods, one is the traditional vacuum pumping method, and the other is the inert gas replacement method.

[0004] When the traditional vacuum pumping method is used to process these residual gases, the vacuum pumping method may cause a local low-pressure area to form in the deposition chamber, which in turn generates stress on the device surface, affecting the quality and stability of the passivation layer. When the inert gas replacement method is used to replace the residual reaction gases, the inert gas and the residual reaction gases are mixed in the heating furnace, and a large amount of inert gas is often required to achieve the desired replacement effect, which is not only costly but also has a slow cleaning efficiency for the residual gases. To solve this problem, we propose a glass passivation process for mesa semiconductor devices. Summary of the Invention

[0005] In view of the problem in the above or the prior art that in the process of glass passivation of semiconductor devices, after the deposition step is completed, using the vacuum pumping method to clean the residual gases in the heating furnace will affect the quality and stability of the passivation layer, while using the inert gas replacement method is costly and inefficient, the present invention is proposed.

[0006] Therefore, the object of the present invention is to provide a glass passivation process for mesa semiconductor devices.

[0007] To solve the above technical problems, the present invention provides the following technical solution: A glass passivation process for mesa semiconductor devices, including S1: Loading the carrier wafer, the semiconductor device is placed into the heating furnace of the chemical vapor deposition equipment, and then the heating furnace is closed;

[0008] S2: Deposit a passivation layer, start the heating furnace, and when the temperature of the heating furnace reaches the set value, input reaction gases into the heating furnace for reaction deposition;

[0009] S3: Residual gas replacement, input an inert gas to replace the residual reaction gases in the heating furnace;

[0010] S4: Annealing treatment, heat the deposited semiconductor device to a relatively high temperature, then maintain it for a period of time, and then cool it at an appropriate speed;

[0011] S5: Remove the carrier wafer. After annealing, open the heating furnace and take out the semiconductor device passivated by glass;

[0012] S6: Post-treatment and detection, grind and polish the semiconductor device passivated by glass, and conduct quality inspection.

[0013] As a preferred embodiment of the glass passivation process for mesa semiconductor devices of the present invention, among them: for the loaded carrier wafer, its surface needs to be cleaned to remove surface contaminants, particles, and natural oxide layers.

[0014] As a preferred embodiment of the glass passivation process for mesa semiconductor devices of the present invention, among them: the cleaning methods include cleaning with a mixed solution of ammonium hydroxide and hydrogen peroxide and a mixed solution of hydrochloric acid and hydrogen peroxide.

[0015] As a preferred embodiment of the glass passivation process for mesa semiconductor devices of the present invention, among them: the chemical vapor deposition equipment for generating a deposition passivation layer on a semiconductor device includes a control cabinet and a heating furnace. The heating furnace includes a furnace body and a furnace cover, and a furnace cavity is correspondingly opened between the furnace body and the furnace cover. A first intake pipe is arranged on one side of the furnace cavity, and a first solenoid valve is arranged on the first intake pipe. The furnace cavity is cylindrically opened, and intake holes are annularly arranged at one end of the furnace cavity. An exhaust port is opened at the axial center position of one end of the furnace cavity. A gas replacement assembly is arranged at one end of the furnace body, and the gas replacement assembly corresponds to and matches the intake holes and the exhaust port. An adaptor cavity is opened on the furnace cover, and the adaptor cavity matches the gas replacement assembly.

[0016] As a preferred embodiment of the glass passivation process for mesa semiconductor devices of the present invention, among them: first guiding surfaces and second guiding surfaces are respectively arranged at both ends of the cylindrical furnace cavity. The intake holes and the exhaust port both penetrate through the second guiding surface and correspond to and match the gas replacement assembly. The middle section of the furnace cavity is a reaction zone, and a carrier platform is arranged at the bottom of the reaction zone.

[0017] As a preferred embodiment of the glass passivation process for mesa semiconductor devices of the present invention, wherein: the gas replacement assembly includes an annular tube disposed at one end of the furnace body, and a second intake pipe is provided on one side of the annular tube. The annular tube is annularly arrayed with exhaust holes on the side away from the second intake pipe, and the exhaust holes correspond to the intake holes. A discharge pipe is provided at the axis of the annular tube, and one end of the discharge pipe connected to the annular tube is tapered.

[0018] As a preferred embodiment of the glass passivation process for mesa semiconductor devices of the present invention, wherein: a plugging member is provided inside the intake hole, and the plugging member includes a sealing plate movably disposed in the intake hole and limiting rods provided at both ends of the sealing plate.

[0019] As a preferred embodiment of the glass passivation process for mesa semiconductor devices of the present invention, wherein: a third guiding surface is provided on the sealing plate, and a baffle is provided on one side of the sealing plate.

[0020] As a preferred embodiment of the glass passivation process for mesa semiconductor devices of the present invention, wherein: a stopper is provided at the end of the limiting rod away from the sealing plate. Moving grooves are provided at both ends of the intake hole, and the moving grooves are movably matched with the stoppers. A return spring is provided in the moving groove, and the return spring is sleeved on one end of the limiting rod.

[0021] As a preferred embodiment of the glass passivation process for mesa semiconductor devices of the present invention, wherein: a gas detector and a second solenoid valve are provided on the discharge pipe, a third solenoid valve is provided on the second intake pipe, and the first solenoid valve, the second solenoid valve, the third solenoid valve and the gas detector are all electrically connected to the control cabinet.

[0022] The beneficial effects of the glass passivation process for mesa semiconductor devices of the present invention:

[0023] 1. Through the setting of the gas replacement assembly in the present invention, when the semiconductor device completes the deposition passivation step in the heating furnace, the supply of the reaction gas is stopped, and the inert gas starts to enter. The inert gas enters the annular tube through the second intake pipe, and then enters the furnace cavity through the multiple exhaust holes annularly arrayed on the annular tube and the intake holes on the furnace cavity. The inert gas entering the furnace cavity moves along the side wall of the furnace cavity towards the other end, thereby squeezing and pushing the residual reaction gas in the furnace cavity towards the axial direction, so that the residual reaction gas is discharged from the discharge pipe, avoiding the situation that the inert gas collides and mixes with the residual reaction gas after entering, resulting in low replacement efficiency and wasting a large amount of inert gas.

[0024] 2. When inert gas is input into the heating furnace for gas replacement, the gas discharged from the exhaust pipe is detected through the setting of the gas detector. When the gas detector detects that only inert gas is contained in the discharged gas, a signal is sent to the control cabinet, and then the second solenoid valve and the third solenoid valve are closed through the control cabinet, avoiding the waste caused by excessive discharge of inert gas. Brief Description of the Drawings

[0025] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0026] Figure 1 It is an overall schematic diagram of the chemical vapor deposition equipment in the glass passivation process of the mesa semiconductor device.

[0027] Figure 2 It is a schematic structural diagram of the heating furnace in the chemical vapor deposition equipment.

[0028] Figure 3 It is a schematic structural diagram of another perspective of the heating furnace in the chemical vapor deposition equipment.

[0029] Figure 4 It is a schematic structural diagram of the gas replacement component in the chemical vapor deposition equipment.

[0030] Figure 5 It is a schematic sectional structure diagram of one end position of the air inlet hole on the furnace body in the chemical vapor deposition equipment.

[0031] Figure 6 It is a schematic structural diagram of the plugging member in the chemical vapor deposition equipment.

[0032] Figure 7 It is a schematic flow structure diagram of the inert gas when the inert gas is input into the furnace cavity.

[0033] Figure 8 It is a schematic flow structure diagram of the gas in the heating furnace when the inert gas is input into the furnace cavity.

[0034] Reference Numerals: 1, control cabinet; 2, heating furnace; 201, furnace body; 202, furnace cover; 203, furnace cavity; 204, first intake pipe; 205, first solenoid valve; 206, air inlet; 207, exhaust port; 208, adapter cavity; 209, first guiding surface; 210, second guiding surface; 211, bearing platform; 212, movable groove; 3, gas displacement assembly; 301, annular pipe; 302, second intake pipe; 303, exhaust hole; 304, exhaust pipe; 4, plugging member; 401, sealing plate; 402, limiting rod; 403, third guiding surface; 404, baffle plate; 405, stop block; 406, return spring; 5, gas detector; 6, second solenoid valve; 7, third solenoid valve. Detailed Embodiment

[0035] In order to make the above objects, features, and advantages of the present invention more obvious and understandable, the following will describe in detail the specific embodiments of the present invention with reference to the accompanying drawings of the specification.

[0036] In the following description, many specific details are set forth in order to fully understand the present invention. However, the present invention can also be implemented in other ways different from those described herein. Those skilled in the art can make similar generalizations without departing from the connotation of the present invention. Therefore, the present invention is not limited by the specific embodiments disclosed below.

[0037] Secondly, the so-called "one embodiment" or "embodiment" herein refers to a specific feature, structure, or characteristic that can be included in at least one implementation manner of the present invention. The phrase "in one embodiment" appearing in different places in this specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment that excludes other embodiments.

[0038] Embodiment 1, referring to Figures 1 to 4 and Figure 8 , which is the first embodiment of the present invention. This embodiment provides a glass passivation process for mesa semiconductor devices, which can achieve the effect of quickly displacing the residual reaction gas in the heating furnace 2. It includes S1: loading the wafer. The semiconductor device is placed into the heating furnace 2 of the chemical vapor deposition equipment, and then the heating furnace 2 is closed. The surface of the loaded wafer needs to be cleaned to remove surface contaminants, particles, and natural oxide layers. The cleaning methods include cleaning with a mixture of ammonium hydroxide and hydrogen peroxide and a mixture of hydrochloric acid and hydrogen peroxide.

[0039] S2: depositing the passivation layer. Start the heating furnace 2. When the temperature of the heating furnace 2 reaches the set value, input reaction gas into the heating furnace 2 for reaction deposition.

[0040] S3: displacing the residual gas. Input inert gas to displace the residual reaction gas in the heating furnace 2.

[0041] S4: Annealing treatment, heating the deposited semiconductor device to a relatively high temperature, then maintaining it for a period of time, and then cooling it at an appropriate rate;

[0042] S5: Remove the carrier wafer. After annealing, open the heating furnace 2 and take out the semiconductor device after glass passivation;

[0043] S6: Post-treatment and detection, grinding and polishing the glass-passivated semiconductor device, and performing quality inspection.

[0044] The chemical vapor deposition equipment for generating a passivation layer on a semiconductor device includes a control cabinet 1 and a heating furnace 2. The heating furnace 2 includes a furnace body 201 and a furnace cover 202. A furnace cavity 203 is correspondingly provided between the furnace body 201 and the furnace cover 202. A first intake pipe 204 is provided on one side of the furnace cavity 203, and a first solenoid valve 205 is provided on the first intake pipe 204. The furnace body 201 and the furnace cover 202 are rotatably connected. The furnace body 201 and the furnace cover 202 are rotated and opened. Two first intake pipes 204 are provided on one side of the furnace body 201, and first solenoid valves 205 are provided on both of the two first intake pipes 204 for inputting two reaction gases. Place the semiconductor device in the heating furnace 2, then rotate the furnace cover 202 to close the heating furnace 2. Start the heating furnace 2. When the temperature in the furnace cavity 203 reaches the set value, open the first solenoid valve 205, and the two first intake pipes 204 input two gases that react with each other.

[0045] The furnace cavity 203 is cylindrically provided, and intake holes 206 are annularly arrayed at one end of the furnace cavity 203. An exhaust port 207 is provided at the axial center position of one end of the furnace cavity 203. A gas replacement assembly 3 is provided at one end of the furnace body 201. The gas replacement assembly 3 corresponds to and matches the intake holes 206 and the exhaust port 207. An adaptation cavity 208 is provided on the furnace cover 202, and the adaptation cavity 208 matches the gas replacement assembly 3.

[0046] The gas replacement assembly 3 includes an annular pipe 301 provided at one end of the furnace body 201. A second intake pipe 302 is provided on one side of the annular pipe 301. Exhaust holes 303 are annularly arrayed on the side of the annular pipe 301 away from the second intake pipe 302, and the exhaust holes 303 correspond to the intake holes 206. A exhaust pipe 304 is provided at the axial center of the annular pipe 301, and one end of the exhaust pipe 304 connected to the annular pipe 301 is tapered.

[0047] After the reaction gas input into the furnace chamber 203 from the two first intake pipes 204 forms a glass passivation layer on the semiconductor device after reaction deposition, the first solenoid valves 205 on the two first intake pipes 204 are closed, thereby stopping the input of the reaction gas. At this time, the temperature inside the heating furnace 2 is still in a high-temperature state, and the reaction gas inside continues to react. To ensure the quality of the glass passivation layer produced by the deposition, it is necessary to timely discharge the residual reaction gas inside the heating furnace 2 to the outside.

[0048] Therefore, when the input of the reaction gas is stopped, an inert gas is timely input into the furnace chamber 203 through the second intake pipe 302, such as Figure 8 As shown, the inert gas is input from the second intake pipe 302, first enters the annular pipe 301, and then enters the furnace chamber 203 through the exhaust holes 303 arranged in an annular array on the annular pipe 301 and the intake holes 206 at one end of the furnace chamber 203. The exhaust holes 303 and the intake holes 206 in the annular array are close to the cylindrical inner wall of the furnace chamber 203. Therefore, when the inert gas enters the furnace chamber 203 from the exhaust holes 303 and the intake holes 206 in the annular array, it enters in a ring shape, thereby pushing and squeezing the residual reaction gas inside and outside the outer circle of the furnace chamber 203 towards the axis direction of the furnace chamber 203.

[0049] First guiding surfaces 209 and second guiding surfaces 210 are respectively arranged at the two cylindrical ends of the furnace chamber 203. The intake holes 206 and the exhaust ports 207 both penetrate through the second guiding surfaces 210 and are correspondingly matched with the gas replacement assembly 3. The middle section of the furnace chamber 203 is a reaction zone, and a carrier 211 is arranged at the bottom of the reaction zone.

[0050] It should be noted that when the inert gas is input, its flow direction is along the axial direction of the furnace chamber 203 towards the direction of the first guiding surface 209. However, during the movement process, its kinetic energy will decrease, thereby causing the inert gas to disperse. Part of it is pushed by the subsequent inert gas and continues to move towards the direction of the first guiding surface 209, and then another part has its kinetic energy decreased and dispersed, approaching the axis of the furnace chamber 203, thereby squeezing the residual reaction gas. When the inert gas moves to the position of the first guiding surface 209, along its arc-shaped guiding surface, it turns and squeezes towards the axis position of the furnace chamber 203. And with the continuous input of the inert gas, it will first concentrate in the area of the first guiding surface 209, and then push the residual reaction gas towards the direction of the exhaust pipe 304, so that the residual reaction gas squeezed to the axis position of the furnace chamber 203 is discharged.

[0051] Further, at one end close to the intake hole 206, the inert gas always has a large impact when it is input. Therefore, the residual reaction gas near this end is not overly squeezed axially towards the furnace chamber 203, and the residual reaction gas is in a relatively diffused state. When the residual reaction gas in the area from the first guiding surface 209 to the second guiding surface 210 is discharged, the cross-sectional view of its distribution state changes from a rectangle (when the first guiding surface 209 and the second guiding surface 210 are not arc-shaped) to a triangle or a trapezoid. The direction close to the first guiding surface 209 is the tip of the triangle or the short side end of the trapezoid. Then, when the squeezed residual reaction gas moves towards the discharge pipe 304, since the exhaust port 207 is centered, the relatively diffused residual reaction gas can be pushed towards the exhaust port 207 through the arc-shaped second guiding surface 210, so as to quickly discharge the residual reaction gas in the furnace chamber 203 and complete the gas replacement operation.

[0052] Among them, the carrier table 211 is arranged in a plane, which is convenient for placing semiconductor devices. At the same time, both ends of the carrier table 211 are arranged in an inclined plane, so as to reduce the resistance of air flow.

[0053] Embodiment 2, refer to Figures 1 to 8 , which is the second embodiment of the present invention. Different from the previous embodiment, this embodiment provides a plug 4 for the glass passivation process of the mesa semiconductor device, which solves the problem that when the inert gas enters the inner cavity of the annular pipe 301 through the second inlet pipe 302, the inert gas will first be discharged from the exhaust hole 303 on the annular pipe 301 close to the second inlet pipe 302 and enter the furnace chamber 203 first, thus causing a prior impact on the reaction gas in the furnace chamber 203 and resulting in the mixing of the residual reaction gas and the inert gas.

[0054] It includes a plug 4 arranged inside the intake hole 206. The plug 4 includes a sealing plate 401 movably arranged in the intake hole 206, and limiting rods 402 arranged at both ends of the sealing plate 401.

[0055] A stop block 405 is arranged at one end of the limiting rod 402 away from the sealing plate 401. Moving grooves 212 are opened at both ends of the intake hole 206, and the moving grooves 212 are movably matched with the stop block 405. A return spring 406 is arranged in the moving groove 212, and the return spring 406 is sleeved on one end of the limiting rod 402.

[0056] Furthermore, through the limitation of the two limiting rods 402, the sealing plate 401 moves linearly in the air inlet hole 206. Under the action of the return spring 406, the sealing plate 401 and the air inlet hole 206 are matched and sealed. The inert gas enters the inner cavity of the annular pipe 301 through the second inlet pipe 302, and then enters the air inlet hole 206. However, since the air inlet hole 206 is sealed and blocked by the sealing plate 401, the inert gas can only accumulate in the annular pipe 301 and the air inlet hole 206 first, but cannot enter the inner cavity of the furnace chamber 203. With the continuous input of the inert gas, the inert gas fills the inner parts of the annular pipe 301 and the air inlet hole 206, and the air pressure becomes larger and larger, thereby pushing and opening the sealing plate 401. At this time, the inert gas inside the annular pipe 301 and the air inlet hole 206 enters the inner cavity of the furnace chamber 203 at an equal amount and equal speed, thus avoiding excessive mixing with the residual reaction gas inside the furnace chamber 203 and causing the situation of low emission efficiency.

[0057] Specifically, if there is no setting of the blocking member 4, then the inert gas will first be discharged into the furnace chamber 203 from the exhaust hole 303 close to the second inlet pipe 302, and then impact the residual reaction gas, causing gas chaos. Then, when the inert gas of equal amount and equal speed is input later, the gas to be discharged at this time will include the inert gas that first enters the furnace chamber 203 and is mixed with the residual reaction gas, thereby causing low gas replacement efficiency and wasting the inert gas.

[0058] The sealing plate 401 is provided with a third guiding surface 403, and a baffle 404 is arranged on one side of the sealing plate 401.

[0059] When the sealing plate 401 is pushed open by the inert gas, the inert gas will impact the third guiding surface 403 and turn, and be conveyed towards the direction close to the inner wall of the furnace chamber 203, so as to better squeeze the residual reaction gas towards the axial direction of the furnace chamber 203, and then discharge it from the discharge pipe 304.

[0060] Furthermore, when the sealing plate 401 is opened, in order to make the inert gas better impact the third guiding surface 403 and turn, and be conveyed towards the direction close to the inner wall of the furnace chamber 203, through the setting of the baffle 404, it is avoided that the inert gas diffuses towards the baffle 404 direction after impacting the third guiding surface 403, so as to mix and impact with the residual reaction gas far from the inner wall in the furnace chamber 203, causing air flow chaos.

[0061] All other structures are the same as those in Embodiment 1.

[0062] Example 3, refer to Figures 1 to 8, which is the third embodiment of the present invention. Different from the previous embodiment, it includes a gas detector 5 and a second solenoid valve 6 provided on the exhaust pipe 304, and a third solenoid valve 7 provided on the second intake pipe 302. The first solenoid valve 205, the second solenoid valve 6, the third solenoid valve 7 and the gas detector 5 are all electrically connected to the control cabinet 1.

[0063] When the inert gas is input into the heating furnace 2 for residual reaction gas replacement, the gas discharged from the exhaust pipe 304 is detected through the setting of the gas detector 5. When the gas detector 5 detects that only the inert gas content is in the discharged gas, it sends a signal to the control cabinet 1, and then the second solenoid valve 6 and the third solenoid valve 7 are closed through the control cabinet 1, avoiding the waste caused by excessive discharge of inert gas.

[0064] The remaining structures are the same as those in Embodiment 2.

[0065] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not restrictive. Although the present invention has been described in detail with reference to the preferred embodiments, those of ordinary skill in the art should understand that the technical solutions of the present invention can be modified or equivalently replaced without departing from the spirit and scope of the technical solutions of the present invention, and they should all be covered by the scope of the claims of the present invention.

Claims

1. A glass passivation process for a mesa semiconductor device, characterized in that: include, S1: loading a carrier, the semiconductor device is placed into a heating furnace (2) of a chemical vapor deposition device, and then the heating furnace (2) is closed; S2: depositing a passivation layer, starting the heating furnace (2), and when the temperature of the heating furnace (2) reaches a set value, inputting a reaction gas into the heating furnace (2) for reaction deposition; S3: residual gas replacement, inputting inert gas to replace the residual reaction gas in the heating furnace (2); S4: Annealing treatment, heating the deposited semiconductor device to a higher temperature, then maintaining it for a period of time, and then cooling it at an appropriate speed; S5: taking out the carrier, annealing it, opening the heating furnace (2), and taking out the semiconductor device after glass passivation; S6: Post-processing and testing: grinding, polishing and quality testing of glass-passivated semiconductor devices; A chemical vapor deposition device for generating a deposited passivation layer for a semiconductor device comprises a control cabinet (1) and a heating furnace (2); The heating furnace (2) comprises a furnace body (201) and a furnace cover (202), and a furnace cavity (203) is matched between the furnace body (201) and the furnace cover (202), a first air intake pipe (204) is provided on one side of the furnace cavity (203), and a first solenoid valve (205) is provided on the first air intake pipe (204); The furnace cavity (203) is opened in a cylindrical shape, and an annular array of air inlet holes (206) is opened at one end of the furnace cavity (203), and an exhaust port (207) is opened at the axial center position of one end of the furnace cavity (203); A gas replacement component (3) is provided at one end of the furnace body (201), and the gas replacement component (3) corresponds to and matches the air inlet (206) and the air outlet (207); An adapting cavity (208) is provided on the furnace cover (202), and the adapting cavity (208) matches the gas replacement component (3); The cylindrical ends of the furnace cavity (203) are respectively provided with a first guide surface (209) and a second guide surface (210); The air inlet (206) and the air outlet (207) both penetrate the second guide surface (210) and are matched with the gas replacement component (3); The middle section of the furnace cavity (203) is a reaction zone, and a carrying platform (211) is provided at the bottom end of the reaction zone; The gas replacement assembly (3) comprises an annular tube (301) arranged at one end of the furnace body (201), and a second air inlet pipe (302) is arranged on one side of the annular tube (301); The annular tube (301) is provided with exhaust holes (303) in an annular array on one side away from the second air inlet tube (302), and the exhaust holes (303) correspond to the air inlet holes (206); An exhaust pipe (304) is arranged at the axis of the annular pipe (301), and one end of the exhaust pipe (304) connected to the annular pipe (301) is arranged in a conical shape; A blocking member (4) is arranged inside the air inlet hole (206), and the blocking member (4) comprises a sealing plate (401) movably arranged in the air inlet hole (206), and limiting rods (402) arranged at both ends of the sealing plate (401); A third guide surface (403) is provided on the sealing plate (401), and a baffle (404) is provided on one side of the sealing plate (401); A stopper (405) is provided at one end of the limiting rod (402) away from the sealing plate (401); Both ends of the air inlet hole (206) are provided with movable grooves (212), and the movable grooves (212) and the stoppers (405) are movably matched; A return spring (406) is disposed in the movable groove (212), and the return spring (406) is sleeved on one end of the limiting rod (402).

2. The glass passivation process for mesa semiconductor devices according to claim 1, characterized in that: The surface of the loaded slide needs to be cleaned to remove surface contaminants, particles and natural oxide layer.

3. The glass passivation process for mesa semiconductor devices according to claim 2, characterized in that: The cleaning methods include cleaning with a mixture of ammonium hydroxide and hydrogen peroxide and a mixture of hydrochloric acid and hydrogen peroxide.

4. The glass passivation process for mesa semiconductor devices according to claim 1, characterized in that: The exhaust pipe (304) is provided with a gas detector (5) and a second solenoid valve (6); The second air intake pipe (302) is provided with a third solenoid valve (7); The first solenoid valve (205), the second solenoid valve (6), the third solenoid valve (7) and the gas detector (5) are all electrically connected to the control cabinet (1).

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