Liquid crystal display panel and liquid crystal display device

Abstract

The embodiment of the present disclosure provides a liquid crystal display panel and a liquid crystal display device, and belongs to the technical field of display. The liquid crystal display panel comprises an array substrate and a color film substrate connected oppositely, and a liquid crystal layer between the array substrate and the color film substrate. The color film substrate comprises a color film layer and a black matrix on a side of the color film layer close to the array substrate. The color film layer comprises a plurality of color resistance blocks arranged in an array, and the black matrix comprises a plurality of light shielding parts on the color film layer, and the orthographic projection of the light shielding parts is located at the junction of the plurality of color resistance blocks. The array substrate comprises a common electrode layer with a plurality of slits arranged in an array, and the common electrode layer comprises a first electrode part between two adjacent slits. The orthographic projection of the first electrode part and the first light shielding part on the color film layer at least partially overlaps. The embodiment of the present disclosure can improve the problem of a wider black matrix and a lower pixel aperture ratio.

Description

Technical Field

[0001] This disclosure relates to the field of display technology, and in particular to a liquid crystal display panel and a liquid crystal display device. Background Technology

[0002] Liquid crystal display (LCD) panels are a common type of display panel. They have the advantages of low manufacturing cost and relatively simple manufacturing process, and occupy a large market share in the display technology field.

[0003] In related technologies, a liquid crystal display panel includes an array substrate, a color filter substrate, and a liquid crystal layer. The array substrate and the color filter substrate are connected to each other, and the liquid crystal layer is located between the array substrate and the color filter substrate. The color filter substrate includes a color filter layer and a black matrix. The color filter layer includes multiple color resist blocks arranged in an array, and the black matrix is ​​located between any two adjacent color resist blocks.

[0004] However, LCD panels have problems such as a large black matrix width and a low pixel aperture ratio. Summary of the Invention

[0005] This disclosure provides a liquid crystal display panel and a liquid crystal display device, which can reduce the width of the black matrix and increase the pixel aperture ratio. The technical solution is as follows:

[0006] On one hand, a liquid crystal display panel is provided, the liquid crystal display panel including an array substrate, a color filter substrate, and a liquid crystal layer, the array substrate and the color filter substrate being connected to each other, and the liquid crystal layer being located between the array substrate and the color filter substrate; the color filter substrate includes a color filter layer and a black matrix, the color filter layer including a plurality of color resist blocks arranged in an array, the black matrix being located on the side of the color filter layer closer to the array substrate, and the black matrix including a plurality of light-shielding portions, the orthographic projection of the plurality of light-shielding portions on the color filter layer being located at the junction of the plurality of color resist blocks; the array substrate includes a common electrode layer having a plurality of slits arranged in an array in the common electrode layer, the common electrode layer including a plurality of electrode portions, the plurality of electrode portions including a first electrode portion located between a first slit and a second slit, the orthographic projection of the first electrode portion on the color filter layer at least partially coinciding with the orthographic projection of the first light-shielding portion on the color filter layer, the first slit and the second slit being two adjacent slits among the plurality of slits, and the first light-shielding portion being one of the plurality of light-shielding portions.

[0007] Optionally, the ratio of the sum of the width of the first light-shielding portion and the width of the first electrode portion to twice the target distance is equal to the tangent of the target angle, wherein the target angle is determined based on the maximum viewing angle of the liquid crystal display panel; the target distance is the distance between the first light-shielding portion and the first electrode portion; the target angle is the angle between the line connecting the projection of the first side of the first electrode portion and the second side of the first light-shielding portion onto the reference plane and the thickness direction of the liquid crystal display panel, wherein the reference plane is perpendicular to the first side and the second side respectively; wherein, in the arrangement direction of the first slit and the second slit, the first side is the side closer to the first slit, and the second side is the side closer to the second slit.

[0008] Optionally, the common electrode layer is made of a metallic material.

[0009] Optionally, the array substrate further includes a substrate, a driving circuit layer, a planarization layer, a transition electrode layer, a pixel electrode layer, and an insulating layer, wherein the substrate, the driving circuit layer, the planarization layer, the pixel electrode layer, the insulating layer, and the common electrode layer are stacked sequentially; the planarization layer includes a main body portion having multiple vias and a filling structure located in the multiple vias; the pixel electrode layer includes multiple pixel electrodes distributed in an array; the transition electrode layer includes multiple transition electrodes, a portion of a first transition electrode of the multiple transition electrodes is located in a first via of the multiple vias and is electrically connected to the driving circuit layer, and another portion of the first transition electrode is located on the side of the planarization layer away from the substrate and is connected to a first pixel electrode of the multiple pixel electrodes, wherein the first pixel electrode covers the first transition electrode and the filling structure in the first via.

[0010] Optionally, the orthographic projections of the plurality of filling structures on the bearing surface of the substrate and the orthographic projections of the black matrix on the bearing surface of the substrate do not at least partially coincide.

[0011] Optionally, the orthographic projection of the first slit on the bearing surface of the substrate is located within the orthographic projection of the first pixel electrode on the bearing surface of the substrate; or, the orthographic projection of the first slit on the bearing surface of the substrate at least partially coincides with the orthographic projection of a continuous plurality of pixel electrodes arranged in a first direction on the bearing surface of the substrate, wherein the first direction is the length direction of the first slit.

[0012] Optionally, both the adapter electrode layer and the pixel electrode layer are made of transparent conductive material.

[0013] Optionally, the array substrate includes a substrate, a driving circuit layer, and a dimming component, wherein the dimming component is located between the substrate and the driving circuit layer; the driving circuit layer includes multiple traces, the orthographic projection of the multiple traces on the bearing surface of the substrate at least partially coincides with the orthographic projection of the multiple electrode portions on the bearing surface of the substrate; the dimming component is used to deflect light from the light incident from one side of the array substrate onto the liquid crystal display panel, which is directed to the multiple traces, the multiple electrode portions, or the black matrix, and onto the color filter layer.

[0014] Optionally, the dimming assembly includes a plurality of lenses, each of which corresponds to a plurality of color resist blocks, and the orthographic projections of the corresponding lenses and color resist blocks on the bearing surface of the substrate at least partially overlap.

[0015] Optionally, the lens includes a top surface and a bottom surface, the top surface being an arcuate surface convex in a direction away from the substrate, and the bottom surface being connected to the bearing surface of the substrate.

[0016] Optionally, the focal length of the lens is less than h*(b+c) / b and greater than (H+h)*(e+d) / (2e+d); where b is the width of the trace in the arrangement direction of the first slit and the second slit, c is the distance between two adjacent traces in the arrangement direction, d is the width of the light-shielding part in the arrangement direction, e is the width of the opening area of ​​the black matrix in the arrangement direction, H is the distance between the side of the target trace close to the substrate and the side of the target light-shielding part away from the substrate, and h is the distance between the side of the target trace close to the substrate and the bottom surface of the lens; the target lens is any one of the plurality of lenses, the target trace is the trace closest to the target lens among the plurality of traces in the driving circuit layer, and the target light-shielding part is the light-shielding part closest to the target lens among the plurality of light-shielding parts.

[0017] Optionally, the distance between the driving circuit layer and the bottom surface of the lens satisfies the following: the deflection angle is greater than or equal to a first angle and less than or equal to a second angle; wherein, the deflection angle is the angle between the outgoing direction of the incident light after passing through the lens and the direction perpendicular to the bearing surface of the substrate; the first angle is the angle between the line connecting the edge of the bottom surface of the target lens and the edge of the target trace near the substrate and the direction perpendicular to the bearing surface of the substrate; the second angle is the angle between the line connecting the edge of the bottom surface of the target lens and the edge of the target light-shielding part away from the substrate and the direction perpendicular to the bearing surface of the substrate.

[0018] Optionally, the first included angle satisfies: tanθ1=b / (2h); the second included angle satisfies: tanθ2=(2e+d) / (2H+2h); where θ1 is the first included angle and θ2 is the second included angle.

[0019] On the other hand, a liquid crystal display device is provided, the liquid crystal display device including a backlight assembly and any of the liquid crystal display panels as described above, the backlight assembly being used to provide a light source for the liquid crystal display panel.

[0020] In another aspect, a method for manufacturing a liquid crystal display panel is provided. The method includes: providing an array substrate and a color filter substrate, wherein the color filter substrate includes a color filter layer and a black matrix, the color filter layer includes a plurality of color resist blocks arranged in an array, the black matrix is ​​located on the side of the color filter layer near the array substrate, and the black matrix includes a plurality of light-shielding portions, the orthographic projection of the plurality of light-shielding portions on the color filter layer is located at the junction of the plurality of color resist blocks, the array substrate includes a common electrode layer, the common electrode layer has a plurality of slits arranged in an array, the common electrode layer includes a plurality of electrode portions, the plurality of electrode portions includes a first electrode portion located between a first slit and a second slit, the first slit and the second slit being two adjacent slits among the plurality of slits; connecting the array substrate and the color filter substrate relative to each other, such that the orthographic projection of the first electrode portion on the color filter layer at least partially overlaps with the orthographic projection of the first light-shielding portion on the color filter layer, the first light-shielding portion being one of the plurality of light-shielding portions; forming a liquid crystal layer between the array substrate and the color filter substrate to obtain a liquid crystal display panel.

[0021] The beneficial effects of the technical solution provided in this disclosure include at least the following:

[0022] When light enters from the array substrate side and passes sequentially through the array substrate, liquid crystal layer, and color filter substrate, to prevent color crosstalk, it is necessary to reduce the amount of light escaping after passing through two adjacent color resist blocks. The greater the distance between the black matrix and the common electrode layer, the wider the black matrix needs to be at the boundary between two adjacent color resist blocks to prevent light from escaping after passing through two adjacent color resist blocks. This embodiment reduces the distance between the black matrix and the common electrode layer, thereby reducing the width of the black matrix at the boundary between two adjacent color resist blocks, resulting in a larger opening area for the black matrix and improving the pixel aperture ratio. Attached Figure Description

[0023] To more clearly illustrate the technical solutions in the embodiments of this disclosure, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0024] Figure 1 This is a schematic cross-sectional view of a liquid crystal display panel provided in an embodiment of the present disclosure;

[0025] Figure 2 This is a top view schematic diagram of the relationship between the black matrix and the color filter layer provided in an embodiment of this disclosure;

[0026] Figure 3 This is a top view schematic diagram of the relationship between a common electrode layer and a black matrix provided in an embodiment of this disclosure;

[0027] Figure 4 This is a schematic diagram illustrating the relationship between a target angle, a target distance, a first light-shielding part, and a first electrode part, provided in this embodiment of the disclosure.

[0028] Figure 5 This is a schematic cross-sectional view of another liquid crystal display panel provided in an embodiment of this disclosure;

[0029] Figure 6 This is a schematic diagram of a planar structure of a liquid crystal display panel in related technologies;

[0030] Figure 7 This is a schematic diagram of a planar structure of a liquid crystal display panel provided in an embodiment of this disclosure, and Figure 5 for Figure 7 Schematic diagram of the cross-sectional structure along line AA;

[0031] Figure 8 This is a schematic cross-sectional view of another liquid crystal display panel provided in an embodiment of this disclosure;

[0032] Figure 9 This is a schematic diagram of the structure of a lens provided in an embodiment of this disclosure;

[0033] Figure 10 This is a schematic diagram of the optical path of a liquid crystal display panel including a lens, provided in an embodiment of this disclosure;

[0034] Figure 11 This is a schematic diagram of the optical path of another liquid crystal display panel including a lens provided in an embodiment of this disclosure;

[0035] Figure 12 This is a flowchart of a method for manufacturing a liquid crystal display panel according to an embodiment of the present disclosure.

[0036] Legend:

[0037] 1. Array substrate; 2. Color filter substrate; 3. Liquid crystal layer

[0038] 20. Transparent substrate; 21. Color filter layer; 210. Color resist block

[0039] 22. Black matrix 220, light-shielding part 2201, first light-shielding part

[0040] 23. Covering layer

[0041] 11. Common electrode layer 110, electrode section 1101, first electrode section

[0042] 111, Slit 1111, First Slit 1112, Second Slit

[0043] x, first direction; y, second direction

[0044] D, width of the first electrode portion; d, width of the first light-shielding portion

[0045] 12. Substrate; 13. Driver circuit layer; 130. Trace (data line)

[0046] 131. Gate line; 132. Via; 133. Active area

[0047] 14. Planarization layer; 15. Transition electrode layer; 16. Pixel electrode layer; 17. Insulating layer

[0048] 141. Main body; 142. Filling structure; 143. First through hole in planarization layer

[0049] 151, First adapter electrode; 161, Pixel electrode; 1611, First pixel electrode

[0050] 18. Dimming assembly 180, Lens 181, Top surface 182, Bottom surface

[0051] 41. The line connecting the bottom edge of the target lens and the edge of the target trace closest to the substrate.

[0052] 42. The line connecting the edge of the bottom surface of the target lens and the edge of the target light-shielding part near the substrate. Detailed Implementation

[0053] To make the objectives, technical solutions, and advantages of this disclosure clearer, the embodiments of this application will be described in further detail below with reference to the accompanying drawings.

[0054] The terminology used in the embodiments of this disclosure is for illustrative purposes only and is not intended to limit the disclosure. Unless otherwise defined, the technical or scientific terms used in the embodiments of this disclosure should be understood in their ordinary sense by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” “third,” and similar words used in the patent application specification and claims of this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, the terms “a” or “an” and similar words do not indicate a quantity limitation, but rather indicate the presence of at least one. The terms “comprising” or “including” and similar words mean that the elements or objects preceding “comprising” or “including” encompass the elements or objects listed following “comprising” or “including” and their equivalents, but do not exclude other elements or objects.

[0055] Figure 1 This is a schematic cross-sectional view of a liquid crystal display panel provided in an embodiment of this disclosure. Figure 1 As shown, the liquid crystal display panel includes an array substrate 1, a color filter substrate 2, and a liquid crystal layer 3. The array substrate 1 and the color filter substrate 2 are connected to each other, and the liquid crystal layer 3 is located between the array substrate 1 and the color filter substrate 2.

[0056] Figure 2 This is a top-view schematic diagram illustrating the relationship between a black matrix and a color filter layer according to an embodiment of this disclosure. Figure 1 and Figure 2 As shown, the color filter substrate 2 includes a transparent substrate 20, and a color filter layer 21 and a black matrix 22 located on the transparent substrate 20.

[0057] The color filter layer 21 includes multiple color resist blocks 210, arranged in an array. The multiple color resist blocks 210 are divided into multiple color resist block groups, each color resist block group belonging to a pixel unit of the liquid crystal display panel, and each color resist block group including color resist blocks of multiple colors. Each color resist block allows light of its corresponding color to pass through. For example, Figure 2 In the illustrated embodiment, each color block group includes three color blocks: a red color block, a blue color block, and a green color block.

[0058] This disclosure does not limit the number, color, or arrangement of color resist blocks in each color resist block group. In other examples, a color resist block group may include four color resist blocks, and the colors corresponding to the four color resist blocks may be red, blue, green, and white, or red, blue, green, and yellow, etc.

[0059] The black matrix 22 is located on the side of the color filter layer 21 closest to the array substrate 1. The black matrix 22 includes multiple light-shielding parts 220, and the orthographic projection of the multiple light-shielding parts 220 on the color filter layer 21 is located at the junction of the multiple color blocks 210. This method of setting the black matrix 22 on the color filter layer 21 can also be called a BM On CF (Black Matrix On Color Filter, integrating the black matrix on the color filter or color filter) structure.

[0060] exist Figure 2 In the illustrated embodiment, the portion of the black matrix 22 located between two adjacent color resist blocks 210 in the first direction x is a light-shielding part 220. Similarly, the portion of the black matrix 22 located between two adjacent color resist blocks 210 in the second direction y is also a light-shielding part 220. Here, the x direction is the row direction of the plurality of color resist blocks 210, and the y direction is the column direction of the plurality of color resist blocks 210; or, the x direction is the column direction of the plurality of color resist blocks 210, and the y direction is the row direction of the plurality of color resist blocks 210.

[0061] In some examples, such as Figure 2 As shown, each color resist block 210 is arranged close together, that is, there is no gap between adjacent color resist blocks 210, and the black matrix 22 is located at the boundary of each color resist block 210.

[0062] In other examples, there are gaps between multiple color blocks 210, and a portion of the black matrix 22 is located within these gaps.

[0063] The thickness of each color resist block 210 can be the same or different.

[0064] Exemplarily, the liquid crystal display panel further includes an OC (Over Coat) layer 23, which is located on the side of the black matrix 22 closest to the array substrate 1. Optionally, the OC layer 23 can be a resin layer, used to protect the black matrix 22 and the color filter layer 21 and to perform planarization.

[0065] Figure 3 This is a top view schematic diagram illustrating the relationship between a common electrode layer and a black matrix according to an embodiment of this disclosure. (Combined with...) Figure 1 and Figure 3 The array substrate 1 includes a common electrode layer 11, which has a plurality of slits 111 and a plurality of electrode portions 110. The plurality of slits 111 are arranged in an array, and an electrode portion 110 exists between any two adjacent slits 111.

[0066] like Figure 1As shown, the plurality of slits 111 include adjacent first slits 1111 and second slits 1112, with a first electrode portion 1101 between the first slits 1111 and the second slits 1112. The orthographic projection of the first electrode portion 1101 on the color filter layer 21 at least partially overlaps with the orthographic projection of the first light-shielding portion 2201 on the color filter layer 21. Here, the first slit 1111 and the second slit 1112 can be any two adjacent slits among the plurality of slits 111.

[0067] For example, in the arrangement direction of the first slit 1111 and the second slit 1112, the width of the first electrode portion 1101 is greater than the width of the first light-shielding portion 2201. This design helps to improve the stability of the aperture ratio under process fluctuations. Alternatively, in the arrangement direction of the first slit 1111 and the second slit 1112, the width of the first electrode portion 1101 is less than or equal to the width of the first light-shielding portion 2201. This design helps to reduce the overall reflectivity of the liquid crystal display panel. The arrangement direction of the first slit 1111 and the second slit 1112 can be either the x-direction or the y-direction as described above.

[0068] Optionally, the common electrode layer 11 is made of a metallic material. Since metallic materials are generally opaque, the electrode portion 110 can block light, reducing the possibility of color bleeding. Exemplary examples of metallic materials include, but are not limited to, silver, gold, copper, and molybdenum.

[0069] In related technologies, the color filter substrate includes a black matrix and a color filter layer, with the black matrix and color filter layer arranged in the same layer, meaning that each color block in the black matrix and color filter layer is in contact with the same surface of the transparent substrate of the color filter substrate. However, in this embodiment, the black matrix is ​​located on the side of the color filter layer closer to the array substrate. Therefore, in this embodiment, the distance between the black matrix 22 and the common electrode layer 11 is smaller than the distance between the black matrix and the common electrode layer in related technologies.

[0070] When light enters from the array substrate 1 side and passes sequentially through the array substrate 1, liquid crystal layer 3, and color filter substrate 2, to prevent color crosstalk, it is necessary to reduce the amount of light escaping after passing through two adjacent color resist blocks. The greater the distance between the black matrix 22 and the common electrode layer 11, the greater the width of the black matrix at the junction of two adjacent color resist blocks 220 is required to prevent light from escaping after passing through two adjacent color resist blocks. This embodiment reduces the distance between the black matrix 22 and the common electrode layer 11, thereby reducing the width of the black matrix 22 at the junction of two adjacent color resist blocks 220, resulting in a larger opening area for the black matrix 22 and achieving a higher pixel aperture ratio.

[0071] In this embodiment of the disclosure, the width of the first light-shielding portion 2201 is determined by the width of the first electrode portion 1101 and the distance between the black matrix 22 and the common electrode layer 11 (i.e., the distance between the first light-shielding portion 2011 and the first electrode portion 1101).

[0072] Figure 4 This is a schematic diagram illustrating the relationship between a target angle, a target distance, a first light-shielding part, and a first electrode part, as provided in this disclosure. Figure 4 As shown, the target distance L is the distance between the first light-shielding portion 2201 and the first electrode portion 1101. In some examples, the target distance L is the distance from the side of the first light-shielding portion 2201 closest to the first electrode portion 1101 to the side of the first electrode portion 1101 closest to the first light-shielding portion 2201. Here, since the thickness of the first light-shielding portion 2201 and the thickness of the first electrode portion 1101 are very small relative to the target distance L, the thickness of the first light-shielding portion 2201 and the thickness of the first electrode portion 1101 can be ignored.

[0073] The target angle θ is the angle between the line connecting the projections of the first side of the first electrode portion 1101 and the second side of the first light-shielding portion 2201 onto the reference plane and the thickness direction z of the liquid crystal display panel. The reference plane is perpendicular to both the first and second sides; therefore, the projections of both sides onto the reference plane are points. In this embodiment, the reference plane is a virtual plane, which can be any plane perpendicular to both the first and second sides. Specifically, in the arrangement direction of the first slit 1111 and the second slit 1112, the first side is the side closer to the first slit 1111, and the second side is the side closer to the second slit 1112.

[0074] The relationship between the target angle θ, the target distance L, the width d of the first light-shielding part 2201, and the width D of the first electrode part 1101 satisfies formula (1):

[0075]

[0076] After rearranging formula (1), we get formula (2):

[0077] D+d=2L*tanθ (2)

[0078] That is, the ratio of the sum of the width d of the first light-shielding part 2201 and the width D of the first electrode part 1101 to twice the target distance L is equal to the tangent of the target angle θ. This target angle θ is determined based on the maximum viewing angle of the liquid crystal display panel. Here, the viewing angle of the liquid crystal display panel refers to the angle α between the light emitted from the color filter substrate 2 and the direction perpendicular to the color filter layer 21. In implementation, the maximum viewing angle of the liquid crystal display panel (i.e., the maximum viewing angle without color bleeding, such as 30°) can be determined first according to product requirements, and then the target angle θ can be determined according to the refractive index of each layer of the liquid crystal display panel. When this condition is met, light can be prevented from passing through two adjacent color blocks in sequence before entering the eye, thus preventing color bleeding.

[0079] As can be seen from formula (2), the sum of the width d of the first light-shielding part 2201 and the width D of the first electrode part 1101 is directly proportional to the target distance L. When the width D of the first electrode part 1101 and the target angle θ are constant, the width d of the first light-shielding part 2201 is directly proportional to the target distance L, that is, the larger the target distance L is, the larger the width d of the first light-shielding part 2201 is. Therefore, by reducing the target distance L, the width d of the first light-shielding part 2201 can be reduced, thereby increasing the pixel aperture ratio.

[0080] Taking a liquid crystal display panel with a pixel pitch of 6μm as an example, if it is necessary to ensure no color bleeding at a 30° viewing angle, in related technologies, the sum of the width d of the first light-shielding part 2201 and the width D of the first electrode part 1101 is equal to 3.7μm, while in the embodiment of this disclosure, the sum of the width d of the first light-shielding part 2201 and the width D of the first electrode part 1101 is 2.7μm. Therefore, the embodiment of this disclosure can effectively increase the pixel aperture ratio.

[0081] Figure 5 This is a schematic cross-sectional view of another liquid crystal display panel provided in an embodiment of this disclosure. Figure 5 As shown, the array substrate 1 also includes a substrate 12, a driving circuit layer 13, a planarization layer 14, a transition electrode layer 15, a pixel electrode layer 16, and an insulating layer 17. The substrate 12, the driving circuit layer 13, the planarization layer 14, the pixel electrode layer 16, the insulating layer 17, and the common electrode layer 11 are stacked sequentially.

[0082] The pixel electrode layer 16 includes a plurality of pixel electrodes 161 arranged in an array to form an electric field with the common electrode layer 11, which is used to control the deflection of liquid crystal molecules in the liquid crystal layer.

[0083] The driving circuit layer 13 includes a plurality of pixel driving circuits (not shown) arranged in an array, each pixel driving circuit being electrically connected to a pixel electrode 161. Each pixel driving circuit includes at least one TFT (Thin Film Transistor). This disclosure does not limit the layer structure of the driving circuit layer 13; for example, it may include an active layer, a gate insulating layer, a gate layer, an interlayer dielectric layer, and a source / drain layer sequentially stacked on the substrate 12. The materials of each layer can be selected as needed, and this disclosure does not limit this selection.

[0084] like Figure 5 As shown, the driving circuit layer 13 includes multiple traces 130. The influence of these traces 130 on light passing through the driving circuit layer needs to be minimized. Therefore, the multiple traces 130 are arranged below the multiple electrode portions 110 as much as possible. That is, the orthographic projection of the multiple traces 130 on the bearing surface of the substrate 12 at least partially overlaps with the orthographic projection of the multiple electrode portions 110 on the bearing surface of the substrate 12. Here, traces 130 refer to traces in the driving circuit layer 13 that have a light-blocking effect, such as data lines located in the source-drain layer.

[0085] Figure 6 This is a schematic diagram of a planar structure of a liquid crystal display panel in related technologies. For example... Figure 6 As shown, in the related technology, the planarization layer 14 contains multiple vias 143. The pixel electrode 161 includes a portion located on the surface of the planarization layer 14 excluding the vias 143, a portion located on the sidewall of the vias 143, and a portion located on the corresponding pixel driving circuit in the driving circuit layer 13, so that each pixel electrode 161 is connected to the corresponding pixel driving circuit through a via 143. However, the pixel electrode layer 16 at the via 143 is not flat, which causes the thickness of the liquid crystal layer 3 at the via to be different from the thickness of the liquid crystal layer 3 outside the via 143. The uneven thickness of the liquid crystal layer 3 may cause dark-state light leakage due to liquid crystal disorder at the via 143. Therefore, the via 143 needs to be arranged below the black matrix 22.

[0086] Since a minimum spacing s must be ensured between two adjacent pixel electrodes 161, given a fixed size of pixel electrode 161, this will result in, for example, Figure 6 In the x-direction shown, the pixel electrode 161 cannot completely cover the slit 111, and one end of the slit 111 does not overlap with the pixel electrode 161. The small overlap area between the pixel electrode 161 and the electrode portion 110 leads to lower liquid crystal efficiency and affects light efficiency.

[0087] Figure 7 This is a schematic diagram of a planar structure of a liquid crystal display panel provided in an embodiment of this disclosure, and Figure 5 for Figure 7A schematic diagram of the cross-sectional structure along line AA. (See diagram below.) Figure 5 and Figure 7 As shown, the planarization layer 14 includes a main body 141 having multiple vias (such as the first via 143) and filling structures 142 located within the multiple vias. The multiple filling structures 142 within the planarization layer 14 can fill the vias, improving the light leakage problem caused by uneven thickness of the liquid crystal layer 3 at the vias. In this case, the vias are not limited to being arranged below the black matrix. That is, the orthographic projection of the filling structure 142 on the bearing surface of the substrate 12 does not at least partially coincide with the orthographic projection of the black matrix 22 on the bearing surface of the substrate 12.

[0088] For example, such as Figure 7 As shown, the orthographic projection of the filling structure 142 on the bearing surface of the substrate 12 does not coincide with the orthographic projection of the black matrix 22 on the bearing surface of the substrate 12. That is, the orthographic projection of the filling structure 142 on the bearing surface of the substrate 12 is inside the orthographic projection of a color resist block on the bearing surface of the substrate 12.

[0089] In this disclosure embodiment, see again Figure 5 The transition electrode layer 15 includes a plurality of transition electrodes, each corresponding to a pixel electrode 161. One of the transition electrodes is designated as the first transition electrode 151. A portion of the first transition electrode 151 is located within a first via 143 of the plurality of vias and is electrically connected to the driving circuit layer 13. Another portion of the first transition electrode 151 is located on the side of the planarization layer 14 away from the substrate 12 and is connected to the first pixel electrode 1611 of the plurality of pixel electrodes 161. The first pixel electrode 1611 covers the portion of the first transition electrode 151 located on the side of the planarization layer 14 away from the substrate 12 and the filling structure 142 in the first via 143.

[0090] Because the multiple filling structures 142 within the planarization layer 14 fill the vias, the transition electrode layer 15 in this embodiment replaces the function of the portion of the pixel electrode 161 located on the sidewall of the via 143 and the function of the portion of the pixel electrode 161 located on the corresponding pixel driving circuit in the driving circuit layer 13, thus realizing the connection between the pixel electrode 161 and the driving circuit layer 13. That is, the provision of the transition electrode layer 15 can prevent the problem of missing connection between the pixel electrode 161 and the driving circuit layer 13 after the addition of the filling structures 142. Figure 5As shown, the first transition electrode 151 extends from the side of the planarization layer 14 near the substrate 12 to the side away from the substrate 12, thereby sequentially realizing the electrical connection between the first pixel electrode 1611, the first transition electrode 151, and the driving circuit layer 13. That is, the driving circuit layer 13 can be electrically connected to the pixel electrode layer 16 through the transition electrode layer 15, so that the pixel electrode layer 16 and the common electrode layer 11 together form an electric field acting on the liquid crystal layer 3, thereby realizing the display function.

[0091] For example, combined Figure 5 and Figure 7 The driving circuit layer 13 includes a gate layer, an active layer, and a source / drain layer sequentially stacked on the substrate 12. An insulating layer (also called a gate insulating layer) is present between the gate layer and the active layer, and an insulating layer (also called an interlayer dielectric layer) is present between the active layer and the source / drain layer. The gate layer includes multiple gate lines 131 arranged along a first direction x, with the extension direction of the gate lines 131 being a second direction y. The source / drain layer includes multiple data lines (traces 130) arranged along the second direction y, with the extension direction of the data lines 130 being the first direction x. The multiple gate lines 131 intersect with the multiple data lines 130.

[0092] The active layer includes multiple active regions 133, which are arranged in an array. In one possible implementation, the active regions 133 extend from below the fill structure 142 of the planarization layer 14 to the data line 130 and are electrically connected to the data line 130 through vias 132 on the interlayer dielectric layer; the active regions 133 pass above the gate line 131. Here, "above" refers to the direction away from the substrate, and "below" refers to the direction closer to the substrate.

[0093] For example, such as Figure 7 As shown, the active region 133 is elongated in shape.

[0094] For example, such as Figure 7 As shown, the active region 133 is made of semiconductor material. When current flows through the gate line located below the active region 133, the active region 133 is turned on.

[0095] Multiple TFTs are formed by sequentially stacking a gate layer, a gate insulating layer, an active layer, an interlayer dielectric layer, and a source / drain layer. These TFTs are located at multiple intersections formed by multiple gate lines 131 and multiple data lines 130. In one possible implementation, the multiple TFTs are electrically connected to multiple pixel electrodes 161 through an active region 133, and the TFTs can control the connected pixel electrodes.

[0096] In one possible implementation, see again Figure 5Multiple vias (such as the first via 143) in the planarization layer 14 not only penetrate the planarization layer 14, but also penetrate the insulating layer of the source / drain layer in the driving circuit layer 13 located near the substrate 12 where the trace 130 is located, up to the active region 133. The filling structure 142 not only penetrates the planarization layer 14, but also penetrates the insulating layer of the source / drain layer in the driving circuit layer 13 located near the substrate 12 where the trace 130 is located. This results in a portion of the first transition electrode 151 being located within the first via 143 among the multiple vias and electrically connected to the driving circuit layer 13. Here, the electrical connection of the first transition electrode 151 to the driving circuit layer 13 refers to the electrical connection of the first transition electrode 151 to the active region 133 in the driving circuit layer 13.

[0097] For example, the substrate 12 is made of glass or quartz.

[0098] The active layer 133 is made of one of the following materials: metal oxide, low-temperature polycrystalline silicon (also known as p-Si). The gate layer can be a single-layer metal thin film such as molybdenum, copper, or titanium, or it can be a multilayer metal thin film consisting of sequentially stacked molybdenum, aluminum, and molybdenum layers, or sequentially stacked titanium, aluminum, and titanium layers. The gate insulating layer or insulating layer is made of materials such as silicon oxide, silicon nitride, or silicon nitride. The source and drain layers can be single-layer metal thin films such as aluminum, molybdenum, copper, or titanium, or they can be a multilayer metal thin film consisting of sequentially stacked molybdenum, aluminum, and molybdenum layers, or sequentially stacked titanium, aluminum, and titanium layers.

[0099] For example, the planarization layer 14 is made of materials such as silicon nitride, silicon oxynitride, or epoxy resin. For example, the transition electrode layer 15 is made of a transparent conductive material, such as indium tin oxide (ITO) or indium zinc oxide (IZO). The transition electrode layer made of a transparent conductive material facilitates light transmission.

[0100] For example, the pixel electrode layer 16 is made of a transparent conductive material, such as indium tin oxide (ITO) or indium zinc oxide (IZO). Using a transparent conductive material to make the pixel electrode layer facilitates light transmission.

[0101] For example, the insulating layer 17 is made of materials such as silicon oxide, silicon nitride, or silicon nitride.

[0102] In one possible implementation, such as Figure 7As shown, the common electrode layer 11 includes a plurality of slits 111 arrayed along the x and y directions. The plurality of slits 111 arranged along the x direction are called row slits, and the plurality of slits 111 arranged along the y direction are called column slits. Each slit 111 corresponds one-to-one with a plurality of pixel electrodes 161. The orthographic projection of each slit 111 onto the bearing surface of the substrate 12 lies within the orthographic projection of the corresponding pixel electrode 161 onto that bearing surface. For example, the orthographic projection of the first slit 1111 onto the bearing surface of the substrate 12 lies within the orthographic projection of the first pixel electrode 1611 onto that bearing surface.

[0103] In another possible implementation, within the common electrode layer 11, slits in the same row distributed along the y-direction are interconnected, forming slits with a larger size in the y-direction, where the y-direction is the length direction of the slit. One slit 111 corresponds to multiple pixel electrodes 161, meaning that the orthographic projection of each slit 111 onto the bearing surface of the substrate 12 coincides with the orthographic projection of the consecutive multiple pixel electrodes 161 arranged in the y-direction onto the bearing surface of the substrate 12.

[0104] Figure 8 This is a schematic cross-sectional view of another liquid crystal display panel provided in an embodiment of this disclosure. Figure 8 As shown, the array substrate 11 also includes a dimming component 18, which is located between the substrate 12 and the driving circuit layer 13.

[0105] The dimming component 18 is used to deflect the light emitted from the backlight component that illuminates multiple traces 130, multiple electrode sections 110, or the black matrix 22 to the color filter layer 21.

[0106] By setting up the dimming component 18, the light emitted from the backlight component that illuminates the opaque areas such as the traces in the driving circuit layer 13, the electrode portion in the common electrode layer 11, and the black matrix 22 can be deflected to the color filter layer 21, so that more light passes through the color filter layer 21, thereby improving the light utilization rate of the liquid crystal display panel and improving the display effect.

[0107] For example, the multiple traces 130 may be located in the conductive layer of the driving circuit layer 13 closest to the pixel electrode layer 16, such as the source-drain layer. The traces 130 may extend along the aforementioned y-direction.

[0108] Figure 9 This is a schematic diagram of the structure of a lens provided in an embodiment of this disclosure, such as... Figure 8 and Figure 9 As shown, the dimming assembly 18 includes a plurality of lenses 180, each of which corresponds to a plurality of color resist blocks 210. The orthographic projection of each lens 180 onto the bearing surface of the substrate 12 at least partially overlaps with the orthographic projection of the corresponding color resist block 210 onto the bearing surface.

[0109] For example, the lens 180 includes a top surface 181 and a bottom surface 182. The top surface 181 is an arc surface that protrudes away from the substrate 12, and the bottom surface 182 is parallel to the bearing surface of the substrate 12.

[0110] The lens 180 can bring light rays (including light rays that hit the black matrix 22) that are directed near the edge of the corresponding color resist block 210 closer to the center of the color resist block 210, thereby improving the light utilization rate of the liquid crystal display panel and improving the display effect.

[0111] Figure 10 This is a schematic diagram of the optical path of a liquid crystal display panel including a lens, provided in an embodiment of this disclosure. Figure 11 This is a schematic diagram of the optical path of another liquid crystal display panel including a lens provided in an embodiment of this disclosure. Figure 10 and Figure 11 As shown, the focal length f of the lens is less than h*(b+c) / b and greater than (H+h)*(e+d) / (2e+d).

[0112] in, Figure 10 In the diagram, b is the width of the trace of the driving circuit layer 13 in the arrangement direction of the first slit 1111 and the second slit 1112, c is the distance between two adjacent traces in the arrangement direction of the first slit 1111 and the second slit 1112, and h is the distance between the side of the target trace close to the substrate 12 and the bottom surface of the lens 180. Figure 11 In the diagram, d is the width of the light-shielding portion 220 in the arrangement direction of the first slit 1111 and the second slit 1112, e is the width of the opening area in the arrangement direction of the first slit 1111 and the second slit 1112, H is the distance between the side of the target trace close to the substrate 12 and the side of the target light-shielding portion 220 away from the substrate, and h is the distance between the side of the target trace close to the substrate 12 and the bottom surface of the lens 180.

[0113] When the focal length of lens 180 satisfies this relationship, the light rays directed toward the black matrix 22, or the traces of the driving circuit layer 13, or the common electrode layer 11 can be deflected as much as possible and pass through the color filter layer 21, thereby further improving the light efficiency of the liquid crystal display panel.

[0114] In this embodiment of the present disclosure, the distance between the side of the trace in the driving circuit layer 13 closest to the substrate 12 and the edge of the bottom surface of the lens 180 satisfies the following: the deflection angle is greater than or equal to the first angle θ1 and less than or equal to the second angle θ2; wherein, the deflection angle is the angle between the direction of the light emitted by the backlight assembly after being deflected by the lens and the direction perpendicular to the bearing surface of the substrate.

[0115] Figure 10In the illustrated embodiment, the first included angle θ1 is the angle between the line 41 connecting the bottom edge of the target lens and the edge of the target trace near the substrate 12, and the direction perpendicular to the bearing surface of the substrate 12. The target lens is any one of the multiple lenses 180, and the target trace 130 is the trace closest to the target lens among the multiple traces in the driving circuit layer 13.

[0116] Figure 11 In the embodiment shown, the second included angle θ2 is the angle between the line 42 connecting the bottom edge of the target lens and the edge of the target light-shielding part away from the substrate 12, and the direction perpendicular to the bearing surface of the substrate 12. The target light-shielding part is the light-shielding part that is closest to the target lens among the multiple light-shielding parts 220, and the extension direction of the target light-shielding part is the same as the extension direction of the target trace, that is, the target light-shielding part can block a section of the target trace.

[0117] Figure 10 and Figure 11 These are two boundary states for maximizing light efficiency (light is not blocked), such as... Figure 10 and Figure 11 As shown, the first included angle θ1 is the critical state where the light is not blocked by the multiple traces 130 in the driving circuit layer 13, which must satisfy: tanθ1=b / (2h); the second included angle θ2 is the critical state where the light is not blocked by the light-shielding part 220, which must satisfy: tanθ2=(2e+d) / (2H+2h). It can be seen that when the first included angle θ1, the second included angle θ2, the black matrix 22, the traces 130 in the driving circuit layer 13, and the lens 180 satisfy this relationship, the light can be emitted from the color filter substrate 2. Wherein, b is the width of the trace of the driving circuit layer 13 in the arrangement direction of the first slit 1111 and the second slit 1112, e is the width of the opening area in the arrangement direction of the first slit 1111 and the second slit 1112, d is the width of the light-shielding part 220 in the arrangement direction of the first slit 1111 and the second slit 1112, H is the distance between the side of the target trace close to the substrate 12 and the side of the target light-shielding part away from the substrate, and h is the distance between the side of the target trace close to the substrate 12 and the bottom surface of the lens 180.

[0118] Figure 12 This is a flowchart illustrating a method for manufacturing a liquid crystal display panel according to an embodiment of this disclosure. This method is used to prepare a liquid crystal display panel such as... Figure 5 The LCD display panel shown. (As shown) Figure 12 As shown, the method includes:

[0119] In step S1, a color filter substrate and an array substrate are provided. The color filter substrate includes a color filter layer and a black matrix. The color filter layer includes multiple color blocks arranged in an array. The black matrix is ​​located on one side of the color filter layer and includes multiple light-shielding portions. The orthographic projection of the multiple light-shielding portions onto the color filter layer is located at the intersection of the multiple color blocks. The array substrate includes a common electrode layer with multiple slits arranged in an array. The common electrode layer includes multiple electrode portions, including a first electrode portion located between a first slit and a second slit.

[0120] In step S2, the color filter substrate and the array substrate are connected relative to each other. Through this step S2, the orthographic projection of the first electrode portion on the color filter layer at least partially coincides with the orthographic projection of the first light-shielding portion on the color filter layer, and the first slit and the second slit are two adjacent slits among a plurality of slits.

[0121] In step S3, liquid crystal layer material is injected between the color filter substrate and the array substrate to form a liquid crystal layer, thereby obtaining a liquid crystal display panel.

[0122] Optionally, in step S1, providing the color filter substrate includes: forming a color filter layer on one side of a transparent substrate; and forming a black matrix on the transparent substrate on which the color filter layer is formed. Wherein,

[0123] Optionally, in step S1, providing the array substrate includes:

[0124] The first step involves forming an initial gate metal layer on a substrate. A photoresist structure is obtained through photoresist coating, exposure, and development. This photoresist structure is then used as a mask to etch the initial gate metal layer, yielding the gate layer. The gate layer includes multiple gate lines. A gate insulating layer is then formed on the gate layer.

[0125] The second step involves forming a semiconductor material layer on the gate insulating layer. A photoresist structure is obtained through processes such as photoresist coating, exposure, and development. This photoresist structure is then used as a mask to etch the semiconductor material layer, yielding the active layer. The active layer comprises multiple strip-shaped active regions.

[0126] The third step involves forming an initial interlayer dielectric layer on the active layer. Through a series of processes including photoresist coating, exposure, etching, and lift-off, multiple vias exposing the active region are formed, resulting in the interlayer dielectric layer. Source and drain metal layers are then formed on the interlayer dielectric layer. Through a series of processes including photoresist coating, exposure, etching, and lift-off, the source and drain layers are obtained. These source and drain layers include multiple data lines. The data lines in the source and drain layers are connected to the active region through vias in the interlayer dielectric layer. This completes the driver circuit layer.

[0127] The fourth step involves a series of processes, including photoresist coating, exposure, and development, on the driving circuit layer to form the main body of a planarization layer with multiple vias. These vias not only penetrate the planarization layer but also extend to the active layer, exposing the active region.

[0128] Step 5: Through a series of processes including photoresist coating and exposure within multiple vias, multiple first-part transition electrodes, multiple second-part transition electrodes, and multiple third-part transition electrodes are formed. Each first-part transition electrode is located at the bottom of the via and is electrically connected to the data lines in the source-drain layer via an active region. Multiple second-part transition electrodes are located on the sidewalls of the vias and are connected to the multiple first-part transition electrodes. Multiple third-part transition electrodes are located on the main body of the planarization layer and are connected to the multiple second-part transition electrodes. This results in the transition electrode layer.

[0129] Step 6: Form multiple filling structures in the multiple through holes, with the surface of the filling structure flush with the surface of the main body of the planarization layer. The planarization layer is then obtained.

[0130] Step 7: Multiple pixel electrodes are formed on the surface of the planarization layer and multiple third-part transition electrodes through a series of processes including photoresist coating, exposure, etching, and stripping. The multiple pixel electrodes cover multiple third-part transition electrodes and multiple filling structures, and the multiple pixel electrodes and multiple third-part transition electrodes are electrically connected respectively. The pixel electrode layer is obtained.

[0131] Step 8: An insulating layer is formed on the pixel electrode layer, and a common electrode layer with multiple slits is formed on the insulating layer through a series of processes such as photoresist coating, exposure, etching, and stripping. The array substrate is obtained.

[0132] Optionally, in step S2, the color filter substrate and the array substrate can be connected relative to each other using a sealing adhesive through processes such as coating, heat curing, or ultraviolet curing. The sealing adhesive not only bonds and fixes the array substrate and the color filter substrate, but also prevents the liquid crystal layer material from flowing out.

[0133] For example, the main component of the sealing adhesive includes resin, and the types of resin include thermosetting and UV-curing. In practice, sealing adhesives are mostly made of a mixture of thermosetting and UV-curing materials, and the main components include UV (Ultraviolet) curing resin, UV curing initiator, thermosetting resin, thermosetting agent, coupling agent, etc.

[0134] Optionally, in step S2, the liquid crystal layer material can be injected into the space defined by the color filter substrate and the array substrate using the ODF (One Drop Filling) method.

[0135] The liquid crystal display panel provided in this disclosure is particularly suitable for high pixel density (Pixels Per Inch, PPI) display devices, including but not limited to virtual reality (VR) display devices.

[0136] This disclosure also provides a liquid crystal display device, which includes any of the aforementioned liquid crystal display panels and a backlight assembly, wherein the backlight assembly is used to provide a light source for the liquid crystal display panel.

[0137] Optionally, the liquid crystal display device may further include a power supply circuit for supplying power to the liquid crystal display panel and the backlight assembly.

[0138] For example, the display device provided in the embodiments of this disclosure can be any product or component with display function, such as a mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, or navigator.

[0139] This liquid crystal display device has the same effect as the aforementioned liquid crystal display panel, which will not be described in detail here.

[0140] The above are merely optional embodiments of this disclosure and are not intended to limit this disclosure. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the protection scope of this disclosure.

Claims

1. A liquid crystal display panel, characterized by comprising: The liquid crystal display panel comprises an array substrate, a color film substrate and a liquid crystal layer, the array substrate and the color film substrate are connected oppositely, and the liquid crystal layer is located between the array substrate and the color film substrate; The color film substrate comprises a color film layer and a black matrix, the color film layer comprises a plurality of color resistance blocks arranged in an array, the black matrix is located on a side of the color film layer close to the array substrate, and the black matrix comprises a plurality of light shielding portions, a normal projection of the plurality of light shielding portions on the color film layer is located at a junction of the plurality of color resistance blocks; The array substrate comprises a common electrode layer, the common electrode layer has a plurality of slits arranged in an array, the common electrode layer comprises a plurality of electrode portions, the plurality of electrode portions comprise a first electrode portion located between a first slit and a second slit, a normal projection of the first electrode portion on the color film layer at least partially overlaps with a normal projection of a first light shielding portion on the color film layer, the first slit and the second slit are any two adjacent slits in the plurality of slits, and the first light shielding portion is one of the plurality of light shielding portions; A ratio of a sum of a width of the first light shielding portion and a width of the first electrode portion to twice a target distance is equal to a tangent value of a target angle, the target distance is a distance between the first light shielding portion and the first electrode portion, the target angle is an included angle between a line connecting a first side edge of the first electrode portion close to the first slit and a second side edge of the first light shielding portion close to the second slit and a thickness direction of the liquid crystal display panel, and the line is a projection in a reference plane.

2. The liquid crystal display panel according to claim 1, characterized by The target angle is determined based on a maximum viewing angle of the liquid crystal display panel.

3. The liquid crystal display panel according to claim 2, wherein The common electrode layer is made of a metal material.

4. The liquid crystal display panel according to any one of claims 1 to 3, characterized by, The array substrate further comprises a substrate substrate, a driving circuit layer, a planarization layer, a transfer electrode layer, a pixel electrode layer and an insulating layer, and the substrate substrate, the driving circuit layer, the planarization layer, the pixel electrode layer, the insulating layer and the common electrode layer are stacked in sequence; The planarization layer comprises a main body portion having a plurality of through holes and a filling structure located in the plurality of through holes, and the pixel electrode layer comprises a plurality of pixel electrodes arranged in an array; The transfer electrode layer comprises a plurality of transfer electrodes, a part of a first transfer electrode in the plurality of transfer electrodes is located in a first through hole in the plurality of through holes and is electrically connected with the driving circuit layer, another part of the first transfer electrode is located on a side of the planarization layer away from the substrate substrate and is connected with a first pixel electrode in the plurality of pixel electrodes, and the first pixel electrode covers the first transfer electrode and a filling structure in the first through hole.

5. The liquid crystal display panel according to claim 4, wherein A normal projection of the filling structure on a bearing surface of the substrate substrate at least partially does not overlap with a normal projection of the black matrix on the bearing surface of the substrate substrate.

6. The liquid crystal display panel according to claim 5, wherein A normal projection of the first slit on a bearing surface of the substrate substrate is located in a normal projection of the first pixel electrode on the bearing surface of the substrate substrate; Or A normal projection of the first slit on a carrying surface of the substrate substrate at least partially coincides with a normal projection of the continuous multiple pixel electrodes arranged in the first direction on the carrying surface of the substrate substrate, the first direction being a length direction of the first slit.

7. The liquid crystal display panel according to claim 5, wherein The switch electrode layer and the pixel electrode layer are made of transparent conductive material.

8. The liquid crystal display panel according to any one of claims 1 to 3 and 5 to 7, wherein, The array substrate further comprises a substrate substrate, a drive circuit layer and a light adjusting component, the light adjusting component being located between the substrate substrate and the drive circuit layer; The drive circuit layer comprises multiple traces, a normal projection of the multiple traces on a carrying surface of the substrate substrate at least partially coincides with a normal projection of the multiple electrode parts on the carrying surface of the substrate substrate; The light adjusting component is used for deflecting the light in the light rays incident to the liquid crystal display panel from the array substrate side to the multiple traces, the multiple electrode parts or the black matrix to the color film layer.

9. The liquid crystal display panel according to claim 8, wherein The light adjusting component comprises multiple lenses, the multiple lenses correspond to the multiple color resistance blocks one by one, and a normal projection of the corresponding lens and the color resistance block on the carrying surface of the substrate substrate at least partially coincides.

10. The liquid crystal display panel according to claim 9, wherein The lens comprises a top surface and a bottom surface, the top surface is an arc surface protruding away from the substrate substrate, and the bottom surface is connected with the carrying surface of the substrate substrate.

11. The liquid crystal display panel according to claim 9, wherein The focal length of the lens is less than h*(b+c) / b and greater than (H+h)*(e+d) / (2e+d); Wherein, b is the width of the trace in the arrangement direction of the first slit and the second slit, c is the distance between the two adjacent traces in the arrangement direction, d is the width of the light shielding part in the arrangement direction, e is the width of the opening area of the black matrix in the arrangement direction, H is the distance between the side of the target trace close to the substrate substrate and the side of the target light shielding part away from the substrate substrate, and h is the distance between the side of the target trace close to the substrate substrate and the bottom surface of the target lens. The target lens is any one of the multiple lenses, the target trace is the trace closest to the target lens in the multiple traces of the drive circuit layer, and the target light shielding part is the light shielding part closest to the target lens in the multiple light shielding parts.

12. The liquid crystal display panel according to claim 11, wherein The distance between the drive circuit layer and the bottom surface of the lens satisfies that the deflection angle is greater than or equal to the first angle and less than or equal to the second angle; Wherein, the deflection angle is the angle between the exit direction of the incident light after passing through the lens and the direction perpendicular to the carrying surface of the substrate substrate, the first angle is the angle between the line connecting the edge of the bottom surface of the target lens and the edge of the side of the target trace close to the substrate substrate and the direction perpendicular to the carrying surface of the substrate substrate, and the second angle is the angle between the line connecting the edge of the bottom surface of the target lens and the edge of the side of the target light shielding part away from the substrate substrate and the direction perpendicular to the carrying surface of the substrate substrate.

13. The liquid crystal display panel of claim 12, wherein The first angle satisfies tanθ1=b / (2h). ​ The second included angle satisfies tanθ2=(2e+d) / (2H+2h). Wherein, θ1 is the first included angle, and θ2 is the second included angle.

14. A liquid crystal display device, characterized by comprising: The display device comprises a backlight assembly for providing a light source for the liquid crystal display panel and the liquid crystal display panel according to any one of claims 1 to 13.

15. A method for manufacturing a liquid crystal display panel, characterized by comprising: The manufacturing method comprises: The array substrate and the color film substrate are provided, wherein the color film substrate comprises a color film layer and a black matrix, the color film layer comprises a plurality of color resistance blocks arranged in an array, the black matrix is located on a side of the color film layer close to the array substrate, and the black matrix comprises a plurality of light shielding portions, a normal projection of the plurality of light shielding portions on the color film layer is located at a boundary of the plurality of color resistance blocks, the array substrate comprises a common electrode layer, the common electrode layer has a plurality of slits arranged in an array, and the common electrode layer comprises a plurality of electrode portions, the plurality of electrode portions comprise a first electrode portion located between a first slit and a second slit, the first slit and the second slit are any two adjacent slits in the plurality of slits; The array substrate and the color film substrate are connected oppositely, so that a normal projection of the first electrode portion on the color film layer at least partially overlaps a normal projection of a first light shielding portion on the color film layer, the first light shielding portion is one of the plurality of light shielding portions, a ratio of a sum of a width of the first light shielding portion and a width of the first electrode portion to twice a target distance is equal to a tangent value of a target angle, the target distance is a distance between the first light shielding portion and the first electrode portion, and the target angle is an included angle between a line connecting a first side edge of the first electrode portion close to the first slit and a second side edge of the first light shielding portion close to the second slit in a reference plane and a thickness direction of the liquid crystal display panel, and the reference plane is perpendicular to the first side edge and the second side edge, respectively. A liquid crystal layer is formed between the array substrate and the color film substrate to obtain a liquid crystal display panel.

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