A low voltage drop linear regulator and electronic equipment

Abstract

The present invention proposes a low voltage difference linear regulator and an electronic device, wherein the output end of the first operational amplifier in the low voltage difference linear regulator is connected to the first end of the gate voltage regulation unit, and the second end of the gate voltage regulation unit is connected to the gate of the eleventh switch tube; the source of the eleventh switch tube is used to access an external input power supply, the drain of the eleventh switch tube is grounded via a fourth resistor and a fifth resistor, and the output end of the low voltage difference linear regulator is led out between the eleventh switch tube and the fourth resistor to provide an output voltage to a subsequent circuit; the in-phase input end of the first operational amplifier is used to access a bandgap reference voltage, and the inverting input end of the first operational amplifier is connected between the fourth resistor and the fifth resistor to access a feedback voltage; an overshoot suppression module is connected to the output end of the first operational amplifier. The overshoot suppression module is connected to the output end of the first operational amplifier, and can shunt the output current of the first operational amplifier, thereby affecting the regulation current flowing through the gate voltage regulation unit, and achieving the purpose of suppressing voltage overshoot.

Description

Technical Field

[0001] The present invention relates to the field of power management, and in particular to a low voltage drop linear regulator and an electronic device. Background Art

[0002] The function of a low-dropout regulator (LDO) is to provide a stable working voltage with a certain load capacity for the subsequent circuit (such as a load module). The internal part of the LDO circuit is a negative feedback regulation circuit. When the output voltage is higher than the set value, the loop will reduce the output voltage. When the output voltage is lower than the set value, the loop will compensate the output voltage to achieve the purpose of voltage regulation.

[0003] The stability of the LDO output voltage directly affects the subsequent circuit. How to further ensure the stability of the LDO output voltage to eliminate potential safety hazards in the circuit has become a difficult problem that technicians in this field are concerned about. Summary of the invention

[0004] The object of the present invention is to provide a low voltage dropout linear regulator and an electronic device to improve the above-mentioned problem.

[0005] In order to achieve the above purpose, the technical solution adopted by the embodiment of the present invention is as follows:

[0006] In a first aspect, an embodiment of the present invention provides a low voltage dropout linear regulator, the low voltage dropout linear regulator includes a main module 10 and an overshoot suppression module 20, the main module 10 includes a first operational amplifier A1, a gate voltage adjustment unit 11 and an output unit 12, wherein the output unit 12 includes an eleventh switch tube M11, a fourth resistor R4 and a fifth resistor R5;

[0007] The output end of the first operational amplifier A1 is connected to the first end of the gate voltage regulating unit 11, and the second end of the gate voltage regulating unit 11 is connected to the gate of the eleventh switch tube M11;

[0008] The source of the eleventh switch tube M11 is used to connect to the external input power supply VIN, the drain of the eleventh switch tube M11 is connected to one end of the fourth resistor R4, the other end of the fourth resistor R4 is connected to one end of the fifth resistor R5, the other end of the fifth resistor R5 is grounded, and a connection terminal is led out between the drain of the eleventh switch tube M11 and the fourth resistor R4 as the output end of the low voltage difference linear regulator, and is used to provide an output voltage VDD to the subsequent circuit;

[0009] The non-inverting input terminal of the first operational amplifier A1 is used to access the bandgap reference voltage Vbg, and the inverting input terminal of the first operational amplifier A1 is connected between the fourth resistor R4 and the fifth resistor R5, and is connected to the feedback voltage VFB;

[0010] The overshoot suppression module 20 is connected to the output terminal of the first operational amplifier A1 .

[0011] In a second aspect, an embodiment of the present invention provides an electronic device, comprising the above-mentioned low voltage dropout linear regulator.

[0012] Compared with the prior art, the embodiment of the present invention provides a low voltage difference linear regulator and electronic equipment, wherein the output end of the first operational amplifier in the low voltage difference linear regulator is connected to the first end of the gate voltage regulation unit, and the second end of the gate voltage regulation unit is connected to the gate of the eleventh switch tube; the source of the eleventh switch tube is used to access the external input power supply, the drain of the eleventh switch tube is connected to one end of the fourth resistor, the other end of the fourth resistor is connected to one end of the fifth resistor, and the other end of the fifth resistor is grounded, and a terminal is drawn between the drain of the eleventh switch tube and the fourth resistor as the output end of the low voltage difference linear regulator, which is used to provide an output voltage to the subsequent circuit; the in-phase input end of the first operational amplifier is used to access the bandgap reference voltage, and the inverting input end of the first operational amplifier is connected between the fourth resistor and the fifth resistor, and is connected to the feedback voltage; the overshoot suppression module is connected to the output end of the first operational amplifier. The overshoot suppression module is connected to the output end of the first operational amplifier, and can shunt the output current of the first operational amplifier, thereby affecting the control current flowing through the gate voltage regulation unit, and achieving the purpose of suppressing voltage overshoot.

[0013] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, preferred embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0015] Figure 1 An equivalent circuit diagram of a low voltage dropout linear regulator provided by an embodiment of the present invention.

[0016] Figure 2 A schematic diagram of voltage overshoot provided by an embodiment of the present invention.

[0017] Figure 3 This is one of the structural schematic diagrams of a low voltage dropout linear regulator provided by an embodiment of the present invention.

[0018] Figure 4 The second structural schematic diagram of the low voltage dropout linear regulator provided by the embodiment of the present invention.

[0019] Figure 5A schematic diagram of the structure of an overshoot suppression module provided in an embodiment of the present invention.

[0020] Figure 6 A schematic diagram of a startup process of a low voltage dropout linear regulator provided by an embodiment of the present invention.

[0021] Figure 7 A schematic diagram of the structure of a current limiting module provided in an embodiment of the present invention.

[0022] In the figure: 10-main module; 11-gate voltage adjustment unit; 12-output unit; 20-overshoot suppression module; 30-fast start module; 40-current limiting module. DETAILED DESCRIPTION

[0023] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings here can be arranged and designed in various different configurations.

[0024] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the invention claimed for protection, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0025] It should be noted that similar reference numerals and letters represent similar items in the following drawings, so once an item is defined in one drawing, it does not need to be further defined and explained in the subsequent drawings. At the same time, in the description of the present invention, the terms "first", "second", etc. are only used to distinguish the description and cannot be understood as indicating or implying relative importance.

[0026] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0027] In the description of the present invention, it should be noted that the terms "upper", "lower", "inside", "outside", etc. indicate directions or positional relationships based on the directions or positional relationships shown in the accompanying drawings, or are directions or positional relationships in which the product of the invention is usually placed when in use. They are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and therefore should not be understood as a limitation on the present invention.

[0028] In the description of the present invention, it is also necessary to explain that, unless otherwise clearly specified and limited, the terms "disposed" and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be an indirect connection through an intermediate medium, or it can be the internal communication of two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0029] Some embodiments of the present invention are described in detail below in conjunction with the accompanying drawings. In the absence of conflict, the following embodiments and features in the embodiments can be combined with each other.

[0030] Please refer to Figure 1 , Figure 1 The equivalent circuit diagram of a low voltage dropout linear regulator provided by an embodiment of the present invention is shown in FIG. The non-inverting input terminal of the error amplifier is connected to the reference voltage V REF , output power tube M G The gate of the output is connected to the output of the error amplifier, and the output power tube M G The source of the output power tube M is connected to the external input power VIN. G The drain is connected to the resistor R FB1 One end of the resistor R FB1 The other end is connected to the resistor R FB2 One end of the resistor R FB2 The other end of the error amplifier is connected to the ground, and the inverting input of the error amplifier is connected to the resistor R FB1 and resistor R FB2 between.

[0031] In the output power tube M G The drain and resistor R FB1 A wiring terminal is provided between Figure 1 The output terminal of the low voltage dropout linear regulator shown in the figure has an output voltage of V OUT . Output capacitor C OUT One end is connected to the output end of the low voltage drop linear regulator, and the output end capacitor C OUT The other end of is grounded. The resistor RESR is the equivalent parasitic resistance of the output capacitor COUT.

[0032] The LDO circuit is a negative feedback network. The internal error amplifier generates a negative feedback voltage VFB and a reference voltage V REF The difference between the two is amplified and the output power tube M is adjusted. G The gate potential of the output power tube M is adjusted G The current matches the load current to ensure that the output voltage V OUT When the gain of the error amplifier is large enough, the output voltage V OUT It can be expressed as: V OUT = V REF × (R FB1 +R FB2 ) ÷ R FB2 .

[0033] The key factor of voltage overshoot in LDO circuit is

[0034] At the moment of power-on, the output capacitor C OUT It can be regarded as a short circuit, that is, the output capacitor C OUT The voltage across the two ends is 0. If the equivalent parasitic resistance R ESR is too small, the output voltage V OUT The voltage will be pulled down to the ground voltage, so the negative feedback circuit inside the LDO will have a large voltage compensation, making the output voltage V OUT Instantaneously pull high, at this time the output power tube M G The voltage difference between the source and drain is very small. The output capacitor C OUT After fully charged, the output power tube M takes time because the feedback loop G If there is no time to adjust, the output voltage V OUT voltage overshoot.

[0035] Please refer to Figure 2 , Figure 2 A schematic diagram of voltage overshoot provided by an embodiment of the present invention, wherein time t0 is the initial time of power-on, and time tr is the time when voltage overshoot occurs.

[0036] In order to overcome the above defects, the embodiment of the present invention provides a low voltage dropout linear regulator, which can effectively reduce the LDO voltage overshoot while accelerating the LDO startup process, meet the needs of most applications, and ensure that the voltage overshoot during power-on is small enough to reduce the quality risks of the LDO. Figure 3 , Figure 3 This is one of the structural schematic diagrams of a low voltage dropout linear regulator provided by an embodiment of the present invention.

[0037] The low voltage difference linear regulator includes a main module 10 and an overshoot suppression module 20. The main module 10 includes a first operational amplifier A1, a gate voltage adjustment unit 11 and an output unit 12. The output unit 12 includes an eleventh switch tube M11, a fourth resistor R4 and a fifth resistor R5.

[0038] The eleventh switch tube M11 is an output power tube, and the fourth resistor R4 and the fifth resistor R5 are used as voltage dividing resistors.

[0039] The output end of the first operational amplifier A1 is connected to the first end of the gate voltage regulating unit 11 , the second end of the gate voltage regulating unit 11 is connected to the gate of the eleventh switch tube M11 , and the third end of the gate voltage regulating unit 11 is grounded.

[0040] The source of the eleventh switch tube M11 is used to connect to the external input power supply VIN, the drain of the eleventh switch tube M11 is connected to one end of the fourth resistor R4, the other end of the fourth resistor R4 is connected to one end of the fifth resistor R5, the other end of the fifth resistor R5 is grounded, and a wiring terminal is led out between the drain of the eleventh switch tube M11 and the fourth resistor R4 as the output end of the low voltage difference linear regulator, which is used to provide an output voltage VDD to the subsequent circuit.

[0041] The non-inverting input terminal of the first operational amplifier A1 is used to access the bandgap reference voltage Vbg, and the inverting input terminal of the first operational amplifier A1 is connected between the fourth resistor R4 and the fifth resistor R5, and is accessed to the feedback voltage VFB.

[0042] The overshoot suppression module 20 is connected to the output terminal of the first operational amplifier A1 .

[0043] The first operational amplifier A1 is used for outputting a corresponding current according to the bandgap reference voltage Vbg and the feedback voltage VFB.

[0044] It should be noted that when the output voltage VDD increases, the feedback voltage VFB increases, and the bandgap reference voltage Vbg and the feedback voltage VFB are compared through the first operational amplifier A1, and the output current of the first operational amplifier A1 decreases; when the output voltage VDD decreases, the feedback voltage VFB decreases, and the bandgap reference voltage Vbg and the feedback voltage VFB are compared through the first operational amplifier A1, and the output current of the first operational amplifier A1 increases.

[0045] The gate voltage regulating unit 11 is used to control the gate voltage of the eleventh switch tube M11 to increase when the regulating current flowing through the gate voltage regulating unit 11 decreases, and to control the gate voltage of the eleventh switch tube M11 to decrease when the regulating current increases.

[0046] It should be noted that when the output current of the first operational amplifier A1 decreases, the regulation current flowing through the gate voltage regulation unit 11 decreases, and when the output current of the first operational amplifier A1 increases, the regulation current flowing through the gate voltage regulation unit 11 increases.

[0047] When the gate voltage of the eleventh switch tube M11 increases, the current flowing through the fourth resistor R4 and the fifth resistor R5 decreases, thereby reducing the output voltage VDD; when the gate voltage of the eleventh switch tube M11 decreases, the current flowing through the fourth resistor R4 and the fifth resistor R5 increases, thereby increasing the output voltage VDD. Due to the negative feedback of the LDO, the output voltage VDD can be kept constant.

[0048] The overshoot suppression module 20 is used to adjust the control current within a target time period to suppress the output voltage overshoot.

[0049] The target time period is from t1 to t2 or from t0 to t2, where t0 represents the initial moment when the low voltage dropout linear regulator is powered on, t1 represents the moment when the output voltage VDD reaches the preset voltage threshold, and t2 represents the moment when the bias current and voltage inside the chip are fully ready. Alternatively, t2 is the moment of a preset time length after t1.

[0050] It should be noted that the overshoot suppression module 20 is connected to the output end of the first operational amplifier A1, and can shunt the output current of the first operational amplifier A1, thereby affecting the regulation current flowing through the gate voltage regulation unit 11, thereby achieving the purpose of suppressing voltage overshoot.

[0051] Please continue to refer to Figure 3 Optionally, the gate voltage regulating unit 11 includes a fourth switch tube M4 to a tenth switch tube M10, a first resistor R1 and a second resistor R2.

[0052] The drain and gate of the fifth switch tube M5 are connected to the output terminal of the first operational amplifier A1, the source of the fifth switch tube M5 is connected to the drain and gate of the fourth switch tube M4, and the gate of the sixth switch tube M6 is connected to the gate of the fourth switch tube M4. The fourth switch tube M4 and the sixth switch tube M6 form a current mirror. It should be noted that the currents flowing through the switches on both sides of the current mirror are the same.

[0053] The drain of the sixth switch tube M6 is connected to the source of the seventh switch tube M7, the gate of the seventh switch tube M7 is used to access the first bias voltage v4, the drain of the seventh switch tube M7 is connected to one end of the second resistor R2, the other end of the second resistor R2 is connected to one end of the first resistor R1, and the other end of the first resistor R1 is connected to the drain and gate of the eighth switch tube M8.

[0054] It should be noted that the first bias voltage v4 can be but is not limited to a voltage of 4V.

[0055] The source of the eighth switch tube M8 and the source of the ninth switch tube M9 are used to access the external input power source VIN.

[0056] The gate of the ninth switch tube M9 is used to access the second bias voltage Vbias, the drain of the ninth switch tube M9 is connected to the source of the tenth switch tube M10, the gate of the tenth switch tube M10 is connected between the first resistor R1 and the second resistor R2, and a connection terminal is led out between the drain of the ninth switch tube M9 and the source of the tenth switch tube M10 as the second end of the gate voltage adjustment unit 11, and is connected to the gate of the eleventh switch tube M11.

[0057] A source of the fourth switch tube M4 , a source of the sixth switch tube M6 , and a drain of the tenth switch tube M10 are grounded.

[0058] It should be noted that the regulating current flowing through the gate voltage regulating unit 11 is the current flowing through the seventh switch tube M7. When the output current of the first operational amplifier A1 decreases, the current flowing through the fourth switch tube M4 and the sixth switch tube M6 decreases, and at this time, the current flowing through the seventh switch tube M7 decreases, and the gate voltage of the tenth switch tube M10 increases, thereby controlling the gate voltage of the eleventh switch tube M11 to increase, so that the output voltage VDD decreases.

[0059] When the output current of the first operational amplifier A1 increases, the current flowing through the fourth switch tube M4 and the sixth switch tube M6 increases. At this time, the current flowing through the seventh switch tube M7 increases, and the gate voltage of the tenth switch tube M10 decreases, thereby controlling the gate voltage of the eleventh switch tube M11 to decrease, so that the output voltage VDD increases.

[0060] Please continue to refer to Figure 3 In an optional implementation, the gate voltage regulating unit 11 further includes a third resistor R3, one end of the third resistor R3 is connected to the gate of the eleventh switch tube M11, and the third resistor R3 is connected to the external input power supply VIN.

[0061] The third resistor R3 is used as a pull-up resistor to prevent the gate voltage of the eleventh switch tube M11 from being too low so that current flows through the eleventh switch tube M11 during the startup process.

[0062] Since the overshoot suppression module 20 slows down the rising speed of the output voltage VDD in order to suppress voltage overshoot, it will also cause the startup time to be too long. In order to overcome this problem and achieve the purpose of fast startup while ensuring the safety of the device, the embodiment of the present invention also provides an optional implementation method, please refer to Figure 4 . Figure 4 The second structural schematic diagram of the low voltage dropout linear regulator provided by the embodiment of the present invention.

[0063] The low dropout linear regulator further includes a fast start-up module 30 .

[0064] A first terminal of the fast start module 30 is used to access the first bias current I1.

[0065] The second end of the quick start module 30 is used to connect to the output terminal flag voltage vdd_greater. When the output voltage VDD is higher than the preset voltage threshold, the output terminal flag voltage vdd_greater is high. When the output voltage VDD is lower than the preset voltage threshold, the output terminal flag voltage vdd_greater is low. The preset voltage threshold can be but is not limited to 3.5V.

[0066] The third terminal of the fast start module 30 is connected between the drain of the sixth switch tube M6 and the source of the seventh switch tube M7 .

[0067] A fourth terminal of the fast start module 30 is grounded.

[0068] The fast start module 30 is used to increase the regulating current flowing through the gate voltage regulating unit 11 during the fast start period, so as to reduce the gate voltage of the eleventh switch tube M11.

[0069] The quick start time period is from t0 to t1, that is, the time period when the output voltage VDD is lower than the preset voltage threshold.

[0070] It should be understood that the fast start-up module 30 can conduct the source of the seventh switch tube M7 and the ground. When current flows through the fast start-up module 30, the current flowing through the seventh switch tube M7 can be quickly increased, thereby changing the gate voltage of the eleventh switch tube M11, thereby quickly adjusting the output voltage VDD to achieve the purpose of fast startup.

[0071] Please continue to refer to Figure 4 Optionally, the fast start module 30 includes a first switch tube M1, a second switch tube M2 and a third switch tube M3. The second switch tube M2 and the third switch tube M3 form a current mirror.

[0072] The drain of the first switch tube M1 is connected to the drain of the second switch tube M2 , and a connection terminal is led out between the two to serve as a first end of the quick start module 30 , and is connected to the first bias current I1 .

[0073] The gate of the second switch tube M2 is connected to the drain of the second switch tube M2 .

[0074] The gate of the first switch tube M1 serves as the second terminal of the fast start module 30 and is connected to the output terminal flag voltage vdd_greater.

[0075] The gate of the third switch tube M3 is connected to the gate of the second switch tube M2 , and the drain of the third switch tube M3 serves as the third end of the fast start module 30 , connected between the drain of the sixth switch tube M6 and the source of the seventh switch tube M7 .

[0076] The source of the first switch tube M1 , the source of the second switch tube M2 and the source of the third switch tube M3 serve together as the fourth terminal of the fast start module 30 and are grounded.

[0077] When the output terminal flag voltage vdd_greater is low, the first switch tube M1 is in the off state, and the first bias current I1 forms a current mirror through the second switch tube M2 and the third switch tube M3, so that a part of the drain current of the seventh switch tube M7 passes through the drain of the third switch tube M3 to the ground. I M7 = I M3 + I M6 ,in, I M7 represents the current flowing through the seventh switch tube M7, I M3 represents the current flowing through the third switch tube M3, I M6 represents the current flowing through the sixth switch tube M6.

[0078] Because the current I M3 The existence of I M7 The voltage of the gate of the tenth switch tube M10 decreases, that is, the gate voltage of the eleventh switch tube M11 (output power tube) decreases, so the current of the eleventh switch tube M11 increases, so that the output VDD increases rapidly. By quickly starting part of the circuit, the output voltage VDD can be accelerated to a certain extent, that is, the startup process of the LDO can be accelerated.

[0079] When the output terminal flag voltage vdd_greater is high, the first switch tube M1 is turned on, the gate voltage of the second switch tube M2 is close to the ground potential, then the channels of the second switch tube M2 and the third switch tube M3 are disconnected, and no current flows through the third switch tube M3.

[0080] Based on the above, regarding the structure of the overshoot suppression module, the embodiment of the present invention also provides an optional implementation method, please refer to Figure 5 , Figure 5 A schematic diagram of the structure of an overshoot suppression module provided in an embodiment of the present invention.

[0081] The overshoot suppression module 20 includes a first capacitor C1, a first switch unit S1, a second switch unit S2, an inverter INV1, a second operational amplifier A2, a sixth resistor R6, and twenty-third to twenty-seventh switch tubes M23 to M27.

[0082] The input end of the inverter INV1 is used to access the third bias voltage ibias_ok, the output end of the inverter INV1 is connected to the control end of the first switch unit S1, and the first end of the first switch unit S1 is used to access the bandgap reference voltage Vbg.

[0083] The control end of the second switch unit S2 is connected to the input end of the inverter INV1, the first end of the second switch unit S2 is used to access the discharge bias current I3, the second end of the first switch unit S1, the second end of the second switch unit S2 and one end of the first capacitor C1 are all connected to the non-inverting input end of the second operational amplifier A2.

[0084] It should be noted that, in the target time period, the third bias voltage ibias_ok is at a low level.

[0085] The output end of the second operational amplifier A2 is connected to the gate of the twenty-third switch tube M23, the source of the twenty-third switch tube M23 is connected to one end of the sixth resistor R6, and the inverting input end of the second operational amplifier A2 is connected between the twenty-third switch tube M23 and the sixth resistor R6.

[0086] The source of the twenty-fourth switch tube M24 and the source of the twenty-fifth switch tube M25 are connected to the output end of the low voltage difference linear regulator, the gate and the drain of the twenty-fourth switch tube M24 are connected to the drain of the twenty-third switch tube M23, the gate of the twenty-fifth switch tube M25 is connected to the gate of the twenty-fourth switch tube M24, the source of the twenty-fifth switch tube M25 is connected to the gate and the drain of the twenty-sixth switch tube M26, the gate of the twenty-seventh switch tube M27 is connected to the drain of the twenty-sixth switch tube M26, and the drain of the twenty-seventh switch tube M27 is connected to the output end of the first operational amplifier A1.

[0087] The twenty-fourth switch tube M24 , the twenty-fifth switch tube M25 , the twenty-sixth switch tube M26 and the twenty-seventh switch tube M27 form a current mirror.

[0088] The other end of the first capacitor C1 , the other end of the sixth resistor R6 , the source of the twenty-sixth switch tube M26 , and the source of the twenty-seventh switch tube M27 are grounded.

[0089] When the third bias voltage ibias_ok is at a low level, the output ibias_ok_n of the inverter INV1 is at a high level, the control end of the first switch unit S1 is connected to a high level, the first switch unit S1 is turned on, the control end of the second switch unit S2 is connected to a low level, and the second switch unit S2 is turned off. When the third bias voltage ibias_ok is at a high level, the output ibias_ok_n of the inverter INV1 is at a low level, the control end of the first switch unit S1 is connected to a low level, the first switch unit S1 is turned off, the control end of the second switch unit S2 is connected to a high level, and the second switch unit S2 is turned on.

[0090] Because of the above relationship, when the third bias voltage ibias_ok is at a low level, the input voltage Vinp at the in-phase input terminal of the second operational amplifier A2 is equal to the bandgap reference voltage Vbg. Through the negative feedback of the second operational amplifier A2, the twenty-third switch tube M23 and the sixth resistor R6, it can be known that: I M23 = V bg ÷ R 6, among which, I M23 represents the current flowing through the twenty-third switch tube M23.

[0091] Because of the effect of the current mirror, the current flowing through the twenty-seventh switch tube M27 I M27 equal I M23 The current flowing through the twenty-seventh switch tube M27 is I M27 The current flowing through the twenty-seventh switch tube M27 is I M27 The existence of may reduce the current flowing through the fifth switch tube M5, thereby reducing the current (regulating current) flowing through the seventh switch tube M7, and increasing the gate voltage of the tenth switch tube M10, thereby controlling the gate voltage of the eleventh switch tube M11 to increase, so that the output voltage VDD decreases.

[0092] When the third bias voltage ibias_ok is at a high level, the voltage at the non-inverting input terminal of the second operational amplifier A2 is discharged through the discharge bias current I3, and the discharge slope thereof is: dv / dt=I3 / C1.

[0093] The voltage at the in-phase input terminal of the second operational amplifier A2 gradually decreases, so the current flowing through the twenty-seventh switch tube M27 I M27 Also gradually decreases, the current flowing through the fifth switch tube M5 increases, thereby causing the output voltage VDD of the LDO to increase.

[0094] The discharge rate of Vinp can be expressed by the above discharge slope formula. When the discharge rate is slow enough, the current flowing through the fifth switch tube M5 also increases slowly, so that the output VDD can rise slowly in this process, so that the LDO loop can respond to the change of VDD voltage in time, effectively reducing the overshoot voltage at startup.

[0095] It should be noted that this part of the circuit reduces the overshoot voltage of the LDO output while slowing down the rise of the VDD voltage and increasing the startup time. Therefore, the role of the fast startup part mentioned above is to compensate for the startup speed, so as to achieve a sufficiently short startup time while reducing the overshoot of the LDO output voltage.

[0096] Please refer to Figure 6 , Figure 6 The schematic diagram of the startup process of the low voltage difference linear regulator provided by the embodiment of the present invention is shown in FIG. vdd_greater_3p5v in the figure represents the output terminal mark voltage when the preset voltage threshold is 3.5V. This is used as an example, and the preset voltage threshold can be but is not limited to 3.5V.

[0097] The startup process of the low-dropout linear regulator includes three parts: during t0 ~ t1, vdd_greater_3p5v is at a low level, and the output voltage VDD rises rapidly; during t1 ~ t2, due to the current flowing through the twenty-seventh switch tube M27 I M27 The output voltage VDD will decrease slightly due to the presence of ; during t2~t3, the third bias voltage ibias_ok is at a high level, and the current flowing through the twenty-seventh switch tube M27 I M27 The output voltage VDD gradually increases. I M27 The falling slope of the output voltage VDD is reduced, and the rising slope of the output voltage VDD is reduced, so that the LDO loop can respond in time, thereby effectively reducing the overshoot voltage of VDD at startup.

[0098] exist Figure 3 On the basis of how to place the risk of excessive output current of the low voltage drop linear regulator causing the chip to burn out, the embodiment of the present invention also provides an optional implementation method, please refer to Figure 7 , Figure 7 A schematic diagram of the structure of a current limiting module provided in an embodiment of the present invention.

[0099] Optionally, the low voltage dropout linear regulator includes a current limiting module 40 , and the current limiting module 40 includes a twelfth switch tube M12 to a twenty-first switch tube M21 .

[0100] The gate of the twelfth switch tube M12 is connected to the gate of the eleventh switch tube M11. The twelfth switch tube M12 is used to access the external input power supply VIN. The drain of the twelfth switch tube M12 is connected to the source of the thirteenth switch tube M13. The gate of the thirteenth switch tube M13 is connected to the gate of the twenty-second switch tube M22. The drain of the thirteenth switch tube M13 is connected to the gate and drain of the fourteenth switch tube M14. The source of the fourteenth switch tube M14 is grounded.

[0101] The source of the seventeenth switch tube M17 , the source of the eighteenth switch tube M18 , and the source of the twenty-second switch tube M22 are connected to the output end of the low voltage difference linear regulator.

[0102] The gate of the seventeenth switch tube M17 is connected to the gate and drain of the eighteenth switch tube M18. The drain of the seventeenth switch tube M17 is connected to the drain of the fifteenth switch tube M15. The gate of the fifteenth switch tube M15 is connected to the gate of the fourteenth switch tube M14. The source of the fifteenth switch tube M15 is grounded.

[0103] The source of the sixteenth switch tube M16 is connected to the output end of the first operational amplifier A1 , the gate of the sixteenth switch tube M16 is connected between the drain of the seventeenth switch tube M17 and the drain of the fifteenth switch tube M15 , and the drain of the sixteenth switch tube M16 is grounded.

[0104] The drain of the nineteenth switch tube M19 is connected to the drain of the eighteenth switch tube M18 , the gate of the nineteenth switch tube M19 is connected to the gate of the twentieth switch tube M20 and the gate of the twenty-first switch tube M21 , and the source of the nineteenth switch tube M19 is grounded.

[0105] The drain of the twenty-second switch tube M22 is connected to the gate of the twenty-second switch tube M22, the drain of the twentieth switch tube M20 is connected to the drain of the twenty-second switch tube M22, the drain of the twenty-first switch tube M21 is connected to the gate of the twenty-first switch tube M21, the twenty-first switch tube M21 is also used to access the second bias current I2, and the source of the twenty-first switch tube M21 and the source of the twentieth switch tube M20 are grounded.

[0106] Because the gate of the twelfth switch tube M12 is connected to the gate of the eleventh switch tube M11, the current flowing through the eleventh switch tube M11 can be detected by the twelfth switch tube M12. When the current flowing through the eleventh switch tube M11 increases, the current flowing through the twelfth switch tube M12 will also increase proportionally, and the current flowing through the fourteenth switch tube M14 will increase, thereby increasing the current of the fifteenth switch tube M15 of the current mirror tube. The increase in the current of the fifteenth switch tube M15 will enhance the pull-down capability of the fifteenth switch tube M15, and the drain voltage of the fifteenth switch tube M15 will decrease, and the gate voltage of the sixteenth switch tube M16 will decrease. The gate voltage of the sixteenth switch tube M16 decreases, which causes the current of the sixteenth switch tube M16 to increase, that is, a part of the current of the first operational amplifier A1 flows through the sixteenth switch tube M16 to the ground, which reduces the current flowing through the fourth switch tube M4, thereby increasing the gate voltage of the eleventh switch tube M11, that is, the source-gate voltage of the twelfth switch tube M12 decreases, thereby reducing the current of the eleventh switch tube M11, and thus reducing the output current of VDD. Through the above-mentioned current limiting effect, the risk caused by excessive output current of the LDO can be prevented.

[0107] The second bias current I2 is used to provide an approximately fixed current to the seventeenth switch tube M17. Only when the current of the fifteenth switch tube M15 changes, the current of the seventeenth switch tube M17 will change accordingly.

[0108] The switch tube in the embodiment of the present invention can be flexibly configured as a MOS tube, a field effect tube and a triode. When the switch tube is a MOS tube, as shown in the accompanying drawings, the switch tube with the arrow pointing to the gate is a PMOS tube, and the switch tube with the arrow pointing to the outside is an NMOS tube.

[0109] The embodiment of the present invention further provides an electronic device, which includes the above-mentioned low voltage drop linear regulator. The electronic device can be a handheld device (such as a mobile phone, a computer, a tablet, etc.), a portable device (such as a Bluetooth headset, an electronic watch, etc.), and all devices that require a stable power supply voltage, such as automotive products.

[0110] In summary, the embodiment of the present invention provides a low voltage difference linear regulator and electronic equipment, wherein the output end of the first operational amplifier in the low voltage difference linear regulator is connected to the first end of the gate voltage adjustment unit, and the second end of the gate voltage adjustment unit is connected to the gate of the eleventh switch tube; the source of the eleventh switch tube is used to access the external input power supply, the drain of the eleventh switch tube is connected to one end of the fourth resistor, the other end of the fourth resistor is connected to one end of the fifth resistor, and the other end of the fifth resistor is grounded, and a terminal is drawn between the drain of the eleventh switch tube and the fourth resistor as the output end of the low voltage difference linear regulator, which is used to provide an output voltage to the subsequent circuit; the in-phase input end of the first operational amplifier is used to access the bandgap reference voltage, and the inverting input end of the first operational amplifier is connected between the fourth resistor and the fifth resistor, and the feedback voltage is accessed; the overshoot suppression module is connected to the output end of the first operational amplifier. The overshoot suppression module is connected to the output end of the first operational amplifier, which can shunt the output current of the first operational amplifier, thereby affecting the control current flowing through the gate voltage adjustment unit, and achieving the purpose of suppressing voltage overshoot.

[0111] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

[0112] It will be apparent to those skilled in the art that the invention is not limited to the details of the exemplary embodiments described above and that the invention can be implemented in other specific forms without departing from the spirit or essential features of the invention. Therefore, the embodiments should be considered exemplary and non-limiting in all respects, and the scope of the invention is defined by the appended claims rather than the foregoing description, and it is intended that all variations falling within the meaning and scope of the equivalent elements of the claims be included in the invention. Any reference numeral in a claim should not be considered as limiting the claim to which it relates.

Claims

1. A low voltage dropout linear regulator, characterized in that: The low voltage difference linear regulator comprises a main module (10) and an overshoot suppression module (20), wherein the main module (10) comprises a first operational amplifier (A1), a gate voltage adjustment unit (11) and an output unit (12), wherein the output unit (12) comprises an eleventh switch tube (M11), a fourth resistor (R4) and a fifth resistor (R5); The output end of the first operational amplifier (A1) is connected to the first end of the gate voltage regulating unit (11), and the second end of the gate voltage regulating unit (11) is connected to the gate of the eleventh switch tube (M11); The source of the eleventh switch tube (M11) is used to connect to the external input power supply (VIN), the drain of the eleventh switch tube (M11) is connected to one end of the fourth resistor (R4), the other end of the fourth resistor (R4) is connected to one end of the fifth resistor (R5), the other end of the fifth resistor (R5) is grounded, and a wiring terminal is led out between the drain of the eleventh switch tube (M11) and the fourth resistor (R4) as the output end of the low voltage difference linear regulator, and is used to provide an output voltage (VDD) to the subsequent circuit; The non-inverting input terminal of the first operational amplifier (A1) is used to access the bandgap reference voltage (Vbg), and the inverting input terminal of the first operational amplifier (A1) is connected between the fourth resistor (R4) and the fifth resistor (R5) and is connected to the feedback voltage (VFB); The overshoot suppression module (20) is connected to the output end of the first operational amplifier (A1); The gate voltage regulating unit (11) comprises a fourth switch tube (M4) to a tenth switch tube (M10), a first resistor (R1) and a second resistor (R2); The drain and gate of the fifth switch tube (M5) are connected to the output end of the first operational amplifier (A1), the source of the fifth switch tube (M5) is connected to the drain and gate of the fourth switch tube (M4), and the gate of the sixth switch tube (M6) is connected to the gate of the fourth switch tube (M4); The drain of the sixth switch tube (M6) is connected to the source of the seventh switch tube (M7), the gate of the seventh switch tube (M7) is used to access the first bias voltage (v4), the drain of the seventh switch tube (M7) is connected to one end of the second resistor (R2), the other end of the second resistor (R2) is connected to one end of the first resistor (R1), and the other end of the first resistor (R1) is connected to the drain and gate of the eighth switch tube (M8); The source of the eighth switch tube (M8) and the source of the ninth switch tube (M9) are used to connect to an external input power supply (VIN); The gate of the ninth switch tube (M9) is used to access the second bias voltage (Vbias); the drain of the ninth switch tube (M9) is connected to the source of the tenth switch tube (M10); the gate of the tenth switch tube (M10) is connected between the first resistor (R1) and the second resistor (R2); a connection terminal is led out between the drain of the ninth switch tube (M9) and the source of the tenth switch tube (M10), serving as the second end of the gate voltage adjustment unit (11), and connected to the gate of the eleventh switch tube (M11); The source of the fourth switch tube (M4), the source of the sixth switch tube (M6) and the drain of the tenth switch tube (M10) are grounded; The overshoot suppression module (20) comprises a first capacitor (C1), a first switch unit (S1), a second switch unit (S2), an inverter (INV1), a second operational amplifier (A2), a sixth resistor (R6), and twenty-third switch tubes (M23) to twenty-seventh switch tubes (M27); The input end of the inverter (INV1) is used to access the third bias voltage (ibias_ok), the output end of the inverter (INV1) is connected to the control end of the first switch unit (S1), and the first end of the first switch unit (S1) is used to access the bandgap reference voltage (Vbg); The control end of the second switch unit (S2) is connected to the input end of the inverter (INV1), the first end of the second switch unit (S2) is used to connect the discharge bias current (I3), and the second end of the first switch unit (S1), the second end of the second switch unit (S2) and one end of the first capacitor (C1) are all connected to the non-inverting input end of the second operational amplifier (A2); The output end of the second operational amplifier (A2) is connected to the gate of the twenty-third switch tube (M23), the source of the twenty-third switch tube (M23) is connected to one end of the sixth resistor (R6), and the inverting input end of the second operational amplifier (A2) is connected between the twenty-third switch tube (M23) and the sixth resistor (R6); The source of the twenty-fourth switch tube (M24) and the source of the twenty-fifth switch tube (M25) are connected to the output end of the low voltage difference linear regulator, the gate and drain of the twenty-fourth switch tube (M24) are connected to the drain of the twenty-third switch tube (M23), the gate of the twenty-fifth switch tube (M25) is connected to the gate of the twenty-fourth switch tube (M24), the source of the twenty-fifth switch tube (M25) is connected to the gate and drain of the twenty-sixth switch tube (M26), the gate of the twenty-seventh switch tube (M27) is connected to the drain of the twenty-sixth switch tube (M26), and the drain of the twenty-seventh switch tube (M27) is connected to the output end of the first operational amplifier (A1); The other end of the first capacitor (C1), the other end of the sixth resistor (R6), the source of the twenty-sixth switch tube (M26) and the source of the twenty-seventh switch tube (M27) are grounded.

2. The low voltage dropout linear regulator according to claim 1, characterized in that: The first operational amplifier (A1) is used to output a corresponding current according to the bandgap reference voltage (Vbg) and the feedback voltage (VFB); The gate voltage regulating unit (11) is used to control the gate voltage of the eleventh switch tube (M11) to increase when the regulating current flowing through it decreases, and to control the gate voltage of the eleventh switch tube (M11) to decrease when the regulating current increases; The overshoot suppression module (20) is used to adjust the control current within a target time period to suppress output voltage overshoot.

3. The low voltage dropout linear regulator according to claim 1, characterized in that: The gate voltage regulating unit (11) further comprises a third resistor (R3), one end of the third resistor (R3) is connected to the gate of the eleventh switch tube (M11), and the third resistor (R3) is connected to an external input power supply (VIN).

4. The low dropout linear regulator according to claim 1, characterized in that: The low voltage drop linear regulator further comprises a quick start module (30); The first end of the quick start module (30) is used to access a first bias current (I1); The second end of the quick start module (30) is used to connect to an output terminal mark voltage (vdd_greater); when the output voltage (VDD) is higher than a preset voltage threshold, the output terminal mark voltage (vdd_greater) is high; when the output voltage (VDD) is lower than the preset voltage threshold, the output terminal mark voltage (vdd_greater) is low; The third end of the quick start module (30) is connected between the drain of the sixth switch tube (M6) and the source of the seventh switch tube (M7); A fourth terminal of the quick start module (30) is grounded; The fast start module (30) is used to increase the regulating current flowing through the gate voltage regulating unit (11) during the fast start time period, so as to reduce the gate voltage of the eleventh switch tube (M11).

5. The low voltage dropout linear regulator according to claim 4, characterized in that: The quick start module (30) comprises a first switch tube (M1), a second switch tube (M2) and a third switch tube (M3); The drain of the first switch tube (M1) and the drain of the second switch tube (M2) are connected, and a wiring terminal is led out between the two, serving as a first end of the quick start module (30) and connected to a first bias current (I1); The gate of the second switch tube (M2) is connected to the drain of the second switch tube (M2); The gate of the first switch tube (M1) serves as the second end of the quick start module (30) and is connected to the output end mark voltage (vdd_greater); The gate of the third switch tube (M3) is connected to the gate of the second switch tube (M2); the drain of the third switch tube (M3) serves as the third end of the quick start module (30) and is connected between the drain of the sixth switch tube (M6) and the source of the seventh switch tube (M7); The source of the first switch tube (M1), the source of the second switch tube (M2) and the source of the third switch tube (M3) are grounded.

6. The low dropout linear regulator according to claim 1, wherein: The low voltage difference linear regulator comprises a current limiting module (40), and the current limiting module (40) comprises a twelfth switch tube (M12) to a twenty-first switch tube (M21); The gate of the twelfth switch tube (M12) is connected to the gate of the eleventh switch tube (M11), the twelfth switch tube (M12) is used to connect to the external input power supply (VIN), the drain of the twelfth switch tube (M12) is connected to the source of the thirteenth switch tube (M13), the gate of the thirteenth switch tube (M13) is connected to the gate of the twenty-second switch tube (M22), the drain of the thirteenth switch tube (M13) is connected to the gate and drain of the fourteenth switch tube (M14), and the source of the fourteenth switch tube (M14) is grounded; The source of the seventeenth switch tube (M17), the source of the eighteenth switch tube (M18) and the source of the twenty-second switch tube (M22) are connected to the output end of the low voltage difference linear regulator; The gate of the seventeenth switch tube (M17) is connected to the gate and drain of the eighteenth switch tube (M18), the drain of the seventeenth switch tube (M17) is connected to the drain of the fifteenth switch tube (M15), the gate of the fifteenth switch tube (M15) is connected to the gate of the fourteenth switch tube (M14), and the source of the fifteenth switch tube (M15) is grounded; The source of the sixteenth switch tube (M16) is connected to the output end of the first operational amplifier (A1), the gate of the sixteenth switch tube (M16) is connected between the drain of the seventeenth switch tube (M17) and the drain of the fifteenth switch tube (M15), and the drain of the sixteenth switch tube (M16) is grounded; The drain of the nineteenth switch tube (M19) is connected to the drain of the eighteenth switch tube (M18), the gate of the nineteenth switch tube (M19) is connected to the gate of the twentieth switch tube (M20) and the gate of the twenty-first switch tube (M21), and the source of the nineteenth switch tube (M19) is grounded; The drain of the twenty-second switch tube (M22) is connected to the gate of the twenty-second switch tube (M22), the drain of the twentieth switch tube (M20) is connected to the drain of the twenty-second switch tube (M22), the drain of the twenty-first switch tube (M21) is connected to the gate of the twenty-first switch tube (M21), the twenty-first switch tube (M21) is also used to access the second bias current (I2), and the source of the twenty-first switch tube (M21) and the source of the twentieth switch tube (M20) are grounded.

7. An electronic device, characterized in that: A low voltage drop linear regulator comprising any one of claims 1 to 6.

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