Current control circuit, voltage converter, and power supply device

Abstract

This application is applicable to the technical field of power supply devices, and provides a current control circuit, a voltage converter, and a power supply device. The current control circuit includes a reference module and a first adjustment module. The reference module and the first adjustment module are electrically connected. The reference module is used to be electrically connected to the drive module in the voltage converter and the gate of the first switching transistor in the voltage converter respectively. The first adjustment module is used to be electrically connected to the drain of the first switching transistor and the drive module respectively. In the current control circuit provided by the embodiments of this application, when detecting and controlling the input current of the voltage conversion module, there is no need to serially connect a power resistor on the input side of the voltage conversion module, thereby avoiding large power losses and improving the conversion efficiency of the voltage converter.

Description

Technical Field

[0001] This application belongs to the technical field of power supply devices, and particularly relates to a current control circuit, a voltage converter, and a power supply device. Background Art

[0002] A voltage converter is a device that can convert an input voltage. For example, a Boost boost converter can convert a lower input voltage into a higher output voltage and is widely used in electronic devices. In order to maintain a stable output voltage, the voltage converter usually adopts an output voltage feedback mechanism for regulation to ensure that the output voltage remains constant. The detection of the output voltage is usually achieved by using a voltage-dividing resistor. This method is not only simple to implement but also low in cost. In some application scenarios, the input current of the voltage converter also needs to be detected and controlled. The existing method for detecting and controlling the input current of the voltage converter is to connect a power resistor in series on the input side of the voltage converter. However, connecting a power resistor in series will generate additional heat, resulting in a large power loss, thereby reducing the conversion efficiency of the voltage converter. Summary of the Invention

[0003] Embodiments of this application provide a current control circuit, a voltage converter, and a power supply device, which can solve the problem that the existing method of detecting and controlling current by connecting a power resistor in series on the input side of the voltage converter results in a large power loss and a low conversion efficiency of the voltage converter.

[0004] In a first aspect, embodiments of this application provide a current control circuit, including a reference module and a first adjustment module. The reference module and the first adjustment module are electrically connected. The reference module is used to be electrically connected to the drive module in the voltage converter and the gate of the first switch tube in the voltage converter respectively. The first adjustment module is used to be electrically connected to the drain of the first switch tube and the drive module respectively.

[0005] The reference module is used to output a reference voltage to the first adjustment module according to the drive signal output by the drive module. The first adjustment module is used to receive the sampling voltage and the reference voltage, and adjust the node voltage when the sampling voltage is greater than or equal to the reference voltage. The sampling voltage is the product of the first current flowing through the first switch tube and the on-resistance of the first switch tube. The node voltage is the voltage at the common end of the first adjustment module and the drive module. The node voltage is used to instruct the drive module to adjust the first current flowing through.

[0006] In a possible implementation of the first aspect, the reference module includes a second switching transistor, a reference current source, a first switch, and a first NOT gate. The gate of the second switching transistor is electrically connected to the gate of the first switching transistor, the input terminal of the first NOT gate, and the driving module respectively. The drain of the second switching transistor is electrically connected to the first terminal of the reference current source, the first terminal of the first switch, and the first adjustment module respectively. The source of the second switching transistor and the second terminal of the first switch are both grounded. The second terminal of the reference current source is used to be electrically connected to a first power supply. The control terminal of the first switch is electrically connected to the output terminal of the first NOT gate.

[0007] In a possible implementation of the first aspect, the first adjustment module includes a comparison unit, a pulse generation unit, an error signal output unit, and a buffer amplification output unit. The comparison unit is electrically connected to the reference module, the drain of the first switching transistor, and the pulse generation unit respectively. The error signal output unit is electrically connected to the pulse generation unit and the buffer amplification output unit respectively. The buffer amplification output unit is used to be electrically connected to the driving module;

[0008] The comparison unit is configured to receive the reference voltage and the sampled voltage, and output a comparison signal when the sampled voltage is greater than or equal to the reference voltage. The pulse generation unit is configured to output a first pulse signal and a second pulse signal according to the comparison signal and the sampled voltage. The error signal output unit is configured to output an error signal according to the first pulse signal and the second pulse signal. The buffer amplification output unit is configured to output a node voltage adjustment signal according to the error signal to adjust the node voltage.

[0009] In a possible implementation of the first aspect, the comparison unit includes a first comparator. The positive input terminal of the first comparator is electrically connected to the reference module. The negative input terminal of the first comparator is electrically connected to the pulse generation unit and the drain of the first switching transistor respectively. The output terminal of the first comparator is electrically connected to the pulse generation unit.

[0010] In a possible implementation of the first aspect, the pulse generation unit includes a first AND gate, a second AND gate, a second NOT gate, and a third NOT gate. The first input terminal of the first AND gate is electrically connected to the comparison unit. The second input terminal of the first AND gate is electrically connected to the output terminal of the second NOT gate and the second input terminal of the second AND gate respectively. The output terminal of the first AND gate is electrically connected to the input terminal of the third NOT gate and the error signal output unit respectively. The input terminal of the second NOT gate is electrically connected to the comparison unit. The first input terminal of the second AND gate is electrically connected to the output terminal of the third NOT gate. The output terminal of the second AND gate is electrically connected to the error signal output unit;

[0011] Alternatively, the first adjustment module is further configured to be electrically connected to the driving module. The pulse generation unit includes a third AND gate, a fourth AND gate, and a fourth NOT gate. The first input terminal of the third AND gate is electrically connected to the comparison unit. The second input terminal of the third AND gate is electrically connected to the second input terminal of the fourth AND gate and the driving module respectively. The output terminal of the third AND gate is electrically connected to the input terminal of the fourth NOT gate and the error signal output unit respectively. The first input terminal of the fourth AND gate is electrically connected to the output terminal of the fourth NOT gate. The output terminal of the fourth NOT gate is electrically connected to the error signal output unit.

[0012] Alternatively, the pulse generation unit includes a fifth AND gate, a fifth NOT gate, and a selection switch. The first input terminal of the fifth AND gate is electrically connected to the comparison unit. The second input terminal of the fifth AND gate is electrically connected to the first terminal of the selection switch and the error signal output unit respectively. The output terminal of the fifth AND gate is electrically connected to the error signal output unit. The input terminal of the fifth NOT gate is electrically connected to the comparison unit. The output terminal of the fifth NOT gate is electrically connected to the second terminal of the selection switch. The third terminal of the selection switch is electrically connected to the driving module and the reference module respectively.

[0013] In a possible implementation manner of the first aspect, the error signal output unit includes a first current source, a second current source, a second switch, a third switch, and a first capacitor. The first terminal of the first current source is configured to be electrically connected to a second power supply. The second terminal of the first current source is electrically connected to the first terminal of the second switch. The first terminal of the second current source is electrically connected to the second terminal of the second switch, the first terminal of the first capacitor, and the buffer amplification output unit respectively. The second terminal of the second current source is electrically connected to the first terminal of the third switch. The control terminals of the third switch and the second switch are both electrically connected to the pulse generation unit. The second terminal of the third switch and the second terminal of the first capacitor are both grounded.

[0014] In a possible implementation manner of the first aspect, the buffer amplification output unit includes a voltage follower and a first diode. The input terminal of the voltage follower is electrically connected to the error signal output unit. The output terminal of the voltage follower is electrically connected to the cathode of the first diode. The anode of the first diode is configured to be electrically connected to the driving module.

[0015] Second aspect, embodiments of the present application provide a voltage converter, including a voltage conversion module, a driving module, and the current control circuit described in any one of the first aspect. The gate of the first switching tube in the voltage conversion module is electrically connected to the driving module and the reference module in the current control circuit respectively. The drain of the first switching tube and the driving module are both electrically connected to the first adjustment module in the current control circuit;

[0016] The current control circuit is used to adjust the node voltage. The driving module is used to output a driving signal to the voltage conversion module according to the node voltage. The voltage conversion module is used to convert the input voltage according to the driving signal and output a target voltage; the node voltage is the voltage at the common terminal of the first adjustment module and the driving module.

[0017] In a possible implementation manner of the second aspect, the voltage converter further includes a second adjustment module. The second adjustment module is electrically connected to the first adjustment module and the driving module respectively. The second adjustment module is used to adjust the node voltage when the difference between the preset voltage and the target voltage is less than a first threshold.

[0018] Third aspect, embodiments of the present application provide a power supply device, including the voltage converter described in any one of the second aspect.

[0019] The beneficial effects of the embodiments of the present application compared with the prior art are as follows:

[0020] The current control circuit provided by the embodiments of the present application includes a reference module and a first adjustment module. Among them, the reference module outputs a reference voltage to the first adjustment module according to the driving signal output by the driving module. The first adjustment module receives the reference voltage and the sampling voltage, and then compares the reference voltage and the sampling voltage. If the sampling voltage is greater than or equal to the reference voltage, it indicates that the load increase causes the input current to increase. At this time, the input current has reached the set current, and the first adjustment module adjusts the node voltage, so that the voltage transmitted to the driving module decreases. The driving module outputs a driving signal to the gate of the first switching tube according to the node voltage to reduce the duty cycle of the first switching tube, thereby reducing the output voltage of the voltage converter, and further achieving the purpose of limiting the input current of the voltage converter. It can be seen that the current control circuit provided by the embodiments of the present application does not need to connect a power resistor in series on the input side of the voltage converter when detecting and controlling the input current of the voltage converter, thereby avoiding large power losses and improving the conversion efficiency of the voltage converter. Description of the Drawings

[0021] To more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the accompanying drawings required for describing the embodiments or the prior art. Obviously, the accompanying drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other accompanying drawings can also be obtained based on these drawings.

[0022] Figure 1 is a circuit connection schematic diagram of an existing input current control circuit;

[0023] Figure 2 is a principle block diagram of a current control circuit provided by an embodiment of the present application;

[0024] Figure 3 is a waveform schematic diagram of the input current and the first current provided by an embodiment of the present application;

[0025] Figure 4 is a circuit connection schematic diagram of a current control circuit provided by an embodiment of the present application;

[0026] Figure 5 is a principle block diagram of a current control circuit provided by another embodiment of the present application;

[0027] Figure 6 is a circuit connection schematic diagram of a current control circuit provided by another embodiment of the present application;

[0028] Figure 7 is a working waveform schematic diagram of a current control circuit provided by an embodiment of the present application;

[0029] Figure 8 is a circuit connection schematic diagram of a current control circuit provided by another embodiment of the present application;

[0030] Figure 9 is a principle block diagram of a voltage converter provided by an embodiment of the present application.

[0031] In the figure, 10 is the current control circuit; 101 is the reference module; 102 is the first adjustment module; 1021 is the comparison unit; 1022 is the pulse generation unit; 1023 is the error signal output unit; 1024 is the buffer amplification output unit; 20 is the drive module; 30 is the voltage conversion module; 40 is the second adjustment module. Detailed implementation manners

[0032] In the following description, specific details such as specific system architectures and technologies are presented for purposes of illustration and not limitation in order to provide a thorough understanding of the embodiments of the present application. However, those skilled in the art should understand that the present application can also be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present application with unnecessary details.

[0033] It should be understood that when used in the specification of the present application and the appended claims, the term "comprising" indicates the presence of the described features, integers, steps, operations, elements, and / or components, but does not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or their groups.

[0034] It should also be understood that the term "and / or" as used in the specification of the present application and the appended claims refers to any combination and all possible combinations of one or more of the associated listed items, and includes these combinations.

[0035] As used in the specification of the present application and the appended claims, the term "if" can be interpreted as "when" or "once" or "in response to determining" or "in response to detecting" according to the context. Similarly, the phrase "if determined" or "if [the described condition or event] is detected" can be interpreted as meaning "once determined" or "in response to determining" or "once [the described condition or event] is detected" or "in response to detecting [the described condition or event]" according to the context.

[0036] In addition, in the description of the specification of the present application and the appended claims, the terms "first", "second", "third", etc. are only used for distinguishing descriptions and cannot be understood as indicating or implying relative importance.

[0037] The reference to "one embodiment" or "some embodiments" or the like described in the specification of the present application means that a specific feature, structure, or characteristic described in connection with that embodiment is included in one or more embodiments of the present application. Thus, statements such as "in one embodiment", "in some embodiments", "in other some embodiments", "in still other embodiments", etc. that appear in different places in this specification do not necessarily all refer to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized in another way. The terms "comprising", "including", "having", and their variants all mean "including but not limited to", unless otherwise specifically emphasized in another way.

[0038] In certain application scenarios, the input current of the voltage converter also needs to be detected and controlled. As Figure 1As shown, the existing method for detecting the input current of a voltage converter is to serially connect a power resistor R to the input side of the voltage converter. SNS However, the serially connected power resistor R SNS will generate additional heat, which in turn leads to a relatively large power loss, thereby reducing the conversion efficiency of the voltage converter.

[0039] Based on the above problems, the current control circuit provided in the embodiments of the present application includes a reference module and a first adjustment module. Among them, the reference module outputs a reference voltage to the first adjustment module according to the drive signal output by the drive module. The first adjustment module receives the reference voltage and the sampling voltage, and then compares the reference voltage and the sampling voltage. If the sampling voltage is greater than or equal to the reference voltage, it indicates that the increase in the load has caused an increase in the input current. At this time, the input current has reached the set current, and the first adjustment module adjusts the node voltage, thereby reducing the voltage transmitted to the drive module. The drive module outputs a drive signal to the gate of the first switch tube according to the node voltage to reduce the duty cycle of the first switch tube, thereby reducing the output voltage of the voltage converter, and further achieving the purpose of limiting the input current of the voltage converter. It can be seen that the current control circuit provided in the embodiments of the present application, when detecting and controlling the input current of the voltage converter, does not need to serially connect a power resistor to the input side of the voltage converter, thereby avoiding a large power loss and improving the conversion efficiency of the voltage converter.

[0040] To illustrate the technical solutions described in the present application, the following will be described through specific embodiments.

[0041] Figure 2 shows the principle block diagram of the current control circuit 10 provided in an embodiment of the present application. Refer to Figure 2 As shown, the current control circuit 10 includes a reference module 101 and a first adjustment module 102. The reference module 101 and the first adjustment module 102 are electrically connected. The reference module 101 is used to be electrically connected to the drive module 20 in the voltage converter and the gate of the first switch tube Q1 in the voltage converter respectively. The first adjustment module 102 is used to be electrically connected to the drain of the first switch tube Q1 and the drive module 20.

[0042] Specifically, the reference module 101 outputs a reference voltage V to the first adjustment module 102 according to the drive signal Q1_G output by the drive module 20. CS1 The first adjustment module 102 receives the reference voltage V CS1 and the sampling voltage V CS2 , where the sampling voltage V CS2 (the voltage at the drain of the first switch tube Q1) is the product of the first current I Q1 and the on-resistance Rdson_Q of the first switch tube Q1 1 , that is, I Q1*Rdson_Q 1 Then, the reference voltage V CS1 and the sampled voltage V CS2 are compared. If the sampled voltage V CS2 is greater than or equal to the reference voltage V CS1 , it indicates that the increase in load has caused an increase in the input current. At this time, the input current has reached the set current, and the first adjustment module 102 adjusts the voltage of the FBO node, so that the voltage transmitted to the drive module 20 decreases. The drive module 20 outputs a drive signal Q1_G to the gate of the first switching transistor Q1 according to the voltage of the FBO node, so as to reduce the duty cycle of the first switching transistor Q1, thereby reducing the output voltage of the voltage converter, and further achieving the purpose of limiting the input current of the voltage converter. It can be seen that the current control circuit 10 provided by the embodiment of the present application does not need to connect a power resistor in series on the input side of the voltage converter when detecting and controlling the input current of the voltage converter, thereby avoiding large power loss and improving the conversion efficiency of the voltage converter.

[0043] It should be noted that when the sampled voltage V CS2 is less than the reference voltage V CS1 , that is, the input current has not reached the set current, the first adjustment module 102 cannot adjust the voltage of the FBO node, and the drive module 20 does not control the duty cycle of the first switching transistor Q1.

[0044] It should be noted that the set current can be provided by a given current source, or by a current generation module, or can be set by an external control signal through an electronic regulation system.

[0045] It should be noted that, as Figure 3 shown, I L1 is the current flowing through the inductor L1 in the voltage converter, I L1_AVG is the average current flowing through the inductor L1, that is, the average input current of the voltage converter, and I Q1 is the first current flowing through the first switching transistor Q1 in the voltage converter. When the first switching transistor Q1 is turned on, the inductor current I L1 flows through the first switching transistor Q1. At this time, the inductor L1 is charged, and the inductor current I L1 is equal to the first current I Q1 . When the first switching transistor Q1 is turned off, the inductor current I L1 flows through the diode D. At this time, the inductor L1 discharges, and the first current I Q1 is zero. It can be seen that the average current value of the inductor L1 is at the midpoint of the rising or falling period of the inductor current I L1 . Since the midpoint of the rising period of the inductor current I L1 is also the midpoint of the first current I Q1At the midpoint position. Therefore, by detecting the first current I Q1 At the midpoint position, the average current input to the voltage converter can be detected, thereby realizing the detection and control of the average input current.

[0046] In an embodiment of the present application, as Figure 4 , Figure 6 Or Figure 8 Shown, the reference module 101 includes a second switching transistor Q SNS , a reference current source, a first switch SW1, and a first NOT gate F1. The gate of the second switching transistor Q SNS Is respectively electrically connected to the gate of the first switching transistor Q1, the input end of the first NOT gate F1, and the driving module 20. The drain of the second switching transistor Q SNS Is respectively electrically connected to the first end of the reference current source, the first end of the first switch SW1, and the first adjustment module 102. The source of the second switching transistor Q SNS And the second end of the first switch SW1 are both grounded. The second end of the reference current source is used to be electrically connected to the first power supply V CC1 , and the control end of the first switch SW1 is electrically connected to the output end of the first NOT gate F1.

[0047] Specifically, since the gate of the second switching transistor Q SNS Is connected to the gate of the first switching transistor Q1 and is used to receive the driving signal Q1_G output by the driving module 20, and conducts and turns off according to the driving signal Q1_G. When the driving signal Q1_G is at a high level, the second switching transistor Q SNS And the first switching transistor Q1 are both conducting. The high-level driving signal Q1_G is converted into a low level after passing through the first NOT gate F1 and is transmitted to the control end of the first switch SW1. The control end of the first switch SW1 receives the low-level signal and controls the disconnection between the first end and the second end. The first end of the reference current source is used as the positive pole of the reference current source, and the second end of the reference current source is used as the negative pole of the reference current source. The reference current source is used to provide a reference current I IN_REF . At this time, the voltage to the ground generated by the reference current I IN_REF Flowing through the second switching transistor Q SNS Is I IN_REF *Rdson_Q SNS , that is, the reference voltage V CS1 . When the driving signal Q1_G is at a low level, the second switching transistor Q SNS And the first switching transistor Q1 are both turned off. The low-level driving signal Q1_G is converted into a high level after passing through the first NOT gate F1 and is transmitted to the control end of the first switch SW1. The control end of the first switch SW1 receives the high-level signal and controls the conduction between the first end and the second end. The reference current I IN_REF Is clamped to the ground through the first switch SW1.

[0048] It should be noted that the size of the second switching transistor Q SNS can be set to 1 / N times that of the first switching transistor Q1, and the on-resistance of the second switching transistor Q SNS is N times that of the on-resistance of the first switching transistor Q1. Since the value of N is greater than 1000 or even higher in practical applications, that is, the size of the second switching transistor Q SNS is negligible compared with that of the first switching transistor Q1. Therefore, the cost of the reference module 101 can be ignored. And, the size of the reference current I IN_REF is 1 / N times that of the first current I Q1 . Therefore, the power loss caused by the current control circuit 10 can also be ignored. It can be seen from this that the loss of the current control circuit 10 provided by the embodiment of the present application is low, and there is no need for additional device cost.

[0049] Exemplarily, the designer can select the type of the second switching transistor Q SNS according to the actual situation, that is, a fully controlled power device such as a metal oxide field effect transistor or an insulated gate bipolar transistor can be used. For example, the second switching transistor Q SNS can be selected as an NMOS transistor. The first switch SW1 can be a switching transistor or other switching devices, which are not limited herein.

[0050] In an embodiment of the present application, as shown in Figure 4 , Figure 6 or Figure 8 , the first adjustment module 102 includes a comparison unit 1021, a pulse generation unit 1022, an error signal output unit 1023, and a buffer amplification output unit 1024. The comparison unit 1021 is electrically connected to the drain of the first switching transistor Q1 of the reference module 101 and the pulse generation unit 1022 respectively. The error signal output unit 1023 is electrically connected to the pulse generation unit 1022 and the buffer amplification output unit 1024 respectively. The buffer amplification output unit 1024 is used to be electrically connected to the driving module 20.

[0051] Specifically, the comparison unit 1021 is used to receive the reference voltage V CS1 and the sampling voltage V CS2 , where the reference voltage V CS1 is the voltage output by the reference module 101, and the sampling voltage V CS2 is the voltage I Q1 *Rdson_Q Q1 generated by the first current I 1 flowing through the first switching transistor Q1 to the ground. When the sampling voltage V CS2 is greater than or equal to the reference voltage V CS1 , it indicates that the input current increases, and at this time the input has reached I IN_REF*N, that is, when the set current is reached, the comparison unit 1021 outputs a comparison signal A. The pulse generation unit 1022 outputs the first pulse signal S CS2 and the second pulse signal S A according to the comparison signal A and the sampling voltage V B . The error signal output unit 1023 outputs an error signal V A according to the first pulse signal S B and the second pulse signal S ERR . The buffer amplification output unit 1024 outputs a node voltage regulation signal according to the error signal V ERR to regulate the FBO node voltage.

[0052] In an embodiment of the present application, as shown in Figure 4 , Figure 6 or Figure 8 , the comparison unit 1021 includes a first comparator COMP1. The positive input terminal of the first comparator COMP1 is electrically connected to the reference module 101. The negative input terminal of the first comparator COMP1 is electrically connected to the pulse generation unit 1022 and the drain of the first switching transistor Q1 respectively. The output terminal of the first comparator COMP1 is electrically connected to the pulse generation unit 1022.

[0053] Specifically, the first comparator COMP1 is used to receive the reference voltage V CS1 and the sampling voltage V CS2 , and compare the reference voltage V CS1 with the sampling voltage V CS2 . When the sampling voltage V CS2 is greater than or equal to the reference voltage V CS1 , the output terminal of the first comparator COMP1 outputs a comparison signal A. At this time, the comparison signal A is a low-level signal.

[0054] It should be noted that when the sampling voltage V CS2 is greater than or equal to the reference voltage V CS1 , it indicates that the input current has not reached the set current. At this time, the comparison signal A output by the first comparator COMP1 is a high-level signal, and the current control circuit 10 does not control the duty cycle of the first switching transistor Q1.

[0055] In an embodiment of the present application, as shown in Figure 4As shown, the pulse generation unit 1022 includes a first AND gate Y1, a second AND gate Y2, a second NOT gate F2, and a third NOT gate F3. The first input terminal of the first AND gate Y1 is electrically connected to the comparison unit 1021. The second input terminal of the first AND gate Y1 is electrically connected to the output terminal of the second NOT gate F2 and the second input terminal of the second AND gate Y2 respectively. The output terminal of the first AND gate Y1 is electrically connected to the input terminal of the third NOT gate F3 and the error signal output unit 1023 respectively. The input terminal of the second NOT gate F2 is electrically connected to the comparison unit 1021. The first input terminal of the second AND gate Y2 is electrically connected to the output terminal of the third NOT gate F3. The output terminal of the second AND gate Y2 is electrically connected to the error signal output unit 1023.

[0056] Specifically, when the sampling voltage V CS2 is greater than or equal to the reference voltage V CS1 , the comparison signal A is a low-level signal. The sampling voltage V CS2 generates a signal voltage B (high-level signal) after passing through the second NOT gate F2, and is transmitted to the second input terminal of the first AND gate Y1 and the second input terminal of the second AND gate Y2. The first AND gate Y1 performs an AND operation on the comparison signal A and the signal voltage B, and outputs a first pulse signal S A , and at this time, the first pulse signal S A is a low-level signal. The first pulse signal S A generates a first non-pulse signal (high-level signal) after passing through the third NOT gate F3, and is transmitted to the first input terminal of the second AND gate Y2. The second AND gate Y2 performs an AND operation on the first non-pulse signal and the signal voltage B, and outputs a second pulse signal S B , and at this time, the second pulse signal S B is a high-level signal.

[0057] In an embodiment of the present application, as Figure 5 shown, the first adjustment module 102 is further used to be electrically connected to the drive module 20. The first adjustment module 102 is further used to adjust the FBO node voltage according to the reference voltage V CS1 , the sampling voltage V CS2 and the drive signal Q1_G. The pulse generation unit 1022 is further used to output a first pulse signal S A and a second pulse signal S B according to the comparison signal A and the drive signal Q1_G. As Figure 6As shown, the pulse generation unit 1022 includes a third AND gate Y3, a fourth AND gate Y4, and a fourth NOT gate F4. The first input terminal of the third AND gate Y3 is electrically connected to the comparison unit 1021. The second input terminal of the third AND gate Y3 is respectively electrically connected to the second input terminal of the fourth AND gate Y4 and the driving module 20. The output terminal of the third AND gate Y3 is respectively electrically connected to the input terminal of the fourth NOT gate F4 and the error signal output unit 1023. The first input terminal of the fourth AND gate Y4 is electrically connected to the output terminal of the fourth NOT gate F4. The output terminal of the fourth NOT gate F4 is electrically connected to the error signal output unit 1023.

[0058] Specifically, when the sampling voltage V CS2 is greater than or equal to the reference voltage V CS1 , the comparison signal A is a low-level signal. The driving signal Q1_G output by the driving module 20 is a high-level signal, that is, the signal voltage B is a high-level signal, which is transmitted to the second input terminal of the third AND gate Y3 and the second input terminal of the fourth AND gate Y4. The third AND gate Y3 performs an AND operation on the comparison signal A and the signal voltage B (driving signal Q1_G), and outputs the first pulse signal S A , and at this time, the first pulse signal S A is a low-level signal. The first pulse signal S A generates a first non-pulse signal (high-level signal) after passing through the fourth NOT gate F4, and is transmitted to the first input terminal of the fourth AND gate Y4. The fourth AND gate Y4 performs an AND operation on the first non-pulse signal and the signal voltage B, and outputs the second pulse signal S B , and at this time, the second pulse signal S B is a high-level signal.

[0059] It should be noted that taking the circuit connection schematic diagram shown in Figure 6 as an example, the working waveform schematic diagram of the current control circuit 10 is as shown in Figure 7 . Among them, Q1_G is the driving signal, N*I L_REF is the average value of the input current, V CS2 is the sampling voltage, V CS1 is the reference voltage, S A is the first pulse signal, S B is the second pulse signal. During the conduction period of the first switching transistor Q1, only when the sampling voltage V CS2 is greater than or equal to the reference voltage V CS1 , the comparison signal A is a low level, the first pulse signal S A is a low-level signal, and the second pulse signal S B is a high-level signal.

[0060] In an embodiment of the present application, as shown in Figure 8As shown, the first adjustment module 102 is electrically connected to the reference module 101 and the drain of the first switching transistor Q1 respectively, or the first adjustment module 102 is electrically connected to the reference module 101, the drain of the first switching transistor Q1 and the driving module 20 respectively. The first adjustment module 102 is configured to adjust the FBO node voltage according to the reference voltage V CS1 and the sampled voltage V CS2 , or the first adjustment module 102 is configured to adjust the FBO node voltage according to the reference voltage V CS1 , the sampled voltage V CS2 and the driving signal Q1_G. Correspondingly, the pulse generation unit 1022 is configured to output a first pulse signal S CS2 and a second pulse signal S A according to the comparison signal A and the sampled voltage V B , or the pulse generation unit 1022 is configured to output a first pulse signal S A and a second pulse signal S B according to the comparison signal A and the driving signal Q1_G. The pulse generation unit 1022 includes a fifth AND gate Y5, a fifth NOT gate F5 and a selection switch SW0. The first input terminal of the fifth AND gate Y5 is electrically connected to the comparison unit 1021. The second input terminal of the fifth AND gate Y5 is electrically connected to the first terminal of the selection switch SW0 and the error signal output unit 1023 respectively. The output terminal of the fifth AND gate Y5 is electrically connected to the error signal output unit 1023. The input terminal of the fifth NOT gate F5 is electrically connected to the comparison unit 1021. The output terminal of the fifth NOT gate F5 is electrically connected to the second terminal of the selection switch SW0. The third terminal of the selection switch SW0 is electrically connected to the driving module 20 and the reference module 101 respectively.

[0061] Specifically, when the sampled voltage V CS2 is greater than or equal to the reference voltage V CS1 , the comparison signal A is a low-level signal. The driving signal Q1_G output by the driving module 20 is a high-level signal, that is, the signal voltage C is a high-level signal. The sampled voltage V CS2 generates a signal voltage D (high-level signal) after passing through the fifth NOT gate F5. The first terminal of the selection switch SW0 can be selected to be connected to the second terminal or the third terminal. Whether the first terminal of the selection switch SW0 is connected to the second terminal or the first terminal of the selection switch SW0 is connected to the third terminal, the signal voltage B received by the second input terminal of the fifth AND gate Y5 is a high-level signal. The fifth AND gate Y5 performs an AND operation on the comparison signal A and the signal voltage B, and outputs a first pulse signal S A , and at this time the first pulse signal S A is a low-level signal. The signal voltage B outputs a second pulse signal S B after passing through the buffer gate, and at this time the second pulse signal S B is a high-level signal.

[0062] In one embodiment of the present application, as Figure 4 , Figure 6 or Figure 8 shown, the error signal output unit 1023 includes a first current source I P , a second current source I N , a second switch SW2, a third switch SW3, and a first capacitor C1. The first end of the first current source I P is used to be electrically connected to the second power supply VCC2. The second end of the first current source I P is electrically connected to the first end of the second switch SW2. The first end of the second current source I N is electrically connected to the second end of the second switch SW2, the first end of the first capacitor C1, and the buffer amplification output unit 1024 respectively. The second end of the second current source I N is electrically connected to the first end of the third switch SW3. The control ends of the third switch SW3 and the second switch SW2 are both electrically connected to the pulse generation unit 1022. The second end of the third switch SW3 and the second end of the first capacitor C1 are both grounded.

[0063] Specifically, the first end of the first current source I P serves as the positive electrode of the first current source I P , and the second end of the first current source I P serves as the negative electrode of the first current source I P . The first end of the second current source I N serves as the positive electrode of the second current source I N , and the second end of the second current source I N serves as the negative electrode of the second current source I N . The first current source I P is used to provide a current I P , and the second current source I N is used to provide a current I N . The first pulse signal S A is used to control the conduction and cutoff of the second switch SW2. The second pulse signal S B is used to control the conduction and cutoff of the third switch SW3. When the first pulse signal S A is at a high level, the second switch SW2 conducts, and charges the first capacitor C1 according to the magnitude of the current I P . When the second pulse signal S B is at a high level, the third switch SW3 conducts, and discharges the first capacitor C1 according to the magnitude of the current I N . When the sampled voltage V CS2 is greater than or equal to the reference voltage V CS1When the second switch SW2 is in the off state, the third switch SW3 is in the on state, the first capacitor C1 is in the discharge state, and the voltage of the first capacitor C1 with respect to the ground decreases, thereby generating an error signal V ERR .

[0064] It should be noted that Figure 4 and Figure 6 the first current source I P and the second current source I N output equal currents in the same direction. Therefore, when the system reaches a steady state, the pulse widths of the first pulse signal S A and the second pulse signal S B are exactly equal, the conduction times of the second switch SW2 and the third switch SW3 are equal. At this time, the charging current and the discharging current of the first capacitor C1 are exactly equal, and the corresponding reference voltage V CS1 and the sampling voltage V CS2 are equal. The midpoint I Q1 of the first current I Q1_M is:

[0065]

[0066] wherein, I IN_AVG is the average value of the input current. It can be seen therefrom that the average value of the input current of the voltage converter can be limited to N times the reference current I IN_REF .

[0067] Figure 8 the first current source I P outputs twice the current output by the second current source I N and in the same direction. Therefore, when the system reaches a steady state, the pulse width of the first pulse signal S A is 1 / 2 of the pulse width of the second pulse signal S B . At this time, the charging current and the discharging current of the first capacitor C1 are exactly equal, and the midpoint of the first current I Q1 is still N times the reference current I IN_REF .

[0068] Exemplarily, both the second switch SW2 and the third switch SW3 can be implemented using switching transistors or other switching devices, which are not limited herein.

[0069] In an embodiment of the present application, such as Figure 4 or Figure 6As shown, the buffer amplification output unit 1024 includes a voltage follower U1 and a first diode D1. The input terminal of the voltage follower U1 is electrically connected to the error signal output unit 1023, the output terminal of the voltage follower U1 is electrically connected to the cathode of the first diode D1, and the anode of the first diode D1 is used to be electrically connected to the driving module 20.

[0070] Specifically, the input terminal of the voltage follower U1 is used to receive the error signal V ERR , that is, the voltage of the first capacitor C1 with respect to ground. The output terminal of the voltage follower U1 is used to output the current error signal V CTRL1 , thereby turning on the first diode D1. When the sampling voltage V CS2 is greater than or equal to the reference voltage V CS1 , the second switch SW2 is in the off state, the third switch SW3 is in the on state, the first capacitor C1 is in the discharging state, the voltage of the first capacitor C1 with respect to ground decreases, and thus the generated error signal V ERR pulls down the current error signal V CTRL1 , further turning on the first diode D1 and adjusting the FBO node voltage, thereby realizing the detection and control of the input current.

[0071] It should be noted that when the sampling voltage V CS2 is less than the reference voltage V CS1 , the second switch SW2 is in the on state, the third switch SW3 is in the off state, the first capacitor C1 is in the charging state, the voltage of the first capacitor C1 with respect to ground increases, and thus the generated error signal V ERR pulls up the current error signal V CTRL1 . At this time, the current source IC will charge the second capacitor C2, the FBO node voltage increases, the duty cycle corresponding to the first switching transistor Q1 increases, and thus the input current increases until the sampling voltage V CS2 reaches the reference voltage V CS1 . In the steady state, the pull-up current of the current source I C is equal to the pull-down current at the output terminal of the voltage follower U1, and the FBO node voltage remains unchanged.

[0072] It should be noted that the voltage follower U1 is also used for signal isolation to avoid the error signal V ERR from affecting the current error signal V CTRL1 , and further avoid affecting the FBO node voltage, thereby improving the reliability of the current control circuit 10.

[0073] Such as Figure 9As shown in the figure, the present application also discloses a voltage converter, which includes a voltage conversion module 30, a driving module 20, and the above-mentioned current control circuit 10. The gate of the first switching transistor Q1 in the voltage conversion module 30 is electrically connected to the reference module 101 in the driving module 20 and the current control circuit 10 respectively. The drain of the first switching transistor Q1 and the driving module 20 are both electrically connected to the first adjustment module 102 in the current control circuit 10.

[0074] Specifically, the current control circuit 10 can adjust the FBO node voltage. The driving module 20 can output a driving signal Q1_G to the voltage conversion module 30 according to the FBO node voltage. The voltage conversion module 30 transforms the input voltage according to the driving signal Q1_G and outputs the target voltage VOUT. The voltage converter uses the above-mentioned current control circuit 10 to adjust the input current of the voltage conversion module 30, and can limit the input current of the voltage conversion module 30 when the input current reaches the set value, thereby improving the conversion efficiency of the voltage converter.

[0075] It should be noted that the driving module 20 includes a pulse width modulation unit and a driver. The pulse width modulation unit is used to output a PWM signal according to the FBO node voltage and the sawtooth wave signal, and the driver outputs the driving signal Q1_G according to the PWM signal. The voltage conversion module 30 includes an inductor L1, a diode D, a first switching transistor Q1, and a capacitor C. The working principle of the voltage conversion module 30 is a prior art and will not be elaborated here. At the same time, the technical solution provided by the embodiment of the present application is not limited to Figure 1 the asynchronous voltage conversion module 30 shown in the figure. Among them, the diode D can be replaced with a synchronous rectification MOSFET transistor.

[0076] In an embodiment of the present application, as Figure 9 shown in the figure, the voltage converter further includes a second adjustment module 40. The second adjustment module 40 is electrically connected to the first adjustment module 102 and the driving module 20 respectively. The second adjustment module 40 is used to adjust the FBO node voltage when the difference between the preset voltage V OUT_REF and the target voltage V OUT is less than the first threshold. Wherein, the first threshold is a relatively small value, that is, the second adjustment module 40 is used to adjust the FBO node voltage when the target voltage V OUT is close to the preset voltage V OUT_REF .

[0077] Specifically, when the target voltage V OUT output by the voltage conversion module 30 is close to the preset voltage V OUT_REF , the second adjustment module 40 can adjust the FBO node voltage, and the driving module 20 can output the driving signal Q1_G to the gate of the first switching transistor Q1 according to the FBO node voltage.

[0078] In one embodiment of the present application, as shown in Figure 4 and Figure 6 , the second adjustment module 40 includes a sampling voltage comparator U2 and a second diode D2. The first input terminal of the sampling voltage comparator U2 is used to receive a preset voltage V OUT_REF , the second input terminal of the sampling voltage comparator U2 is used to receive the target voltage V OUT output by the voltage conversion module 30, the output terminal of the sampling voltage comparator U2 is electrically connected to the cathode of the second diode D2, and the anode of the second diode D2 is electrically connected to the driving module 20.

[0079] Specifically, the sampling voltage comparator U2 compares the target voltage V OUT with the preset voltage V OUT_REF and outputs a voltage error signal V CTRL2 , thereby turning on the second diode D2. When the target voltage V OUT is close to the preset voltage V OUT_REF , the voltage error signal V CTRL2 turns on the second diode D2, and then adjusts the FBO node voltage, thereby realizing the control of the target voltage V OUT .

[0080] It should be noted that among the current error signal V CTRL1 and the voltage error signal V CTRL2 , if the voltage corresponding to the current error signal V CTRL1 is lower, at this time, the first diode D1 conducts. If the voltage corresponding to the voltage error signal V CTRL2 is lower, at this time, the second diode D2 conducts.

[0081] It should be noted that the reference module 101, the first adjustment module 102 and the driving module 20 together constitute an input current detection and control loop, and the second adjustment module 40 and the driving module 20 together constitute an output voltage detection and control loop. The input current detection and control loop and the output voltage detection and control loop are connected in parallel. If the first diode D1 in the first adjustment module 102 conducts, at this time, the input current detection and control loop is used to adjust the duty cycle of the first switching transistor Q1, thereby adjusting the input current of the voltage conversion module 30. If the second diode D2 in the second adjustment module 40 conducts, at this time, the output voltage detection and control loop is used to adjust the duty cycle of the first switching transistor Q1, thereby adjusting the output voltage of the voltage conversion module 30.

[0082] The present application also discloses a power supply device including the above voltage converter. The power supply device adopting the above voltage converter can improve the output accuracy of the power supply device, thereby improving the working efficiency of the power supply device and enhancing the reliability and applicability of the power supply device.

[0083] Since the processes and functions implemented by the voltage converter and the power supply device in this embodiment are basically corresponding to the embodiments, principles, and examples of the aforementioned current control circuit, for the details not described in the description of this embodiment, reference can be made to the relevant descriptions in the aforementioned embodiments, and no further elaboration will be provided here.

[0084] The above-described embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements for some of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. A current control circuit, characterized in that: Applied to a voltage converter, the voltage converter includes a driving module, an inductor, a first switch tube, a diode and an output capacitor, the driving module is electrically connected to the gate of the first switch tube, the first end of the inductor is used to receive an input voltage, the second end of the inductor is electrically connected to the anode of the diode and the drain of the first switch tube respectively, the cathode of the diode is electrically connected to the first end of the output capacitor for outputting a target voltage, and the second end of the output capacitor and the source of the first switch tube are both grounded; The current control circuit includes a reference module and a first regulating module, the reference module and the first regulating module are electrically connected, the reference module is used to be electrically connected to the driving module in the voltage converter and the gate of the first switch tube in the voltage converter respectively, and the first regulating module is used to be electrically connected to the drain of the first switch tube and the driving module respectively; The reference module is used to output a reference voltage to the first regulating module according to the driving signal output by the driving module; The first regulating module is used to receive a sampled voltage and the reference voltage, and to regulate a node voltage when the sampled voltage is greater than or equal to the reference voltage, the sampled voltage is the product of a first current flowing through the first switch tube and an on-resistance of the first switch tube, and the node voltage is the voltage at a common end of the first regulating module and the driving module; the node voltage is used to instruct the driving module to regulate the first current; When the sampled voltage is less than the reference voltage, the first regulating module is unable to regulate the node voltage; The reference module includes a second switch tube, a reference current source, a first switch and a first NOT gate, the gate of the second switch tube is electrically connected to the gate of the first switch tube, the input end of the first NOT gate and the driving module respectively, the drain of the second switch tube is electrically connected to the first end of the reference current source, the first end of the first switch and the first regulating module respectively, the source of the second switch tube and the second end of the first switch are both grounded, the second end of the reference current source is used to be electrically connected to the first power supply, and the control end of the first switch is electrically connected to the output end of the first NOT gate; When the second switch tube is turned off, the first switch is turned on to clamp the reference current source to ground.

2. The current control circuit according to claim 1, characterized in that: The first regulating module comprises a comparing unit, a pulse generating unit, an error signal output unit and a buffer amplifying output unit, wherein the comparing unit is electrically connected to the reference module, the drain of the first switch tube and the pulse generating unit respectively, the error signal output unit is electrically connected to the pulse generating unit and the buffer amplifying output unit respectively, and the buffer amplifying output unit is used to be electrically connected to the driving module; The comparison unit is used to receive the reference voltage and the sampling voltage, and output a comparison signal when the sampling voltage is greater than or equal to the reference voltage. The pulse generation unit is used to output a first pulse signal and a second pulse signal according to the comparison signal and the sampling voltage. The error signal output unit is used to output an error signal according to the first pulse signal and the second pulse signal. The buffer amplifier output unit is used to output a node voltage adjustment signal according to the error signal to adjust the node voltage.

3. The current control circuit according to claim 2, characterized in that: The comparison unit includes a first comparator, a positive input terminal of the first comparator is electrically connected to the reference module, a negative input terminal of the first comparator is electrically connected to the pulse generating unit and the drain of the first switching tube respectively, and an output terminal of the first comparator is electrically connected to the pulse generating unit.

4. The current control circuit according to claim 2, characterized in that: The pulse generating unit comprises a first AND gate, a second AND gate, a second NOT gate and a third NOT gate, wherein a first input terminal of the first AND gate is electrically connected to the comparing unit, a second input terminal of the first AND gate is electrically connected to an output terminal of the second NOT gate and a second input terminal of the second AND gate respectively, an output terminal of the first AND gate is electrically connected to an input terminal of the third NOT gate and the error signal output unit respectively, an input terminal of the second NOT gate is electrically connected to the comparing unit, a first input terminal of the second AND gate is electrically connected to an output terminal of the third NOT gate, and an output terminal of the second AND gate is electrically connected to the error signal output unit; Alternatively, the first regulating module is further used to be electrically connected to the driving module, the pulse generating unit includes a third AND gate, a fourth AND gate and a fourth NOT gate, the first input end of the third AND gate is electrically connected to the comparing unit, the second input end of the third AND gate is electrically connected to the second input end of the fourth AND gate and the driving module respectively, the output end of the third AND gate is electrically connected to the input end of the fourth NOT gate and the error signal output unit respectively, the first input end of the fourth AND gate is electrically connected to the output end of the fourth NOT gate, and the output end of the fourth AND gate is electrically connected to the error signal output unit; Alternatively, the pulse generating unit includes a fifth AND gate, a fifth NOT gate and a selection switch, the first input end of the fifth AND gate is electrically connected to the comparison unit, the second input end of the fifth AND gate is electrically connected to the first end of the selection switch and the error signal output unit respectively, the output end of the fifth AND gate is electrically connected to the error signal output unit, the input end of the fifth NOT gate is electrically connected to the comparison unit, the output end of the fifth NOT gate is electrically connected to the second end of the selection switch, and the third end of the selection switch is electrically connected to the driving module and the reference module respectively.

5. The current control circuit according to claim 2, characterized in that: The error signal output unit includes a first current source, a second current source, a second switch, a third switch and a first capacitor, wherein the first end of the first current source is used to be electrically connected to the second power supply, the second end of the first current source is electrically connected to the first end of the second switch, the first end of the second current source is electrically connected to the second end of the second switch, the first end of the first capacitor and the buffer amplifier output unit respectively, the second end of the second current source is electrically connected to the first end of the third switch, the control end of the third switch and the control end of the second switch are both electrically connected to the pulse generating unit, and the second end of the third switch and the second end of the first capacitor are both grounded.

6. The current control circuit according to claim 2, characterized in that: The buffer amplifier output unit includes a voltage follower and a first diode, the input end of the voltage follower is electrically connected to the error signal output unit, the output end of the voltage follower is electrically connected to the cathode of the first diode, and the anode of the first diode is used to be electrically connected to the driving module.

7. A voltage converter, characterized in that: The invention comprises a voltage conversion module, a driving module and a current control circuit according to any one of claims 1 to 6, wherein the gate of the first switch tube in the voltage conversion module is electrically connected to the driving module and the reference module in the current control circuit respectively, and the drain of the first switch tube and the driving module are electrically connected to the first regulating module in the current control circuit; The current control circuit is used to adjust the node voltage, the driving module is used to output a driving signal to the voltage conversion module according to the node voltage, and the voltage conversion module is used to convert the input voltage according to the driving signal and output the target voltage; the node voltage is the voltage of the common end of the first regulating module and the driving module.

8. The voltage converter according to claim 7, characterized in that: The voltage converter further includes a second regulating module, which is electrically connected to the first regulating module and the driving module respectively, and is used for regulating the node voltage when the difference between the preset voltage and the target voltage is less than a first threshold.

9. A power supply device, characterized in that: Comprising the voltage converter as claimed in claim 7 or 8.

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