Encoder interface control circuit and dual-output shaft electric actuator
By designing an encoder interface control circuit and utilizing a combination of operational amplifiers and field-effect transistors, automatic switching and real-time calculation feedback of the encoder interface between absolute and incremental modes are achieved, solving the problem of mode conversion requiring additional circuits in the existing technology and improving the flexibility and accuracy of displacement control.
Patent Information
- Application Number
- CN202411108201.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-13
- Publication Date
- 2025-10-17
- Estimated Expiration
- 2044-08-13
AI Technical Summary
The existing encoder interface circuit can only perform absolute or incremental mode control, and an additional conversion circuit needs to be built for mode conversion. It is impossible to perform automatic displacement in both absolute and incremental modes when a displacement value setting port feeds back a displacement value signal.
An encoder interface control circuit was designed. Through the combination of an operational amplifier, a field-effect transistor, and a resistor, it was possible to automatically switch between absolute and incremental modes when a displacement value setting port fed back a displacement value signal, and perform real-time calculation feedback in either mode.
The applicability of the encoder interface circuit is improved, and it can perform automatic displacement in absolute or incremental mode and perform real-time calculation feedback after the displacement is completed, thereby enhancing the flexibility and accuracy of displacement control.
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Figure CN119010885B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of encoder interface, in particular to an encoder interface control circuit and a double-output-shaft electric actuator. BACKGROUND
[0002] The encoder converts the rotary or linear position signal into an electrical signal and feeds back to the interface circuit, and the interface circuit can control the displacement based on the position signal fed back by it, but the existing encoder interface circuit can only control in absolute / incremental mode, and additional conversion circuit needs to be built for mode conversion when converting between the two modes, therefore, the present application provides an encoder interface control circuit and a double-output-shaft electric actuator, which can automatically displace in absolute / incremental mode when feeding back the displacement value signal at a displacement value setting port based on the position signal fed back by the encoder, so as to improve the applicability, and can calculate and feed back in real time based on the position signal and the set / adjusted displacement value signal when displacing once in any mode and after the displacement is completed. SUMMARY
[0003] In view of the above technical problems, the present application aims to provide an encoder interface control circuit, which comprises a first operational amplifier U1, a fourth operational amplifier U4, a sixth operational amplifier U6, a seventh operational amplifier U7, a first field effect transistor Q1, a second field effect transistor Q2, a first resistor R1, a third resistor R3, a fourteenth resistor R14, a fifteenth resistor R15, a sixteenth resistor R16, an eighteenth resistor R18, a first connector P1, a second connector P2, a third connector P3 / 1 and a third connector P3 / 2.
[0004] The first operational amplifier U1 non-inverting terminal and the first resistor R1 one end, the third resistor R3 one end are connected, the first operational amplifier U1 inverting terminal and the first operational amplifier U1 output, the sixth operational amplifier U6 non-inverting terminal, the seventh operational amplifier U7 inverting terminal are connected, the fourth operational amplifier U4 non-inverting terminal and the first connector P1 are connected, the fourth operational amplifier U4 inverting terminal and the fourth operational amplifier U4 output, the sixth operational amplifier U6 inverting terminal, the seventh operational amplifier U7 non-inverting terminal are connected, the sixth operational amplifier U6 output and the second field effect tube Q2 drain, the fifteenth resistor R15 one end are connected, the seventh operational amplifier U7 output and the first field effect tube Q1 drain, the fourteenth resistor R14 one end are connected, the first field effect tube Q1 grid, the second field effect tube Q2 grid and the second connector P2 are connected, the first field effect tube Q1 source, the eighteenth resistor R18 one end and the third two connector P3 / 2 are connected, the second field effect tube Q2 source, the sixteenth resistor R16 one end and the third one connector P3 / 1 are connected, the first resistor R1 other end and the power supply are connected, the third resistor R3 other end, the fourteenth resistor R14 other end, the fifteenth resistor R15 other end, the sixteenth resistor R16 other end, the eighteenth resistor R18 other end and the ground terminal are connected.
[0005] Further, it also includes the second operational amplifier U2, the third operational amplifier U3, the fifth operational amplifier U5, the eighth operational amplifier U8, the fourth resistor R4, the fifth resistor R5, the sixth resistor R6, the seventh resistor R7, the eighth resistor R8, the ninth resistor R9, the tenth resistor R10, the eleventh resistor R11, the thirteenth resistor R13, the twentieth resistor R20, the twenty-first resistor R21, the twenty-second resistor R22, the twenty-third resistor R23, the first diode D1, the second diode D2;
[0006] The second operational amplifier U2 is connected to the fourth resistor R4 and the fifth resistor R5 at one end, the second operational amplifier U2 is connected to the sixth resistor R6 and the seventh resistor R7 at one end, the second operational amplifier U2 is connected to the sixth resistor R6 and the second diode D2 at the other end, the third operational amplifier U3 is connected to the eighth resistor R8 and the ninth resistor R9 at one end, the third operational amplifier U3 is connected to the tenth resistor R10 and the eleventh resistor R11 at one end, the third operational amplifier U3 is connected to the tenth resistor R10 and the first diode D1 at the other end, the fifth operational amplifier U5 is connected to the first diode D1 and the second diode D2 at the cathode, the fifth operational amplifier U5 is connected to the thirteenth resistor R13 at one end, the fifth operational amplifier U5 is connected to the thirteenth resistor R13 at the other end, the eighth operational amplifier U8 is connected to the twenty-second resistor R22 and the twenty-third resistor R23 at one end, the eighth operational amplifier U8 is connected to the twentieth resistor R20 and the twenty-first resistor R21 at one end, the eighth operational amplifier U8 is connected to the twentieth resistor R20 at the other end, the fourth resistor R4, the eleventh resistor R11, the twenty-third resistor R23 and the first operational amplifier U1 are connected at the other end, the seventh resistor R7, the eighth resistor R8, the twenty-second resistor R22 and the fourth operational amplifier U4 are connected at the other end, the fifth resistor R5, the ninth resistor R9, the twenty-first resistor R21 and the ground are connected at the other end.
[0007] Further, the ninth operational amplifier U9, the third field effect transistor Q3, the fifth field effect transistor Q5, the seventh field effect transistor Q7, the eighth field effect transistor Q8, the second resistor R2, the nineteenth resistor R19, the twenty-sixth resistor R26, the twenty-ninth resistor R29, the thirtieth resistor R30, the first capacitor C1 and the second capacitor C2 are further included.
[0008] The non-inverting input of the ninth operational amplifier U9 is connected to one end of the nineteenth resistor R19 and one end of the twenty-sixth resistor R26, the inverting input of the ninth operational amplifier U9 is connected to one end of the second resistor R2, the output of the ninth operational amplifier U9 is connected to the gate of the third field effect transistor Q3, the gate of the fifth field effect transistor Q5, the gate of the seventh field effect transistor Q7 and the gate of the eighth field effect transistor Q8, the drain of the third field effect transistor Q3 is connected to the output of the fifth operational amplifier U5, the source of the third field effect transistor Q3 is connected to the drain of the seventh field effect transistor Q7 and one end of the first capacitor C1, the drain of the fifth field effect transistor Q5 is connected to the output of the eighth operational amplifier U8, the source of the fifth field effect transistor Q5 is connected to the drain of the eighth field effect transistor Q8 and one end of the second capacitor C2, the source of the seventh field effect transistor Q7 is connected to one end of the twenty-ninth resistor R29, the source of the eighth field effect transistor Q8 is connected to one end of the thirtieth resistor R30, the other end of the twenty-sixth resistor R26 is connected to the power supply, the other end of the second resistor R2, the other end of the nineteenth resistor R19, the other end of the twenty-ninth resistor R29, the other end of the thirtieth resistor R30, the other end of the first capacitor C1, the other end of the second capacitor C2 and the ground are connected.
[0009] Further, the tenth operational amplifier U10, the eleventh operational amplifier U11, the fourth field effect transistor Q4, the sixth field effect transistor Q6, the twenty-fourth resistor R24, the twenty-fifth resistor R25, the twenty-seventh resistor R27, the twenty-eighth resistor R28, the third diode D3, the fourth diode D4, the fourth one connector P4 / 1, the fourth two connector P4 / 2, the fifth connector P5, the sixth connector P6 are further included.
[0010] The non-inverting input of the tenth operational amplifier U10 is connected to one end of the first capacitor C1, the inverting input of the tenth operational amplifier U10 is connected to the non-inverting input of the eleventh operational amplifier U11 and the output of the fourth operational amplifier U4, the output of the tenth operational amplifier U10 is connected to the drain of the fourth field effect transistor Q4, the inverting input of the eleventh operational amplifier U11 is connected to one end of the second capacitor C2, the output of the eleventh operational amplifier U11 is connected to the drain of the sixth field effect transistor Q6, the source of the fourth field effect transistor Q4, one end of the twenty-fifth resistor R25 and the sixth connector P6 are connected, the gate of the fourth field effect transistor Q4, the anode of the third diode D3, one end of the twenty-fourth resistor R24 and the fourth one connector P4 / 1 are connected, the source of the sixth field effect transistor Q6, one end of the twenty-eighth resistor R28 and the fifth connector P5 are connected, the gate of the sixth field effect transistor Q6, the anode of the fourth diode D4, one end of the twenty-seventh resistor R27 and the fourth two connector P4 / 2 are connected, the cathode of the third diode D3 and the cathode of the fourth diode D4 are connected to the inverting input of the ninth operational amplifier U9, the other end of the twenty-fourth resistor R24, the other end of the twenty-fifth resistor R25, the other end of the twenty-seventh resistor R27, the other end of the twenty-eighth resistor R28 and the ground are connected.
[0011] Further, the third resistor R3 is an adjustable resistor.
[0012] Further, a seventeenth resistor R17 is further included.
[0013] One end of the seventeenth resistor R17 is connected with the gate of the first field effect transistor Q1, and the other end of the seventeenth resistor R17 is connected with the ground terminal.
[0014] Further, a twelfth resistor R12 is further included.
[0015] One end of the twelfth resistor R12 is connected with the gate of the third field effect transistor Q3, and the other end of the twelfth resistor R12 is connected with the ground terminal.
[0016] Further, a double-output-shaft electric actuator is provided, and the double-output-shaft electric actuator comprises the interface control circuit.
[0017] Compared with the prior art, the present application has the following beneficial effects:
[0018] The present application can perform automatic displacement in absolute mode and incremental mode based on the position signal fed back by the encoder when the displacement value signal is fed back at a displacement value setting port, so as to improve the applicability, and can perform real-time calculation and feedback based on the position signal and the set / adjusted displacement amount signal when single displacement is performed in any mode and after the displacement is completed. BRIEF DESCRIPTION OF DRAWINGS
[0019] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed in the prior art and the embodiments will be briefly introduced as follows. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.
[0020] Figure 1 The circuit structure schematic diagram provided by the present application is provided.
[0021] Figure 2 The internal structure sectional view of the double-output-shaft electric actuator provided by the present application is provided.
[0022] Figure 3 The external structure schematic diagram of the double-output-shaft electric actuator provided by the present application is provided.
[0023] The drawings are as follows: 1, rear end cover; 2, encoder; 3, conical roller bearing; 4, cylinder; 5, stator; 6, front end cover; 7, screw rod; 8, secondary bearing seat; 9, rotor; 10, bearing seat; 11, encoder support seat; 12, power line connector; 13, encoder line connector. DETAILED DESCRIPTION
[0024] In order to make the objects and advantages of the present invention more clearly understood, the present invention is described in detail below with reference to the embodiments. It should be understood that the following text is only used to describe one or several specific implementation methods of the present invention and does not strictly limit the scope of protection specifically requested by the present invention.
[0025] The present invention discloses an encoder interface control circuit, such as Figure 1 The diagram includes a first operational amplifier U1, a fourth operational amplifier U4, a sixth operational amplifier U6, a seventh operational amplifier U7, a first field effect transistor Q1, a second field effect transistor Q2, a first resistor R1, a third resistor R3, a fourteenth resistor R14, a fifteenth resistor R15, a sixteenth resistor R16, an eighteenth resistor R18, a first connector P1, a second connector P2, a thirty-first connector P3 / 1, and a thirty-second connector P3 / 2;
[0026] The non-inverting terminal of the first operational amplifier U1 is connected to one end of the first resistor R1 and one end of the third resistor R3, the inverting terminal of the first operational amplifier U1 is connected to the output terminal of the first operational amplifier U1, the non-inverting terminal of the sixth operational amplifier U6, and the inverting terminal of the seventh operational amplifier U7, the non-inverting terminal of the fourth operational amplifier U4 is connected to the first connector P1, the inverting terminal of the fourth operational amplifier U4 is connected to the output terminal of the fourth operational amplifier U4, the inverting terminal of the sixth operational amplifier U6, and the non-inverting terminal of the seventh operational amplifier U7, the output terminal of the sixth operational amplifier U6 is connected to the drain of the second field effect transistor Q2, and one end of the fifteenth resistor R15, and the seventh operational amplifier U7 is connected to the first connector P1. The output end of U7 is connected to the drain of the first field-effect transistor Q1 and one end of the fourteenth resistor R14, the gate of the first field-effect transistor Q1 and the gate of the second field-effect transistor Q2 are connected to the second connector P2, the source of the first field-effect transistor Q1 and one end of the eighteenth resistor R18 are connected to the third-second connector P3 / 2, the source of the second field-effect transistor Q2 and one end of the sixteenth resistor R16 are connected to the third-first connector P3 / 1, the other end of the first resistor R1 is connected to the power supply, and the other end of the third resistor R3, the other end of the fourteenth resistor R14, the other end of the fifteenth resistor R15, the other end of the sixteenth resistor R16, and the other end of the eighteenth resistor R18 are connected to the ground end.
[0027] Specifically, it also includes a second operational amplifier U2, a third operational amplifier U3, a fifth operational amplifier U5, an eighth operational amplifier U8, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a thirteenth resistor R13, a twentieth resistor R20, a twenty-first resistor R21, a twenty-second resistor R22, a twenty-third resistor R23, a first diode D1, and a second diode D2;
[0028] The second operational amplifier U2 is connected to the fourth resistor R4 and the fifth resistor R5 at one end, the second operational amplifier U2 is connected to the sixth resistor R6 and the seventh resistor R7 at one end, the second operational amplifier U2 is connected to the sixth resistor R6 and the second diode D2 at the other end, the third operational amplifier U3 is connected to the eighth resistor R8 and the ninth resistor R9 at one end, the third operational amplifier U3 is connected to the tenth resistor R10 and the eleventh resistor R11 at one end, the third operational amplifier U3 is connected to the tenth resistor R10 and the first diode D1 at the other end, the fifth operational amplifier U5 is connected to the first diode D1 and the second diode D2 at the cathode, the fifth operational amplifier U5 is connected to the thirteenth resistor R13 at one end, the fifth operational amplifier U5 is connected to the thirteenth resistor R13 at the other end, the eighth operational amplifier U8 is connected to the twenty-second resistor R22 and the twenty-third resistor R23 at one end, the eighth operational amplifier U8 is connected to the twentieth resistor R20 and the twenty-first resistor R21 at one end, the eighth operational amplifier U8 is connected to the twentieth resistor R20 at the other end, the fourth resistor R4, the eleventh resistor R11, the twenty-third resistor R23 and the first operational amplifier U1 are connected at the other end, the seventh resistor R7, the eighth resistor R8, the twenty-second resistor R22 and the fourth operational amplifier U4 are connected at the other end, the fifth resistor R5, the ninth resistor R9, the twenty-first resistor R21 and the ground are connected at the other end.
[0029] Specifically, it further comprises a ninth operational amplifier U9, a third field effect transistor Q3, a fifth field effect transistor Q5, a seventh field effect transistor Q7, an eighth field effect transistor Q8, a second resistor R2, a nineteenth resistor R19, a twenty-sixth resistor R26, a twenty-ninth resistor R29, a thirtieth resistor R30, a first capacitor C1, a second capacitor C2.
[0030] The non-inverting input of the ninth operational amplifier U9 is connected to one end of the nineteenth resistor R19 and one end of the twenty-sixth resistor R26, the inverting input of the ninth operational amplifier U9 is connected to one end of the second resistor R2, the output of the ninth operational amplifier U9 is connected to the gate of the third field effect transistor Q3, the gate of the fifth field effect transistor Q5, the gate of the seventh field effect transistor Q7 and the gate of the eighth field effect transistor Q8, the drain of the third field effect transistor Q3 is connected to the output of the fifth operational amplifier U5, the source of the third field effect transistor Q3 is connected to the drain of the seventh field effect transistor Q7 and one end of the first capacitor C1, the drain of the fifth field effect transistor Q5 is connected to the output of the eighth operational amplifier U8, the source of the fifth field effect transistor Q5 is connected to the drain of the eighth field effect transistor Q8 and one end of the second capacitor C2, the source of the seventh field effect transistor Q7 is connected to one end of the twenty-ninth resistor R29, the source of the eighth field effect transistor Q8 is connected to one end of the thirtieth resistor R30, the other end of the twenty-sixth resistor R26 is connected to the power supply, the other end of the second resistor R2, the other end of the nineteenth resistor R19, the other end of the twenty-ninth resistor R29, the other end of the thirtieth resistor R30, the other end of the first capacitor C1, the other end of the second capacitor C2 and the ground are connected.
[0031] Specifically, the tenth operational amplifier U10, the eleventh operational amplifier U11, the fourth field effect transistor Q4, the sixth field effect transistor Q6, the twenty-fourth resistor R24, the twenty-fifth resistor R25, the twenty-seventh resistor R27, the twenty-eighth resistor R28, the third diode D3, the fourth diode D4, the fourth one connector P4 / 1, the fourth two connector P4 / 2, the fifth connector P5, the sixth connector P6 are further included.
[0032] The non-inverting input of the tenth operational amplifier U10 is connected to one end of the first capacitor C1, the inverting input of the tenth operational amplifier U10 is connected to the non-inverting input of the eleventh operational amplifier U11 and the output of the fourth operational amplifier U4, the output of the tenth operational amplifier U10 is connected to the drain of the fourth field effect transistor Q4, the inverting input of the eleventh operational amplifier U11 is connected to one end of the second capacitor C2, the output of the eleventh operational amplifier U11 is connected to the drain of the sixth field effect transistor Q6, the source of the fourth field effect transistor Q4, one end of the twenty-fifth resistor R25 and the sixth connector P6 are connected, the gate of the fourth field effect transistor Q4, the anode of the third diode D3, one end of the twenty-fourth resistor R24 and the fourth one connector P4 / 1 are connected, the source of the sixth field effect transistor Q6, one end of the twenty-eighth resistor R28 and the fifth connector P5 are connected, the gate of the sixth field effect transistor Q6, the anode of the fourth diode D4, one end of the twenty-seventh resistor R27 and the fourth two connector P4 / 2 are connected, the cathode of the third diode D3 and the cathode of the fourth diode D4 are connected to the inverting input of the ninth operational amplifier U9, the other end of the twenty-fourth resistor R24, the other end of the twenty-fifth resistor R25, the other end of the twenty-seventh resistor R27, the other end of the twenty-eighth resistor R28 and the ground are connected.
[0033] In particular, the third resistor R3 is an adjustable resistor.
[0034] In particular, a seventeenth resistor R17 is further included;
[0035] One end of the seventeenth resistor R17 is connected to the gate of the first field effect transistor Q1, and the other end of the seventeenth resistor R17 is connected to the ground terminal.
[0036] In particular, a twelfth resistor R12 is further included;
[0037] One end of the twelfth resistor R12 is connected to the gate of the third field effect transistor Q3, and the other end of the twelfth resistor R12 is connected to the ground terminal.
[0038] In particular, a double-output-shaft electric actuator includes the interface control circuit described above.
[0039] The position signal of the shaft is fed back to the interface control circuit first connector P1 by the encoder, the position zero point is set when the shaft is at any one side of the stroke limit, the first connector P1 end signal amplitude is set when the zero point position is set by the encoder, the first connector P1 end signal amplitude is higher when the shaft moves from any one side of the stroke limit to the other side, the current position of the shaft is farther away from the zero point, otherwise, the current position of the shaft is closer to the zero point, the first connector P1 end signal is fed back to the fourth operational amplifier U4 same phase end, the fourth operational amplifier U4 opposite phase end and the fourth operational amplifier U4 output end negative feedback connection prevent the signal interference of the lower circuit, the fourth operational amplifier U4 output end follows the first connector P1 end signal, the power supply signal is to the ground end through the first resistor R1 and the third resistor R3, the third resistor R3 end signal is the displacement value, the displacement value is set by adjusting the third resistor R3 resistance value, the third resistor R3 end signal is fed back to the first operational amplifier U1 same phase end, the first operational amplifier U1 output end and the first operational amplifier U1 opposite phase end negative feedback connection prevent the signal interference of the lower circuit, the first operational amplifier U1 output end follows the third resistor R3 end signal, the first operational amplifier U1 output end signal is synchronously fed back to the sixth operational amplifier U6 same phase end, the fourth operational amplifier U4 output end signal is synchronously fed back to the sixth operational amplifier U6 opposite phase end, when the shaft needs to be displaced in the first direction, the sixth operational amplifier U6 outputs, the sixth operational amplifier U6 output end signal is high level, the sixth operational amplifier U6 output end signal is to the ground end through the fifteenth resistor R15, the fifteenth resistor R15 end signal represents the first direction displacement signal of the shaft, the first operational amplifier U1 output end signal is fed back to the seventh operational amplifier U7 opposite phase end, the fourth operational amplifier U4 output end signal is fed back to the seventh operational amplifier U7 same phase end, when the shaft needs to be displaced in the second direction, the seventh operational amplifier U7 outputs, the seventh operational amplifier U7 output end signal is high level, the seventh operational amplifier U7 output end signal is to the ground end through the fourteenth resistor R14, the fourteenth resistor R14 end signal represents the second direction displacement signal of the shaft, the second connector P2 end signal is the displacement execution signal in the absolute mode, the execution signal is fed back by the operator, the execution signal is high level, when the second connector P2 end obtains the execution signal feedback, the third resistor R3 end signal amplitude represents the displacement value required for the execution mechanism to drive the shaft to move in the absolute mode, the signal is synchronously fed back to the first field effect transistor Q1 gate and the second field effect transistor Q2 gate, the seventeenth resistor R17 is used for discharging the parasitic capacitance of the first field effect transistor Q1 gate and the second field effect transistor Q2 gate, the voltage difference between the first field effect transistor Q1 gate and the first field effect transistor Q1 source is higher than the conduction threshold value, the first field effect transistor Q1 is turned on, the fourteenth resistor R14 end signal is to the ground end through the first field effect transistor Q1 drain, the first field effect transistor Q1 source and the eighteenth resistor R18, the eighteenth resistor R18 end signal is fed back to the execution mechanism through the third two connectors P3 / 2, the voltage difference between the second field effect transistor Q2 gate and the second field effect transistor Q2 source is higher than the conduction threshold value, the second field effect transistor Q2 is turned on,The signal at the end of the fifteenth resistor R15 is fed to the ground end through the drain of the second field effect transistor Q2, the source of the second field effect transistor Q2 and the sixteenth resistor R16, and the signal at the end of the sixteenth resistor R16 is fed back to the actuator through the third connector P3 / 1. When the actuator obtains the first direction displacement signal / second direction displacement signal, the actuator operates to drive the shaft to perform the corresponding displacement action. When the shaft is displaced and the current position signal thereof is slightly higher than the signal at the end of the third resistor R3, the sixth operational amplifier U6 / seventh operational amplifier U7 is cut off, the signal at the output end of the sixth operational amplifier U6 / seventh operational amplifier U7 is low, the actuator loses the first direction / second direction displacement signal, and the actuator stops operating. In this way, when the actuation signal is obtained at the end of the second connector P2, the actuator can determine the displacement direction of the shaft through the signal amplitude at the end of the third resistor R3 and perform automatic displacement in the absolute mode based thereon, and after the displacement is completed, the signal at the end of the third resistor R3 is not adjusted, and the signal at the end of the second connector P2 is ignored.
[0040] The signal at the output end of the fourth operational amplifier U4 is fed to the ground end through the eighth resistor R8 and the ninth resistor R9, the signal at the end of the ninth resistor R9 is fed back to the same-phase end of the third operational amplifier U3, the output end of the third operational amplifier U3 is connected to the inverting end of the third operational amplifier U3 through the tenth resistor R10 and negative feedback, the signal at the output end of the first operational amplifier U1 is fed back to the inverting end of the third operational amplifier U3 through the eleventh resistor R11, at the same time, the signal at the output end of the first operational amplifier U1 is fed to the ground end through the fourth resistor R4 and the fifth resistor R5, the signal at the end of the fifth resistor R5 is fed back to the same-phase end of the second operational amplifier U2, the output end of the second operational amplifier U2 is connected to the inverting end of the second operational amplifier U2 through the sixth resistor R6 and negative feedback, the signal at the output end of the fourth operational amplifier U4 is fed back to the inverting end of the second operational amplifier U2 through the seventh resistor R7, when the signal amplitude at the end of the third resistor R3 is greater than the signal amplitude at the end of the first connector P1, the second operational amplifier U2 feeds back the difference value through differential operation, when the signal amplitude at the end of the third resistor R3 is less than the signal amplitude at the end of the first connector P1, the third operational amplifier U3 feeds back the difference value through differential operation, the output end of the second operational amplifier U2 is fed back to the same-phase end of the fifth operational amplifier U5 through the second diode D2, the signal at the output end of the third operational amplifier U3 is fed back to the same-phase end of the fifth operational amplifier U5 through the first diode D1, the output end of the fifth operational amplifier U5 is connected to the inverting end of the fifth operational amplifier U5 through the thirteenth resistor R13 and negative feedback, so that the output end of the fifth operational amplifier U5 can output the signal difference between the third resistor R3 and the first connector P1 when the signal at the end of the third resistor R3 is high / low and the signal at the end of the first connector P1, at the same time, the signal at the output end of the fourth operational amplifier U4 is fed back to the same-phase end of the eighth operational amplifier U8 through the twenty-second resistor R22, the signal at the output end of the first operational amplifier U1 is fed back to the same-phase end of the eighth operational amplifier U8 through the twenty-third resistor R23, the signal at the output end of the eighth operational amplifier U8 is fed to the ground end through the twentieth resistor R20 and the twenty-first resistor R21, the signal at the end of the twentieth resistor R20 is fed back to the inverting end of the eighth operational amplifier U8, so that the output end of the eighth operational amplifier U8 feeds back the signal sum between the third resistor R3 and the first connector P1, so that the position amplitude after the shaft incremental displacement can be automatically calculated and fed back in real time based on the signal amplitudes at the ends of the third resistor R3 and the first connector P1 when the displacement ends in the absolute mode and needs to be displaced in the incremental mode.
[0041] The power signal is fed to the ground through the twenty-sixth resistor R26 and the nineteenth resistor R19. The signal at the end of the nineteenth resistor R19 is fed back to the non-inverting terminal of the ninth operational amplifier U9. The second resistor R2 is a pull-down resistor for the inverting terminal of the ninth operational amplifier U9. When no incremental displacement is performed, the output of the ninth operational amplifier U9 is fed back to the gates of the third field effect transistor Q3, the fifth field effect transistor Q5, the seventh field effect transistor Q7, and the eighth field effect transistor Q8. The twelfth resistor R12 is used to discharge the parasitic capacitance at the gates of the third field effect transistor Q3, the fifth field effect transistor Q5, the seventh field effect transistor Q7, and the eighth field effect transistor Q8. When the voltage difference between the gate and the source of the third field effect transistor Q3, the fifth field effect transistor Q5, the seventh field effect transistor Q7, and the eighth field effect transistor Q8 is higher than the threshold value, the third field effect transistor Q3, the fifth field effect transistor Q5, the seventh field effect transistor Q7, and the eighth field effect transistor Q8 are turned on. The signal at the output of the fifth operational amplifier U5 is fed to the ground through the drain of the third field effect transistor Q3, the source of the third field effect transistor Q3, the drain of the seventh field effect transistor Q7, the source of the seventh field effect transistor Q7, and the twenty-ninth resistor R29. At the same time, the potential of the first capacitor C1 rises. The signal at the output of the eighth operational amplifier U8 is fed to the ground through the drain of the fifth field effect transistor Q5, the source of the fifth field effect transistor Q5, the drain of the eighth field effect transistor Q8, the source of the eighth field effect transistor Q8, and the thirtieth resistor R30. At the same time, the potential of the second capacitor C2 rises. When the displacement execution signal in the first direction / second direction is high in the incremental displacement mode, the signal is continuously fed back by the operator. The displacement execution signal in the first direction / second direction is fed to the actuator and the control circuit through the fourth one connector P4 / 1 and the fourth two connector P4 / 2, respectively. When the incremental displacement execution signal is fed back to the fourth one connector P4 / 1 and the fourth two connector P4 / 2, the signal amplitude at the end of the third resistor R3 represents the displacement value required for the actuator to move the driven shaft in the incremental mode. When the displacement signal in the first direction is fed back to the inverting terminal of the ninth operational amplifier U9 through the fourth one connector P4 / 1 and the third diode D3 in the incremental displacement mode, the ninth operational amplifier U9 is turned off. At the same time, the third field effect transistor Q3, the fifth field effect transistor Q5, the seventh field effect transistor Q7, and the eighth field effect transistor Q8 are turned off. The second capacitor C2 records the signal at the output of the eighth operational amplifier U8. The second capacitor C2 stops charging and discharging. At the same time, the signal at the end of the fourth one connector P4 / 1 is fed back to the gate of the fourth field effect transistor Q4. When the voltage difference between the gate and the source of the fourth field effect transistor Q4 is higher than the threshold value, the fourth field effect transistor Q4 is turned on. When the actuator obtains the displacement signal in the first direction in the incremental mode, the actuator operates the driven shaft to perform the corresponding displacement action. When the signal amplitude at the end of the second capacitor C2 is slightly higher than the signal amplitude at the end of the second capacitor C2, the tenth operational amplifier U10 outputs. The signal at the output of the tenth operational amplifier U10 is a stop displacement signal.The signal is fed back to the actuator through the fourth connector P6, the actuator stops displacement, when the first direction displacement signal is fed back to the ninth operational amplifier U9 through the fourth two connector P4 / 2 and the fourth diode D4, the ninth operational amplifier U9 is cut off, the first capacitor C1 records the signal at the output end of the fifth operational amplifier U5, the first capacitor C1 stops charging and discharging, at the same time, the signal at the fourth two connector P4 / 2 is fed back to the gate of the sixth field effect transistor Q6, the voltage difference between the gate and the source of the sixth field effect transistor Q6 is higher than the threshold value, the sixth field effect transistor Q6 is turned on, when the actuator obtains the second direction displacement signal in the incremental mode, the actuator operates to drive the shaft to perform the corresponding displacement action, and when the signal amplitude at the first capacitor C1 is slightly higher, the eleventh operational amplifier U11 outputs, the signal at the output end of the eleventh operational amplifier U11 is the stop displacement signal, the signal is fed back to the actuator through the sixth field effect transistor Q6 drain, the sixth field effect transistor Q6 source and the twenty-eighth resistor R28, the signal at the twenty-eighth resistor R28 is fed back to the actuator through the fifth connector P5, the actuator stops displacement, in this way, when the operator feeds back the first direction / second direction displacement signal in the incremental mode, the automatic incremental displacement can be performed based on the position amplitude after the automatic calculation of the incremental displacement, when the displacement is completed, the operator stops feeding back the incremental displacement signal and then feeds back the incremental displacement signal again, the control circuit re-calculates and feeds back the position amplitude after the shaft incremental displacement based on the signal amplitude at the first connector P1 and the third resistor R3, and based on this, the incremental displacement can be performed again.
[0042] As shown in Figure 2 , Figure 3 , the double-output shaft electric actuator is provided with a stator 5 in a cylinder 4, a magnet is attached to the outside of a rotor 9, and an inner part serves as a raceway of a screw rod 7, so that the screw rod 7 can rotate in the rotor 9, the rotor 9 is fixed on a bearing seat 10 through a tapered roller bearing 3 and is fixed through a locking nut 11, a deep groove ball bearing in a front end cover 6 serves as support, an encoder 2 is connected to the top of the rotor 9, a rear end cover 1 serves as support for the rear end output shaft of the screw rod, a power line plug 14 provides power for the electric cylinder, and an encoder line plug 13 receives position information.
[0043] It will be apparent to those skilled in the art that the application is not limited to the details of the above-exemplified embodiments and that the present application can be implemented in other particular forms without departing from the spirit or essential characteristics of the present application. The embodiments should therefore be considered in all respects as illustrative and not restrictive, the scope of the application being indicated by the appended claims rather than by the above description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. No reference herein to any prior art is to be taken as an admission that the present application is not entitled to antedate such prior art by virtue of prior application. Any reference to the term "comprising" is to be construed in accordance with the definition of that term provided in the preamble to Article 69 of the European Patent Convention. Any reference to the term "comprising" is to be construed in accordance with the definition of that term provided in the preamble to Article 69 of the European Patent Convention.
Claims
1. An encoder interface control circuit, characterized in that: The present invention comprises a plurality of operational amplifiers, a plurality of field effect tubes, a plurality of resistors, a plurality of connectors, and a plurality of diodes. The operational amplifier U1 in the plurality of operational amplifiers is connected to one end of the resistor R1 and the resistor R3, and the inverting end is connected to the output end, the non-inverting end of the operational amplifier U6, and the inverting end of the operational amplifier U7; the non-inverting end of the operational amplifier U4 is connected to the connector P1, and the inverting end is connected to the output end, the inverting end of the operational amplifier U6, and the non-inverting end of the operational amplifier U7; the output end of the operational amplifier U6 is connected to the drain of the field effect tube Q2 and one end of the resistor R15; the output end of the operational amplifier U7 is connected to the drain of the field effect tube Q1 and one end of the resistor R14; the gate of the field effect tube Q1 and the gate of the field effect tube Q2 are connected to the connector P2; the source of the field effect tube Q1, one end of the resistor R18 and Connect to connector P3 / 2; connect the source of field effect transistor Q2 and one end of resistor R16 to connector P3 / 1; connect the other end of resistor R1 to the power supply; connect the non-inverting end of op amp U5 to the cathode of diode D1 and diode D2, connect the inverting end to one end of resistor R13, and connect the output end to the other end of resistor R13; connect the source of field effect transistor Q4 and one end of resistor R25 to connector P6; connect the gate of field effect transistor Q4, the anode of diode D3, and one end of resistor R24 to connector P4 / 1; connect the source of field effect transistor Q6 and one end of resistor R28 to connector P5; connect the gate of field effect transistor Q6, the anode of diode D4, and one end of resistor R27 to connector P4 / 2; connect resistors R3, D4 and R27 to connector P4 / 2; connect the gate of field effect transistor Q4, the anode of diode D3, and one end of resistor R24 to connector P4 / 1; connect the source of field effect transistor Q6 and one end of resistor R28 to connector P5; connect the gate of field effect transistor Q6, the anode of diode D4, and one end of resistor R27 to connector P4 / 2; connect the gate of field effect transistor Q6, the anode of diode D4, and one end of resistor R27 to connector P4 / 2; connect the gate of field effect transistor Q4 ... The other ends of resistors R14, R15, R16, R18, R24, R25, R27, and R28 are connected to the ground; connector P1 is used to obtain the position signal of the axis, resistor R3 sets the displacement value, the signal at the connector P2 end is the displacement execution signal in the absolute mode, when the connector P2 end obtains the execution signal feedback, the signal amplitude at the resistor R3 end is the displacement value required for the actuator in the absolute mode to drive the axis to move, the signal at the resistor R15 end is the first direction displacement signal of the axis, the signal at the resistor R14 end is the second direction displacement signal of the axis, the first direction displacement signal is fed back to the actuator through connector P3 / 2, and the second direction displacement signal is fed back to the actuator through connector P3 / 2. The signal is fed back to the actuator through connector P3 / 1, and the operational amplifier U5 outputs the signal difference between the resistor R3 and the connector P1 end. The operational amplifier U8 outputs the signal sum between the resistor R3 and the connector P1 end. The displacement signal of the first direction / second direction in the incremental displacement mode is fed back to the actuator and the control circuit through connector P4 / 1 and connector P4 / 2 respectively. When the incremental displacement execution signal feedback is obtained at the connector P4 / 1 and connector P4 / 2 ends, the signal amplitude table at the resistor R3 end is the displacement value required for the actuator to drive the axis to move in the incremental mode. The signal at the resistor R28 end is fed back to the actuator through the fifth connector P5, and the signal at the resistor R25 end is fed back to the actuator through the sixth connector P6.
2. The encoder interface control circuit according to claim 1, characterized in that: The invention also includes a plurality of capacitors, wherein the operational amplifier U2 in the plurality of operational amplifiers is connected at a non-inverting end to one end of the resistor R4 and the resistor R5, the inverting end to one end of the resistor R6 and the resistor R7, and the output end to the other end of the resistor R6 and the anode of the diode D2; the operational amplifier U3 is connected at a non-inverting end to one end of the resistor R8 and the resistor R9, the inverting end to one end of the resistor R10 and the resistor R11, and the output end to the other end of the resistor R10 and the anode of the diode D1; the operational amplifier U8 is connected at a non-inverting end to one end of the resistor R22 and the resistor R23, the inverting end to one end of the resistor R20 and the resistor R21, and the output end to the other end of the resistor R20; the other ends of the resistors R4, R11, and R23 are connected to the output end of the operational amplifier U1; the other ends of the resistors R7, R8, and R22 are connected to the output end of the operational amplifier U4; The op amp U9 has a non-inverting terminal connected to one end of resistor R19 and resistor R26, an inverting terminal connected to one end of resistor R2, and an output terminal connected to the gates of field effect transistors Q3, Q5, Q7, and Q8; the drain of field effect transistor Q3 is connected to the output terminal of op amp U5, and its source is connected to the drain of field effect transistor Q7 and one end of capacitor C1; the drain of field effect transistor Q5 is connected to the output terminal of op amp U8, and its source is connected to the drain of field effect transistor Q8 and one end of capacitor C2; the source of field effect transistor Q7 is connected to one end of resistor R29; the source of field effect transistor Q8 is connected to one end of resistor R30; and the other end of resistor R26 is connected to the power supply; The non-inverting terminal of the operational amplifier U10 is connected to one end of the capacitor C1, the inverting terminal is connected to the non-inverting terminal of the operational amplifier U11 and the output terminal of the operational amplifier U4, and the output terminal is connected to the drain of the field effect transistor Q4; the inverting terminal of the operational amplifier U11 is connected to one end of the capacitor C2, and the output terminal is connected to the drain of the field effect transistor Q6; the cathode of the diode D3 is connected to the cathode of the diode D4 and the inverting terminal of the operational amplifier U9, and the other ends of the resistors R5, R9, R21, R2, R19, R29, R30, capacitor C1, and C2 are connected to the ground terminal.
3. The encoder interface control circuit according to claim 1, characterized in that: The resistor R3 is an adjustable resistor.
4. The encoder interface control circuit according to claim 1, characterized in that: Also includes resistors; One end of the resistor R17 is connected to the gate of the field effect transistor Q1, and the other end is connected to the ground.
5. The encoder interface control circuit according to claim 1, characterized in that: Also includes resistors; One end of the resistor R12 is connected to the gate of the field effect transistor Q3, and the other end is connected to the ground.
6. A double-shaft electric actuator, comprising the interface control circuit according to any one of claims 1 to 5.
Citation Information
Patent Citations
DC brushless motor drive system
GB8423182D0