Mosaic heterojunction substrate chip integration method

Through the mosaic heterojunction substrate chip integration method, different optical materials are arranged by region on the same substrate, which solves the problems of flexible design and rapid processing of full-chip integrated optical systems and realizes efficient optical device integration and miniaturization of optoelectronic systems.

CN119024484BActive Publication Date: 2025-09-05THE QUARTERMASTER RES INST OF THE GENERAL LOGISTICS DEPT OF THE CPLA
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Patent Information

Application Number
CN202411089459.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-08-09
Publication Date
2025-09-05
Estimated Expiration
2044-08-09

AI Technical Summary

Technical Problem

Existing technologies make it difficult to achieve flexible design and rapid processing of full-chip integrated optical systems, especially in the heterogeneous integration of different optical materials, where there are problems of high-precision alignment and high cost.

Method used

A mosaic heterojunction substrate chip integration method is adopted to divide different areas on the same substrate, arrange different optical materials in a mosaic manner through lattice matching technology or filling materials, and process the thickness through etching and polishing processes to achieve the integration and connection of optical devices.

Benefits of technology

It reduces the process difficulty of heterogeneous integration, improves the design freedom and processing efficiency of full-chip integrated optical systems, and supports the miniaturization and integration of optoelectronic hybrid systems.

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Abstract

The mosaic heterojunction substrate chip integration method proposed in the present invention integrates multiple different optical materials in a mosaic manner on the same optical substrate (such as a silicon substrate-silicon dioxide substrate). Each optical material is connected through a lattice matching process or filling material to ensure that its mechanical and optical structures are stable and do not deform. Developers of full-chip integrated optical systems can etch different optical devices through various etching processes based on this substrate, and realize on-demand switching of active and passive devices by repeatedly etching the same area, ultimately realizing flexible design and rapid processing of full-chip integrated optical systems.
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Description

Technical Field

[0001] The present invention belongs to the interdisciplinary field of integrated optics, semiconductor optics and laser optics. Specifically, it refers to a method for integrating thin films of multiple materials into the same substrate in a mosaic manner to prepare a heterojunction substrate, thereby realizing the integration of multiple functional devices into a single chip. In particular, it relates to a mosaic heterojunction substrate chip integration method. Background Art

[0002] Chip-integrated optical circuits offer advantages such as small size, low power consumption, stable performance, and high integration. They are particularly suitable as an alternative to traditional discrete free-space and all-fiber optical circuits for building large-scale, complex, and component-intensive optical systems, such as optical communication systems, optical computing systems, optical phased arrays, and microwave photonic signal processing systems. In particular, chip-integrated optical circuits, exemplified by silicon-on-insulator (SOI), are highly compatible with traditional integrated circuit processes, making it possible to construct chip-scale optoelectronic hybrid systems. Chip-integrated optoelectronic systems consist of a series of passive and active components: passive components primarily include optoelectronic directional couplers, optical beam splitters, polarization beam splitters, and wavelength division multiplexers, while active components primarily include light sources, detectors, optical modulators, tunable filters, and tunable attenuators. Passive components primarily involve light field transmission, while active components provide external interfaces for light field control.

[0003] Different optical devices often require the use of different optical materials: various directional couplers, optical beam splitters, etc. require ultra-low transmission loss, and the optimal material is silicon nitride; nonlinear wavelength converters, nonlinear optical switches and other devices require ultra-high nonlinear coefficients, and the optimal materials are silicon carbide and aluminum gallium arsenide; indium gallium arsenide is often used to achieve laser output; lithium niobate thin film is the most promising technical solution for achieving high-speed electro-optical modulation. Given the large lattice mismatch between different optical materials, the main method for heterogeneous integration of various optical devices at this stage is flip-chip bonding, that is, first processing various micro-nano devices on different platforms, and then integrating various devices onto the same chip platform through heterojunction integration technology. The above process requires extremely high alignment accuracy, and the cost of system structure reconstruction is also relatively high. Summary of the Invention

[0004] In view of the above-mentioned defects, the technical problem to be solved by the present invention is how to provide a mosaic heterojunction substrate for a full-chip integrated optical system and ultimately realize flexible design and rapid processing of the full-chip integrated optical system.

[0005] To address the above-mentioned shortcomings, the present invention proposes a mosaic heterojunction substrate chip integration method, which divides different areas on the same substrate, and arranges different semiconductor optical medium materials in a mosaic manner in different areas through lattice matching technology or filling materials. The thickness of various optical materials is processed to meet the thickness requirements of the top layer of the universal substrate. On this basis, users can design different optical devices in different areas, connect each device through transmission waveguides, and realize heterojunction integration of the full-chip optical system.

[0006] In order to achieve the above-mentioned effects, the mosaic heterojunction substrate chip integration method provided by the present invention integrates different optical materials into the same optical substrate through multiple preparation processes, integrates multiple different optical materials in a mosaic manner on the same optical substrate, connects adjacent material areas through lattice matching or material filling, and connects each optical material through a lattice matching process or filling material to make its mechanical structure and optical structure stable. The thickness of various optical material films is processed through etching and polishing processes to meet the top layer thickness and smoothness requirements required by standard devices. On the basis of this substrate, different optical devices are etched through various etching processes, and the same area is repeatedly etched to realize on-demand switching of active and passive devices, ultimately realizing the design and processing of a full-chip integrated optical system.

[0007] Preferably, the above method specifically includes the following steps:

[0008] S101. Heterojunction integration of multiple material films: integrating different optical materials onto the same optical substrate, arranging the material regions in a mosaic pattern so that adjacent regions have different optical materials, and connecting adjacent material regions through lattice matching or material filling.

[0009] S102, integration of heterojunction substrates, thickness processing of various optical material films through etching and polishing to meet the top layer thickness and smoothness requirements of standard devices;

[0010] S103. Integrated design and preparation of full-chip integrated optical systems. Design and prepare various optical devices in different areas according to actual needs. Etch the devices in each area through multiple rounds of etching. Connect the devices together through transmission waveguides to achieve integrated preparation of full-chip integrated optical systems.

[0011] Preferably, in the above S101 , different optical materials are integrated onto the same optical substrate through magnetron sputtering, ion evaporation and large-area flip-chip bonding processes.

[0012] Preferably, the above-mentioned S103 realizes the integrated preparation of the full-chip integrated optical system without requiring high-precision alignment technology and fine flip-chip bonding technology.

[0013] Preferably, the above method specifically includes:

[0014] S201. Integrate three optical materials, lithium niobate, indium gallium arsenide, and silicon nitride, onto a single silicon substrate, with each material occupying a 1 μm × 1 μm space. Regions containing the same optical material are not adjacent to each other, and regions between different optical materials are connected by lattice adaptation or filling with SU8 polymer material.

[0015] S202. Using different etching processes, the top layer thicknesses of lithium niobate, indium gallium arsenide, and silicon nitride are respectively prepared to the optimal parameters, and the intrinsic transmission loss of the film is minimized by polishing;

[0016] S203, an optical system is formed by a tunable laser, an optical micro-ring cavity, an electro-optical modulator and a semiconductor amplifier, and outputted to a single-mode optical fiber via a coupled waveguide.

[0017] Preferably, after the preparation in S202, the thickness of the top layer of lithium niobate is 760 nm, the thickness of the top layer of indium gallium arsenide is 340 nm, and the thickness of the top layer of silicon nitride is 800 nm.

[0018] Preferably, the above S203 specifically includes:

[0019] S2031. Prepare an optical resonant cavity in the InGaAs region and achieve laser output through electro-optical drive.

[0020] S2032, preparing a high-quality factor micro-ring cavity in the right silicon nitride region, and connecting the transmission waveguides across the regions via a mode field adapter;

[0021] S2033, preparing a high-speed electro-optic modulator in the lower lithium niobate region, and connecting the transmission waveguides across the regions via a mode field adapter;

[0022] S2034. Prepare a semiconductor amplifier in the upper left or right InGaAs region, and achieve power amplification through electro-optical driving.

[0023] S2035. Prepare a tapered waveguide in the silicon nitride area below and amplify the mode field until it matches the output optical fiber.

[0024] Preferably, the electro-optic modulator is a Mach-Zeuter interferometer.

[0025] Preferably, various optical devices are integrated into the same chip, and the various optical devices are connected through low-loss waveguides. The optoelectronic hybrid integrated chip has two external interfaces: one is the optical interface directly output through the pigtail, and the other is the programmable logic circuit control interface implemented through the chip integrated circuit.

[0026] The present invention provides a computer-readable storage medium on which a computer program is stored. When the program is executed by a processor, the above method is implemented.

[0027] Compared with the prior art, the present invention achieves the following technical effects:

[0028] First, the present invention proposes the concept of "heterojunction integrated substrate". Through the design concept of large-area material heterogeneous integration, the process difficulty of heterogeneous integration between optical films of different materials and different lattice parameters is reduced;

[0029] Secondly, the present invention proposes a "mosaic" heterojunction integration solution, which allows users to design optical devices of various materials. The structural design also provides important support for the interconnection of optical devices of different materials, greatly improving the design freedom of full-chip integrated optical systems.

[0030] Finally, the method proposed in the present invention can provide important support for the development of electro-optical hybrid integrated systems, further improve the reuse of devices through reasonable spatial arrangement, and provide solutions for the miniaturization and integration of various optoelectronic systems. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0032] Figure 1 A schematic diagram showing an embodiment of a mosaic heterojunction substrate chip integration method of the present invention is shown;

[0033] Figure 2 A schematic diagram showing another embodiment of the mosaic heterojunction substrate chip integration method of the present invention is shown;

[0034] Figure 3 A schematic diagram showing another embodiment of the mosaic heterojunction substrate chip integration method of the present invention is shown;

[0035] Figure 4 A schematic diagram showing the specific steps of the mosaic heterojunction substrate chip integration method of the present invention is shown. DETAILED DESCRIPTION

[0036] The features and exemplary embodiments of various aspects of the present invention will be described in detail below. In order to make the objects, technical solutions and advantages of the present invention more clearly understood, the present invention will be further described in detail below in conjunction with the accompanying drawings and Examples. It should be understood that the specific embodiments described herein are only configured to explain the present invention and are not configured to limit the present invention. For those skilled in the art, the present invention can be implemented without the need for some of these specific details. The following description of the embodiments is merely to provide a better understanding of the present invention by illustrating examples of the present invention.

[0037] It should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. In the absence of further limitations, the elements defined by the phrase "comprising..." do not exclude the presence of other identical elements in the process, method, article, or device comprising the elements.

[0038] The present invention provides an embodiment of a mosaic heterojunction substrate chip integration method, in which a variety of different optical materials are integrated in a mosaic manner on the same optical substrate (e.g., a silicon substrate-silicon dioxide substrate). Each optical material is connected by a lattice matching process or a filling material so that its mechanical and optical structures are stable and do not deform. Developers of full-chip integrated optical systems can etch different optical devices through various etching processes based on this substrate, and realize on-demand switching of active and passive devices by repeatedly etching the same area, ultimately realizing flexible design and rapid processing of full-chip integrated optical systems.

[0039] In some embodiments, the chip-integrated waveguide is prepared by a standard chip-integrated optical path process, has a certain degree of freedom in structural design, can efficiently and losslessly transmit light fields, and can produce refractive index changes under the action of free carriers. The material platform used for the chip-integrated waveguide includes but is not limited to silicon on insulator, hydrogenated amorphous silicon, silicon nitride, silicon carbide, chalcogenide glass, high-refractive-index quartz, Group III-V aluminum gallium arsenide, Group III-V indium phosphide, etc., and both a single material integration method and a multi-material hybrid integration method can be adopted.

[0040] In some embodiments, optical materials of different materials such as lithium niobate, indium gallium arsenide and silicon nitride are integrated into the same silicon-based substrate in a mosaic arrangement. Each material occupies a certain space, and the areas where the same optical material is located are not adjacent to each other. The areas between different optical materials are connected through lattice adaptation or filling materials; through mode field adaptation of cross-region waveguides or through mode field adaptation of filling materials, transmission waveguides in different regions and their related devices can be interconnected with low loss.

[0041] In some embodiments, full-chip integration integrates various optical devices such as light sources, optical passive devices, and optical active devices onto the same chip. Various optical devices are connected through low-loss waveguides. The optoelectronic hybrid integrated chip has two external interfaces: one is the optical interface directly output through the pigtail, and the other is the programmable logic circuit control interface implemented through the chip integrated circuit. The core of full-chip integration is to provide only one optical input or optical output port to the outside, and all other optical functions are completed on the chip device.

[0042] In some embodiments, various devices such as light sources, optical passive devices, optical active devices, etc. are flexibly designed to be reasonably arranged in different areas of a mosaic heterojunction substrate. The device layout is reasonably optimized to maximize the utilization of various material areas, minimize transmission losses, and maximize the variety of device functions. The wafer layout structure and wafer process flow are not limited. Any method that uses a heterojunction substrate to directly process devices rather than independently processing different optoelectronic devices and then integrating the already independent devices into the same chip through heterojunction integration technology is within the scope of the claims of the present invention.

[0043] The present invention provides an embodiment of a mosaic heterojunction substrate chip integration method.

[0044] like Figure 1 As shown, the present invention provides an embodiment of a mosaic heterojunction substrate chip integration method, comprising:

[0045] S101. Heterojunction integration of multiple material films: integrating different optical materials onto the same optical substrate, arranging the material regions in a mosaic pattern so that adjacent regions have different optical materials, and connecting adjacent material regions through lattice matching or material filling.

[0046] S102, integration of heterojunction substrates, thickness processing of various optical material films through etching and polishing to meet the top layer thickness and smoothness requirements of standard devices;

[0047] S103. Integrated design and preparation of full-chip integrated optical systems. Design and prepare various optical devices in different areas according to actual needs. Etch the devices in each area through multiple rounds of etching. Connect the devices together through transmission waveguides to achieve integrated preparation of full-chip integrated optical systems.

[0048] In some embodiments, in S101 , different optical materials are integrated onto the same optical substrate through magnetron sputtering, ion evaporation, and large-area flip-chip bonding processes.

[0049] In some embodiments, S103 realizes the integrated preparation of a full-chip integrated optical system without requiring high-precision alignment technology or fine flip-chip bonding technology.

[0050] The present invention provides an embodiment of a mosaic heterojunction substrate chip integration method, comprising:

[0051] S1. Heterojunction integration of multiple material films: Different optical materials are integrated onto the same optical substrate through preparation processes such as magnetron sputtering, ion evaporation, and large-area flip-chip bonding. Each material region is arranged in a mosaic manner so that the optical materials of adjacent regions are different. Adjacent material regions are connected through lattice matching or material filling to ensure strong laser toughness.

[0052] S2. Integration of heterojunction substrates, through various etching and polishing processes, the thickness of various optical material films is processed to meet the top layer thickness and smoothness requirements of standard devices;

[0053] S3. Integrated design and preparation of full-chip integrated optical systems, that is, designing and preparing various optical devices in different areas according to actual needs, etching devices in each area through multiple rounds of etching processes, connecting various devices together through transmission waveguides, and realizing the integrated preparation of full-chip integrated optical systems without the need for high-precision alignment technology or sophisticated flip-chip bonding technology.

[0054] like Figure 2 As shown, this embodiment also provides a mosaic heterojunction substrate chip integration method, the implementation steps are:

[0055] 1. Integrate three optical materials—lithium niobate, indium gallium arsenide, and silicon nitride—on a single silicon substrate. Each material occupies a 1μm x 1μm space. Regions containing the same optical material are not adjacent to each other, and regions between different optical materials are connected by lattice adaptation or filling with SU8 polymer material.

[0056] 2. Using different etching processes, the top layer thicknesses of lithium niobate, indium gallium arsenide, and silicon nitride were prepared to the optimal parameters (e.g., 760nm, 340nm, and 800nm), and the intrinsic transmission loss of the films was minimized through polishing and other processes.

[0057] 3. Taking the figure as an example, the user needs to prepare an optical system consisting of a tunable laser, an optical micro-ring cavity, a Mach-Zehnder interferometer (electro-optic modulator), a semiconductor amplifier, etc., and guide the output to a single-mode fiber through a coupled waveguide. The preparation can be done by following the steps below:

[0058] (1) Prepare an optical resonant cavity in the InGaAs region and achieve laser output through electro-optical drive;

[0059] (2) A high-quality micro-ring cavity is fabricated in the silicon nitride region on the right, and the transmission waveguides across these regions are connected via a mode field adapter.

[0060] (3) A high-speed Markov-Zeitung interferometer is fabricated in the lower lithium niobate region, and the transmission waveguides across the regions are connected via mode field adapters;

[0061] (4) A semiconductor amplifier is fabricated in the InGaAs region on the upper left (or right) side, and power amplification is achieved through electro-optical drive;

[0062] (5) Prepare a tapered waveguide in the silicon nitride region below and amplify the mode field until it matches the output fiber.

[0063] like Figure 3 As shown, this embodiment also provides a mosaic heterojunction substrate chip integration method, which specifically includes:

[0064] S201. Integrate three optical materials, lithium niobate, indium gallium arsenide, and silicon nitride, onto a single silicon substrate, with each material occupying a 1 μm × 1 μm space. Regions containing the same optical material are not adjacent to each other, and regions between different optical materials are connected by lattice adaptation or filling with SU8 polymer material.

[0065] S202. Using different etching processes, the top layer thicknesses of lithium niobate, indium gallium arsenide, and silicon nitride are respectively prepared to the optimal parameters, and the intrinsic transmission loss of the film is minimized by polishing;

[0066] S203, an optical system is formed by a tunable laser, an optical micro-ring cavity, an electro-optical modulator and a semiconductor amplifier, and outputted to a single-mode optical fiber via a coupled waveguide.

[0067] In some embodiments, after preparation in S202 , the thickness of the top layer of lithium niobate is 760 nm, the thickness of the top layer of indium gallium arsenide is 340 nm, and the thickness of the top layer of silicon nitride is 800 nm.

[0068] like Figure 4 As shown, in some embodiments, S203 specifically includes:

[0069] S2031. Prepare an optical resonant cavity in the InGaAs region and achieve laser output through electro-optical drive.

[0070] S2032, preparing a high-quality factor micro-ring cavity in the right silicon nitride region, and connecting the transmission waveguides across the regions via a mode field adapter;

[0071] S2033, preparing a high-speed electro-optic modulator in the lower lithium niobate region, and connecting the transmission waveguides across the regions via a mode field adapter;

[0072] S2034. Prepare a semiconductor amplifier in the upper left or right InGaAs region, and achieve power amplification through electro-optical driving.

[0073] S2035. Prepare a tapered waveguide in the silicon nitride area below and amplify the mode field until it matches the output optical fiber.

[0074] In some embodiments, the electro-optic modulator is a Mach-Zeuter interferometer.

[0075] In some embodiments, various optical devices are integrated into the same chip, and the various optical devices are connected through low-loss waveguides. The optoelectronic hybrid integrated chip has two external interfaces: one is the optical interface directly output through the pigtail, and the other is the programmable logic circuit control interface implemented through the chip integrated circuit.

[0076] Compared with the prior art, the present invention has the following advantages:

[0077] (1) The present invention proposes the concept of "heterojunction integrated substrate". Through the design concept of large-area material heterogeneous integration, the process difficulty of heterogeneous integration between optical films of different materials and different lattice parameters is reduced;

[0078] (2) The present invention proposes a "mosaic" heterojunction integration solution, which allows users to design optical devices of various materials. The structural design provides important support for the interconnection of optical devices of different materials, greatly improving the design freedom of the full-chip integrated optical system.

[0079] (3) The method proposed in the present invention can provide important support for the development of electro-optical hybrid integrated systems, further improve the reuse of devices through reasonable spatial arrangement, and provide solutions for the miniaturization and integration of various optoelectronic systems.

[0080] For the convenience of description, the above devices are described as being divided into various units according to their functions. Of course, when implementing this application, the functions of each unit can be implemented in the same or multiple software and / or hardware.

[0081] It will be understood by those skilled in the art that embodiments of the present invention may be provided as methods, systems, or computer program products. Thus, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware. Furthermore, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0082] The present invention is described with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowcharts and / or block diagrams, as well as combinations of processes and / or blocks in the flowcharts and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowcharts and / or block diagrams. Figure 1 a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0083] The present application may be described in the general context of computer-executable instructions executed by a computer, such as program modules. Generally, program modules include routines, programs, objects, components, data structures, etc. that perform specific tasks or implement specific abstract data types. The present application may also be practiced in distributed computing environments where tasks are performed by remote processing devices connected through a communications network. In a distributed computing environment, program modules may be located in local and remote computer storage media, including storage devices.

[0084] These computer program instructions may also be stored in a computer readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 a process or multiple processes and / or boxes Figure 1 The function specified in one or more boxes.

[0085] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operational steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing the instructions executed on the computer or other programmable device for implementing the process. Figure 1 a process or multiple processes and / or boxes Figure 1The steps for the function specified in one or more boxes.

[0086] In a typical configuration, a computing device includes one or more processors (CPUs), input / output interfaces, network interfaces, and memory.

[0087] Memory may include non-permanent storage in a computer-readable medium, random access memory (RAM) and / or non-volatile memory in the form of read-only memory (ROM) or flash RAM. Memory is an example of a computer-readable medium.

[0088] Computer-readable media includes permanent and non-permanent, removable and non-removable media that can be implemented by any method or technology to store information. The information can be computer-readable instructions, data structures, program modules or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, compact disc read-only memory (CD-ROM), digital versatile disc (DVD) or other optical storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices or any other non-transmission media that can be used to store information that can be accessed by a computing device. As defined herein, computer-readable media does not include transitory computer-readable media (transitory media), such as modulated data signals and carrier waves.

[0089] It should also be noted that the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, commodity, or apparatus that includes a series of elements includes not only those elements but also other elements not explicitly listed, or includes elements inherent to such process, method, commodity, or apparatus. In the absence of further limitations, an element defined by the phrase "comprises a ..." does not exclude the presence of other identical elements in the process, method, commodity, or apparatus that includes the element.

[0090] The various embodiments in this specification are described in a progressive manner. Similar parts between the various embodiments can be referred to in conjunction with each other. Each embodiment focuses on the differences between the other embodiments. In particular, the system embodiments are generally similar to the method embodiments, so the description is relatively simple. For relevant parts, refer to the description of the method embodiments.

[0091] The foregoing is merely an embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present application should all be included within the scope of the claims of the present application.

Claims

1. A mosaic heterojunction substrate chip integration method, characterized in that include: S101. Heterojunction integration of thin films of multiple materials: different optical materials are integrated onto the same optical substrate through multiple preparation processes. The material regions are arranged in a mosaic pattern so that adjacent regions have different optical materials. Adjacent material regions are connected through lattice matching or material filling. Each optical material is connected through lattice matching or filling materials to ensure stable mechanical and optical structures. S102, integration of heterojunction substrates, thickness processing of various optical material films through etching and polishing to meet the top layer thickness and smoothness requirements of standard devices; S103. Integrated design and preparation of full-chip integrated optical systems. Design and prepare various optical devices in different areas according to actual needs. Etch devices in each area through multiple rounds of etching on the basis of this substrate. Connect the devices together through transmission waveguides. Etch different optical devices through various etching processes. Repeated etching in the same area can realize on-demand switching of active and passive devices, thus realizing the integrated preparation of full-chip integrated optical systems.

2. The mosaic heterojunction substrate chip integration method according to claim 1, characterized in that: In the S101, different optical materials are integrated onto the same optical substrate through magnetron sputtering, ion evaporation and large-area flip-chip bonding processes.

3. The mosaic heterojunction substrate chip integration method according to claim 1, characterized in that: The S103 realizes the integrated preparation of a full-chip integrated optical system without requiring high-precision alignment technology or fine flip-chip bonding technology.

4. The mosaic heterojunction substrate chip integration method according to claim 1, characterized in that The method specifically includes: S201. Integrate three optical materials, lithium niobate, indium gallium arsenide, and silicon nitride, onto a single silicon substrate, with each material occupying a 1 μm × 1 μm space. Regions containing the same optical material are not adjacent to each other, and regions between different optical materials are connected by lattice adaptation or filling with SU8 polymer material. S202. Using different etching processes, the top layer thicknesses of lithium niobate, indium gallium arsenide, and silicon nitride are respectively prepared to the optimal parameters, and the intrinsic transmission loss of the film is minimized by polishing; S203, an optical system is formed by a tunable laser, an optical micro-ring cavity, an electro-optical modulator and a semiconductor amplifier, and outputted to a single-mode optical fiber via a coupled waveguide.

5. The mosaic heterojunction substrate chip integration method according to claim 4, characterized in that: After the S202 is prepared, the top layer thickness of lithium niobate is 760nm, the top layer thickness of indium gallium arsenide is 340nm, and the top layer thickness of silicon nitride is 800nm.

6. The mosaic heterojunction substrate chip integration method according to claim 4, characterized in that: The S203 specifically includes: S2031. Prepare an optical resonant cavity in the InGaAs region and achieve laser output through electro-optical drive. S2032, preparing a high-quality factor micro-ring cavity in the right silicon nitride region, and connecting the transmission waveguides across the regions via a mode field adapter; S2033, preparing a high-speed electro-optic modulator in the lower lithium niobate region, and connecting the transmission waveguides across the regions via a mode field adapter; S2034. Prepare a semiconductor amplifier in the upper left or right InGaAs region, and achieve power amplification through electro-optical driving. S2035. Prepare a tapered waveguide in the silicon nitride area below and amplify the mode field until it matches the output optical fiber.

7. The mosaic heterojunction substrate chip integration method according to claim 6, characterized in that: The electro-optic modulator is a Mach-Zeuter interferometer.

8. The mosaic heterojunction substrate chip integration method according to claim 4, characterized in that: Various optical devices are integrated into the same chip and connected to each other through low-loss waveguides. The optoelectronic hybrid integrated chip has two external interfaces: one is the optical interface directly output through the pigtail, and the other is the programmable logic circuit control interface realized through the chip integrated circuit.

9. A computer-readable storage medium having a computer program stored thereon, wherein when the program is executed by a processor, the method according to any one of claims 1 to 8 is implemented.

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