Semiconductor chip surface defect detection method and system

Abstract

The present invention relates to the field of semiconductor chip defect detection technology, and provides a semiconductor chip surface defect detection method and system, which are characterized by: collecting infrared images of semiconductor chips to obtain infrared image data sets; performing image enhancement on the infrared images to obtain enhanced infrared image data sets; and learning the enhanced infrared image data sets based on a neural network model to obtain surface defect detection results of the semiconductor chip. The semiconductor chip surface defect detection method and system of the present invention significantly improve the accuracy, precision and reliability of semiconductor chip surface defect detection.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor defect detection, and in particular to a method and system for detecting surface defects of a semiconductor chip. Background Art

[0002] As the core component of modern electronic technology, the surface quality of semiconductor chips during the production process directly affects the performance and reliability of the chips. During the semiconductor manufacturing process, due to environmental factors, material defects and process problems, various defects will inevitably appear on the chip surface. These defects include not only single types such as peeling defects, metal defects, displacement defects and organic adhesion defects, but also often a complex combination of multiple defects.

[0003] Traditional detection methods usually rely on manual visual inspection or simple image processing technology. These methods are not only inefficient, but also easily affected by the subjective factors of the inspectors, making it difficult to ensure the accuracy and consistency of detection. In addition, for the diverse and complex types of defects, traditional detection methods such as threshold-based image segmentation and template matching are often difficult to adapt to the ever-changing defect characteristics, resulting in frequent missed detections and false detections, affecting the quality of the final product.

[0004] In recent years, deep learning-based detection methods have gradually become a research hotspot for solving such problems. With its powerful feature extraction and representation capabilities, deep learning models have the potential to improve the accuracy of defect detection. However, existing deep learning detection methods still face many challenges: First, deep learning models usually require a large amount of labeled data for training, while defect samples in real production environments are often scarce and difficult to obtain, resulting in insufficient generalization capabilities of the model. Second, the diversity and complexity of defects make it difficult for a single model to effectively distinguish different types of defects. Especially when multiple defects occur, the performance of the model is often unsatisfactory, and the detection accuracy is difficult to reach industrial standards. Summary of the invention

[0005] To this end, the technical problem to be solved by the present invention is to overcome the problem that the accuracy of semiconductor chip surface defect detection in the prior art does not meet the requirements, and to provide a semiconductor chip surface defect detection method and system to significantly improve the accuracy, precision and reliability of surface defect detection.

[0006] In a first aspect, in order to solve the above technical problems, the present invention provides a method for detecting surface defects of a semiconductor chip, comprising the following steps:

[0007] Collect infrared images of semiconductor chips to obtain infrared image data sets;

[0008] Performing image enhancement on the infrared image to obtain an enhanced infrared image data set;

[0009] Learning the enhanced infrared image data set based on a neural network model to obtain a surface defect detection result of the semiconductor chip;

[0010] Wherein, the learning of the enhanced infrared image data set based on the neural network model to obtain the surface defect detection result of the semiconductor chip includes:

[0011] receiving the enhanced infrared image data set;

[0012] Performing a first-level convolution operation on the received enhanced infrared image data set to output a first image feature;

[0013] Performing a second-level convolution operation on the first image feature to output a second image feature;

[0014] Performing a third-level convolution operation on the second image feature to output a third image feature;

[0015] Flattening one of the first image feature, the second image feature and the third image feature according to the layered freezing signal to obtain a flattened feature;

[0016] Outputting the surface defects of the semiconductor chip according to the flattened feature classification;

[0017] And, a learning rate is assigned to train the neural network model, and the learning rate is modified according to the layer-by-layer freezing signal.

[0018] In one embodiment of the present invention, it further includes analyzing the correlation between the surface defect type and the first image feature, the second image feature and the third image feature;

[0019] According to the analysis result of the correlation, a corresponding weight is respectively configured for the first-level convolution operation, the second-level convolution operation, and the third-level convolution operation;

[0020] The layered freeze signal is generated according to the corresponding weights.

[0021] In one embodiment of the present invention, analyzing the correlation between the type of surface defects and the first image feature, the second image feature, and the third image feature includes:

[0022] Obtaining a first type accuracy rate according to the accuracy rate of identifying the surface defect type of the first image feature, and comparing the first type accuracy rate with an accuracy rate threshold, if the first type accuracy rate is greater than or equal to the accuracy rate threshold, the surface defect type is related to the first image feature; otherwise, the surface defect type is not related to the first image feature;

[0023] Obtain a second type accuracy rate according to the accuracy rate of identifying the surface defect type of the second image feature, compare the second type accuracy rate with an accuracy rate threshold, and if the second type accuracy rate is greater than or equal to the accuracy rate threshold, the surface defect type is related to the first image feature; otherwise, the surface defect type is not related to the first image feature;

[0024] The third type accuracy is obtained according to the accuracy of identifying the surface defect type according to the third image feature, and the third type accuracy is compared with the accuracy threshold. If the third type accuracy is greater than or equal to the accuracy threshold, the surface defect type is related to the first image feature; otherwise, the surface defect type is not related to the first image feature.

[0025] In one embodiment of the present invention, the surface defect type includes at least one of a peeling defect, a metal defect, a displacement defect and an organic matter adhesion defect.

[0026] In one embodiment of the present invention, when collecting infrared images of semiconductor chips, the test environment is heated to 33° C. to 36° C., and after the test environment temperature is determined, the test environment temperature is maintained constant.

[0027] In one embodiment of the present invention, when collecting infrared images of semiconductor chips, the test environment is heated to 35° C. and maintained at a constant temperature of 35° C.

[0028] In one embodiment of the present invention, said collecting the infrared image of the semiconductor chip further comprises:

[0029] Collecting the surface temperature T1 of the semiconductor chip;

[0030] Collecting an infrared image of the semiconductor chip to obtain an original pixel value P0 of the infrared image;

[0031] Performing thermal compensation on the infrared image of the semiconductor chip according to the surface temperature of the semiconductor chip to obtain a thermally compensated infrared image;

[0032] The thermal compensation formula is:

[0033] P1=P0-k(T1-T0);

[0034] P1 is the pixel value of the infrared image after thermal compensation; k is the compensation coefficient; T0 is the reference temperature.

[0035] In one embodiment of the present invention, the surface temperature T1 of the semiconductor chip is collected by a temperature sensor disposed in a test environment; wherein the vertical distance between the temperature sensor and the surface of the semiconductor chip is less than 1 mm.

[0036] In one embodiment of the present invention, the step of learning the enhanced infrared image data set based on a neural network model to obtain the surface defect detection result of the semiconductor chip further includes:

[0037] The feature maps corresponding to the outputs of a batch of semiconductor chips are normalized.

[0038] In a second aspect, in order to solve the above technical problems, the present invention also provides a semiconductor chip surface defect detection system, comprising:

[0039] A data acquisition module, used for acquiring infrared images of semiconductor chips to obtain infrared image data sets;

[0040] A data enhancement module, used for performing image enhancement on the infrared image to obtain an enhanced infrared image data set;

[0041] A deep learning module, which learns the enhanced infrared image data set based on a neural network model to obtain a surface defect detection result of the semiconductor chip;

[0042] Wherein, the neural network model includes:

[0043] An input layer, which receives the enhanced infrared image dataset;

[0044] a first-level convolutional network, which performs a convolution operation on the enhanced infrared image data set received by the input layer and outputs a first image feature;

[0045] A secondary convolutional network, which performs a convolution operation on the first image feature and outputs a second image feature;

[0046] A three-stage convolutional network, which performs a convolution operation on the second image feature and outputs a third image feature;

[0047] a fully connected layer, which is connected to the first-level convolutional network, the second-level convolutional network and the third-level convolutional network at the same time, and flattens the received image features; wherein the fully connected layer selectively receives the first image feature, the second image feature and the third image feature according to the hierarchical freezing signal;

[0048] An output layer, connected to the fully connected layer, for outputting the classification of surface defects of the semiconductor chip;

[0049] An optimizer is used to allocate a learning rate of the neural network model and modify the learning rate according to the layer-wise freezing signal.

[0050] The above technical solution of the present invention has the following beneficial effects compared with the prior art:

[0051] The semiconductor chip surface defect detection method and system described in the present invention effectively improve the clarity and contrast of infrared images by enhancing the infrared images, so that the neural network model can identify more subtle surface defects, thereby improving the accuracy of the detection results; the use of multi-level convolution operations (first-level, second-level and third-level convolutions) enables the neural network model to extract image features at different levels. The convolution operation of each layer can learn different abstract features, thereby better capturing various types of surface defects and improving the ability to capture defect features; through layered freezing signals, image features at different levels are selectively flattened, allowing features at different layers to be selected according to specific needs during the training process, thereby training in stages and gradually adjusting the neural network model to better adapt to defect types of different complexities, and to obtain better feature representation when processing various defects, thereby further improving classification accuracy; by allocating learning rates and correcting them according to layered freezing signals, the adaptability of the model training process is enhanced, ensuring a good balance between the learning speed and the convergence of the model during model training, which helps to improve training efficiency and prevent the occurrence of overfitting; as described above, the semiconductor chip surface defect detection method and system described in the present invention fully consider the diversity and complexity of semiconductor chip surface defects, and significantly improve the accuracy, accuracy and reliability of detection through a series of technical means. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] In order to make the content of the present invention more clearly understood, the present invention is further described in detail below according to specific embodiments of the present invention in conjunction with the accompanying drawings, wherein

[0053] Figure 1 Flow chart of a semiconductor chip surface defect detection method in a preferred embodiment of the present invention;

[0054] Figure 2 Flowchart for obtaining surface defect detection results for neural network model learning dataset;

[0055] Figure 3~Figure 11 The defect type detected by the semiconductor chip surface defect detection method in an embodiment of the present invention;

[0056] Figure 3 , Figure 4 and Figure 5 All are schematic diagrams of peeling defects; Figure 6 and Figure 7 All are schematic diagrams of metal defects; Figure 8 is a schematic diagram including metal defects and organic adhesion defects; Fig. 9 Schematic diagram of displacement defect; Fig.10 and Fig.11 These are schematic diagrams of organic adhesion defects.

[0057] Fig.12 It is a structural block diagram of a semiconductor chip surface defect detection system in a preferred embodiment of the present invention;

[0058] Fig.13 for Fig.12 The structural block diagram of the deep learning module is shown. DETAILED DESCRIPTION

[0059] The present invention is further described below in conjunction with the accompanying drawings and specific embodiments so that those skilled in the art can better understand the present invention and implement it, but the embodiments are not intended to limit the present invention. Embodiment 1

[0060] The embodiments of the present invention use infrared detection technology to measure temperature changes caused by surface defects in semiconductor chips, thereby effectively identifying and locating defects. The basic principle of detecting defects using well-known infrared detection technology is to use infrared radiation emitted from the surface of an object to detect its temperature distribution and surface features, thereby identifying defects. Specifically for the application of semiconductor chips, infrared thermal imagers display the temperature distribution of semiconductor chips caused by surface defects. Infrared detectors measure these temperature changes to generate thermal imaging images, showing the temperature distribution and defect locations on the surface of the object, thereby realizing the detection and identification of defects.

[0061] Reference Figure 1 and Figure 2 As shown, the embodiment of the present invention discloses a method for detecting surface defects of a semiconductor chip, comprising the following steps:

[0062] Collect infrared images of semiconductor chips to obtain infrared image data sets;

[0063] In specific application scenarios, an infrared image acquisition system including an infrared imager and a temperature sensor that meet the imaging requirements is pre-configured, as well as a pre-trained neural network model. The frame rate and spectral range of the infrared imager are considered to ensure that the sensitivity and dynamic range of the infrared imager meet the requirements. The infrared image of the semiconductor chip is collected based on the established infrared image acquisition system to obtain an infrared image data set.

[0064] Performing image enhancement on the infrared image to obtain an enhanced infrared image data set;

[0065] Learning the enhanced infrared image data set based on a neural network model to obtain a surface defect detection result of the semiconductor chip;

[0066] Wherein, the learning of the enhanced infrared image data set based on the neural network model to obtain the surface defect detection result of the semiconductor chip includes:

[0067] receiving the enhanced infrared image data set;

[0068] Performing a first-level convolution operation on the received enhanced infrared image data set to output a first image feature;

[0069] Performing a second-level convolution operation on the first image feature to output a second image feature;

[0070] Performing a third-level convolution operation on the second image feature to output a third image feature;

[0071] Flattening one of the first image feature, the second image feature and the third image feature according to the layered freezing signal to obtain a flattened feature;

[0072] Outputting the surface defects of the semiconductor chip according to the flattened feature classification;

[0073] And, a learning rate is assigned to train the neural network model, and the learning rate is modified according to the layer-by-layer freezing signal.

[0074] The semiconductor chip surface defect detection method described in the present invention effectively improves the clarity and contrast of infrared images by enhancing the infrared images, so that the neural network model can identify more subtle surface defects, thereby improving the accuracy of the detection results; and adopts multi-level convolution operations (first-level, second-level and third-level convolution) to enable the neural network model to extract image features at different levels. The convolution operation of each layer can learn different abstract features, thereby better capturing various types of surface defects and improving the ability to capture defect features; through layered freezing signals, image features at different levels are selectively flattened, allowing features at different layers to be selected according to specific needs during the training process, thereby training in stages and gradually adjusting the neural network model to better adapt to defect types of different complexities, and to obtain better feature representation when processing various defects, thereby further improving classification accuracy; by allocating learning rates and correcting them according to layered freezing signals, the adaptability of the model training process is enhanced, ensuring a good balance between the learning speed and the convergence of the model during model training, which helps to improve training efficiency and prevent the occurrence of overfitting; as described above, the semiconductor chip surface defect detection method and system described in the present invention fully consider the diversity and complexity of semiconductor chip surface defects, and significantly improve the accuracy, accuracy and reliability of detection through a series of technical means.

[0075] In addition, it should be noted that although the present embodiment adopts a three-level convolutional network for infrared image feature extraction, it cannot be understood as a limitation of the present model. The user can select any level of convolutional network and the number of convolutional layers in each level of convolutional network according to the complexity of the model, and is not limited to this.

[0076] Among them, a three-level convolutional network is used for infrared image feature extraction. The first-level convolutional network contains 2 convolutional layers, the second-level convolutional network contains 4 convolutional layers, and the third-level convolutional network contains 3 convolutional layers. The output of each stage will be retained as the input of the fully connected layer. From front to back, the scale of the input features gradually decreases, and the number of feature layers gradually increases.

[0077] As a further improvement of the present invention, it also includes analyzing the correlation between the surface defect type and the first image feature, the second image feature and the third image feature; analyzing the correlation between the image feature and the defect type helps to select and adjust the convolution layer and corresponding parameters suitable for detecting a specific defect type; usually, the surface defect type includes at least one of peeling defects, metal defects, displacement defects and organic adhesion defects; peeling defects (Peel off defects) are defects caused by the distribution of organic matter such as photoresist on the chip due to incomplete peeling in the photolithography step; metal defects (Metal defects) are irregular area defects formed due to the adhesion of metal skin caused by the uneven substrate or incomplete exposure; displacement defects (Displacement defects) are defects caused by line displacement due to the presence of protrusions or pits on the substrate surface; organic adhesion defects (Organic adhesion defects) are defects caused by the adhesion of organic matter due to high viscosity of the chip surface or incomplete cleaning.

[0078] According to the analysis results of the correlation, a corresponding weight is configured for the first-level convolution operation, the second-level convolution operation, and the third-level convolution operation respectively; this strategy allows the model to pay more attention to the features that are important to a specific defect type during the training process, thereby optimizing the learning effect through dynamic adjustment of the weights, which will promote the model to better adapt to the training data and improve the ability to identify various defect features;

[0079] The layered freezing signal is generated according to the corresponding weights. The generation of the layered freezing signal enables the network to selectively freeze some layers, which helps to retain the learning ability of specific features while reducing unnecessary complexity. The introduction of the corresponding weights makes the generation of the layered freezing signal more targeted and can optimize the training process of the neural network model.

[0080] Therefore, by analyzing the correlation between defect types and graphic features, configuring convolution operation weights, and generating hierarchical freezing signals, this scheme can significantly improve the neural network model's ability to detect surface defects. This process can not only improve the model's learning efficiency during training, but also enhance the model's generalization ability, enabling it to better adapt to the diverse defects in actual application scenarios.

[0081] Specifically, analyzing the correlation between the type of surface defects and the first image feature, the second image feature, and the third image feature includes:

[0082] Obtaining a first type accuracy rate according to the accuracy rate of identifying the surface defect type of the first image feature, and comparing the first type accuracy rate with an accuracy rate threshold, if the first type accuracy rate is greater than or equal to the accuracy rate threshold, the surface defect type is related to the first image feature; otherwise, the surface defect type is not related to the first image feature;

[0083] Obtain a second type accuracy rate according to the accuracy rate of identifying the surface defect type of the second image feature, compare the second type accuracy rate with an accuracy rate threshold, and if the second type accuracy rate is greater than or equal to the accuracy rate threshold, the surface defect type is related to the first image feature; otherwise, the surface defect type is not related to the first image feature;

[0084] The third type accuracy is obtained according to the accuracy of identifying the surface defect type according to the third image feature, and the third type accuracy is compared with the accuracy threshold. If the third type accuracy is greater than or equal to the accuracy threshold, the surface defect type is related to the first image feature; otherwise, the surface defect type is not related to the first image feature.

[0085] The defect detection method described in the present invention can more clearly quantify the contribution of each image feature to the detection of a specific defect type by setting an accuracy threshold, and can effectively screen out features related to the surface defect type, thereby providing a basis for feature selection and network optimization. By identifying the specific relationship between image features and defect types, guidance can be provided for further training of the model, optimizing the allocation of weights and the design of convolutional layers. For example, if an image feature is not effective in detecting a specific type of defect, the weight of the image feature can be adjusted accordingly. In summary, the characteristics and types of surface defects are evaluated through quantitative analysis methods, which realizes the systematization and rationalization of feature selection.

[0086] In specific application scenarios, the convolutional networks at all levels are frozen in layers, and the correlation between the image features and the current surface defect types is determined based on the accuracy of the image features extracted by the convolutional networks at all levels to identify the surface defect types. For example, the three-level convolutional network is frozen, and after the enhanced infrared image is extracted by the first-level convolutional network, the second-level convolutional network extracts the first image features to obtain the second image features. According to the second image features, the surface defect types include peeling defects, metal defects, and displacement defects. If the accuracy of the peeling defect is greater than or equal to the accuracy threshold, and the accuracy of the displacement defect is less than the accuracy threshold, then the peeling defect is related to the second image feature, and the displacement defect is not related to the second image feature; that is, the second image feature contributes more to the detection of peeling defects, but less to the detection of displacement defects. Based on this, the weight of the second image feature for peeling defect detection is increased accordingly, and the weight of the second image feature for displacement defect detection is reduced. As the training progresses, the three-level convolutional network is gradually unfrozen, the previously trained model parameters are retained, and the next stage of training is carried out after the learning rate is adjusted.

[0087] It should be noted that the accuracy threshold is pre-set, and the accuracy threshold is set and optimized based on previous experience, experimental data or through cross-validation methods.

[0088] As a further improvement of the embodiment of the present invention, when collecting infrared images of semiconductor chips, the test environment is heated to 35°C and maintained at a constant temperature of 35°C. By maintaining the constant temperature of the test environment, the influence of ambient temperature fluctuations on the quality of infrared images is reduced, thereby improving the quality of infrared images; in particular, by maintaining 35°C constant and higher than normal temperature, surface defects show a certain degree of recognizability in terms of thermal response, and the temperature difference or thermal characteristics of the defective area can enhance the contrast in the infrared image; at the same time, 35°C can also reduce the thermal noise of the infrared imager, improve the signal-to-noise ratio (SNR), and make the infrared image clearer, thereby being more sensitive to the detection of small defects. In addition, the thermal expansion and stress changes of semiconductor materials at 35°C are small, so the corresponding surface defects (such as cracks or delamination) are more consistent in a stable state, thereby indirectly improving the accuracy and stability of defect detection.

[0089] Of course, in other embodiments, the temperature of the heated test environment can also be 33°C, 34°C, 36°C, etc., and the test environment temperature is maintained constant after the test environment temperature is determined. To a certain extent, the quality of infrared images can also be improved, and the accuracy and stability of defect detection can be indirectly improved. According to experiments, the best test environment temperature is kept constant at 35°C.

[0090] Considering that even if the test environment temperature is constant, the heat transferred from the test environment to each semiconductor chip during detection is different, the detection method in the embodiment of the present invention also includes thermal compensation of the infrared image according to the surface temperature of the semiconductor chip, which specifically includes: collecting the surface temperature T1 of the semiconductor chip; collecting the infrared image of the semiconductor chip to obtain the original pixel value P0 of the infrared image; performing thermal compensation on the infrared image of the semiconductor chip according to the surface temperature of the semiconductor chip to obtain the thermally compensated infrared image; wherein the thermal compensation formula is: P1=P0-k(T1-T0); P1 is the thermally compensated pixel value of the infrared image; k is the compensation coefficient; T0 is the reference temperature (temperature under optimal working conditions). Thermal compensation of the infrared image is performed according to the surface temperature difference of the semiconductor chip, effectively reducing the adverse effect of the temperature difference on the quality of the infrared image and ensuring the detection accuracy.

[0091] In a specific application scenario, a temperature sensor can be configured and placed at the center of a semiconductor chip. The temperature value fed back by the temperature sensor is the collected surface temperature T1 of the semiconductor chip. A group of temperature sensors can also be configured in an array. The collected surface temperature T1 of the semiconductor chip is the average temperature fed back by a group of temperature sensors. The reference temperature T0 is determined in the same way as above.

[0092] Furthermore, the surface temperature T1 of the semiconductor chip is collected by a temperature sensor configured in the test environment; wherein the vertical distance between the temperature sensor and the surface of the semiconductor chip is less than 1 mm. The temperature sensor for collecting the surface temperature of the semiconductor chip is configured in the test environment, rather than deployed inside the chip, so that the purpose is achieved without changing the design of the chip; on the other hand, by configuring the temperature sensor to be less than 1 mm vertically from the surface of the semiconductor chip, the surface temperature of the semiconductor chip can be accurately collected in a non-contact manner, thereby improving the accuracy of the collected temperature.

[0093] The method of learning the enhanced infrared image data set based on a neural network model to obtain the surface defect detection result of the semiconductor chip also includes normalizing the feature map outputted corresponding to a batch of the semiconductor chips.

[0094] Normalize the feature graphs of the corresponding outputs of a batch of semiconductor chips to ensure that the feature graphs of each batch of semiconductor chips have similar statistical characteristics after normalization, so as to maintain data consistency and reduce the differences between data of different batches of semiconductor chips. By normalizing the feature graphs of each batch of semiconductor chips, they can be adjusted to similar scales and distribution ranges, so that the model can better learn their common features and improve the accuracy of defect detection.

[0095] Reference Figures 3~11The figure shows the defect types detected by the semiconductor chip surface defect detection method according to an embodiment of the present invention, wherein: Figures 3-5 All are schematic diagrams of peeling defects; Figure 6 and Figure 7 All are schematic diagrams of metal defects; Figure 8 is a schematic diagram including metal defects and organic defects; Fig. 9 Schematic diagram of displacement defect; Fig.10 and Fig.11 All of them are schematic diagrams of organic defects. Embodiment 2

[0096] Reference Fig.12 and Fig.13 As shown, the embodiment of the present invention discloses a semiconductor chip surface defect detection system, comprising:

[0097] A data acquisition module, used for acquiring infrared images of semiconductor chips to obtain infrared image data sets;

[0098] A data enhancement module, used for performing image enhancement on the infrared image to obtain an enhanced infrared image data set;

[0099] A deep learning module, which learns the enhanced infrared image data set based on a neural network model to obtain a surface defect detection result of the semiconductor chip;

[0100] Wherein, the neural network model includes:

[0101] An input layer, which receives the enhanced infrared image dataset;

[0102] a first-level convolutional network, which performs a convolution operation on the enhanced infrared image data set received by the input layer and outputs a first image feature;

[0103] A secondary convolutional network, which performs a convolution operation on the first image feature and outputs a second image feature;

[0104] A three-stage convolutional network, which performs a convolution operation on the second image feature and outputs a third image feature;

[0105] a fully connected layer, which is connected to the first-level convolutional network, the second-level convolutional network and the third-level convolutional network at the same time, and flattens the received image features; wherein the fully connected layer selectively receives the first image feature, the second image feature and the third image feature according to the hierarchical freezing signal;

[0106] An output layer, connected to the fully connected layer, for outputting the classification of surface defects of the semiconductor chip;

[0107] An optimizer is used to allocate a learning rate of the neural network model and modify the learning rate according to the layer-wise freezing signal.

[0108] The semiconductor chip surface defect detection system described in the present invention effectively improves the clarity and contrast of infrared images by enhancing the infrared images, so that the neural network model can identify more subtle surface defects, thereby improving the accuracy of the detection results; and adopts multi-level convolution operations (first-level, second-level and third-level convolution) to enable the neural network model to extract image features at different levels. The convolution operation of each layer can learn different abstract features, thereby better capturing various types of surface defects and improving the ability to capture defect features; through layered freezing signals, image features at different levels are selectively flattened, allowing features at different layers to be selected according to specific needs during the training process, thereby training in stages and gradually adjusting the neural network model to better adapt to defect types of different complexities, and to obtain better feature representation when processing various defects, thereby further improving classification accuracy; by allocating learning rates and correcting them according to layered freezing signals, the adaptability of the model training process is enhanced, ensuring a good balance between the learning speed and the convergence of the model during model training, which helps to improve training efficiency and prevent the occurrence of overfitting; as described above, the semiconductor chip surface defect detection method and system described in the present invention fully consider the diversity and complexity of semiconductor chip surface defects, and significantly improve the accuracy, accuracy and reliability of detection through a series of technical means.

[0109] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the present application may adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program codes.

[0110] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0111] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0112] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0113] Obviously, the above embodiments are merely examples for clear explanation and are not intended to limit the implementation methods. For those skilled in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the implementation methods here. The obvious changes or modifications derived from these are still within the protection scope of the invention.

Claims

1. A method for detecting surface defects of a semiconductor chip, characterized in that: The following steps are included: Collect infrared images of semiconductor chips to obtain infrared image data sets; Performing image enhancement on the infrared image to obtain an enhanced infrared image data set; Learning the enhanced infrared image data set based on a neural network model to obtain a surface defect detection result of the semiconductor chip; Wherein, the learning of the enhanced infrared image data set based on the neural network model to obtain the surface defect detection result of the semiconductor chip includes: receiving the enhanced infrared image data set; Performing a first-level convolution operation on the received enhanced infrared image data set to output a first image feature; Performing a second-level convolution operation on the first image feature to output a second image feature; Performing a third-level convolution operation on the second image feature to output a third image feature; Flattening one of the first image feature, the second image feature and the third image feature according to the layered freezing signal to obtain a flattened feature; Outputting the surface defects of the semiconductor chip according to the flattened feature classification; and, assigning a learning rate to train the neural network model, and modifying the learning rate according to the layered freezing signal; Wherein, obtaining the layered freezing signal comprises: Analyzing the correlation between the surface defect type and the first image feature, the second image feature, and the third image feature; According to the analysis result of the correlation, a corresponding weight is respectively configured for the first-level convolution operation, the second-level convolution operation, and the third-level convolution operation; The layered freeze signal is generated according to the corresponding weights.

2. The semiconductor chip surface defect detection method according to claim 1, characterized in that: Analyzing the correlation between the type of surface defects and the first image feature, the second image feature, and the third image feature includes: Obtain a first type accuracy rate according to the accuracy rate of identifying the surface defect type of the first image feature, and compare the first type accuracy rate with an accuracy rate threshold; if the first type accuracy rate is greater than or equal to the accuracy rate threshold, the surface defect type is related to the first image feature; Otherwise, the surface defect type is not related to the first image feature; Obtain a second type accuracy rate according to the accuracy rate of identifying the surface defect type of the second image feature, and compare the second type accuracy rate with an accuracy rate threshold; if the second type accuracy rate is greater than or equal to the accuracy rate threshold, the surface defect type is related to the first image feature; Otherwise, the surface defect type is not related to the first image feature; Obtain a third type accuracy rate according to the accuracy rate of identifying the surface defect type of the third image feature, and compare the third type accuracy rate with an accuracy rate threshold; if the third type accuracy rate is greater than or equal to the accuracy rate threshold, the surface defect type is related to the first image feature; Otherwise, the surface defect type is not associated with the first image feature.

3. The semiconductor chip surface defect detection method according to claim 1 or 2, characterized in that: The surface defect type includes at least one of a peeling defect, a metal defect, a displacement defect and an organic matter adhesion defect.

4. The semiconductor chip surface defect detection method according to claim 1, characterized in that: When collecting infrared images of semiconductor chips, the test environment is heated to 33° C. to 36° C., and after the test environment temperature is determined, the test environment temperature is maintained constant.

5. The method for detecting surface defects of a semiconductor chip according to claim 1, wherein: When collecting infrared images of semiconductor chips, the test environment is heated to 35°C and maintained at a constant temperature of 35°C.

6. The method for detecting surface defects of a semiconductor chip according to claim 1, 4 or 5, characterized in that: The collecting of the infrared image of the semiconductor chip further comprises: Collecting the surface temperature T1 of the semiconductor chip; Collecting an infrared image of the semiconductor chip to obtain an original pixel value P0 of the infrared image; Performing thermal compensation on the infrared image of the semiconductor chip according to the surface temperature of the semiconductor chip to obtain a thermally compensated infrared image; The thermal compensation formula is: P1=P0-k(T1-T0); P1 is the pixel value of the infrared image after thermal compensation; k is the compensation coefficient; T0 is the reference temperature.

7. The method for detecting surface defects of a semiconductor chip according to claim 6, characterized in that: The surface temperature T1 of the semiconductor chip is collected by a temperature sensor disposed in the test environment; wherein the vertical distance between the temperature sensor and the surface of the semiconductor chip is less than 1 mm.

8. The method for detecting surface defects of a semiconductor chip according to claim 1, wherein: The method of learning the enhanced infrared image data set based on the neural network model to obtain the surface defect detection result of the semiconductor chip also includes: The feature maps corresponding to the outputs of a batch of semiconductor chips are normalized.

9. A semiconductor chip surface defect detection system, characterized in that: include, A data acquisition module, used for acquiring infrared images of semiconductor chips to obtain infrared image data sets; A data enhancement module, used for performing image enhancement on the infrared image to obtain an enhanced infrared image data set; A deep learning module, which learns the enhanced infrared image data set based on a neural network model to obtain a surface defect detection result of the semiconductor chip; Wherein, the neural network model includes: An input layer, which receives the enhanced infrared image dataset; A first-level convolutional network, which performs a first-level convolution operation on the enhanced infrared image data set received by the input layer, and outputs a first image feature; A secondary convolutional network, which performs a second-level convolution operation on the first image feature and outputs a second image feature; A three-level convolutional network, which performs a third-level convolution operation on the second image feature and outputs a third image feature; a fully connected layer, which is connected to the first-level convolutional network, the second-level convolutional network and the third-level convolutional network at the same time, and flattens the received image features; wherein the fully connected layer selectively receives the first image feature, the second image feature and the third image feature according to the hierarchical freezing signal; An output layer, connected to the fully connected layer, for outputting the classification of surface defects of the semiconductor chip; an optimizer for allocating a learning rate of the neural network model and modifying the learning rate according to the layer-by-layer freezing signal; Wherein, obtaining the layered freezing signal comprises: Analyzing the correlation between the surface defect type and the first image feature, the second image feature, and the third image feature; According to the analysis result of the correlation, a corresponding weight is respectively configured for the first-level convolution operation, the second-level convolution operation, and the third-level convolution operation; The layered freeze signal is generated according to the corresponding weights.

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