Power device, method for manufacturing the same, power module, power conversion circuit, and vehicle

Abstract

The present invention discloses a power device, a preparation method thereof, a power module, a power conversion circuit and a vehicle. The power device includes: a substrate and an epitaxial layer disposed on one side of the substrate; a source trench, a gate trench, a first layer and a second layer are disposed on the surface of the epitaxial layer away from the substrate; wherein, the second layer is located on the side of the first layer away from the substrate; an electric field shielding layer is disposed in the source trench; the first layer and the second layer are located between the electric field shielding layer and the gate trench; a barrier structure is disposed between the electric field shielding layer and the first layer; the barrier structure is used to block the diffusion of ions of the electric field shielding layer to the first layer. The embodiment of the present invention can avoid the threshold voltage drift caused by the diffusion of ions of the electric field shielding layer to the channel region and improve the performance of the silicon carbide power device.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and particularly to a power device, a preparation method thereof, a power module, a power conversion circuit and a vehicle. Background Art

[0002] The trench-type silicon carbide power device has advantages such as a large current density and a small cell pitch, and is widely used. In the existing trench-type silicon carbide power device, ions in the electric field shielding layer are likely to diffuse into the channel region, resulting in a threshold voltage drift and affecting the performance of the silicon carbide power device. Summary of the Invention

[0003] The present invention provides a power device, a preparation method thereof, a power module, a power conversion circuit and a vehicle to avoid the ions in the electric field shielding layer from diffusing into the channel region to cause a threshold voltage drift and improve the performance of the silicon carbide power device.

[0004] According to an aspect of the present invention, there is provided a power device, including:

[0005] a substrate and an epitaxial layer disposed on one side of the substrate;

[0006] On the surface of the epitaxial layer away from the substrate, a source trench, a gate trench, a first layer and a second layer are provided; wherein, the second layer is located on the side of the first layer away from the substrate, the conductivity type of the first layer is different from that of the second layer, and the conductivity type of the second layer is the same as that of the epitaxial layer; an electric field shielding layer is disposed in the source trench; the first layer and the second layer are located between the electric field shielding layer and the gate trench;

[0007] A barrier structure is provided between the electric field shielding layer and the first layer; the barrier structure is used to block the diffusion of ions in the electric field shielding layer to the first layer.

[0008] Optionally, the surface of the barrier structure away from the substrate is flush with the surface of the second layer away from the substrate, and the distance between the surface of the barrier structure adjacent to the substrate and the substrate is less than the distance between the bottom surface of the gate trench and the substrate.

[0009] Optionally, the barrier structure covers the surface of the first layer adjacent to the barrier structure.

[0010] Optionally, the barrier structure includes a barrier trench, or the barrier structure includes a barrier trench and a barrier material filled in the barrier trench.

[0011] Optionally, a first insulating layer and a gate are disposed in the gate trench, and the first insulating layer is located between the gate and the epitaxial layer;

[0012] A second insulating layer and a trench source are disposed in the source trench, and the second insulating layer is disposed between the trench source and the electric field shielding layer;

[0013] Along the direction from the electric field shielding layer to the first layer, the ratio of the width of the barrier structure to the thickness of the first insulating layer is less than or equal to 2, and the ratio of the width of the barrier structure to the thickness of the second insulating layer is less than or equal to 2;

[0014] The barrier material, the first insulating layer, and the second insulating layer are made of the same material.

[0015] Optionally, the barrier material includes silicon oxide, silicon nitride, or silicon oxynitride.

[0016] Optionally, along the direction from the electric field shielding layer to the first layer, the width of the barrier structure is 0.1 micrometer - 0.3 micrometers.

[0017] Optionally, the barrier structure is disposed adjacent to the electric field shielding layer.

[0018] Optionally, the power device further includes a third insulating layer, a source metal, and a drain metal;

[0019] The third insulating layer is disposed on the side of the epitaxial layer away from the substrate, and the third insulating layer covers the gate trench; the source metal is disposed on the side of the third insulating layer away from the substrate, and the second layer between the source trench and the gate trench is in contact with the source metal; the electric field shielding layer is in contact with the source metal;

[0020] The drain metal is disposed on the side of the substrate away from the epitaxial layer.

[0021] According to another aspect of the present invention, a power module is provided, including a substrate and at least one power device as described in any embodiment of the present invention, and the substrate is used to carry the power device.

[0022] According to another aspect of the present invention, a power conversion circuit is provided, and the power conversion circuit is used for one or more of current conversion, voltage conversion, and power factor correction;

[0023] The power conversion circuit includes a circuit board and at least one power device as described in any embodiment of the present invention, and the power device is electrically connected to the circuit board.

[0024] According to another aspect of the present invention, there is provided a vehicle, including a load and a power conversion circuit as described in any embodiment of the present invention. The power conversion circuit is configured to convert alternating current into direct current, convert alternating current into alternating current, convert direct current into direct current, or convert direct current into alternating current, and then input the converted current to the load.

[0025] According to another aspect of the present invention, there is provided a method for manufacturing a power device, including:

[0026] Form an epitaxial layer on one side of a substrate;

[0027] Form a source trench, a gate trench, a first layer, a second layer, an electric field shielding layer, and a barrier structure; wherein, the source trench, the gate trench, the first layer, and the second layer are all disposed on the surface of the epitaxial layer away from the substrate, and the second layer is located on the side of the first layer away from the substrate; the conductivity type of the first layer is different from that of the second layer, and the conductivity type of the second layer is the same as that of the epitaxial layer; the electric field shielding layer is disposed in the source trench, and the first layer and the second layer are located between the electric field shielding layer and the gate trench; the barrier structure is disposed between the electric field shielding layer and the first layer, and the barrier structure is configured to block the diffusion of ions of the electric field shielding layer to the first layer.

[0028] Optionally, forming the source trench, the gate trench, the first layer, the second layer, the electric field shielding layer, and the barrier structure includes:

[0029] Form a first conductivity type layer and a second conductivity type layer; wherein, the second conductivity type layer is disposed on the side of the first conductivity type layer away from the substrate;

[0030] Form the source trench;

[0031] Perform ion implantation on the epitaxial layer in the source trench to form an electric field shielding region;

[0032] Form the gate trench; wherein, the remaining first conductivity type layer and second conductivity type layer after forming the gate trench are located between the electric field shielding layer and the gate trench;

[0033] Form a barrier trench, the first layer, and the second layer; wherein, the remaining first conductivity type layer after forming the barrier trench is the first layer, the remaining second conductivity type layer after forming the barrier trench is the second layer, and the barrier trench is disposed between the electric field shielding layer and the first layer;

[0034] Perform a high-temperature annealing treatment;

[0035] Fill the barrier trench with a barrier material to form a barrier structure.

[0036] Optionally, while filling a barrier material in the barrier trench to form a barrier structure, the method further includes:

[0037] Filling a barrier material in the gate trench and the source trench to form a first insulating layer and a second insulating layer; wherein, the first insulating layer is located in the gate trench, the second insulating layer is located in the source trench, and along the direction from the electric field shielding layer to the first layer, the ratio of the width of the barrier structure to the thickness of the first insulating layer is less than or equal to 2, and the ratio of the width of the barrier structure to the thickness of the second insulating layer is less than or equal to 2.

[0038] The power device provided by an embodiment of the present invention includes: a source trench, a gate trench, a first layer, and a second layer are disposed on the surface of the epitaxial layer away from the substrate; an electric field shielding layer is disposed in the source trench; a barrier structure is disposed between the electric field shielding layer and the first layer; by providing the barrier structure to block the diffusion of ions in the electric field shielding layer to the first layer, the threshold voltage drift caused by ion diffusion to the channel region can be avoided, and the performance of the silicon carbide power device can be improved.

[0039] It should be understood that the content described in this part is not intended to identify the key or important features of the embodiments of the present invention, nor is it used to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. Description of the Drawings

[0040] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0041] Figure 1 is a schematic diagram of a power device provided by an embodiment of the present invention;

[0042] Figure 2 is a schematic diagram of another power device provided by an embodiment of the present invention;

[0043] Figure 3 is a flowchart of a method for manufacturing a power device provided by an embodiment of the present invention;

[0044] Figure 4 is a flowchart of another method for manufacturing a power device provided by an embodiment of the present invention;

[0045] Figure 5 is a schematic diagram of forming a first conductive type layer and a second conductive type layer provided by an embodiment of the present invention;

[0046] Figure 6 It is a schematic diagram after forming the source trench provided by an embodiment of the present invention;

[0047] Figure 7 It is a schematic diagram after forming the electric field shielding layer provided by an embodiment of the present invention;

[0048] Figure 8 It is a schematic diagram after forming the gate trench provided by an embodiment of the present invention;

[0049] Figure 9 It is a schematic diagram after forming the barrier trench provided by an embodiment of the present invention;

[0050] Figure 10 It is a schematic diagram after forming the barrier structure provided by an embodiment of the present invention;

[0051] Figure 11 It is a schematic diagram after forming the oxide layer provided by an embodiment of the present invention;

[0052] Figure 12 It is a schematic diagram after forming the polysilicon layer provided by an embodiment of the present invention;

[0053] Figure 13 It is a schematic diagram after forming the third insulating layer provided by an embodiment of the present invention. Detailed implementation manners

[0054] In order to enable those skilled in the art to better understand the solution of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0055] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above drawings are used to distinguish similar objects, and do not necessarily describe a specific order or sequence. It should be understood that such data can be interchanged under appropriate circumstances so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device including a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0056] An embodiment of the present invention provides a power device,Figure 1 This is a schematic diagram of a power device provided by an embodiment of the present invention. Refer to Figure 1 , the power device includes:

[0057] a substrate 10 and an epitaxial layer 20 disposed on one side of the substrate 10;

[0058] On the surface of the epitaxial layer 20 away from the substrate 10, a source trench 40, a gate trench 30, a first layer 80, and a second layer 90 are provided; wherein, the second layer 90 is located on the side of the first layer 80 away from the substrate 10, the conduction type of the first layer 80 is different from that of the second layer 90, and the conduction type of the second layer 90 is the same as that of the epitaxial layer 20; an electric field shielding layer 100 is provided in the source trench 40, and the first layer 80 and the second layer 90 are located between the electric field shielding layer 100 and the gate trench 30;

[0059] A barrier structure 70 is provided between the electric field shielding layer 100 and the first layer 80; the barrier structure 70 is used to block the diffusion of ions of the electric field shielding layer 100 to the first layer 80.

[0060] Among them, the power device can be a silicon carbide trench metal oxide semiconductor field effect transistor (MOSFET). The conduction types of the substrate 10 and the epitaxial layer 20 are the same. The substrate 10 is a second-conduction-type substrate, the epitaxial layer 20 is a second-conduction-type epitaxial layer, the conduction type of the second layer 90 is the second conduction type, and the conduction type of the first layer 80 is the first conduction type. The first conduction type is N-type, the second conduction type is P-type, or the first conduction type is P-type, and the second conduction type is N-type. Exemplarily, if the device is an N-type device, the substrate 10 is an N+ substrate, for example, it can be an N+ silicon carbide substrate; the epitaxial layer 20 is an N-epitaxial layer, for example, it can be an N-silicon carbide epitaxial layer, the first layer 80 is a PW layer, and the second layer 90 is an N+ layer; if the device is a P-type device, the substrate 10 is a P+ substrate, the epitaxial layer 20 is a P-epitaxial layer, the first layer 80 is an NW layer, and the second layer 90 is a P+ layer. After growing the epitaxial layer 20 on the substrate 10, the first layer 80 and the second layer 90 can be formed by ion implantation of the epitaxial layer 20, or the first layer 80 and the second layer 90 can be directly grown or deposited on the epitaxial layer 20.

[0061] The source trench 40 can be located on one side of the gate trench 30, and the source trench 40 surrounds the gate trench 30; the power device can also include two source trenches 40, with the gate trench 30 located between the two source trenches 40. The two source trenches 40 can be symmetrically arranged with respect to the gate trench 30 or asymmetrically arranged. The electric field shielding layer 100 is used to shield the electric field of the gate trench 30 to prevent the bottom of the gate trench 30 from being broken down. By providing the source trench 40 and providing the electric field shielding layer 100 on both the bottom and side walls of the source trench 40, the electric field of the gate trench 30 can be better shielded, and the bottom of the gate trench 30 can be better prevented from being broken down.

[0062] The electric field shielding layer 100 can be formed by ion implantation of the epitaxial layer 20 on the bottom and side walls of the source trench 40, or the electric field shielding layer 100 can be grown or deposited in the source trench 40. The conductivity type of the electric field shielding layer 100 is the same as that of the first layer 80. Exemplarily, the electric field shielding layer 100 is a P+ layer, the first layer 80 is a PW layer, and the second layer 90 is an N+ layer. For example, the electric field shielding layer 100 can be formed by P+ ion implantation of the epitaxial layer 20 on the bottom and side walls of the source trench 40.

[0063] The blocking structure 70 can be a trench, a blocking layer, or a trench filled with a blocking material. The specific form of the blocking structure 70 is not specifically limited in this embodiment. Exemplarily, when the blocking structure 70 is a blocking layer, the materials used for the blocking structure 70 can include silicon oxide, silicon nitride, or silicon oxynitride, etc. A trench can be formed in the epitaxial layer 20, and the trench can be filled with materials such as silicon oxide, silicon nitride, or silicon oxynitride to form the blocking structure 70. When the first layer 80 and the second layer 90 are formed by growing or depositing on the epitaxial layer 20, the blocking structure 70 can also be formed by growing or depositing on the epitaxial layer 20. Along the direction from the substrate 10 to the epitaxial layer 20, the height of the blocking structure 70 can be equal to the thickness of the first layer 80 or greater than the thickness of the first layer 80.

[0064] When the epitaxial layer 20 forms the first layer 80, the second layer 90, and the electric field shielding layer 100, after ion implantation, high-temperature annealing is required. During the high-temperature annealing process, the P+ ions in the electric field shielding layer 100 are likely to diffuse into the first layer 80. The blocking structure 70 can be fabricated before the high-temperature annealing process, and the blocking structure 70 blocks the diffusion of the ions in the electric field shielding layer 100 to the channel (the first layer 80) during the high-temperature annealing process.

[0065] The power device provided by the embodiment of the present invention includes: an anode trench 40, a gate trench 30, a first layer 80, and a second layer 90 are provided on the surface of the epitaxial layer 20 away from the substrate 10; an electric field shielding layer 100 is provided in the anode trench 40; a barrier structure 70 is provided between the electric field shielding layer 100 and the first layer 80; by providing the barrier structure 70 to block the diffusion of ions in the electric field shielding layer 100 to the first layer 80, the threshold voltage drift caused by the diffusion of ions to the channel region can be avoided, and the performance of the silicon carbide power device can be improved.

[0066] Optionally, the surface of the barrier structure 70 away from the substrate 10 is flush with the surface of the second layer 90 away from the substrate 10, and the distance between the surface of the barrier structure 70 adjacent to the substrate 10 and the substrate 10 is less than the distance between the bottom surface of the gate trench 30 and the substrate 10.

[0067] Specifically, the ions in the electric field shielding layer 100 may also diffuse to the vicinity of the first layer 80 and the gate trench 30 through the epitaxial layer 20 or the second layer 90. By setting the surface of the barrier structure 70 away from the substrate 10 to be flush with the surface of the second layer 90 away from the substrate 10, and the distance between the surface of the barrier structure 70 adjacent to the substrate 10 and the substrate 10 is less than the distance between the bottom surface of the gate trench 30 and the substrate 10, the barrier structure 70 can completely block the electric field shielding layer 100 facing the first layer 80, the second layer 90, and the gate trench 30, playing a comprehensive blocking role, further avoiding the diffusion of ions to the first layer 80, avoiding affecting the threshold voltage, and at the same time, avoiding the diffusion of ions in the electric field shielding layer 100 to the gate trench 30, avoiding affecting the electric field distribution near the bottom of the gate trench 30, and avoiding breakdown at the bottom of the gate trench 30.

[0068] Optionally, the surface of the barrier structure 70 adjacent to the substrate 10 is located between the bottom surface of the gate trench 3 and the bottom surface of the anode trench 40.

[0069] By setting the surface of the barrier structure 70 adjacent to the substrate 10 to be located between the bottom surface of the gate trench 3 and the bottom surface of the anode trench 40, while ensuring that the barrier structure 70 can better block the ions in the electric field shielding layer 100, the manufacturing process difficulty of the barrier structure 70 can be reduced.

[0070] Exemplarily, the barrier structure 70 can be formed by first fabricating a trench on the epitaxial layer 20 and then filling the trench with a barrier material such as silicon oxide, silicon nitride, or silicon oxynitride. When the depth of the surface of the barrier structure 70 adjacent to the substrate 10 is too deep, a deeper trench needs to be fabricated, and the trench fabrication difficulty is relatively large, and the difficulty of filling materials in the trench is also relatively large. By setting the surface of the barrier structure 70 adjacent to the substrate 10 to be located between the bottom surface of the gate trench 30 and the bottom surface of the anode trench 40, the fabrication difficulty of the trench and the difficulty of filling materials in the trench are both reduced.

[0071] Optionally, the barrier structure 70 covers the surface of the first layer 80 adjacent to the barrier structure 70.

[0072] With such an arrangement, the barrier structure 70 can completely separate the first layer 80 from the electric field shielding layer 100, further preventing ions from diffusing into the first layer 80.

[0073] Exemplarily, the first surface of the first layer 80 adjacent to the barrier structure 70 is rectangular, the second surface of the barrier structure 70 adjacent to the first layer 80 is rectangular, the length of the second surface can be greater than the length of the first surface, and the width of the second surface can be greater than the width of the first surface.

[0074] Optionally, the barrier structure 70 includes a barrier trench 71, or the barrier structure 70 includes a barrier trench 71 and a barrier material 72 filled in the barrier trench 71.

[0075] Specifically, the barrier trench 71 can disconnect the electric field shielding layer 100 from the first layer 80, effectively preventing the material of the electric field shielding layer 100 from diffusing into the first layer 80 during high-temperature annealing.

[0076] In addition, a barrier material 72 can also be filled in the barrier trench 71. The barrier material 72 can continue to block the ion diffusion of the electric field shielding layer 100 after high-temperature annealing, and filling the barrier trench 71 with the barrier material 72 can prevent the barrier trench 71 from affecting the preparation of subsequent structures.

[0077] Figure 2 It is a schematic diagram of another power device provided by an embodiment of the present invention. Optionally, referring to Figure 2 , the gate trench 30 includes a first insulating layer 51 and a gate 61, and the first insulating layer 51 is located between the gate 61 and the epitaxial layer 20;

[0078] A second insulating layer 52 and a trench source 62 are provided in the source trench 40, and the second insulating layer 52 is provided between the trench source 62 and the electric field shielding layer 100

[0079] Along the direction from the electric field shielding layer 100 to the first layer 80, the ratio of the width D of the barrier structure 70 to the thickness of the first insulating layer 51 is less than or equal to 2, and the ratio of the width of the barrier structure 70 to the thickness of the second insulating layer 52 is less than or equal to 2;

[0080] The barrier material 72, the first insulating layer 51, and the second insulating layer 52 are made of the same material.

[0081] Specifically, the barrier material 72 is made of the same material as the first insulating layer 51 and the second insulating layer 52, so that the barrier material 72 can be prepared by the same process as the first insulating layer 51 and the second insulating layer 52. The ratio of the width D of the barrier structure 70 to the thicknesses of the first insulating layer 51 and the second insulating layer 5 is less than or equal to 2, ensuring that when the barrier material 72 is prepared in the same process as the first insulating layer 51 and the second insulating layer 5, the barrier material 72 can fill the barrier trench 71.

[0082] It should be noted that the barrier material 71 may not be prepared in the same process as the first insulating layer 51 and the second insulating layer 5. Exemplarily, the barrier material 72 can be deposited into the barrier trench 71 and other structure surfaces by processes such as deposition, and then the barrier material on other structure surfaces is etched away.

[0083] Optionally, the barrier material 72 includes silicon oxide, silicon nitride, or silicon oxynitride.

[0084] Specifically, the preparation processes of silicon oxide, silicon nitride, and silicon oxynitride are simple, and their insulation and barrier properties are good. While reducing the manufacturing process difficulty of the barrier structure 70, they can better block the ion diffusion of the electric field shielding layer 100 to the first layer 80 and the gate trench 30 after high-temperature annealing.

[0085] Optionally, along the direction from the electric field shielding layer 100 to the first layer 80, the width D of the barrier structure 70 is 0.1 micrometer - 0.3 micrometers.

[0086] Specifically, when the width D of the barrier structure 70 is too small, the formation process difficulty of the barrier structure 70 will increase. When the width D of the barrier structure 70 is too large, it may affect the width of the second layer 90. Since the second layer 90 needs to be electrically connected to the source metal, if the width of the second layer 90 is too small, it is easy to cause poor contact with the source metal. By setting the width D of the barrier structure 70 to be 0.1 micrometer - 0.3 micrometers along the direction from the electric field shielding layer 100 to the first layer 80, while reducing the manufacturing process difficulty of the barrier structure 70, it is possible to avoid affecting the width of the second layer 90, thereby avoiding poor contact between the second layer 90 and the source metal.

[0087] Optionally, the barrier structure 70 is disposed adjacent to the electric field shielding layer 100.

[0088] That is, the barrier structure 70 is in contact with the electric field shielding layer 100. With this setting, the barrier structure 70 can better block the ions of the electric field shielding layer 100. And it enables the first layer 80 and the second layer 90 between the barrier structure 70 and the gate trench 30 to have a larger width, and the channel has a larger width, ensuring that the power device has good conduction performance.

[0089] Optionally, the power device further includes a third insulating layer 110, a source metal 120, and a drain metal 130;

[0090] The third insulating layer 110 is disposed on a side of the epitaxial layer 20 away from the substrate 10, and the third insulating layer 110 covers the gate trench 30; the source metal 120 is disposed on a side of the third insulating layer 110 away from the substrate 10, and the second layer 90 between the source trench 40 and the gate trench 30 is in contact with the source metal 120; the electric field shielding layer 100 is in contact with the source metal 120;

[0091] The drain metal 130 is disposed on a side of the substrate 10 away from the epitaxial layer 20.

[0092] Specifically, when the power device is operating, a gate voltage is applied to the gate 61 in the gate trench 30, a source voltage is applied to the source metal 120, and a drain voltage is applied to the drain metal 130. When the gate voltage and the source voltage meet the conduction condition, the channel between the source metal 120 and the drain metal 130 conducts, and the power device operates normally. The source metal 120, the electric field shielding layer 100, the epitaxial layer 20, and the drain metal 130 form a diode structure. When the voltages on the source metal 120 and the drain metal 130 are reversed, the diode structure conducts, and the channel between the source metal 120 and the drain metal 130 does not conduct, preventing the power device from being damaged by the reverse voltage.

[0093] In addition, referring to Figure 2 , the power device further includes: a passivation layer 140 and a PI layer 150. The passivation layer 130 is disposed on a side of the source metal 120 away from the substrate 10; the PI layer 150 is disposed on a side of the passivation layer 130 away from the substrate 10. The passivation layer 140 can be made of silicon nitride material, and the passivation layer 140 includes an opening where the source metal 100 is exposed.

[0094] Based on the above embodiments, an embodiment of the present invention further provides a power module, including a substrate and the power device according to any embodiment of the present invention, and the substrate is used to carry the power device.

[0095] The power module provided by the technical solution of the embodiment of the present invention has the same beneficial effects as the power device according to any embodiment of the present invention.

[0096] Based on the above embodiments, an embodiment of the present invention further provides a power conversion circuit, which is used for one or more of current conversion, voltage conversion, and power factor correction; the power conversion circuit includes a circuit board and the power device according to any embodiment of the present invention, and the power device is electrically connected to the circuit board.

[0097] The power conversion circuit provided by the technical solution of the embodiment of the present invention has the same beneficial effects as the power device according to any embodiment of the present invention.

[0098] An embodiment of the present invention further provides a vehicle on the basis of the above embodiments, including a load and a power conversion circuit according to any embodiment of the present invention. The power conversion circuit is configured to convert alternating current into direct current, convert alternating current into alternating current, convert direct current into direct current, or convert direct current into alternating current, and then input it to the load.

[0099] The vehicle provided by the technical solution of the embodiment of the present invention has the same beneficial effects as the power device according to any embodiment of the present invention.

[0100] An embodiment of the present invention also provides a method for manufacturing a power device. Figure 3 is a flowchart of a method for manufacturing a power device provided by an embodiment of the present invention. Refer to Figure 3 , the method for manufacturing a power device includes:

[0101] S210. Form an epitaxial layer on one side of the substrate.

[0102] S220. Form a source trench, a gate trench, a first layer, a second layer, an electric field shielding layer, and a barrier structure. Among them, the source trench, the gate trench, the first layer, and the second layer are all disposed on the surface of the epitaxial layer away from the substrate, and the second layer is located on the side of the first layer away from the substrate; the conductivity type of the first layer is different from that of the second layer, and the conductivity type of the second layer is the same as that of the epitaxial layer; the electric field shielding layer is disposed in the source trench, and the first layer and the second layer are located between the electric field shielding layer and the gate trench; the barrier structure is disposed between the electric field shielding layer and the first layer, and the barrier structure is used to block the diffusion of ions in the electric field shielding layer to the first layer.

[0103] In the method for manufacturing a power device provided by an embodiment of the present invention, the source trench, the gate trench, the first layer, and the second layer are all disposed on the surface of the epitaxial layer away from the substrate, the second layer is located on the side of the first layer away from the substrate, and the first layer and the second layer are located between the electric field shielding layer and the gate trench; the electric field shielding layer is disposed in the source trench; the barrier structure is disposed between the electric field shielding layer and the first layer. By setting the barrier structure to block the diffusion of ions in the electric field shielding layer to the first layer, it is possible to avoid the threshold voltage drift caused by the diffusion of ions to the channel region and improve the performance of the silicon carbide power device.

[0104] Based on the above embodiment, the manufacturing method of the power device in this embodiment is optimized. Specifically, S210 is optimized as follows: forming a first conductivity type layer and a second conductivity type layer; wherein, the second conductivity type layer is disposed on a side of the first conductivity type layer away from the substrate; forming a source trench; forming an electric field shielding layer in the source trench; forming a gate trench; wherein, the remaining second conductivity type layer and the second conductivity type layer after forming the gate trench are located between the electric field shielding layer and the gate trench; forming a barrier trench, a first layer and a second layer; wherein, the remaining first conductivity type layer after forming the barrier trench is the first layer, and the remaining second conductivity type layer after forming the barrier trench is the second layer, and the barrier trench is disposed between the electric field shielding layer and the first layer; performing a high-temperature annealing treatment; filling a barrier material in the barrier trench to form a barrier structure.

[0105] Figure 4 is a flowchart of another manufacturing method of a power device provided by an embodiment of the present invention. Refer to Figure 4 , the optimized manufacturing method of the power device includes:

[0106] S210. Form an epitaxial layer on one side of the substrate.

[0107] S221. Form a first conductivity type layer and a second conductivity type layer; wherein, the second conductivity type layer is disposed on a side of the first conductivity type layer away from the substrate.

[0108] Figure 5 is a schematic diagram of forming a first conductivity type layer and a second conductivity type layer provided by an embodiment of the present invention. Refer to Figure 5 , after forming the epitaxial layer 20, ion implantation can be performed on the epitaxial layer 20 to form a first conductivity type layer 801 and a second conductivity type layer 802, or the first conductivity type layer 801 and the second conductivity type layer 802 can be grown outside the epitaxial layer 20. Exemplarily, PW and N+ ion implantation can be performed on the epitaxial layer 20 to respectively form a first conductivity type layer 801 and a second conductivity type layer 802.

[0109] S222. Form a source trench.

[0110] Figure 6 is a schematic diagram after forming the source trench provided by an embodiment of the present invention. Refer to Figure 6 , processes such as dry etching and wet etching can be used to etch other regions of the first conductivity type layer 801, the second conductivity type layer 802, and the epitaxial layer 20 to form a source trench 40.

[0111] S223. Perform ion implantation on the epitaxial layer in the source trench to form an electric field shielding region.

[0112] Figure 7This is a schematic diagram after forming an electric field shielding layer provided by an embodiment of the present invention. Refer to Figure 7 , P+ ion implantation can be performed on the epitaxial layer 20 at the bottom and side walls of the source trench to form the electric field shielding layer 100.

[0113] S224. Form a gate trench; wherein, the remaining first-conductive-type layer and second-conductive-type layer after forming the gate trench are located between the electric field shielding layer and the gate trench.

[0114] Figure 8 This is a schematic diagram after forming a gate trench provided by an embodiment of the present invention. Refer to Figure 8 , dry etching, wet etching and other processes can be used to etch the first-conductive-type layer 801 and second-conductive-type layer 802 between the source trenches 40 and other regions of the epitaxial layer 20 to form the gate trench 30.

[0115] S225. Form a barrier trench, a first layer and a second layer; wherein, the remaining first-conductive-type layer after forming the barrier trench is the first layer, the remaining second-conductive-type layer after forming the barrier trench is the second layer, and the barrier trench is provided between the electric field shielding layer and the first layer.

[0116] Figure 9 This is a schematic diagram after forming a barrier trench provided by an embodiment of the present invention. Refer to Figure 8 and Figure 9 , dry etching, wet etching and other processes can be used to process the first-conductive-type layer 801, second-conductive-type layer 901 and other regions of the epitaxial layer 20 to form the barrier trench 71, the first layer 80 and the second layer 90.

[0117] S226. Perform a high-temperature annealing treatment.

[0118] Specifically, refer to Figure 9 , the high-temperature annealing treatment is performed to activate the implanted ions and restore lattice damage, forming the final first layer 80, second layer 90 and electric field shielding layer 100. The barrier trench 71 can block the ions diffused by the electric field shielding layer 100 during the high-temperature annealing process, preventing the ions from diffusing into the first layer 80 and the gate trench 30.

[0119] S227. Fill a barrier material in the barrier trench to form a barrier structure.

[0120] Figure 10 This is a schematic diagram after forming a barrier structure provided by an embodiment of the present invention. Refer to Figure 10, materials such as silicon oxide, silicon nitride, or silicon oxynitride can be deposited in the barrier trench 71 to form a barrier structure 70. By filling the barrier trench 71 with a barrier material 72, the barrier material 72 can continue to block the ion diffusion of the electric field shielding layer 100 after high-temperature annealing, and can prevent the barrier trench 71 from affecting the preparation of subsequent structures.

[0121] Figure 11 is a schematic diagram after forming an oxide layer provided by an embodiment of the present invention. Refer to Figure 11 , a first insulating layer 51 can be prepared on the sidewalls and bottom of the gate trench 30, and a second insulating layer 52 can be prepared on the sidewalls and bottom of the source trench 40. The first insulating layer 51 and the second insulating layer 52 can be silicon dioxide layers.

[0122] Optionally, when filling the barrier trench with a barrier material to form a barrier structure, it further includes:

[0123] Filling the barrier material in the gate trench and the source trench to form a first insulating layer and a second insulating layer; wherein, along the direction from the electric field shielding layer to the first layer, the ratio of the width of the barrier structure to the thickness of the first insulating layer is less than or equal to 2, and the ratio of the width of the barrier structure to the thickness of the second insulating layer is less than or equal to 2.

[0124] Specifically, the barrier material can be prepared in the same process as the first insulating layer 51 and the second insulating layer 52. Such a setting can save one process.

[0125] In addition, high-temperature annealing can be performed after forming the barrier trench or after forming the barrier material. This embodiment does not make specific limitations.

[0126] In addition, the barrier trench and the barrier material can also be prepared before ion implantation of the epitaxial layer in the source trench. This embodiment does not make specific limitations on the preparation timing of the barrier trench and the barrier material, as long as they are prepared before high-temperature annealing.

[0127] Figure 12 is a schematic diagram after forming a polysilicon layer provided by an embodiment of the present invention. Refer to Figure 12 , doped polysilicon can be deposited on the surfaces of the first insulating layer 51 and the second insulating layer 51, and then etched back to form a gate 61 and a trench source 62. Figure 13 is a schematic diagram after forming a third insulating layer provided by an embodiment of the present invention. Refer to Figure 13 , silicon dioxide can be deposited on the surfaces of the gate trench 40 and the epitaxial layer 20, and then etched to form a third insulating layer 110.

[0128] Refer to Figure 2, after forming the third insulating layer 110, a source metal 120 is formed on a side of the third insulating layer 110 away from the substrate 10, a drain metal 130 is formed on a surface of the substrate 10 away from the epitaxial layer 20, and a passivation layer 140 and a PI layer 150 are formed on a surface of the source metal 120.

[0129] The method for manufacturing a power device according to an embodiment of the present invention and the power device according to any embodiment of the present invention belong to the same inventive concept and have corresponding beneficial effects. For technical details not elaborated in the embodiments of the present invention, refer to the power device described in any embodiment of the present invention.

[0130] It should be understood that various forms of the processes shown above can be used, steps can be reordered, added, or deleted. For example, the steps described in the present invention can be executed in parallel, sequentially, or in a different order, as long as the desired results of the technical solution of the present invention can be achieved, and no limitation is imposed herein.

[0131] The above specific embodiments do not constitute a limitation to the protection scope of the present invention. Those skilled in the art should understand that various modifications, combinations, sub - combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A power device, characterized in that: include: A substrate and an epitaxial layer disposed on one side of the substrate; A source trench, a gate trench, a first layer and a second layer are arranged on a surface of the epitaxial layer away from the substrate; wherein the second layer is located on a side of the first layer away from the substrate, the conductivity type of the first layer is different from the conductivity type of the second layer, and the conductivity type of the second layer is the same as the conductivity type of the epitaxial layer; an electric field shielding layer is arranged in the source trench; the first layer and the second layer are located between the electric field shielding layer and the gate trench; A barrier structure is provided between the electric field shielding layer and the first layer; the barrier structure is used to prevent ions of the electric field shielding layer from diffusing into the first layer.

2. The power device according to claim 1, characterized in that: The surface of the barrier structure away from the substrate is flush with the surface of the second layer away from the substrate, and the distance between the surface of the barrier structure adjacent to the substrate and the substrate is smaller than the distance between the bottom surface of the gate trench and the substrate.

3. The power device according to claim 2, characterized in that: The barrier structure covers a surface of the first layer adjacent to the barrier structure.

4. The power device according to claim 1, characterized in that: The barrier structure includes a barrier groove, or the barrier structure includes a barrier groove and a barrier material filled in the barrier groove.

5. The power device according to claim 4, characterized in that: A first insulating layer and a gate are disposed in the gate trench, and the first insulating layer is located between the gate and the epitaxial layer; A second insulating layer and a trench source are arranged in the source trench, and the second insulating layer is arranged between the trench source and the electric field shielding layer; Along the direction from the electric field shielding layer to the first layer, the ratio of the width of the blocking structure to the thickness of the first insulating layer is less than or equal to 2, and the ratio of the width of the blocking structure to the thickness of the second insulating layer is less than or equal to 2; The barrier material, the first insulating layer and the second insulating layer are made of the same material.

6. The power device according to claim 4, characterized in that: The barrier material includes silicon oxide, silicon nitride or silicon oxynitride.

7. The power device according to claim 1, characterized in that: Along the direction from the electric field shielding layer to the first layer, the width of the barrier structure is 0.1 micrometer to 0.3 micrometer.

8. The power device according to claim 1, characterized in that: The blocking structure is arranged adjacent to the electric field shielding layer.

9. The power device according to claim 1, characterized in that: The power device further comprises a third insulating layer, a source metal and a drain metal; The third insulating layer is arranged on a side of the epitaxial layer away from the substrate, and the third insulating layer covers the gate trench; the source metal is arranged on a side of the third insulating layer away from the substrate, and the second layer between the source trench and the gate trench is in contact with the source metal; The electric field shielding layer is in contact with the source metal; The drain metal is arranged on a side of the substrate away from the epitaxial layer.

10. A power module, characterized in that: It comprises a substrate and at least one power device according to any one of claims 1 to 9, wherein the substrate is used to support the power device.

11. A power conversion circuit, characterized in that: The power conversion circuit is used for one or more of current conversion, voltage conversion, and power factor correction; The power conversion circuit comprises a circuit board and at least one power device according to any one of claims 1 to 9, wherein the power device is electrically connected to the circuit board.

12. A vehicle, characterized in that: It includes a load and a power conversion circuit as claimed in claim 11, wherein the power conversion circuit is used to convert AC power into DC power, convert AC power into AC power, convert DC power into DC power, or convert DC power into AC power and then input it into the load.

13. A method for manufacturing a power device, characterized in that: include: forming an epitaxial layer on one side of the substrate; A source trench, a gate trench, a first layer, a second layer, an electric field shielding layer and a barrier structure are formed; wherein the source trench, the gate trench, the first layer and the second layer are all arranged on the surface of the epitaxial layer away from the substrate, and the second layer is located on the side of the first layer away from the substrate; the conductivity type of the first layer is different from the conductivity type of the second layer, and the conductivity type of the second layer is the same as the conductivity type of the epitaxial layer; the electric field shielding layer is arranged in the source trench, and the first layer and the second layer are located between the electric field shielding layer and the gate trench; The barrier structure is disposed between the electric field shielding layer and the first layer, and is used to block ions of the electric field shielding layer from diffusing into the first layer.

14. The method for manufacturing a power device according to claim 13, characterized in that: Forming a source trench, a gate trench, a first layer, a second layer, an electric field shielding layer and a barrier structure, including: Forming a first conductive type layer and a second conductive type layer; wherein the second conductive type layer is disposed on a side of the first conductive type layer away from the substrate; forming the source trench; Performing ion implantation on the epitaxial layer in the source trench to form an electric field shielding region; forming the gate trench; wherein the first conductive type layer and the second conductive type layer remaining after forming the gate trench are located between the electric field shielding layer and the gate trench; forming a blocking groove, the first layer and the second layer; wherein the first conductive type layer remaining after forming the blocking groove is the first layer, the second conductive type layer remaining after forming the blocking groove is the second layer, and the blocking groove is arranged between the electric field shielding layer and the first layer; Perform high temperature annealing treatment; The barrier groove is filled with a barrier material to form a barrier structure.

15. The method for manufacturing a power device according to claim 14, characterized in that: The barrier material is filled in the barrier groove to form a barrier structure, and the method further comprises: A barrier material is filled in the gate trench and the source trench to form a first insulating layer and a second insulating layer; wherein the first insulating layer is located in the gate trench, the second insulating layer is located in the source trench, and along the direction of the electric field shielding layer pointing to the first layer, the ratio of the width of the barrier structure to the thickness of the first insulating layer is less than or equal to 2, and the ratio of the width of the barrier structure to the thickness of the second insulating layer is less than or equal to 2.

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