A method for manufacturing an embedded circuit board and the embedded circuit board.

Abstract

This invention discloses a manufacturing method and an embedded circuit board in the field of circuit board technology. It aims to solve the problem that existing technologies use single-type chips, which cannot economically meet the diverse needs arising from subsequent power increases. Furthermore, with increasing demands for semiconductor performance, chip sizes are becoming smaller, making it difficult to directly embed bare chips into circuit boards, thus affecting the actual processing of the circuit board. This invention provides a method for simultaneously embedding multiple packaged devices in product development, enabling the possibility of hybrid power module packaging, thereby precisely meeting different power requirements and achieving packaging economy. This invention pre-embeds the bare chip in a first prepreg and processes it to obtain device one. Embedding device one achieves the embedding of the bare chip, reducing the impact of excessively small bare chip size on the actual processing of the circuit board and ensuring the practicality of the circuit board.

Description

Technical Field

[0001] This invention relates to a method for manufacturing an embedded circuit board and the embedded circuit board itself, belonging to the field of circuit board technology. Background Technology

[0002] As new energy vehicles increasingly utilize high-power motors, DC motors require faster inverter switching frequencies. This places higher demands on the inductance effect and heat dissipation of components. Currently, higher-performance silicon carbide and gallium nitride devices are being used, but adding even one more high-performance device exceeds product requirements, while removing one fails to meet them. To better meet product needs and reasonably control costs, different types of power devices have been developed to ensure both performance requirements are met and costs are controlled. With the increasing demands for range in new energy vehicles, the conversion efficiency of traction inverters has become a key factor driving improvement. Currently, the mainstream IGBTs in traction inverters use common power semiconductor packaging. This packaging method increases the weight of the unit and occupies space; furthermore, various bonding processes increase parasitic inductance, affecting the inverter's conversion efficiency. Embedded circuit boards effectively solve this problem by embedding the power semiconductor within the circuit board and using blind vias to connect to the chip's source and drain.

[0003] Currently, the power of motors in new energy vehicles is increasing, and the power of their corresponding inverters is also increasing, as is the variety of chips. However, the chips currently in use are single-type chips, such as 80V or 1200V, which cannot economically meet the different needs arising from the subsequent power increase. As the demand for semiconductor performance increases, the chip size is getting smaller and smaller, and it is difficult to directly embed bare chips into circuit boards, affecting the actual processing of circuit boards. Summary of the Invention

[0004] The purpose of this invention is to overcome the shortcomings of the prior art and provide a manufacturing method and embedded circuit board for embedded circuit boards. This solves the problem that the chips currently used are of a single type, which cannot economically meet the different needs arising from subsequent power increases. As the demand for semiconductor performance increases, chip sizes are getting smaller and smaller, and it is difficult to directly embed bare chips into circuit boards, which affects the actual processing of circuit boards.

[0005] To solve the above-mentioned technical problems, the present invention is implemented using the following technical solution:

[0006] In a first aspect, the present invention provides a method for manufacturing an embedded circuit board, comprising the following steps:

[0007] A first prepreg is formed, and a plurality of first through slots for placing bare chips are formed on the first prepreg, and the bare chips are placed in the first through slots;

[0008] The first copper foil, the first thin prepreg, and the first prepreg are stacked and then pressed together to obtain the substrate.

[0009] Blind vias are fabricated on the substrate to ensure precise connection between the second blind via and the pads of the bare chip;

[0010] Electroplating and pattern etching are performed on the substrate after blind via processing;

[0011] The substrate after electroplating and pattern etching is cut to obtain multiple devices of fixed size with bare chips embedded in them.

[0012] A second semi-cured sheet with multiple second through slots is formed, a core plate with multiple fourth through slots is formed, and the core plate also has multiple third through slots for placing device one.

[0013] A second semi-cured sheet with multiple second through slots is stacked with two core boards, each with multiple fourth through slots and multiple third through slots. The positions of the second through slots and the fourth through slots are aligned. The second through slots and the corresponding two fourth through slots form a cavity for placing device two. Device two is placed in the cavity, and device one is placed in the third through slot to obtain an assembly board.

[0014] The second copper foil, the second thin prepreg, and the assembly board are stacked and pressed together to obtain the finished board.

[0015] Blind holes and through holes are machined on the finished board, and electroplating is performed on the finished board so that each component 1 and component 2 are connected in parallel to obtain an embedded circuit board.

[0016] Furthermore, the step of stacking and pressing the first copper foil, the first thin prepreg, and the first prepreg together specifically includes:

[0017] The first copper foil, the first thin prepreg, the first prepreg, the first thin prepreg, and the first copper foil are aligned and placed sequentially from bottom to top, and then pressed together.

[0018] Furthermore, the blind via processing of the substrate specifically includes:

[0019] Trim the substrate to the preset dimensions;

[0020] The four vertices of the bare chip are used as initial target points. After the initial target points are captured by the target point machine, multiple alignment holes are drilled on the substrate.

[0021] The laser machine uses multiple alignment holes as reference points to process blind holes on the substrate.

[0022] Furthermore, the step of stacking and pressing the second copper foil, the second thin prepreg, and the assembly board together specifically includes:

[0023] The second copper foil, the second thin prepreg, the core board, the second prepreg, the core board, the second thin prepreg, and the second copper foil are aligned and placed sequentially from bottom to top, and then pressed together.

[0024] Furthermore, the method for obtaining the embedded circuit board further includes:

[0025] A third thin prepreg and a third copper foil are placed sequentially on the outer wall of the embedded circuit board away from the first device, and then pressed together. Blind holes are processed and electroplated on the third thin prepreg and the third copper foil so that the placed third copper foil is connected to the embedded circuit board.

[0026] Furthermore, the method for obtaining the embedded circuit board further includes:

[0027] A thermally conductive prepreg is placed on the outer wall of the embedded circuit board near the device, and then the boards are pressed together.

[0028] Furthermore, the outer wall of the thermally conductive semi-cured sheet, away from the embedded circuit board, is connected to an insulating high thermal conductivity ceramic plate via a high-temperature solder layer.

[0029] Furthermore, the outer wall of the insulating high thermal conductivity ceramic plate is connected to the heat sink on the side away from the thermally conductive semi-cured sheet via a high-temperature solder layer.

[0030] Secondly, the present invention provides an embedded circuit board, including a second prepreg, with core plates on both the upper and lower sides of the outer wall of the second prepreg, and second thin prepregs on both the upper and lower sides of the outer wall of the core plates. Second copper foils are provided on both the upper and lower sides of the second thin prepregs. Multiple devices are disposed within one of the core plates. When the second prepreg is pressed together with two core plates, multiple cavities are formed for placing devices. The devices are disposed within the cavities. Multiple blind holes are formed within the second thin prepreg, and through holes are formed between adjacent devices and devices. The through holes penetrate two core plates, two second thin prepregs, and two second copper foils. Both the blind holes and the through holes are filled with a dielectric material.

[0031] Furthermore, a third thin prepreg is provided on the outer wall of the second copper foil on the side away from the first device. A third copper foil is provided on the outer wall of the third thin prepreg on the side away from the second copper foil. The third thin prepreg and the third copper foil are provided with a plurality of openings, and the openings are filled with a medium.

[0032] Compared with the prior art, the beneficial effects achieved by the present invention are as follows:

[0033] This embedded circuit board manufacturing method provides an approach to simultaneously embedding multiple packaged devices into product development, enabling the possibility of hybrid power module packaging, thereby precisely meeting the needs of different power levels and achieving packaging economy. The present invention pre-embeds a bare chip in a first semi-cured wafer and processes it to obtain device one. By embedding device one, the bare chip embedding work is realized, reducing the impact of excessively small bare chip size on the actual processing of the circuit board and ensuring the practicality of the circuit board. Attached Figure Description

[0034] Figure 1 This is a front cross-sectional view of an embedded circuit board according to an embodiment of the present invention;

[0035] Figure 2 yes Figure 1 Enlarged schematic diagram;

[0036] Figure 3 This is a schematic front cross-sectional view of the first prepreg provided according to an embodiment of the present invention;

[0037] Figure 4 This is a schematic front cross-sectional view of a substrate provided according to an embodiment of the present invention;

[0038] Figure 5 This is a top view of the substrate structure after drilling positioning holes according to an embodiment of the present invention;

[0039] Figure 6 This is a top view of the substrate after blind hole processing according to an embodiment of the present invention;

[0040] Figure 7 This is a schematic front cross-sectional view of a substrate after blind via processing, according to an embodiment of the present invention.

[0041] Figure 8 This is a top view of the substrate structure after electroplating and pattern etching according to an embodiment of the present invention.

[0042] Figure 9 This is a front cross-sectional view of the substrate after electroplating and pattern etching according to an embodiment of the present invention;

[0043] Figure 10 This is a top view of the structure of device one provided according to an embodiment of the present invention;

[0044] Figure 11 This is a top view of the structure of the second prepreg provided according to an embodiment of the present invention;

[0045] Figure 12 This is a top view of the core board structure provided according to an embodiment of the present invention;

[0046] Figure 13This is a top view of the assembly plate provided according to an embodiment of the present invention;

[0047] Figure 14 This is a schematic front cross-sectional view of an assembly plate provided according to an embodiment of the present invention;

[0048] Figure 15 This is a schematic front cross-sectional view of the finished plate provided according to an embodiment of the present invention;

[0049] Figure 16 This is a front cross-sectional view of an embedded circuit board after mounting an insulating high thermal conductivity ceramic plate, according to an embodiment of the present invention.

[0050] Figure 17 This is a front cross-sectional view of an embedded circuit board after a heat sink has been installed, according to an embodiment of the present invention.

[0051] In the diagram: 1. First through-slot; 2. First prepreg; 3. First thin prepreg; 4. Bare chip; 5. First copper foil; 6. Alignment hole; 7. Vertex; 8. Second blind via; 9. Device 1; 10. Electroplating material; 11. Cured chip; 12. Source; 13. Gate; 14. Drain; 15. Second through-slot; 16. Core board; 17. Device 2; 18. Pre-set chip; 19. Blind via; 20. Thermally conductive prepreg; 21. Through hole; 22. High-temperature solder layer; 23. Insulating high thermal conductivity ceramic plate; 24. Heat sink; 25. Second prepreg; 26. Fourth through-slot; 27. Third through-slot; 28. Second copper foil; 29. ​​Second thin prepreg; 30. Third thin prepreg; 31. Third copper foil; 32. Opening. Detailed Implementation

[0052] The present invention will be further described below with reference to the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solution of the present invention, and should not be used to limit the scope of protection of the present invention.

[0053] In the description of this invention, it should be understood that the terms "center," "longitudinal," "lateral," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicating orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, are used only for the convenience of describing the invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the invention. Furthermore, the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined with "first," "second," etc., may explicitly or implicitly include one or more of that feature. In the description of this invention, unless otherwise stated, "a plurality of" means two or more.

[0054] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art will understand the specific meaning of the above terms in this invention based on the specific circumstances. Example 1:

[0055] This invention provides a method for manufacturing an embedded circuit board, comprising the following steps:

[0056] like Figure 3 As shown, a first semi-cured sheet 2 is formed, and a plurality of first through slots 1 for placing bare chips 4 are formed on the first semi-cured sheet 2, and the bare chips 4 are placed in the first through slots 1;

[0057] like Figure 4 As shown, the first copper foil 5, the first thin prepreg 3 and the first prepreg 2 are stacked and then pressed together to obtain the substrate;

[0058] like Figure 5-6 As shown, blind vias are fabricated on the substrate to ensure precise connection between the second blind via 8 and the pads of the bare chip 4.

[0059] like Figure 7-9 As shown, the substrate after blind via processing is electroplated and patterned.

[0060] like Figure 10 As shown, the substrate after electroplating and pattern etching is cut to obtain multiple devices 9 with fixed sizes and pre-embedded bare chips 4;

[0061] like Figure 11-12 As shown, a second semi-cured sheet 25 with multiple second through slots 15 is formed, a core plate 16 with multiple fourth through slots 26 is formed, and a core plate 16 with multiple third through slots 27 for placing device 9 is also formed.

[0062] like Figure 13-14 As shown, a second semi-cured sheet 25 with multiple second through slots 15 is stacked with two core boards 16 each with multiple fourth through slots 26 and multiple third through slots 27. The positions of the second through slots 15 and the fourth through slots 26 are aligned. The second through slots 15 and the corresponding two fourth through slots 26 form a cavity for placing the second device 17. The second device 17 is placed in the cavity, and the first device 9 is placed in the third through slot 27 to obtain the assembly board.

[0063] like Figure 15 As shown, the second copper foil 28, the second thin prepreg 29 and the assembly board are stacked and pressed together to obtain the finished board;

[0064] like Figure 1-2 As shown, blind holes and through holes are processed on the finished board, and electroplating is performed on the finished board so that each component 9 and component 17 are connected in parallel to obtain an embedded circuit board.

[0065] Optionally, device 19 includes a gate 13, a source 12, and a drain 14, and a second prepreg 25 of a specified thickness is formed. This forming size allows different types of power modules or chips to be embedded in the heat-fused second prepreg 25. Device 217 includes a copper lead frame and a preset chip 18 disposed on the copper lead frame. When blind vias are processed on the substrate, a second blind via 8 is obtained. After the first prepreg 2 is fixed, a cured sheet 11 is obtained. After electroplating and pattern etching on the substrate, an etched pattern and an electroplating material 10 are obtained. The electroplating material 10 is located in the second blind via 8 and on one side of the cured sheet 11, and has conductivity.

[0066] In one embodiment, the pressing of the first copper foil 5, the first thin prepreg 3, and the first prepreg 2 after stacking specifically includes:

[0067] The first copper foil 5, the first thin prepreg 3, the first prepreg 2, the first thin prepreg 3 and the first copper foil 5 are placed in alignment from bottom to top, and then pressed together.

[0068] like Figure 5-6 As shown, in one embodiment, the blind via processing of the substrate specifically includes:

[0069] Trim the substrate to the preset dimensions;

[0070] The four vertices 7 of the bare chip are used as initial target points. After the initial target points are captured by the target point machine, multiple alignment holes 6 are drilled on the substrate.

[0071] The laser machine uses multiple alignment holes 6 as reference points to perform blind hole processing on the substrate.

[0072] Optionally, the target machine is an X-ray.

[0073] like Figure 15 As shown, in one embodiment, the pressing of the second copper foil 28, the second thin prepreg 29, and the assembly board after stacking specifically includes:

[0074] The second copper foil 28, the second thin prepreg 29, the core board 16, the second prepreg 25, the core board 16, the second thin prepreg 29, and the second copper foil 28 are aligned and placed from bottom to top, and then pressed together.

[0075] Specifically, using the HDI process, the embedded circuit board is connected to the outer layer through blind via 19 and through via 21.

[0076] like Figure 1-2 As shown, in one embodiment, obtaining the embedded circuit board further includes:

[0077] A third thin prepreg 30 and a third copper foil 31 are placed sequentially on the outer wall of the embedded circuit board away from device 9, and then pressed together. Blind holes are processed and electroplated on the third thin prepreg 30 and the third copper foil 31 so that the placed third copper foil 31 is connected to the embedded circuit board.

[0078] like Figure 16-17 As shown, in one embodiment, obtaining the embedded circuit board further includes:

[0079] A thermally conductive prepreg 20 is placed on the outer wall of the embedded circuit board near the device 9, and then pressed together. The outer wall of the thermally conductive prepreg 20 away from the embedded circuit board is connected to the insulating high thermal conductivity ceramic plate 23 through a high temperature solder layer 22. The outer wall of the insulating high thermal conductivity ceramic plate 23 away from the thermally conductive prepreg 20 is connected to the heat sink 24 through a high temperature solder layer 22.

[0080] Specifically, the high-temperature solder layer 22 uses a high thermal conductivity solder, and the embedded circuit board and the insulating high thermal conductivity ceramic plate 23 (Si / C / Al / N elements, etc.) are connected by welding to ensure a continuous external heat dissipation channel.

[0081] The invention provides a concept for simultaneously embedding multiple packaged devices into product development, enabling the possibility of hybrid power module packaging, thereby precisely meeting the needs of different power levels and achieving packaging economy. The invention pre-embeds the bare chip 4 into the first semi-cured wafer 2 and processes it to obtain device 9. By embedding device 9, the embedding of the bare chip 4 is achieved, reducing the impact of the small size of the bare chip 4 on the actual processing of the circuit board and ensuring the practicality of the circuit board. Example 2:

[0082] This invention provides an embedded circuit board, including a second prepreg 25. Core boards 16 are provided on both the upper and lower sides of the outer wall of the second prepreg 25. Second thin prepregs 29 are provided on both the upper and lower sides of the outer wall of the core board 16. Second copper foils 28 are provided on both the upper and lower sides of the second thin prepregs 29. Multiple devices 9 are disposed within one of the core boards 16. When the second prepreg 25 is pressed together with two core boards 16, multiple cavities are formed for placing devices 17. Devices 17 are disposed within the cavities. Multiple blind holes 19 are formed within the second thin prepreg 29. Through holes 21 are formed within the second prepreg 25 between adjacent devices 9 and devices 17. The through holes 21 penetrate two core boards 16, two second thin prepregs 29, and two second copper foils 28. Both the blind holes 19 and the through holes 21 are filled with a dielectric material.

[0083] In one embodiment, a third thin prepreg 30 is provided on the outer wall of the second copper foil 28 on the side away from the device 9. A third copper foil 31 is provided on the outer wall of the third thin prepreg 30 on the side away from the second copper foil 28. A plurality of openings 32 are provided in the third thin prepreg 30 and the third copper foil 31. The openings 32 are filled with a medium, which is optionally copper.

[0084] The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the technical principles of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A method for manufacturing an embedded circuit board, characterized in that, Includes the following steps: A first prepreg is formed, and a plurality of first through slots for placing bare chips are formed on the first prepreg, and the bare chips are placed in the first through slots; The first copper foil, the first thin prepreg, and the first prepreg are stacked and then pressed together to obtain the substrate. Blind vias are fabricated on the substrate to ensure precise connection between the second blind via and the pads of the bare chip; Electroplating and pattern etching are performed on the substrate after blind via processing; The substrate after electroplating and pattern etching is cut to obtain multiple devices of fixed size with bare chips embedded in them. A second semi-cured sheet with multiple second through slots is formed, a core plate with multiple fourth through slots is formed, and the core plate also has multiple third through slots for placing device one. A second semi-cured sheet with multiple second through slots is stacked with two core boards, each with multiple fourth through slots and multiple third through slots. The positions of the second through slots and the fourth through slots are aligned. The second through slots and the corresponding two fourth through slots form a cavity for placing device two. Device two is placed in the cavity, and device one is placed in the third through slot to obtain an assembly board. The second copper foil, the second thin prepreg, and the assembly board are stacked and pressed together to obtain the finished board. Blind holes and through holes are machined on the finished board, and electroplating is performed on the finished board so that each component 1 and component 2 are connected in parallel to obtain an embedded circuit board.

2. The method for manufacturing an embedded circuit board according to claim 1, characterized in that, The step of stacking and pressing the first copper foil, the first thin prepreg, and the first prepreg together specifically includes: The first copper foil, the first thin prepreg, the first prepreg, the first thin prepreg, and the first copper foil are aligned and placed sequentially from bottom to top, and then pressed together.

3. The method for manufacturing an embedded circuit board according to claim 1, characterized in that, The blind via fabrication of the substrate specifically includes: Trim the substrate to the preset dimensions; The four vertices of the bare chip are used as initial target points. After the initial target points are captured by the target point machine, multiple alignment holes are drilled on the substrate. The laser machine uses multiple alignment holes as reference points to process blind holes on the substrate.

4. The method for manufacturing an embedded circuit board according to claim 1, characterized in that, The process of stacking and pressing the second copper foil, the second thin prepreg, and the assembly board specifically includes: The second copper foil, the second thin prepreg, the core board, the second prepreg, the core board, the second thin prepreg, and the second copper foil are aligned and placed sequentially from bottom to top, and then pressed together.

5. The method for manufacturing an embedded circuit board according to claim 1, characterized in that, The method for obtaining the embedded circuit board further includes: A third thin prepreg and a third copper foil are placed sequentially on the outer wall of the embedded circuit board away from the first device, and then pressed together. Blind holes are processed and electroplated on the third thin prepreg and the third copper foil so that the placed third copper foil is connected to the embedded circuit board.

6. The method for manufacturing an embedded circuit board according to claim 5, characterized in that, The method for obtaining the embedded circuit board further includes: A thermally conductive prepreg is placed on the outer wall of the embedded circuit board near the device, and then the boards are pressed together.

7. The method for manufacturing an embedded circuit board according to claim 6, characterized in that, The outer wall of the thermally conductive semi-cured sheet, away from the embedded circuit board, is connected to an insulating high thermal conductivity ceramic plate via a high-temperature solder layer.

8. The method for manufacturing an embedded circuit board according to claim 7, characterized in that, The outer wall of the insulating high thermal conductivity ceramic plate is connected to the heat sink on the side away from the thermally conductive semi-cured sheet via a high-temperature solder layer.

9. An embedded circuit board, based on the manufacturing method of the embedded circuit board according to claim 1, characterized in that, The device includes a second prepreg, with core plates on both the upper and lower sides of the outer wall of the second prepreg. Second thin prepregs are also provided on both the upper and lower sides of the outer wall of the core plates. Second copper foils are provided on both the upper and lower sides of the second thin prepregs. Multiple devices are disposed within one of the core plates. When the second prepreg is pressed together with two core plates, multiple cavities are formed for placing devices. Devices are disposed within these cavities. Multiple blind holes are formed within the second thin prepreg. Through holes are formed between adjacent devices and devices, penetrating two core plates, two second thin prepregs, and two second copper foils. Both the blind holes and the through holes are filled with a medium.

10. The embedded circuit board according to claim 9, characterized in that, A third thin semi-cured sheet is provided on the outer wall of the second copper foil on the side away from the device. A third copper foil is provided on the outer wall of the third thin semi-cured sheet on the side away from the second copper foil. The third thin semi-cured sheet and the third copper foil are provided with a plurality of openings, and the openings are filled with a medium.

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