Display panel and manufacturing method thereof, and display device
By adopting a stacked conductive layer structure and passivation layer design in the OLED display panel, the problem of easy oxidation of copper traces is solved, the stability and production yield are improved, and the cost is reduced.
Patent Information
- Application Number
- CN202411173496.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-23
- Publication Date
- 2025-09-16
- Estimated Expiration
- 2044-08-23
Smart Images

Figure CN119053199B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of display technology, and in particular to a display panel and a manufacturing method thereof, and a display device. Background Art
[0002] In the prior art, organic light emitting diode (OLED) display panels use copper (Cu) traces as the gate, source, and drain electrodes of transistor devices, peripheral traces, and bonding pads to reduce trace impedance. However, due to the poor stability of copper and its easy oxidation when exposed to the external environment, it cannot be directly used as the bonding pad of the bonding area.
[0003] Currently, molybdenum-titanium alloy (Mo-Ti) is commonly used to cover the copper in the bonding area, or a three-layer metal structure (Mo-Ti / Cu / Mo-Ti, or Mo-Ti / Cu / ITO) is used to improve the stability of the pad. However, on high-generation panel lines G6 and above, there is a risk of arc discharge when metal oxides (such as indium tin oxide) are deposited on large areas of metal copper, which may cause uneven sputtering, substrate damage and equipment downtime, thereby reducing the yield. In addition, indium tin oxide deposited on copper easily forms a large grain structure, and additional processes are required to remove this structure, resulting in increased production costs and reduced product yield. Summary of the Invention
[0004] The embodiments of the present application provide a display panel and a manufacturing method thereof, and a display device to alleviate the deficiencies in the related art.
[0005] To achieve the above functions, the technical solutions provided in the embodiments of the present application are as follows:
[0006] An embodiment of the present application provides a display panel, comprising a display area and a non-display area disposed on at least one side of the display area; the display panel comprises:
[0007] substrate;
[0008] a first conductive layer disposed on one side of the substrate, the first conductive layer including a conductive portion located in the non-display area, the conductive portion including a first sublayer and a second sublayer stacked together, the second sublayer being disposed on a side of the first sublayer away from the substrate, the second sublayer having an oxidation rate lower than that of the first sublayer;
[0009] a passivation layer, disposed on a side of the first conductive layer away from the substrate, the passivation layer being provided with an opening corresponding to the conductive portion, the opening exposing a portion of the second sub-layer;
[0010] The first sub-layer includes a first sidewall and a second sidewall opposite to each other, and the second sub-layer covers at least one of the first sidewall and the second sidewall.
[0011] Optionally, in one embodiment, the first sub-layer includes an upper surface located between the first sidewall and the second sidewall, and the upper surface is provided on a side of the first sub-layer away from the substrate;
[0012] The second sub-layer includes a first portion and a second portion connected to the first portion, the first portion is provided on the upper surface of the first sub-layer, and the second portion covers one of the first sidewall and the second sidewall;
[0013] The orthographic projection of the first portion on the substrate does not overlap with the orthographic projection of the other of the first sidewall and the second sidewall on the substrate.
[0014] Optionally, in one embodiment, the conductive portion further includes a third sublayer, which is provided on a side of the first sublayer close to the substrate, and an orthographic projection of the third sublayer on the substrate covers an orthographic projection of the first sublayer on the substrate.
[0015] Optionally, in one embodiment, the opening includes a first opening and a second opening, and a size of the opening gradually increases from the first opening to the second opening;
[0016] The second portion covers the first side wall, and the first opening is close to an edge of the second side wall, and has a first preset distance from an edge of the third sub-layer close to the second side wall.
[0017] Optionally, in one embodiment, the pattern of the third sub-layer is the same as the pattern of the first sub-layer.
[0018] Optionally, in one embodiment, the display panel further includes an insulating layer, wherein the insulating layer is provided between the substrate and the first conductive layer;
[0019] The second sub-layer further includes a third portion connected to the second portion, wherein the third portion is located on a side of the second portion away from the first portion;
[0020] The second portion covers the first sidewall and a side of the third sublayer close to the first sidewall, the third portion extends from the second portion to a side away from the first sidewall, and the third portion contacts the insulating layer.
[0021] Optionally, in one embodiment, the second sublayer further includes a fourth part connected to the first part, and the fourth part is located on a side of the first part away from the second part; wherein, the second part covers the first side wall, and the fourth part extends from the first part to a side close to the second side wall, and the fourth part covers the second side wall.
[0022] Optionally, in one embodiment, the material of the first sub-layer is a metal material, and the material of the second sub-layer is a metal oxide material.
[0023] An embodiment of the present application further provides a method for manufacturing a display panel, wherein the display panel includes a display area and a non-display area provided on at least one side of the display area. The method for manufacturing the display panel includes:
[0024] providing a substrate;
[0025] forming a first conductive material layer on the substrate, and patterning the first conductive material layer using a first photomask to form a first sublayer located in the non-display area;
[0026] forming a second conductive material layer on the substrate, and patterning the second conductive material layer using the first photomask to form a second sublayer located in the non-display area;
[0027] forming a passivation layer on a side of the second sub-layer away from the first sub-layer, and openings corresponding to the second sub-layer are formed in the passivation layer, wherein the openings expose a portion of the second sub-layer;
[0028] The stability of the second sublayer is greater than that of the first sublayer, the first sublayer includes a first sidewall and a second sidewall opposite to each other, and the second sublayer covers at least one of the first sidewall and the second sidewall.
[0029] An embodiment of the present application provides a display device, which includes any of the display panels described above.
[0030] Beneficial effects of the embodiments of the present application: The embodiments of the present application provide a display panel, a manufacturing method thereof, and a display device, wherein the display panel includes a stacked substrate, a first conductive layer, and a passivation layer, the first conductive layer including a conductive portion located in the non-display area, the conductive portion including a stacked first sublayer and a second sublayer, the second sublayer being located on a side of the first sublayer away from the substrate, the oxidation rate of the second sublayer being lower than the oxidation rate of the first sublayer; an opening corresponding to the conductive portion is provided on the passivation layer, the opening exposing a portion of the second sublayer; the first sublayer includes a first side wall and a second side wall opposite to each other, the second sublayer covering at least one of the first side wall and the second side wall, thereby avoiding oxidation that may be caused by exposure of the first sublayer, affecting the electrical properties of the conductive portion; at the same time, during the display panel manufacturing process, the first sublayer can be prevented from being corroded by the etching solution, thereby improving the stability of the conductive portion. BRIEF DESCRIPTION OF THE DRAWINGS
[0031] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.
[0032] Figure 1 A schematic diagram of the first structure of the display panel provided in an embodiment of the present application;
[0033] Figure 2 A schematic structural diagram of a conductive portion provided in an embodiment of the present application;
[0034] Figure 3 For the embodiment of this application Figure 1 A magnified schematic diagram of the corresponding area A;
[0035] Figure 4 A schematic diagram of a second structure of a display panel provided in an embodiment of the present application;
[0036] Figure 5 A flowchart of a method for manufacturing a display panel provided in an embodiment of the present application;
[0037] Figures 6A to 6G for Figure 5 A process flow chart showing a method for manufacturing a panel is shown in FIG.
[0038] Figure 7 It is a structural diagram of a display panel in the related art;
[0039] Figure 8 for Figure 7A flow chart of the manufacturing process of the conductive layer in the provided display panel;
[0040] Figure 9 This is a schematic diagram of the structure of a display device provided in an embodiment of the present application. DETAILED DESCRIPTION
[0041] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of the present application. In addition, it should be understood that the specific implementation methods described herein are only used to illustrate and explain the present application, and are not used to limit the present application. In the present application, unless otherwise specified, the directional words used, such as "upper" and "lower", generally refer to the upper and lower parts of the actual use or working mode of the device, specifically the direction of the drawings in the accompanying drawings; and "inside" and "outside" refer to the outline of the device.
[0042] In addition, the terms "first" and "second" are used for descriptive purposes only, and features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of this application, "plurality" means two or more, unless otherwise specifically defined.
[0043] In the description of this application, it should be noted that, unless otherwise expressly specified or limited, the terms "installed," "connected," and "connected" should be understood in a broad sense. For example, they can refer to fixed or detachable connections; mechanical or electrical connections; or communication between them; direct or indirect connections through an intermediate medium; and can refer to internal connectivity between two components or interaction between two components. Those skilled in the art will understand the specific meanings of the above terms in this application based on specific circumstances.
[0044] The disclosure below provides many different embodiments for realizing the different structures of the present application. In order to simplify the disclosure of the present application, the components and settings of specific examples are described below. Of course, they are merely examples, and the purpose is not to limit the present application. In addition, the examples of various specific processes and materials provided in the present application, but those of ordinary skill in the art will appreciate the application of other processes and / or the use of other materials.
[0045] In order to solve the above problems, the embodiments of the present application provide a display panel, a method for manufacturing the same, and a display device. Detailed descriptions are given below. It should be noted that the order in which the following embodiments are described does not limit the preferred order of the embodiments.
[0046] Please combine Figure 1 、 Figure 2 and Figure 3 ;in, Figure 2 A schematic structural diagram of a conductive portion provided in an embodiment of the present application; Figure 3 For the embodiment of this application Figure 1 Schematic diagram of the enlarged area corresponding to area A.
[0047] This embodiment provides a display panel 1, which includes but is not limited to an organic light emitting diode (OLED) display panel. The display panel 1 includes a display area 1000 and a non-display area 2000 arranged on at least one side of the display area 1000. The non-display area 2000 may include a binding area.
[0048] The display panel 1 includes a substrate 11, a light-shielding layer 12, a driving circuit layer 13, a passivation layer 14, a flat layer 15, a pixel definition layer 16, a light-emitting device layer 17 and an isolation structure 18; wherein the substrate 11 can be a rigid substrate or a flexible substrate, and the light-shielding layer 12 is arranged on one side of the substrate 11.
[0049] The driving circuit layer 13 may include a plurality of thin film transistors 13A, and the thin film transistors 13A may be of an etching stop type, a back channel etching type, or may be divided into a bottom gate thin film transistor, a top gate thin film transistor or the like according to the position of the gate electrode 134 and the active layer 132, or may be divided into an N-type thin film transistor and / or a P-type thin film transistor according to the performance of the thin film transistor 13A; specifically, the driving circuit layer 13 may include conventional film layers such as a buffer layer 131, an active layer 132, a gate insulating layer 133, a gate electrode 134, an interlayer insulating layer 135 and a source / drain layer 136 stacked on the substrate 11, and the thin film transistor 13A is used to drive the light emitting device layer 17 to emit light; it should be noted that this embodiment does not impose any specific restrictions on the film layer structure of the driving circuit layer 13.
[0050] Among them, the buffer layer 131 is arranged on the side of the light-shielding layer 12 away from the substrate 11; the active layer 132 is arranged on the side of the buffer layer 131 away from the substrate 11; the gate insulating layer 133 is arranged on the side of the active layer 132 away from the buffer layer 131; the gate 134 is arranged on the side of the gate insulating layer 133 away from the active layer 132; the interlayer insulating layer 135 is arranged on the side of the gate 134 away from the gate insulating layer 133.
[0051] The display panel 1 also includes a first conductive layer 19, which is arranged on a side of the interlayer insulating layer 135 away from the gate 134, and the first conductive layer 19 includes a conductive portion 191 located in the non-display area 2000, and the conductive portion 191 can serve as a binding terminal of the display panel 1; the passivation layer 14 is arranged on a side of the first conductive layer 19 away from the interlayer insulating layer 135; the flat layer 15 is arranged on a side of the passivation layer 14 away from the first conductive layer 19; the pixel definition layer 16 is arranged on a side of the flat layer 15 away from the passivation layer 14, and the pixel definition layer 16 includes a plurality of pixel openings 161, and the area corresponding to the pixel openings 161 can be used as the light-emitting area of the display panel 1, and the display of the panel is achieved by arranging pixels of different colors in different pixel openings 161; the isolation structure 18 is arranged on a side of the pixel definition layer 16 away from the flat layer 15, and the isolation structure 18 is located in the non-opening area of the pixel definition layer 16.
[0052] The first conductive layer 19 further includes a source electrode 192 and a drain electrode 193 spaced apart from each other. The active layer 132 includes a source contact portion 1321, a drain contact portion 1322, and an active portion 1323 located between the source contact portion 1321 and the drain contact portion 1322. The source electrode 192 is arranged corresponding to the source contact portion 1321, and one end of the source electrode 192 is connected to the source contact portion 1321, and the other end of the source electrode 192 is connected to the light shielding layer 12. 193 is arranged and connected corresponding to the drain contact portion 1322, and the orthographic projection of the gate 134 on the substrate 11 covers the orthographic projection of the active portion 1323 on the substrate 11; wherein, the orthographic projection of the light-shielding layer 12 on the substrate 11 covers the orthographic projection of the active layer 132 on the substrate 11, and the light-shielding layer 12 can block the light directed to the active layer 132, thereby reducing the increase in leakage current caused by photogenerated carriers generated by light irradiating the active layer 132.
[0053] The light-emitting device layer 17 includes a first electrode layer 171, a light-emitting layer 172 and a second electrode layer 173 which are stacked. The first electrode layer 171 is arranged between the flat layer 15 and the pixel definition layer 16. The first electrode layer 171 includes a plurality of first electrodes 1711. One first electrode 1711 is arranged corresponding to one pixel opening 161, and at least part of the first electrode 1711 is exposed in the pixel opening 161. The first electrode layer 171 can be an anode layer, the first electrode 1711 can be an anode, and the first electrode 1711 can be connected to the source 192. The light-emitting layer 172 is arranged on the first electrode 1711 and at least part of the light-emitting layer 172 is located in the pixel opening 161. The second electrode layer 173 can be a cathode layer. The second electrode layer 173 is arranged on the side of the light-emitting layer 172 away from the first electrode layer 171.
[0054] Furthermore, the conductive part 191 includes a first sublayer 1911 and a second sublayer 1912 arranged in a stacked manner, the second sublayer 1912 is arranged on the side of the first sublayer 1911 away from the substrate 11, the oxidation rate of the second sublayer 1912 is lower than the oxidation rate of the first sublayer 1911, and the passivation layer 14 is provided with an opening 141 corresponding to the conductive part 191, the opening 141 exposes a portion of the second sublayer 1912, the first sublayer 1911 includes opposite first side walls 1911A and second side walls 1911B, and the second sublayer 1912 covers at least one of the first side walls 1911A and the second side walls 1911B.
[0055] Specifically, the material of the first sub-layer 1911 includes but is not limited to metal materials, the material of the second sub-layer 1912 includes but is not limited to metal oxide materials, and the orthographic projection of the second sub-layer 1912 on the substrate 11 covers at least part of the orthographic projection of the first sub-layer 1911 on the substrate 11; wherein, the material of the first sub-layer 1911 can be metal copper (Cu), and the material of the second sub-layer 1912 can be indium tin oxide (ITO) or molybdenum titanium alloy (MoTi).
[0056] It can be understood that although metallic copper has good conductivity as a conductive material, it is easy to oxidize. Especially when exposed, the oxidation of metallic copper will increase contact resistance and reduce electrical performance, thereby affecting product performance and reliability. In this embodiment, the conductive part 191 is provided to include a first sublayer 1911 and a second sublayer 1912 arranged in a stacked manner. The second sublayer 1912 covers at least one of the first sidewall 1911A and the second sidewall 1911B, so that the second sublayer 1912 with a lower oxidation rate is covered on the first sublayer 1911 with a higher oxidation rate, especially on the top and side walls of the first sublayer 1911, effectively preventing the first sublayer 1911 from contacting the external environment and preventing the oxidation of the first sublayer 1911, thereby improving the durability and stability of the conductive part 191 and reducing the problem of electrical performance degradation caused by oxidation.
[0057] At the same time, by arranging the passivation layer 14 on the side of the first conductive layer 19 away from the substrate 11, the surface of the conductive part 191 is effectively protected. An opening 141 corresponding to the conductive part 191 is opened on the passivation layer 14, and the opening 141 exposes part of the second sub-layer 1912, further ensuring that the external environment will not directly affect the electrical performance of the first sub-layer 1911, thereby ensuring effective electrical connection of the conductive part 191.
[0058] Moreover, by using a material with good chemical stability and corrosion resistance (such as indium tin oxide or molybdenum titanium alloy) for the second sub-layer 1912, the first sub-layer 1911 can be prevented from being corroded by the etching solution (such as silver acid) during the etching process during the production process of the display panel 1, thereby improving the stability and reliability of the conductive part 191.
[0059] It should be noted that the first conductive layer 19 may further include an auxiliary electrode 194, and the auxiliary electrode 194, the source 192, the drain 193 and the conductive part 191 are arranged at intervals. The first electrode layer 171 may further include an auxiliary anode 1712, and the second electrode layer 173 may be connected to the auxiliary electrode 194 through the auxiliary anode 1712, thereby improving the voltage drop phenomenon of the second electrode layer 173; wherein, the auxiliary electrode 194, the source 192, the drain 193 and the conductive part 191 can all be a double-layer conductive structure (Cu / Mo-Ti or Cu / TiO), or a three-layer conductive layer structure (Mo-Ti / Cu / Mo-Ti or Mo-Ti / Cu / TiO), and this embodiment does not impose any restrictions on this.
[0060] Please continue to combine Figure 1 、 Figure 2 and Figure 3; In one embodiment, the first sub-layer 1911 includes an upper surface 1911C located between the first sidewall 1911A and the second sidewall 1911B, and the upper surface 1911C is arranged on the side of the first sub-layer 1911 away from the substrate 11; the second sub-layer 1912 includes a first part 1912A and a second part 1912B connected to the first part 1912A, the first part 1912A is arranged on the upper surface 1911C of the first sub-layer 1911, and the second part 1912B covers one of the first sidewall 1911A and the second sidewall 1911B; wherein the orthographic projection of the first part 1912A on the substrate 11 does not overlap with the orthographic projection of the other of the first sidewall 1911A and the second sidewall 1911B on the substrate 11; specifically, the first part 1912A has a second preset distance from the edge of the other of the first sidewall 1911A and the second sidewall 1911B, and the second preset distance is greater than 0.
[0061] It should be noted that, in this embodiment, the technical solution of the present application is illustrated by taking the example that the first part 1912A is arranged on the upper surface 1911C of the first sub-layer 1911, the second part 1912B covers the first side wall 1911A, and the orthographic projection of the first part 1912A on the substrate 11 and the orthographic projection of the second side wall 1911B on the substrate 11 do not overlap; wherein, during the production process of the display panel 1, due to equipment precision limitations, alignment errors may occur between different film layers; specifically, there may be an inaccurate overlap (Overlap) between the second sub-layer 1912 and the first sub-layer 1911, resulting in a relative position offset between the second sub-layer 1912 and the first sub-layer 1911, which may cause part of the first sub-layer 1911 to be exposed.
[0062] It can be understood that in this embodiment, the second sub-layer 1912 is provided to include a first part 1912A and a second part 1912B connected to the first part 1912A, the first part 1912A is provided on the upper surface 1911C of the first sub-layer 1911, and the second part 1912B covers one of the first side wall 1911A and the second side wall 1911B, thereby ensuring that the first sub-layer 1911 is not completely exposed.
[0063] At the same time, by arranging the passivation layer 14 on the side of the first conductive layer 19 away from the substrate 11, and the opening 141 only exposes a portion of the second sub-layer 1912, even if the positions of the second sub-layer 1912 and the first sub-layer 1911 are slightly offset due to limitations in manufacturing precision, the portion of the first sub-layer 1911 not covered by the second sub-layer 1912 can be protected by the passivation layer 14, thereby providing multiple protections for the first sub-layer 1911, ensuring that the first sub-layer 1911 will not be completely exposed due to equipment precision problems, effectively preventing the first sub-layer 1911 from contacting the external environment, preventing the oxidation of the first sub-layer 1911, and thereby improving the durability and stability of the conductive part 191 and reducing the problem of electrical performance degradation caused by oxidation.
[0064] Please continue to combine Figure 1 、 Figure 2 and Figure 3 ; In one embodiment, the conductive portion 191 further includes a third sublayer 1913, which is disposed on a side of the first sublayer 1911 close to the substrate 11, and the orthographic projection of the third sublayer 1913 on the substrate 11 covers the orthographic projection of the first sublayer 1911 on the substrate 11, and the oxidation rate of the third sublayer 1913 is less than the oxidation rate of the first sublayer 1911.
[0065] The material of the third sub-layer 1913 includes but is not limited to metal oxide materials; the material of the first sub-layer 1911 can be metal copper (Cu), and the material of the third sub-layer 1913 can be molybdenum-titanium alloy (MoTi); it can be understood that, in this embodiment, the third sub-layer 1913 with a lower oxidation rate is arranged on the side of the first sub-layer 1911 with a higher oxidation rate close to the substrate 11, and the orthographic projection of the third sub-layer 1913 on the substrate 11 covers the orthographic projection of the first sub-layer 1911 on the substrate 11, thereby providing protection for the side of the first sub-layer 1911 close to the substrate 11, and further reducing the problem of electrical performance degradation of the first sub-layer 1911 caused by oxidation.
[0066] It can be understood that in this embodiment, the first part 1912A is arranged on the upper surface 1911C of the first sub-layer 1911, the second part 1912B covers the first side wall 1911A, the orthographic projection of the first part 1912A on the substrate 11 does not overlap with the orthographic projection of the second side wall 1911B on the substrate 11, the third sub-layer 1913 is arranged on the side of the first sub-layer 1911 close to the substrate 11, the orthographic projection of the third sub-layer 1913 on the substrate 11 covers the orthographic projection of the first sub-layer 1911 on the substrate 11, and the passivation layer 14 is arranged on the side of the first conductive layer 19 away from the substrate 11. Through the synergistic effect of the multi-layer structure, the first sub-layer 1911 is fully covered and protected, thereby further improving the reliability and durability of the conductive part 191 in long-term use.
[0067] Please continue to combine Figure 1 、 Figure 2 and Figure 3 ; In one embodiment, the pattern of the third sub-layer 1913 is the same as the pattern of the first sub-layer 1911; it can be understood that by setting the pattern of the third sub-layer 1913 to be the same as the pattern of the first sub-layer 1911, the third sub-layer 1913 can completely cover the side of the first sub-layer 1911 close to the substrate 11, so that the first sub-layer 1911 will not be exposed due to pattern mismatch, and the risk of oxidation or corrosion of the first sub-layer 1911 is effectively reduced; and, since the pattern of the third sub-layer 1913 is the same as the pattern of the first sub-layer 1911, during the production process of the display panel 1, the third sub-layer 1913 and the first sub-layer 1911 can share the same set of masks and patterning steps, which not only simplifies the manufacturing process, but also reduces the number and complexity of masks.
[0068] Please continue to combine Figure 1 、 Figure 2 and Figure 3In one embodiment, the opening 141 includes a first opening 141A and a second opening 141B, and the size of the opening 141 gradually increases from the first opening 141A to the second opening 141B; wherein, the edge of the first opening 141A close to the second sidewall 1911B has a first preset distance D1 from the edge of the third sub-layer 1913 close to the second sidewall 1911B, and the first preset distance D1 is greater than or equal to 1.5 microns. Thus, by designing the size of the first preset distance D1, the coverage margin of the passivation layer 14 can be increased to ensure that even if there is an alignment error in the process, the passivation layer 14 can cover the edge area of the first sub-layer 1911, thereby providing an extra layer of protection for the first sub-layer 1911, making the protection effect of the passivation layer 14 more reliable.
[0069] Please continue to combine Figure 1 、 Figure 2 and Figure 3 ; In one embodiment, the second sub-layer 1912 also includes a third part 1912C connected to the second part 1912B, and the third part 1912C is located on the side of the second part 1912B away from the first part 1912A; wherein, the second part 1912B covers the first side wall 1911A and the side of the third sub-layer 1913 close to the first side wall 1911A, and the third part 1912C extends from the second part 1912B to the side away from the first side wall 1911A, and the third part 1912C is in contact with the interlayer insulating layer 135.
[0070] The third part 1912C extends from the second part 1912B to a side away from the first side wall 1911A and contacts the interlayer insulating layer 135, so that the second sub-layer 1912 not only covers the first side wall 1911A of the first sub-layer 1911 and the side of the third sub-layer 1913 close to the first side wall 1911A, but also extends to the area outside the side wall of the first sub-layer 1911, thereby providing additional protection for the first sub-layer 1911, further enhancing the protection effect of the first sub-layer 1911, and reducing the exposure risk of the first sub-layer 1911.
[0071] The third part 1912C of the second sub-layer 1912 is in contact with the interlayer insulating layer 135. During the deposition of the second sub-layer 1912, most of the deposition surface of the second sub-layer 1912 is not the directly exposed first sub-layer 1911, but the interlayer insulating layer 135, which is relatively stable and not prone to discharge. It can be understood that the material of the interlayer insulating layer 135 is usually silicon dioxide, and the material of the interlayer insulating layer 135 has good insulation properties. Therefore, when the second sub-layer 1912 (indium tin oxide) is deposited on the interlayer insulating layer 135, charges will not accumulate on the deposition surface or generate a local strong electric field, thereby reducing the possibility of arc discharge and improving the yield and equipment stability of the entire production process.
[0072] Please combine Figure 4 , is a second cross-sectional schematic diagram of the display panel provided in an embodiment of the present application.
[0073] In one embodiment, the second sub-layer 1912 further includes a fourth portion 1912D connected to the first portion 1912A, and the fourth portion 1912D is located on a side of the first portion 1912A away from the second portion 1912B; wherein the second portion 1912B covers the first sidewall 1911A, and the fourth portion 1912D extends from the first portion 1912A to a side close to the second sidewall 1911B, and the fourth portion 1912D covers the second sidewall 1911B.
[0074] Specifically, the fourth portion 1912D extends from the first portion 1912A to the side close to the second side wall 1911B, and the fourth portion 1912D covers the second side wall 1911B and the side of the third sublayer 1913 close to the second side wall 1911B, and the fourth portion 1912D is in contact with the interlayer insulating layer 135; thereby, the second sublayer 1912 with a lower oxidation rate completely covers the first sublayer 1911 with a higher oxidation rate, further avoiding contact between the first sublayer 1911 and the external environment, preventing oxidation of the first sublayer 1911, and thereby improving the durability and stability of the conductive part 191, and reducing the problem of electrical performance degradation caused by oxidation; at the same time, it avoids the risk of the side walls of the first sublayer 1911 (first side wall 1911A and / or second side wall 1911B) being exposed and subjected to oxidation or chemical corrosion due to alignment errors or other process instabilities during the manufacturing process.
[0075] Please combine Figure 5 、 Figures 6A to 6G ;in, Figure 5 A flowchart of a method for manufacturing a display panel provided in an embodiment of the present application; Figures 6A to 6G for Figure 5 A process flow chart showing the panel manufacturing method is shown in FIG.
[0076] A method for manufacturing a display panel 1, wherein the display panel 1 includes a display area 1000 and a non-display area 2000 disposed on at least one side of the display area 1000, and the method for manufacturing the display panel 1 includes the following steps:
[0077] Step S10: providing a substrate 11.
[0078] Among them, when the substrate 11 is a rigid substrate, the material can be metal or glass. When the substrate is a flexible substrate 11, the material can include at least one of acrylic resin, methacrylic resin, polyisoprene, vinyl resin, epoxy resin, polyurethane resin, cellulose resin, silicone resin, polyimide resin, and polyamide resin. This embodiment does not impose specific restrictions on this.
[0079] Step S20 : forming a first conductive material layer on the substrate 11 , and patterning the first conductive material layer using a first photomask to form a first sub-layer 1911 located in the non-display area 2000 .
[0080] Specifically, step S20 includes the following steps:
[0081] Step S21 : forming a light shielding layer 12 , a buffer layer 131 , an active layer 132 , a gate insulating layer 133 , a gate 134 and an interlayer insulating layer 135 in sequence on the substrate 11 .
[0082] The active layer 132 includes a source contact portion 1321, a drain contact portion 1322, and an active portion 1323 located between the source contact portion 1321 and the drain contact portion 1322; the orthographic projection of the light shielding layer 12 on the substrate 11 covers the orthographic projection of the active layer 132 on the substrate 11, the orthographic projection of the gate 134 on the substrate 11 covers the orthographic projection of the active portion 1323 on the substrate 11; the material of the interlayer insulating layer 135 has strong water and oxygen barrier and insulation capabilities, and its materials include but are not limited to silicon oxide (SiO X ), silicon nitride (SiN X ), silicon oxynitride (SiNO), etc. or a stack thereof.
[0083] It should be noted that, in this embodiment, the material of the interlayer insulating layer 135 is silicon oxide as an example to illustrate the technical solution of the present application. In addition, the light-shielding layer 12, the buffer layer 131, the source layer, the gate insulating layer 133 and the gate 134 are all conventional film layers in the prior art, and this embodiment will not go into details about this.
[0084] Step S22: Patterning the interlayer insulating layer 135 to form a first through hole 135A, a second through hole 135B, and a third through hole 135C; wherein the first through hole 135A is provided corresponding to the drain contact portion 1322 and passes through the interlayer insulating layer 135, the second through hole 135B is provided corresponding to the drain contact portion 1322 and passes through the interlayer insulating layer 135, and the third through hole 135C is provided corresponding to the light shielding layer 12 and passes through the interlayer insulating layer 135 and the buffer layer 131, as shown in FIG. Figure 6A shown.
[0085] Step S23: forming a third conductive material layer and the first conductive material layer in sequence on a side of the interlayer insulating layer 135 away from the gate 134, and patterning the third conductive material layer and the first conductive material layer simultaneously using a first photomask to form a third sub-layer 1913 and a first sub-layer 1911, wherein the third sub-layer 1913 and the first sub-layer 1911 are both located in the non-display area 2000; Figure 6B shown.
[0086] In which, the pattern of the third sublayer 1913 is the same as the pattern of the first sublayer 1911, the orthographic projection of the third sublayer 1913 on the substrate 11 covers the orthographic projection of the first sublayer 1911 on the substrate 11, and the oxidation rate of the third sublayer 1913 is less than the oxidation rate of the first sublayer 1911; the material of the third conductive material layer includes but is not limited to molybdenum-titanium alloy (MoTi), and the material of the first conductive material layer can be metallic copper (Cu).
[0087] It can be understood that, in this embodiment, the third sub-layer 1913 with a lower oxidation rate is arranged on the side of the first sub-layer 1911 with a higher oxidation rate close to the substrate 11, and the orthographic projection of the third sub-layer 1913 on the substrate 11 covers the orthographic projection of the first sub-layer 1911 on the substrate 11, thereby providing protection for the side of the first sub-layer 1911 close to the substrate 11, and further reducing the problem of electrical performance degradation of the first sub-layer 1911 caused by oxidation.
[0088] Step S30 : forming a second conductive material layer 101 on the substrate 11 , and patterning the second conductive material layer 101 using the first photomask to form a second sub-layer 1912 located in the non-display area 2000 .
[0089] Specifically, step S30 includes the following steps:
[0090] Step S31 : forming a second conductive material layer 101 on a side of the first sub-layer 1911 away from the substrate 11 .
[0091] Specifically, in step S31, a second conductive material layer 101 may be formed on the first sub-layer 1911 by physical vapor deposition. The material of the second conductive material layer 101 includes but is not limited to indium tin oxide (ITO). The second conductive material layer 101 covers the third sub-layer 1913 / the first sub-layer 1911, and the interlayer insulating layer 135. Figure 6C shown.
[0092] It should be noted that, please combine Figure 7 and Figure 8 ;in, Figure 7 It is a structural diagram of a display panel in the related art; Figure 8 for Figure 7 A flow chart of the manufacturing process of the conductive layer in the display panel is provided.
[0093] like Figure 7 As shown, in the related art, the display panel 2 includes a substrate 21, a light-shielding layer 22, a driving circuit layer 23, a passivation layer 24, a flat layer 25, a pixel definition layer 26, a light-emitting device layer 27 and an isolation structure 28; wherein the driving circuit layer 23 includes a buffer layer 231 and an interlayer insulating layer 231.
[0094] At present, in order to reduce the impedance of the wiring, metal copper (Cu) is usually used as the conductor material. Due to the poor stability of metal copper and its easy oxidation when exposed to the external environment, it cannot be directly used as the binding terminal 29 of the binding area 2100; in the related art, a three-layer conductive layer structure is usually used, that is, a stack of a first conductive sublayer 291, a second conductive sublayer 292 and a third conductive sublayer 293 as the binding terminal 29 to improve the stability of the binding part of the display panel 2; wherein the material of the first conductive sublayer 291 is usually molybdenum-titanium alloy (MoTi), the material of the second conductive sublayer 292 is usually metal copper (Cu), and the third conductive sublayer 293 is usually indium tin oxide (ITO); on high-generation panel lines of G6 and above, such as Figure 8 As shown, when metal oxides (e.g., indium tin oxide) are deposited on large areas of copper, there is a risk of arcing, which may lead to uneven sputtering, substrate damage, and equipment downtime, reducing yield. In addition, indium tin oxide deposited on copper tends to form a large grain structure, which requires additional processes to remove the structure, resulting in increased production costs and reduced product yield.
[0095] It can be understood that this embodiment forms the second conductive material layer 101 on the side of the first sub-layer 1911 away from the substrate 11. During the deposition of the second conductive material layer 101, most of the deposition surface of the second conductive material layer 101 is not the directly exposed first sub-layer 1911, but the interlayer insulating layer 135 which is relatively stable and not prone to discharge. Since the material of the interlayer insulating layer 135 is silicon dioxide, which has good insulating properties, when the second conductive material layer 101 is deposited on the interlayer insulating layer 135, charges will not accumulate on the deposition surface or generate a local strong electric field, thereby reducing the possibility of arc discharge and improving the yield and equipment stability of the entire production process.
[0096] At the same time, compared with the related art, in which indium tin oxide is directly deposited on the entire metallic copper, since the metal surface is a large continuous plane, large particles or larger crystalline structures may be formed during the deposition of indium tin oxide, and these large crystalline structures are not conducive to the subsequent etching process; in this embodiment, the third conductive material layer / first conductive material layer is first patterned to form a third sublayer 1913 / first sublayer 1911, which is equivalent to forming the required pattern and structure on the metal surface. These patterned structures are usually flatter and have a more uniform surface than the entire metal substrate, which helps to deposit a smaller and more uniform second sublayer 1912 thereon, thereby avoiding the formation of large grain structures when indium tin oxide is deposited on copper, and there is no need to add additional processes to remove the structure, thereby reducing production costs and improving product yield.
[0097] Step S32: forming a photoresist material layer 102 on a side of the second conductive material layer 101 away from the substrate 11; specifically, the photoresist material layer 102 can be formed on the second conductive material layer 101 by a coating method, and the orthographic projection of the photoresist material layer 102 on the substrate 11 covers the orthographic projection of the second conductive material layer 101 on the substrate 11; Figure 6D shown.
[0098] Step S33: patterning the photoresist material layer 102 using the first photomask to form a photoresist layer 1021, wherein the photoresist layer 1021 is arranged corresponding to the third sub-layer 1913 / the first sub-layer 1911; Figure 6E shown.
[0099] It can be understood that this embodiment uses the first photomask to simultaneously pattern the third conductive material layer and the first conductive material layer, and uses the first photomask to pattern the photoresist material layer 102, that is, the same photomask is used to pattern the third conductive material layer, the first conductive material layer and the photoresist material layer 102 respectively, thereby reducing manufacturing costs and simplifying the process flow.
[0100] It should be noted that, during the production process of the display panel 1, due to equipment precision limitations, alignment errors may occur between different film layers; specifically, the first sub-layer 1911 includes a first side wall 1911A, a second side wall 1911B, and an upper surface 1911C located between the first side wall 1911A and the second side wall 1911B, and the upper surface 1911C is located on the side of the first sub-layer 1911 away from the substrate 11; the photoresist layer 1021 is located on the upper surface 1911C of the first sub-layer 1911, and the photoresist layer 1021 covers the first side wall 1911A, and there is an alignment error between the photoresist layer 1021 and the second side wall 1911B, and the alignment error is less than or equal to 1 micron.
[0101] Step S34: etching the second conductive material layer 101 to remove the portion of the second conductive material layer 101 not covered by the photoresist layer 1021 to form the second sub-layer 1912 in the non-display area 2000; Figure 6F shown.
[0102] Specifically, in step S34, the second conductive material layer 101 can be etched by a wet etching process; wherein, an acidic etching solution containing silver ions (such as Ag acid) can be used for etching; it can be understood that, in this embodiment, by using a material with good chemical stability and corrosion resistance (indium tin oxide) for the second conductive material layer 101, the first sub-layer 1911 can be prevented from being corroded by the etching solution (such as silver acid) during the etching process when the second conductive material layer 101 is etched, thereby improving the stability and reliability of the conductive part 191.
[0103] Step S35: peeling off the photoresist layer 1021, forming a drain electrode 193, a source electrode 192, an auxiliary electrode 194 and a conductive portion 191 spaced apart on the interlayer insulating layer 135, as shown in FIG. Figure 6G shown.
[0104] In which, the drain 193, the source 192 and the auxiliary electrode 194 are all located in the display area 1000, the drain 193 is connected to the drain contact portion 1322 through the first through hole 135A, one end of the source 192 is connected to the source contact portion 1321 through the second through hole 135B, and the other end of the source 192 is connected to the light-shielding layer 12 through the third through hole 135C.
[0105] Specifically, the conductive part 191 is located in the non-display area 2000, and the conductive layer includes the third sublayer 1913, the first sublayer 1911 and the second sublayer 1912 which are stacked. The stability of the second sublayer 1912 is greater than the stability of the first sublayer 1911. The first sublayer 1911 includes a first side wall 1911A and a second side wall 1911B relative to each other. The second sublayer 1912 covers the first side wall 1911A, thereby effectively preventing most of the first sublayer 1911 from contacting the external environment and preventing the oxidation of the first sublayer 1911, thereby improving the durability and stability of the conductive part 191 and reducing the problem of electrical performance degradation caused by oxidation.
[0106] Step S40 : forming a passivation layer 14 on a side of the second sub-layer 1912 away from the first sub-layer 1911 , and opening a hole 141 corresponding to the second sub-layer 1912 on the passivation layer 14 , wherein the opening 141 partially exposes the second sub-layer 1912 .
[0107] It can be understood that in this embodiment, the passivation layer 14 is arranged on the side of the first conductive layer 19 away from the substrate 11, and the opening 141 only exposes a portion of the second sub-layer 1912. Even if the positions of the second sub-layer 1912 and the first sub-layer 1911 are slightly offset due to limitations in manufacturing precision, the portion of the first sub-layer 1911 not covered by the second sub-layer 1912 can be protected by the passivation layer 14, thereby providing multiple protections for the first sub-layer 1911, ensuring that the first sub-layer 1911 will not be completely exposed due to equipment precision problems, effectively preventing the first sub-layer 1911 from contacting the external environment, preventing the oxidation of the first sub-layer 1911, and thereby improving the durability and stability of the conductive part 191 and reducing the problem of electrical performance degradation caused by oxidation.
[0108] Furthermore, the method for manufacturing the display panel 1 further includes:
[0109] Step S50: forming a planar layer 15, a first electrode layer 171, a pixel definition layer 16, a light emitting layer 172, a second electrode layer 173 and an isolation structure 18 in sequence on the side of the passivation layer 14 away from the substrate 11; Figure 1 shown.
[0110] The structures of the planar layer 15 , the first electrode layer 171 , the pixel definition layer 16 , the light-emitting layer 172 , the second electrode layer 173 and the isolation structure 18 have been described in detail in the above embodiments and will not be repeated here.
[0111] See also Figure 9 , is a structural schematic diagram of the display device provided in an embodiment of the present application.
[0112] This embodiment further provides a display device 3 , which includes the display panel 1 described in any one of the above embodiments.
[0113] It can be understood that the display panel 1 has been described in detail in the above embodiment and will not be repeated here; the display device 3 can also include a shell 3A, which is combined with the display panel 1 as a whole to provide support, fixation and protection for the display panel 1.
[0114] In specific applications, the display device 3 can be at least one of devices with display function, such as a smart phone, a tablet computer, a mobile phone, a video phone, an e-book reader, a desktop computer, a laptop, a netbook, a workstation, a server, a personal digital assistant, a portable media player, an MP3 player, a mobile medical machine, a camera, a game console, a digital camera, a car navigation system, an electronic billboard, an ATM or a wearable device.
[0115] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.
[0116] The above is a detailed introduction to a display panel, a manufacturing method thereof, and a display device provided in the embodiments of the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the technical solutions and core ideas of the present application. Ordinary technicians in this field should understand that they can still modify the technical solutions recorded in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.
Claims
1. A display panel, characterized in that: The display panel comprises a display area and a non-display area arranged on at least one side of the display area. substrate; a first conductive layer disposed on one side of the substrate, the first conductive layer including a conductive portion located in the non-display area, the conductive portion including a first sublayer and a second sublayer stacked together, the second sublayer being disposed on a side of the first sublayer away from the substrate, the second sublayer having an oxidation rate lower than that of the first sublayer; a passivation layer, disposed on a side of the first conductive layer away from the substrate, the passivation layer being provided with an opening corresponding to the conductive portion, the opening exposing a portion of the second sub-layer; The first sublayer includes a first and a second opposite sidewall, and an upper surface located between the first sidewall and the second sidewall, and the upper surface is arranged on the side of the first sublayer away from the substrate; the second sublayer includes a first part and a second part connected to the first part, the first part is arranged on the upper surface of the first sublayer, and the second part covers one of the first sidewall and the second sidewall; the orthographic projection of the first part on the substrate does not overlap with the orthographic projection of the other of the first sidewall and the second sidewall on the substrate.
2. The display panel according to claim 1, wherein: The conductive portion further includes a third sublayer, which is disposed on a side of the first sublayer close to the substrate. The orthographic projection of the third sublayer on the substrate covers the orthographic projection of the first sublayer on the substrate.
3. The display panel according to claim 2, wherein: The opening includes a first opening and a second opening, and the size of the opening gradually increases from the first opening to the second opening; The second portion covers the first side wall, and the first opening is close to an edge of the second side wall, and has a first preset distance from an edge of the third sub-layer close to the second side wall.
4. The display panel according to claim 2, wherein: The pattern of the third sub-layer is the same as the pattern of the first sub-layer.
5. The display panel according to claim 2, wherein: The display panel further includes an insulating layer, wherein the insulating layer is provided between the substrate and the first conductive layer; The second sub-layer further includes a third portion connected to the second portion, wherein the third portion is located on a side of the second portion away from the first portion; The second portion covers the first sidewall and a side of the third sublayer close to the first sidewall, the third portion extends from the second portion to a side away from the first sidewall, and the third portion contacts the insulating layer.
6. The display panel according to claim 1, wherein: The second sublayer also includes a fourth part connected to the first part, and the fourth part is located on a side of the first part away from the second part; wherein the second part covers the first side wall, and the fourth part extends from the first part to a side close to the second side wall, and the fourth part covers the second side wall.
7. The display panel according to claim 1, wherein: The material of the first sub-layer is a metal material, and the material of the second sub-layer is a metal oxide material.
8. A method for manufacturing a display panel, characterized in that: The method for manufacturing the display panel is used to manufacture the display panel according to any one of claims 1 to 7, wherein the display panel includes a display area and a non-display area provided on at least one side of the display area, and the method for manufacturing the display panel includes: providing a substrate; forming a first conductive material layer on the substrate, and patterning the first conductive material layer using a first photomask to form a first sublayer located in the non-display area; forming a second conductive material layer on the substrate, and patterning the second conductive material layer using the first photomask to form a second sublayer located in the non-display area; forming a passivation layer on a side of the second sub-layer away from the first sub-layer, and openings corresponding to the second sub-layer are formed in the passivation layer, wherein the openings expose a portion of the second sub-layer; The oxidation rate of the second sublayer is lower than that of the first sublayer, the first sublayer includes a first sidewall and a second sidewall opposite to each other, and the second sublayer covers at least one of the first sidewall and the second sidewall.
9. A display device, characterized in that: The display device comprises the display panel according to any one of claims 1 to 7.
Citation Information
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