Display substrate, display device, and method for manufacturing display substrate

Abstract

The present disclosure provides a display substrate, a display device and a manufacturing method of a display substrate. The display substrate comprises: a substrate; a first electrode layer located on one side of the substrate, comprising a plurality of first electrodes, and an auxiliary electrode located on the periphery of the first electrode, the auxiliary electrode does not overlap with the first electrode in the orthographic projection of the substrate; a pixel definition layer located on the side of the first electrode layer away from the substrate, comprising a first opening exposing the first electrode, and a second opening exposing the auxiliary electrode; a light emitting layer located on the side of the pixel definition layer away from the first electrode layer, the light emitting layer comprising a light emitting part located in the first opening, and a hollow part located in the second opening; a second electrode layer located on the side of the light emitting layer away from the pixel definition layer, the second electrode layer is overlapped with the auxiliary electrode at the second opening.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor technology, and in particular to a display substrate, a display device, and a method for manufacturing the display substrate. Background Technology

[0002] Current display types mainly include Liquid Crystal Display (LCD), Organic Light-Emitting Diode (OLED), Plasma Display Panel (PDP), and E-ink display. Among them, OLED displays are widely recognized as the third-generation display technology after LCD displays due to their numerous advantages such as thinness, active light emission, fast response speed, wide viewing angle, rich colors, high brightness, low power consumption, and resistance to high and low temperatures. They can be widely used in terminal products such as smartphones, tablets, and televisions. Summary of the Invention

[0003] This disclosure provides a display substrate, comprising: Substrate; A first electrode layer, located on one side of the substrate, includes a plurality of first electrodes and an auxiliary electrode located around the first electrodes, wherein the orthographic projection of the auxiliary electrode on the substrate does not overlap with the orthographic projection of the first electrode on the substrate. A pixel defining layer, located on the side of the first electrode layer opposite to the substrate, includes a first opening exposing the first electrode and a second opening exposing the auxiliary electrode; A light-emitting layer is located on the side of the pixel defining layer opposite to the first electrode layer. The light-emitting layer includes a light-emitting portion located in the first opening and a hollow portion located in the second opening. The second electrode layer is located on the side of the light-emitting layer opposite to the pixel defining layer, and the second electrode layer overlaps with the auxiliary electrode at the second opening.

[0004] In one possible implementation, the auxiliary electrode is a mesh-like structure with a plurality of third openings, and the first electrode is located within the third openings.

[0005] In one possible implementation, there is a gap between the auxiliary electrode and the first electrode.

[0006] In one possible implementation, the shape of the third opening is the same as the shape of the first electrode located within the third opening.

[0007] In one possible implementation, at least part of the third opening is of a different size.

[0008] In one possible implementation, the first electrode layer further includes a first connector located at one end of the auxiliary electrode and a second connector located at the other end of the auxiliary electrode; the first connector and the second connector are configured to apply power to the auxiliary electrode after the light-emitting layer is formed, so as to burn off the light-emitting layer at the second opening to form the hollow portion; The outer contour of the auxiliary electrode is rectangular, and the first connector and the second connector are located at the two ends of the diagonal of the rectangle, respectively.

[0009] In one possible implementation, the auxiliary electrode includes a plurality of first sub-auxiliary electrodes extending along a first direction and arranged along a second direction, and a plurality of second sub-auxiliary electrodes connected to adjacent first sub-auxiliary electrodes. The first connector is connected to the first sub-auxiliary electrode on one side of the auxiliary electrode, and the second connector is connected to the first sub-auxiliary electrode on the other side of the auxiliary electrode; part of the second sub-auxiliary electrode is disconnected.

[0010] In one possible implementation, the plurality of first sub-auxiliary electrodes includes a first sub-electrode group and a second sub-electrode group arranged alternately along the second direction; each of the first sub-electrode group and the second sub-electrode group includes at least one first sub-auxiliary electrode; The second sub-auxiliary electrode that is disconnected is located only within the first sub-electrode group, and the same first sub-electrode group includes at least one second sub-auxiliary electrode that connects to an adjacent first sub-auxiliary electrode.

[0011] In one possible implementation, the second sub-auxiliary electrode connected to the adjacent first sub-auxiliary electrode in two adjacent first sub-electrode groups is located at different ends of the display substrate in the first direction.

[0012] In one possible implementation, within the second sub-electrode group, each of the second sub-auxiliary electrodes is connected to an adjacent first sub-auxiliary electrode.

[0013] In one possible implementation, adjacent first sub-electrode groups and second sub-electrode groups share a first sub-auxiliary electrode.

[0014] In one possible implementation, the display substrate further includes a planarization layer located between the substrate and the first electrode layer, and a heat insulation layer located between the planarization layer and the first electrode layer and in contact with the auxiliary electrode, wherein the orthographic projection of the heat insulation layer on the substrate covers the orthographic projection of the auxiliary electrode on the substrate, and the orthographic projection of the heat insulation layer on the substrate does not overlap with the orthographic projection of the first electrode on the substrate.

[0015] In one possible implementation, the heat insulation layer has a grid pattern of multiple fourth openings, each of which corresponds to a third opening, and the orthographic projection of the third opening onto the substrate covers the orthographic projection of the fourth opening onto the substrate.

[0016] In one possible implementation, the orthographic projection shape of the third opening on the substrate is the same as the orthographic projection shape of the fourth opening on the substrate.

[0017] In one possible implementation, the linewidth of the thermal insulation layer is greater than the linewidth of the auxiliary electrode.

[0018] In one possible implementation, the material of the heat insulation layer includes silicon dioxide or silicon nitride.

[0019] In one possible implementation, the display substrate further includes an insulating layer located between the substrate and the first electrode layer, and a third electrode layer located between the insulating layer and the substrate; The third electrode layer includes multiple signal lines and a third electrode insulated from the signal lines; the insulating layer includes vias exposing the third electrode. The auxiliary electrode is connected to the third electrode through the via.

[0020] In one possible implementation, the third electrode layer includes a source / drain layer, a first gate layer, and / or a second gate layer.

[0021] In one possible implementation, the signal line includes: a data line, a common electrode lead, and / or a gate line.

[0022] In one possible implementation, the insulating layer includes a planarization layer, an interlayer dielectric layer, a first gate insulating layer, and / or a second gate insulating layer.

[0023] In one possible implementation, the display substrate further includes a light-emitting functional portion located on the inner wall of the second opening.

[0024] In one possible implementation, the light-emitting functional part includes: a first sub-light-emitting functional part, and a second sub-light-emitting functional part located in the first sub-light-emitting functional part away from the inner wall of the second opening; The first light-emitting functional unit includes: a hole transport layer and / or an electron blocking layer; The second sub-light-emitting functional unit includes: an electron transport layer and / or a hole blocking layer.

[0025] This disclosure also provides a display device, which includes the display substrate as described in this disclosure.

[0026] This disclosure also provides a method for manufacturing a display substrate as described in this disclosure, comprising: Provide a substrate; A first electrode layer is formed on one side of a substrate, wherein the first electrode layer includes a plurality of first electrodes and an auxiliary electrode surrounding the first electrodes, wherein the orthographic projection of the auxiliary electrode on the substrate does not overlap with the orthographic projection of the first electrode on the substrate. A pixel defining layer is formed on the side of the first electrode layer opposite to the substrate, wherein the pixel defining layer includes a first opening exposing the first electrode and a second opening exposing the auxiliary electrode; A light-emitting layer is formed on the side of the pixel defining layer opposite to the first electrode layer; Apply power to the auxiliary electrode to burn off the light-emitting layer at the location of the auxiliary electrode; A second electrode layer is formed on the first side of the light-emitting layer opposite to the first electrode layer, so that the second electrode layer overlaps with the auxiliary electrode at the second opening. Attached Figure Description

[0027] Figure 1 One of the schematic diagrams of a display substrate provided in an embodiment of this disclosure; Figure 2 One of the schematic diagrams of the auxiliary electrode provided in the embodiments of this disclosure; Figure 3 A second schematic diagram of the auxiliary electrode provided in an embodiment of this disclosure; Figure 4 A schematic diagram of the auxiliary electrode and the first electrode provided in an embodiment of this disclosure; Figure 5 A third schematic diagram of the auxiliary electrode provided in an embodiment of this disclosure; Figure 6 A second schematic diagram of a display substrate provided in an embodiment of this disclosure; Figure 7 A schematic diagram of the heat insulation layer provided in the embodiments of this disclosure; Figure 8 A third schematic diagram of a display substrate provided in an embodiment of this disclosure; Figure 9 Fourth schematic diagram of a display substrate provided in an embodiment of this disclosure; Figure 10 This is a schematic diagram illustrating the manufacturing process of a display substrate provided in an embodiment of this disclosure. Detailed Implementation

[0028] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the described embodiments of this disclosure without creative effort are within the scope of protection of this disclosure.

[0029] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as “comprising” or “including” mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. Terms such as “connected” or “linked” are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as “upper,” “lower,” “left,” and “right” are used only to indicate relative positional relationships, and these relative positional relationships may change accordingly when the absolute position of the described objects changes.

[0030] As used herein, “approximately” or “substantially the same” includes the stated value and means within an acceptable range of deviations from the specific value, as determined by a person skilled in the art taking into account the measurement in question and the errors associated with the measurement of the specific quantity (i.e., limitations of the measurement system). For example, “substantially the same” may mean a difference relative to the stated value within one or more standard deviations, or within ±30%, 20%, 10%, or 5%.

[0031] In the accompanying drawings, the thicknesses of layers, films, panels, regions, etc., are enlarged for clarity. Exemplary embodiments are described herein with reference to cross-sectional views that are schematic diagrams of idealized embodiments. Thus, deviations from the shapes shown in the drawings will be expected as a result of, for example, manufacturing techniques and / or tolerances. Therefore, the embodiments described herein should not be construed as limited to the specific shapes of the regions shown herein, but rather include deviations in shape caused, for example, by manufacturing processes. For example, regions illustrated or described as flat may typically have rough and / or non-linear characteristics. Furthermore, sharp corners illustrated may be rounded. Thus, the regions shown in the figures are schematic in nature, and their shapes are not intended to illustrate the precise shapes of the regions, nor are they intended to limit the scope of the claims.

[0032] To keep the following description of the embodiments of this disclosure clear and concise, detailed descriptions of known functions and known components are omitted.

[0033] This disclosure provides a display substrate, comprising: Substrate 1; The first electrode layer 2 is located on one side of the substrate 1 and includes a plurality of first electrodes 21 and an auxiliary electrode 22 located around the first electrodes 21. The orthographic projection of the auxiliary electrode 22 onto the substrate 1 does not overlap with the orthographic projection of the first electrode 21 onto the substrate 1. The pixel defining layer 3 is located on the side of the first electrode layer 2 away from the substrate 1, and includes a first opening 31 that exposes the first electrode 21 and a second opening 32 that exposes the auxiliary electrode 22. The light-emitting layer 4 is located on the side of the pixel limiting layer 3 away from the first electrode layer 21. The light-emitting layer 4 includes a light-emitting part 41 located in the first opening 31 and a hollow part 42 located in the second opening 32. Specifically, during the fabrication of the display substrate, when the light-emitting layer 4 is formed, the light-emitting layer 4 can also be formed in the second opening 32. In subsequent processes, the light-emitting layer 4 in the second opening 32 can be burned off by applying power to the auxiliary electrode 22, so that the final display substrate does not have a light-emitting part 41 in the second opening 32 of the pixel limiting layer 3. The second electrode layer 5 is located on the side of the light-emitting layer 4 away from the pixel limiting layer 3, and the second electrode layer 5 overlaps with the auxiliary electrode 22 at the second opening 32.

[0034] In this embodiment, the first electrode layer 2 includes a plurality of first electrodes 21 and auxiliary electrodes 22 located around the first electrodes 21. After the light-emitting layer 4 is prepared, a step-by-step power-on process is added to the auxiliary electrodes 22 surrounding the first electrodes 21, causing the auxiliary electrodes 22 surrounding the first electrodes 21 to heat up, further causing the light-emitting layer 4 directly above it to be ablated and sublimated. Then, the second electrode layer 5 is formed. The conventional first electrode layer 2 is used as an auxiliary electrode, and the light-emitting layer 4 on it is removed by short-circuit heating, so as to achieve the connection with the second electrode layer 5, thereby reducing the resistance of the second electrode layer 5.

[0035] In one possible implementation, the first electrode layer 2 can be an anode layer, the second electrode layer 5 can be a cathode layer, and the auxiliary electrode 22 can be an auxiliary cathode.

[0036] In one possible implementation, see Figure 2 and Figure 4 As shown, the auxiliary electrode 22 is a mesh-like structure with multiple third openings 20, and the first electrode 21 is located within the third openings 20. In this embodiment of the present disclosure, the auxiliary electrode 22 is a mesh-like structure with multiple third openings 20, and the first electrode 21 is located within the third openings 20, so that the auxiliary electrode 22 and the first electrode 21 are disposed on the same layer, simplifying the manufacturing process of the display substrate.

[0037] In one possible implementation, see Figure 2 and Figure 4 As shown, there is a gap 220 between the auxiliary electrode 22 and the first electrode 21. In this embodiment, the gap 220 between the auxiliary electrode 22 and the first electrode 21 is provided to prevent the first electrode 21 from being powered on when the auxiliary electrode 22 is connected to the first electrode 21, which could burn the light-emitting layer 4 directly above the auxiliary electrode 22 and potentially burn the light-emitting layer 4 directly above the first electrode 21, thus affecting the normal display of the display substrate.

[0038] In one possible implementation, see Figure 2 and Figure 4 As shown, the shape of the third opening 20 is the same as the shape of the first electrode 21 located within the third opening 20. Specifically, for example, the shape of the third opening 20 and the shape of the first electrode 21 located within the third opening 20 can both be rectangular, or they can both be elliptical, circular, square, hexagonal, etc. In this embodiment of the present disclosure, the shape of the third opening 20 is the same as the shape of the first electrode 21 located within the third opening 20, so as to enable the first electrode 21 to have the largest possible pattern shape, thereby increasing the aperture ratio of the display substrate.

[0039] In one possible implementation, see Figure 2 and Figure 4 As shown, at least some of the third openings 20 are of different sizes. In this embodiment of the disclosure, at least some of the third openings 20 are of different shapes to accommodate first electrodes 21 of different sizes.

[0040] In one possible implementation, see Figure 2 , Figure 3 and Figure 4 As shown, the first electrode layer 2 also includes a first connector 61 located at one end of the auxiliary electrode 22 and a second connector 62 located at the other end of the auxiliary electrode 22. The first connector 61 and the second connector 62 are configured to apply power to the auxiliary electrode 22 after the light-emitting layer 4 is formed, so as to burn off the light-emitting layer 4 at the second opening 32 and form a hollow portion 42. The outer contour of the auxiliary electrode 22 is rectangular, and the first connector 61 and the second connector 62 are respectively located at the two ends of the diagonal of the rectangle. In this embodiment, the first connector 61 and the second connector 62 are respectively located at the two ends of the diagonal of the rectangle, which can make the overall circuit formed by the auxiliary electrode 22 longer and the current distribution in each branch approximately uniform. This avoids the situation where, when the first connector 61 and the second connector 62 are respectively located on two adjacent sides of the rectangle, some branches may have larger currents and some branches may have smaller currents, resulting in uneven current distribution. This could lead to the light-emitting layer above part of the auxiliary electrode 22 being burned off while some are not.

[0041] In one possible implementation, see Figure 2 and Figure 3 As shown, the first connector 61 can be connected to the first power pad 63, and the second connector 62 can be connected to the second power pad 64. When the light-emitting layer 4 at the auxiliary electrode 22 is burned, the first power pad 63 and the second power pad 64 can be used to apply power to the first connector 61 and the second connector 62 respectively. After the light-emitting layer 4 at the auxiliary electrode 22 is burned, the first power pad 63 and the second power pad 64 can be removed.

[0042] In one possible implementation, see Figure 5 As shown, the auxiliary electrode 22 includes multiple first sub-auxiliary electrodes 221 extending along a first direction X and arranged along a second direction Y, and multiple second sub-auxiliary electrodes 222 connecting adjacent first sub-auxiliary electrodes 221; a first connector 61 is connected to the first sub-auxiliary electrode 221 on one side of the outer edge of the auxiliary electrode 22, and a second connector 62 is connected to the first sub-auxiliary electrode 221 on the other side of the auxiliary electrode 22; some of the second sub-auxiliary electrodes 222 are open-circuited. In this embodiment, some of the second sub-auxiliary electrodes 222 are open-circuited, that is, the annular auxiliary electrode 21 is partially open-circuited, so that the annular metal traces form series traces, which can improve the uneven heating of short circuits, realize uniform heating of the auxiliary electrode 22, and avoid the problem of local overheating and removal of the light-emitting layer 4 while some areas are not removed.

[0043] In one possible implementation, see Figure 5 As shown, the plurality of first sub-auxiliary electrodes 221 include first sub-electrode groups S1 and second sub-electrode groups S2 arranged alternately along the second direction Y; each of the first sub-electrode groups S1 and the second sub-electrode groups S2 includes at least one first sub-auxiliary electrode 221; specifically, adjacent first sub-electrode groups S1 and second sub-electrode groups S2 can share a first sub-auxiliary electrode 221; the open-circuit second sub-auxiliary electrode 222 is located only within the first sub-electrode group S1, and the same first sub-electrode group S1 includes at least one second sub-auxiliary electrode 222 connecting adjacent first sub-auxiliary electrodes 221. In this way, the auxiliary electrodes 22 can be connected in series to the greatest extent, which can better improve the effect of uneven heating due to short circuits, and maximize the uniform heating of the auxiliary electrodes 22, avoiding the problem of local overheating and removal of the light-emitting layer 4 while other areas are not removed.

[0044] In one possible implementation, see Figure 5 As shown, the second sub-auxiliary electrodes 222 connected to the adjacent first sub-auxiliary electrodes 221 within two adjacent first sub-electrode groups S1 are located at different ends of the display substrate in the first direction. Specifically, in conjunction with... Figure 5As shown, for example, within the first sub-electrode group S1 from the left, the second sub-auxiliary electrode 222, connected to the adjacent first sub-auxiliary electrode 221, is located at the lower end of the display substrate. Within the second sub-electrode group S1 from the left, the second sub-auxiliary electrode 222, connected to the adjacent first sub-auxiliary electrode 221, is located at the upper end of the display substrate. This maximizes the formation of series traces for the auxiliary electrodes 22, effectively improving the uneven heating caused by short circuits and ensuring the auxiliary electrodes 22 are heated uniformly to the greatest extent possible. This avoids the problem of localized overheating and removal of the light-emitting layer 4 while other areas remain unremoved.

[0045] In one possible implementation, see Figure 5 As shown, within the second sub-electrode group S2, the second sub-auxiliary electrodes 222 are all connected to the adjacent first sub-auxiliary electrodes 221.

[0046] In one possible implementation, see Figure 5 As shown, the adjacent first sub-electrode group S1 and the second sub-electrode group S2 share a first sub-auxiliary electrode 221.

[0047] In one possible implementation, see Figure 6 As shown, the display substrate further includes a planarization layer 16 located between the substrate 1 and the first electrode layer 2, and a heat insulation layer 18 located between the planarization layer 16 and the first electrode layer 2 and in contact with the auxiliary electrode 22. The orthographic projection of the heat insulation layer 18 onto the substrate 1 covers the orthographic projection of the auxiliary electrode 22 onto the substrate 1, and the orthographic projection of the heat insulation layer 18 onto the substrate 1 does not overlap with the orthographic projection of the first electrode 21 onto the substrate 1. In this embodiment, the display substrate further includes a heat insulation layer 18, which is located only at the location of the auxiliary electrode 22. This can prevent the planarization layer 16 from being burned when the auxiliary electrode 22 is heated. Furthermore, the absence of a heat insulation layer 18 at the location of the first electrode 21 avoids affecting the brightness of the light emitted by the display substrate.

[0048] In one possible implementation, see Figure 6 and Figure 7 As shown, the heat insulation layer 18 has a grid pattern of multiple fourth openings 180, each corresponding to a third opening 220, and the orthographic projection of the third opening 220 onto the substrate 1 covers the orthographic projection of the fourth opening 180 onto the substrate 1. That is, the orthographic projection area of ​​the third opening 220 onto the substrate 1 is larger than the orthographic projection area of ​​the fourth opening 180 onto the substrate 1, so that the linewidth d1 of the heat insulation layer 18 is larger than the linewidth d2 of the auxiliary electrode 22.

[0049] In one possible implementation, see Figure 2 , Figure 3 and Figure 7As shown, the orthographic projection shape of the third opening 220 onto the substrate 1 is the same as the orthographic projection shape of the fourth opening 180 onto the substrate 1. Specifically, for example, the shape of the third opening 220 and the shape of the fourth opening 180 can both be rectangular, or they can both be elliptical, circular, square, hexagonal, etc.

[0050] In one possible implementation, see Figure 6 As shown, the linewidth d1 of the heat insulation layer 18 is greater than the linewidth d2 of the auxiliary electrode 22. This is to completely cover the auxiliary electrode 22 and effectively protect the planarization layer 16.

[0051] In one possible implementation, the material of the heat insulation layer 18 may include silicon dioxide or silicon nitride. This provides a better heat insulation effect.

[0052] In one possible implementation, see Figure 1 and Figure 6 As shown, the display substrate also includes a light-emitting functional part 19 located on the inner wall of the second opening 32. Specifically, the light-emitting functional part 19 may also be located within the first opening 31. Specifically, the light-emitting part 41 may include an organic light-emitting layer, while the light-emitting functional part 19 may not include an organic light-emitting layer.

[0053] In one possible implementation, see Figure 1 and Figure 6 As shown, the light-emitting functional unit 19 includes: a first sub-light-emitting functional unit 191, and a second sub-light-emitting functional unit 192 located in the first sub-light-emitting functional unit 191 away from the inner wall of the second opening 32; The first light-emitting functional unit 191 may include: a hole transport layer and / or an electron blocking layer; The second light-emitting functional unit 192 may include: an electron transport layer and / or a hole blocking layer.

[0054] In one possible implementation, see Figure 1 and Figure 6As shown, the display substrate may further include an active layer 7 between the substrate 1 and the planarization layer 16, a first gate layer 8 between the active layer 7 and the planarization layer 16, a second gate layer 83 between the first gate layer 8 and the planarization layer 16, and a source-drain layer 9 between the second gate layer 83 and the planarization layer 16. The active layer 7 may include a first active portion and a second active portion 74. The first active portion may include a channel region 71, a source region 72 on one side of the channel region 71, and a drain region 73 on the other side of the channel region. The first gate layer 8 may include a first gate 81 and a second gate 82. The source-drain layer 9 may include a source electrode 91, a drain electrode 92, and a first signal line 93. The source electrode 91 may be electrically connected to the source region 72, and the drain electrode 92 may be electrically connected to the drain region 73. The first electrode 21 may be electrically connected to the drain electrode 92. Specifically, the second gate 82 can be used as one end of a capacitor, the second gate layer 83 can be used as the other end of a capacitor, and the first signal line 93 can be used as a signal line connected to the capacitor.

[0055] In one possible implementation, see Figure 1 and Figure 6 As shown, a flexible substrate 11 may be disposed between the substrate 1 and the active layer 7 in the display substrate. A buffer layer 12 may also be disposed between the flexible substrate 11 and the active layer 7. A first gate insulating layer 13 may also be disposed between the active layer 7 and the first gate layer 8. A second gate insulating layer 14 may also be disposed between the first gate layer 8 and the second gate layer 83. An interlayer dielectric layer 15 may also be disposed between the second gate insulating layer 14 and the source / drain layer 9.

[0056] In one possible implementation, the display substrate further includes an insulating layer (not shown) located between the substrate 1 and the first electrode layer 2, and a third electrode layer (not shown) located between the insulating layer and the substrate 1; the third electrode layer includes multiple signal lines (not shown), and a third electrode (not shown) insulated from the signal lines; the insulating layer includes vias (not shown) exposing the third electrode; the auxiliary electrode 22 overlaps with the third electrode through the vias. In this embodiment, the overlap between the auxiliary electrode 22 and the third electrode of the third electrode layer is increased, such that the third electrode of the third electrode layer and the annular auxiliary electrode 22 together form an auxiliary cathode, further reducing the resistance of the second electrode layer.

[0057] In one possible implementation, the third electrode layer may include a source / drain layer 9, a first gate layer 8, and / or a second gate layer 83.

[0058] In one possible implementation, the signal line may include: a data line, a common electrode lead, and / or a gate line.

[0059] In one possible implementation, the insulating layer includes a planarization layer 16, an interlayer dielectric layer 15, a first gate insulating layer 13, and / or a second gate insulating layer 14.

[0060] In one possible implementation, see Figure 8 or Figure 9 As shown, the display substrate also includes an encapsulation layer 17 located on the side of the second electrode layer 5 opposite to the first electrode layer 2.

[0061] In one possible implementation, see Figure 8 or Figure 9 As shown, the encapsulation layer 17 may include a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer stacked sequentially.

[0062] Based on the same inventive concept, embodiments of this disclosure also provide a display panel, which includes a display substrate as provided in embodiments of this disclosure.

[0063] Based on the same inventive concept, this disclosure also provides a method for manufacturing a display substrate according to embodiments of this disclosure, see [link to relevant documentation]. Figure 10 As shown, the manufacturing method includes: Step S100: Provide a substrate; Step S200: A first electrode layer is formed on one side of the substrate, wherein the first electrode layer includes a plurality of first electrodes and auxiliary electrodes surrounding the first electrodes, and the orthographic projections of the auxiliary electrodes onto the substrate do not overlap with the orthographic projections of the first electrodes onto the substrate; specifically, in conjunction with Figures 1-9 As shown, the first electrode layer 2 can be fabricated using processes such as sputtering, photolithography, exposure, and etching. This layer also fabricates a ring-shaped metal surrounding the pixel area (i.e., auxiliary electrode 22) and the pin pads required for power application (i.e., the first heating pad 63 and the second heating pad 64). Step S300: A pixel defining layer is formed on the side of the first electrode layer facing away from the substrate, wherein the pixel defining layer includes a first opening exposing the first electrode and a second opening exposing an auxiliary electrode; specifically, in conjunction with Figures 1-9 As shown, the pixel-defining layer 3 can be prepared using processes such as coating, exposure, and development. This layer adds openings at the positions of the annular metal (i.e., auxiliary electrode 22) and the pin pad (i.e., the first heating pad 63 and the second heating pad 64) to expose the auxiliary electrode 22. Step S400: Form a light-emitting layer on the side of the pixel definition layer opposite to the first electrode layer; Step S500: Apply power to the auxiliary electrode to burn off the light-emitting layer at the location of the auxiliary electrode; Step S600: A second electrode layer is formed on the first side of the light-emitting layer away from the first electrode layer, so that the second electrode layer overlaps with the auxiliary electrode at the second opening.

[0064] In this embodiment, the first electrode layer 2 includes a plurality of first electrodes 21 and auxiliary electrodes 22 located around the first electrodes 21. After the light-emitting layer 4 is prepared, a step-by-step power-on process is added to the auxiliary electrodes 22 surrounding the first electrodes 21, causing the auxiliary electrodes 22 surrounding the first electrodes 21 to heat up, further causing the light-emitting layer 4 directly above it to be ablated and sublimated. Then, the second electrode layer 5 is formed, using the conventional first electrode layer 2 as an auxiliary electrode. The light-emitting layer 4 on it is removed by short-circuit heating, achieving overlap with the second electrode layer 5, thereby reducing the resistance of the second electrode layer 5.

[0065] Although preferred embodiments of the invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including both the preferred embodiments and all changes and modifications falling within the scope of the invention.

[0066] Obviously, those skilled in the art can make various modifications and variations to the embodiments of the present invention without departing from the spirit and scope of the embodiments of the present invention. Thus, if these modifications and variations to the embodiments of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention also intends to include these modifications and variations.

Claims

1. A display substrate, wherein, include: Substrate; A first electrode layer, located on one side of the substrate, includes a plurality of first electrodes and an auxiliary electrode located around the first electrodes, wherein the orthographic projection of the auxiliary electrode on the substrate does not overlap with the orthographic projection of the first electrode on the substrate. A pixel defining layer, located on the side of the first electrode layer opposite to the substrate, includes a first opening exposing the first electrode and a second opening exposing the auxiliary electrode; A light-emitting layer is located on the side of the pixel defining layer opposite to the first electrode layer. The light-emitting layer includes a light-emitting portion located in the first opening and a hollow portion located in the second opening. The second electrode layer is located on the side of the light-emitting layer away from the pixel limiting layer, and the second electrode layer overlaps with the auxiliary electrode at the second opening; The first electrode layer further includes a first connector located at one end of the auxiliary electrode and a second connector located at the other end of the auxiliary electrode; the first connector and the second connector are configured to apply power to the auxiliary electrode after the light-emitting layer is formed, so as to burn the light-emitting layer at the second opening and form the hollow portion; the outer contour of the auxiliary electrode is rectangular, and the first connector and the second connector are respectively located at the two ends of the diagonal of the rectangle; The auxiliary electrode includes a plurality of first sub-auxiliary electrodes extending along a first direction and arranged along a second direction, and a plurality of second sub-auxiliary electrodes connected to adjacent first sub-auxiliary electrodes; a first connector is connected to the first sub-auxiliary electrode at one outer edge of the auxiliary electrode, and a second connector is connected to the first sub-auxiliary electrode at the other outer edge of the auxiliary electrode; some of the second sub-auxiliary electrodes are open-circuited.

2. The display substrate as claimed in claim 1, wherein, The auxiliary electrode is a grid-like structure with multiple third openings, and the first electrode is located within the third openings.

3. The display substrate as described in claim 2, wherein, There is a gap between the auxiliary electrode and the first electrode.

4. The display substrate as claimed in claim 2, wherein, The shape of the third opening is the same as the shape of the first electrode located within the third opening.

5. The display substrate as claimed in claim 2, wherein, The size of at least part of the third opening is different.

6. The display substrate as claimed in claim 2, wherein, The plurality of first sub-auxiliary electrodes include a first sub-electrode group and a second sub-electrode group arranged alternately along the second direction; each of the first sub-electrode group and the second sub-electrode group includes at least one first sub-auxiliary electrode; The second sub-auxiliary electrode that is disconnected is located only within the first sub-electrode group, and the same first sub-electrode group includes at least one second sub-auxiliary electrode that connects to an adjacent first sub-auxiliary electrode.

7. The display substrate as claimed in claim 6, wherein, The second sub-auxiliary electrode, which is connected to the adjacent first sub-auxiliary electrode in two adjacent first sub-electrode groups, is located at different ends of the display substrate in the first direction.

8. The display substrate as claimed in claim 6, wherein, Within the second sub-electrode group, each of the second sub-auxiliary electrodes is connected to an adjacent first sub-auxiliary electrode.

9. The display substrate as claimed in claim 6, wherein, The adjacent first sub-electrode group and the second sub-electrode group share a first sub-auxiliary electrode.

10. The display substrate according to any one of claims 2-9, wherein, The display substrate further includes a planarization layer located between the substrate and the first electrode layer, and a heat insulation layer located between the planarization layer and the first electrode layer and in contact with the auxiliary electrode. The orthographic projection of the heat insulation layer on the substrate covers the orthographic projection of the auxiliary electrode on the substrate, and the orthographic projection of the heat insulation layer on the substrate and the orthographic projection of the first electrode on the substrate do not overlap.

11. The display substrate as claimed in claim 10, wherein, The heat insulation layer has a grid pattern of multiple fourth openings, each of which corresponds to a third opening, and the orthographic projection of the third opening onto the substrate covers the orthographic projection of the fourth opening onto the substrate.

12. The display substrate as claimed in claim 11, wherein, The orthographic projection shape of the third opening on the substrate is the same as the orthographic projection shape of the fourth opening on the substrate.

13. The display substrate as claimed in claim 11, wherein, The linewidth of the heat insulation layer is greater than the linewidth of the auxiliary electrode.

14. The display substrate as claimed in claim 10, wherein, The material of the heat insulation layer includes silicon dioxide or silicon nitride.

15. The display substrate as claimed in claim 1, wherein, The display substrate further includes an insulating layer located between the substrate and the first electrode layer, and a third electrode layer located between the insulating layer and the substrate; The third electrode layer includes multiple signal lines and a third electrode insulated from the signal lines; the insulating layer includes vias exposing the third electrode. The auxiliary electrode is connected to the third electrode through the via.

16. The display substrate as claimed in claim 15, wherein, The third electrode layer includes a source / drain layer, a first gate layer, and / or a second gate layer.

17. The display substrate as claimed in claim 16, wherein, The signal lines include: data lines, common electrode leads, and / or gate lines.

18. The display substrate as claimed in claim 15, wherein, The insulating layer includes a planarization layer, an interlayer dielectric layer, a first gate insulating layer, and / or a second gate insulating layer.

19. The display substrate as claimed in claim 1, wherein, The display substrate also includes a light-emitting functional part located on the inner wall of the second opening.

20. The display substrate as claimed in claim 19, wherein, The light-emitting functional part includes: a first sub-light-emitting functional part, and a second sub-light-emitting functional part located in the first sub-light-emitting functional part away from the inner wall of the second opening; The first light-emitting functional unit includes: a hole transport layer and / or an electron blocking layer; The second sub-light-emitting functional unit includes: an electron transport layer and / or a hole blocking layer.

21. A display device, wherein, Includes the display substrate as described in any one of claims 1-20.

22. A method for manufacturing a display substrate as described in any one of claims 1-20, wherein, include: Provide a substrate; A first electrode layer is formed on one side of a substrate, wherein the first electrode layer includes a plurality of first electrodes and an auxiliary electrode surrounding the first electrodes, wherein the orthographic projection of the auxiliary electrode on the substrate does not overlap with the orthographic projection of the first electrode on the substrate. A pixel defining layer is formed on the side of the first electrode layer opposite to the substrate, wherein the pixel defining layer includes a first opening exposing the first electrode and a second opening exposing the auxiliary electrode; A light-emitting layer is formed on the side of the pixel defining layer opposite to the first electrode layer; Apply power to the auxiliary electrode to burn off the light-emitting layer at the location of the auxiliary electrode; A second electrode layer is formed on the first side of the light-emitting layer opposite to the first electrode layer, so that the second electrode layer overlaps with the auxiliary electrode at the second opening.

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