Chip verification task processing method and device, electronic equipment and readable storage medium

Abstract

The application provides a chip verification task processing method and device, electronic equipment and a readable storage medium, and relates to the technical field of computers. The method comprises the following steps: in response to a chip verification request, obtaining task information of each chip verification task in at least one chip verification task and object parameters of each processing object in at least one processing object; obtaining a task complexity value of the chip verification task according to the task information; obtaining an object evaluation value of the processing object according to the object parameters; and assigning the chip verification task to the processing object for chip verification according to the task complexity value and the object evaluation value. The complexity value of the chip verification task is positively correlated with the object evaluation value of the processing object assigned to the chip verification task. The method can quickly assign the chip verification task to the processing object of the video for verification.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of computer, and particularly relates to a chip verification task processing method and device, electronic equipment and readable storage medium. BACKGROUND

[0002] Chip verification is very important in integrated circuits. Chip verification is used to determine whether a chip design meets the specification requirements and can work normally under various preset conditions. With the increasing complexity of chip design, the chip verification process is also becoming more and more complex.

[0003] In the related art, there is a lack of a chip verification task allocation method to quickly allocate chip verification tasks to appropriate processing objects, which affects the verification efficiency and verification accuracy of chip verification. SUMMARY

[0004] Embodiments of the present application provide a chip verification task processing method and device, electronic equipment and readable storage medium to solve the problem of being unable to quickly perform chip verification in the prior art.

[0005] In a first aspect, embodiments of the present application provide a chip verification task processing method, comprising:

[0006] In response to a chip verification request, task information of each chip verification task in at least one chip verification task and object parameters of each processing object in at least one processing object are respectively acquired;

[0007] According to the task information, a task complexity value of the chip verification task is acquired;

[0008] According to the object parameters, an object evaluation value of the processing object is acquired;

[0009] According to the task complexity value and the object evaluation value, the chip verification task is allocated to the processing object for chip verification; the complexity value of the chip verification task is positively correlated with the object evaluation value of the processing object allocated to the chip verification task.

[0010] In a second aspect, embodiments of the present application provide a chip verification task processing device, comprising:

[0011] A first acquisition module is configured to, in response to a chip verification request, acquire task information of each chip verification task in at least one chip verification task and object parameters of each processing object in at least one processing object respectively;

[0012] A second acquisition module is configured to acquire a task complexity value of the chip verification task according to the task information;

[0013] a third obtaining module, configured to obtain an object evaluation value of the processing object according to the object parameter;

[0014] an assigning module, configured to assign the chip verification task to the processing object for chip verification according to the task complexity value and the object evaluation value; the complexity value of the chip verification task is positively correlated with the object evaluation value of the processing object to which the chip verification task is assigned.

[0015] In a third aspect, an embodiment of the present application further provides an electronic device, including a processor;

[0016] a memory for storing instructions executable by the processor;

[0017] The processor is configured to execute the instructions to implement the method in the first aspect.

[0018] In a fourth aspect, an embodiment of the present application further provides a computer-readable storage medium, when instructions in the computer-readable storage medium are executed by a processor of an electronic device, the electronic device can execute the method in the first aspect.

[0019] In the embodiment, the task complexity value of the chip verification task and the object evaluation value of the processing object are obtained, and the chip verification task is assigned to the processing object for chip verification according to the task complexity value and the object evaluation value. The task complexity value reflects the difficulty and complexity of the chip verification task, and the object evaluation value reflects the chip verification capability of the processing object. According to the task complexity value and the object evaluation value, the chip verification task is assigned, which is equivalent to reasonably assigning the chip verification task to the processing object with corresponding capability and experience for chip verification according to the difficulty and complexity of the task. According to the task assignment strategy of the embodiment, the accuracy and reliability of the chip verification task verification result can be ensured. Assigning the chip task to the processing object for chip verification can convert the closed-source and high-cost chip verification task into an open verification mode through common verification of a large number of chip verification users corresponding to the processing object, which can reduce the time and cost consumed by chip verification.

[0020] The above description is only a summary of the technical solutions of the present application. In order to more clearly understand the technical means of the present application, the following detailed description can be implemented according to the content of the specification, and in order to make the above and other purposes, features and advantages of the present application more obvious and easy to understand, the following detailed description of the specific embodiments of the present application is given. BRIEF DESCRIPTION OF DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the embodiments description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained without creative labor based on these drawings.

[0022] Figure 1 is a step flow chart of a chip verification task processing method provided by an embodiment of the present application;

[0023] Figure 2 is a structural schematic diagram of a chip verification system provided by an embodiment of the present application;

[0024] Figure 3 is a structural schematic diagram of another chip verification system provided by an embodiment of the present application;

[0025] Figure 4 is a step flow chart of a chip verification task processing method provided by an embodiment of the present application;

[0026] Figure 5 is a structural schematic diagram of a chip verification cloud platform provided by an embodiment of the present application;

[0027] Figure 6 is a step flow chart of a chip verification task processing method provided by an embodiment of the present application;

[0028] Figure 7 is a step flow chart of executing a chip verification task based on a chip verification cloud platform provided by an embodiment of the present application;

[0029] Figure 8 is a block diagram of a chip verification task processing device provided by an embodiment of the present application;

[0030] Figure 9 is a block diagram of an electronic device provided by an embodiment of the present application;

[0031] Figure 10 is a block diagram of another electronic device provided by another embodiment of the present application. DETAILED DESCRIPTION

[0032] The technical solutions in the embodiments of the present application will be described clearly and completely in combination with the drawings in the embodiments of the present application. Obviously, the described embodiments are only some embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor are within the scope of protection of the present application.

[0033] The terms "first", "second", etc. in the specification and claims of the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances, so that the embodiments of the present application can be implemented in an order other than those illustrated or described herein, and the objects distinguished by "first", "second", etc. are generally a class and do not limit the number of objects, for example, the first object can be one or more. In addition, the term "and / or" in the specification and claims is used to describe the association relationship of the associated objects, which means that there can be three relationships, for example, A and / or B can represent: A exists alone, A and B exist together, and B exists alone. The character " / " generally represents an "or" relationship between the associated objects. The term "multiple" in the embodiments of the present application means two or more, and other quantifiers are similar.

[0034] The chip verification task processing method of the embodiments of the present application will be further exemplarily described below in combination with Figure 1 The chip verification task processing method of the embodiments of the present application will be further exemplarily described below in combination with Figure 1 The method can include the following steps:

[0035] Step 101, in response to a chip verification request, obtaining task information of each chip verification task in at least one chip verification task, and object parameters of each processing object in at least one processing object, respectively.

[0036] For example, the method of the embodiments of the present application can be applied to a chip verification cloud platform. For example, the processing object can be a mobile terminal, a personal computer, a server, or other processing devices. For example, the processing object has a user account, the user account has object parameters, and the object parameters of the user account are the object parameters of the processing object corresponding to the user account. Referring to Figure 2 The chip verification cloud platform obtains the task information of the chip verification task and the object parameters of at least one user account in the user terminal interacting with the chip verification cloud platform in response to the received chip verification request. Wherein, the user terminal can include multiple user accounts, such as Figure 2 User account 1, user account 2, and user account n in Wherein, one user terminal can have one user account, or multiple user accounts, and the user terminal interacting with the chip verification cloud platform can have one or more.

[0037] For example, referring to Figure 3The chip verification cloud platform responds to chip verification requests sent by the chip verification task management module in the chip verification system, obtaining the chip verification task requested. Further, the chip verification task management module responds to the operation of platform maintenance personnel inputting chip verification tasks, obtains the chip verification tasks, generates a verification request for verifying the chip verification task, and sends it to the chip verification cloud platform. The user client has multiple user accounts, each with a corresponding chip verification user. The chip verification user interacts with the chip verification cloud platform through their user account on the user client.

[0038] Chip verification tasks can include the chip code to be verified, a description of the verification task, and acceptance criteria. Platform maintenance personnel publish chip verification tasks to the chip verification cloud platform through the chip verification task management module. The chip verification cloud platform displays the information in the chip verification tasks for chip verification users logged in with their user accounts to browse. Furthermore, chip verification users logged in with their user accounts can also select a chip verification task from the multiple chip verification tasks displayed on the chip verification cloud platform.

[0039] The task information for chip verification tasks reflects the complexity of the task. For example, it can include the number of lines of code and the number of interfaces in the chip code corresponding to the chip verification task.

[0040] The object parameters of the processing object are parameters that reflect the chip verification capabilities of the chip verification user corresponding to the processing object. For example, they may include the amount of chip verification tasks completed within a preset historical time period, the average time to complete the chip verification tasks, and the ratio of the number of chip verification tasks that report the completion results to the chip verification task allocation platform to the amount of chip verification tasks completed.

[0041] Chip verification tasks can include functional verification, performance verification, compatibility verification, stability verification, and security verification. Specifically, functional verification ensures the chip performs specific functions according to design specifications; performance verification tests the chip's performance under different operating conditions; compatibility verification verifies the chip's compatibility with other hardware or software; stability verification verifies the chip's stability and reliability during long-term operation and under various environmental conditions; and security verification verifies the chip's security performance.

[0042] Step 102: Obtain the task complexity value of the chip verification task based on the task information.

[0043] Among them, the task complexity value is positively correlated with the complexity of the chip verification task.

[0044] For example, the task information can include the number of lines of code to be verified in the chip verification task, the number of interfaces, or other parameters that can reflect the complexity of the chip verification task. The task complexity value is positively correlated with the number of lines and the number of interfaces. The more lines and interfaces, the higher the task complexity value of the chip verification task.

[0045] In step 103, the object evaluation value of the processing object is obtained according to the object parameter.

[0046] The object evaluation value can reflect the upper limit of the complexity value of the chip verification task that the chip verification user can handle corresponding to the processing object. The object evaluation value is positively correlated with the upper limit of the complexity value of the chip verification task. Specifically, the higher the object evaluation value of the processing object, the higher the upper limit of the complexity value of the chip verification task that the chip verification user corresponding to the processing object can handle. The lower the object evaluation value of the processing object, the lower the upper limit of the complexity value of the chip verification task that the chip verification user corresponding to the processing object can handle.

[0047] For example, the object evaluation value is A1, the complexity value of the chip verification task that can be handled is B1, the account rating value is A2, and the complexity value of the chip verification task that can be handled is B2. A1 is less than A2, B1 is less than B2, the chip verification user with the object evaluation value of A1 can handle the chip verification task with the complexity value of B1 and the complexity value less than B1, and the chip verification user with the object evaluation value of A2 can handle the chip verification task with the complexity value of B2 and the complexity value less than B2.

[0048] In step 104, the chip verification task is assigned to the processing object for verification according to the task complexity value and the object evaluation value.

[0049] The complexity value of the chip verification task is positively correlated with the object evaluation value of the processing object assigned to the chip verification task.

[0050] For example, the complexity value of the chip verification task is sorted to obtain the sorting result of the complexity value, and the object evaluation value is sorted to obtain the sorting result of the object evaluation value. The processing object is assigned to the chip verification task in order from high to low according to the complexity value. For the same chip verification task, a preset number of processing objects can be obtained in order from high to low according to the object evaluation value from the processing objects not assigned to the chip verification task, and the processing objects are assigned to the chip verification task. The number of processing objects for verifying the same chip verification task can be set according to the chip verification user demand. For example, the processing object has a user account, and the chip verification task is assigned to the user account of the processing object for verification according to the task complexity value and the object evaluation value.

[0051] In practical applications, chip verification is a systematic process including simulation, verification environment building, test case design, test execution and result analysis and other steps. With the increasing complexity of chip design, the chip verification process also becomes more and more complex and time-consuming.

[0052] In practical applications, there are various simulation tools for chip verification, such as hardware description language (HDL) language simulation software (ModelSim), compiled Verilog simulator (Visual Studio Code, VCS), hybrid simulator (such as NC-Sim) and the like. Dynamic verification of the designed chip through the simulation tool can verify the behavior of the chip under various input conditions. With the increasing complexity of chip design, the time for simulating and verifying the chip increases exponentially, making it difficult to complete comprehensive verification of the chip within a reasonable time. For example, the designed chip can be loaded onto a field programmable gate array (FPGA) or other hardware platform for chip verification and simulation of the actual running environment. However, this method of chip verification by loading onto hardware requires special hardware equipment and is relatively expensive. For example, the verification environment constructed by the Universal Verification Methodology (UVM) framework and library can be used to verify the modularity and reusability of the chip, but the UVM framework is relatively complex and requires verification personnel with high professional skills to perform chip verification through the UVM framework.

[0053] For example, the processing object of the present embodiment has a user account, which is an account assigned to a chip verification user with certain integrated circuit basic knowledge, and the chip verification user corresponding to the processing object is a chip verification user who has undergone chip verification skill training and guidance. The method of the present embodiment can be implemented based on a high-performance chip verification cloud platform, and the chip verification cloud platform provides all simulation tools for the processing object. The chip verification user logs in to the chip verification cloud platform through the processing object and performs chip verification through the tools provided by the chip verification cloud platform. Further, the verification tools provided by the chip verification cloud platform do not need to be implemented using the UVM framework, thereby reducing the requirement for professional skills of the chip verification user.

[0054] In the embodiment, a task complexity value of a chip verification task and an object evaluation value of a processing object are obtained, and the chip verification task is allocated to the processing object for chip verification according to the task complexity value and the object evaluation value. The task complexity value reflects the difficulty and complexity of the chip verification task, and the object evaluation value reflects the chip verification capability of the processing object. According to the task complexity value and the object evaluation value, the chip verification task is allocated, which is equivalent to reasonably allocating the chip verification task to the processing object with corresponding capability and experience for chip verification according to the difficulty and complexity of the task. According to the task allocation strategy of the embodiment, the accuracy and reliability of the chip verification task verification result can be ensured. The chip task is allocated to the processing object for chip verification, which can convert the closed-source high-cost chip verification task into an open verification mode through common verification of a large number of chip verification users corresponding to the processing object, and can reduce the time consumed by chip verification.

[0055] Figure 4 is another step flowchart of a chip verification task processing method provided by the embodiment of the application, referring to Figure 4 , the method can include the following steps:

[0056] Step 201, in response to a chip verification request, obtaining task information of each chip verification task in at least one chip verification task and object parameters of each processing object in at least one processing object, respectively.

[0057] The method of this step has been described in the foregoing step 101, which will not be repeated here.

[0058] Step 202, obtaining the number of code lines and the number of interfaces in the task information.

[0059] The number of code lines is the number of code lines to be verified in the chip verification task, and the number of interfaces is the number of interfaces to be verified in the verification task.

[0060] Step 203, obtaining a task complexity value of the chip verification task according to the number of code lines and the number of interfaces.

[0061] The task complexity value is positively correlated with the number of code lines, and the task complexity value is positively correlated with the number of interfaces. For example, the object parameters include verification behavior parameters of the processing object in a historical time period and verification qualification parameters of the processing object.

[0062] For example, according to the corresponding relationship between the number of code lines, the number of interfaces, a preset number of code lines, a preset number of interfaces and a preset task complexity value, a preset task complexity value corresponding to the number of code lines and the number of interfaces is obtained from the corresponding relationship, and is determined as the task complexity value of the chip verification task.

[0063] Step 204, input the verification behavior parameters into the verification behavior evaluation model to obtain a verification behavior evaluation value.

[0064] For example, the verification behavior parameters include at least two of the following: the task quantity of the chip verification tasks completed in a preset historical time period, the average time of completing the chip verification tasks, and the ratio of the chip verification tasks for which the platform feedback completion result is assigned to the task quantity of the completed chip verification tasks.

[0065] In one embodiment, there are multiple verification behavior parameters, and step 204 can include the following sub-steps:

[0066] Sub-step 2041, average the multiple verification behavior parameters to obtain the verification behavior evaluation value.

[0067] For example, the verification behavior parameters include the task quantity of the chip verification tasks completed in a preset historical time period. For example, the preset historical time period is one month, the total number of the chip verification tasks completed by the chip verification user corresponding to the processing object i in n months can be obtained, and then the average task quantity completed each month is calculated, and the average value of the obtained task quantity is determined as the task quantity N of the chip verification tasks completed in the preset historical time period. i :

[0068]

[0069] wherein S j represents the task quantity completed by the chip verification user corresponding to the processing object i in the jth month, and n represents the number of months. It should be noted that the preset historical time period can be one month, one quarter, or other time periods, and the length of the preset historical time period is not limited herein.

[0070] For example, the verification behavior parameters include the average time of completing the chip verification tasks in a preset historical time period, and the average time can reflect the immediacy of the chip verification user corresponding to the processing object in completing the chip verification tasks. The average time T i of the processing object i in completing the chip verification tasks is:

[0071]

[0072] wherein M d represents the release time of the dth task, C d represents the completion time of the dth task, and m represents the total number of completed tasks.

[0073] For example, the verification behavior parameter includes a ratio of chip verification tasks that the processing object i feeds back to the chip verification task allocation platform to the amount of completed chip verification tasks, which can reflect the feedback of the chip verification user corresponding to the processing object i to the chip verification task. When the processing object i completes the chip verification task, the ratio P of chip verification tasks that the processing object i feeds back to the chip verification task allocation platform to the amount of completed chip verification tasks. i For example, the verification behavior parameter includes a ratio of chip verification tasks that the processing object i feeds back to the chip verification task allocation platform to the amount of completed chip verification tasks, which can reflect the feedback of the chip verification user corresponding to the processing object i to the chip verification task. When the processing object i completes the chip verification task, the ratio P of chip verification tasks that the processing object i feeds back to the chip verification task allocation platform to the amount of completed chip verification tasks.

[0074]

[0075] wherein F represents the number of tasks that provide feedback, and R represents the total number of completed tasks.

[0076] In the case where the verification behavior parameter includes the amount of chip verification tasks completed in a preset historical time period, the average time of completing chip verification tasks, and the ratio of chip verification tasks that the processing object i feeds back to the chip verification task allocation platform to the amount of completed chip verification tasks, the verification behavior evaluation value of the processing object i is:

[0077]

[0078] wherein N i represents the amount of chip verification tasks completed by the i th processing object in a preset historical time period; T i represents the average time of completing chip verification tasks by the chip verification user corresponding to the i th processing object; and P i represents the ratio of chip verification tasks that the processing object i feeds back to the chip verification task allocation platform to the amount of completed chip verification tasks.

[0079] Step 205: input the verification qualification parameter into the verification qualification evaluation model to obtain a verification qualification evaluation value.

[0080] wherein the verification qualification parameter includes a historical cumulative duration of performing chip verification and a test evaluation value of performing verification test on a preset chip verification task.

[0081] In one embodiment, step 205 can include the following sub-steps:

[0082] Sub-step 2051: average a plurality of verification qualification parameters to obtain a verification qualification evaluation value.

[0083] The verification qualification parameter can also include a professional background of the chip verification user corresponding to the processing object.

[0084] For example, the historical cumulative duration of the chip verification performed by the chip verification user corresponding to the processing object can be obtained, a score corresponding to the historical cumulative duration can be obtained according to a preset correspondence between chip verification durations and scores, and the score is determined as the historical cumulative duration of the chip verification. The longer the historical cumulative duration is, the deeper the seniority of the chip verification user corresponding to the processing object in performing chip verification is.

[0085] For example, the preset task is a preset chip verification task, the chip verification user performs programming for the preset task within a specified time, and a comprehensive score of the correctness, efficiency and robustness of the programmed code is obtained to obtain the technical ability evaluation value. Further, the correctness of the verification code is verified, the correctness includes correct code execution and incorrect code execution, a score of the correctness of the code is obtained according to a preset score corresponding to the correct result and the error result, a time for completing the programming is obtained, a score corresponding to the time for completing the programming is obtained according to a preset correspondence between time intervals and scores, the score is determined as the efficiency score, the robustness score is obtained by obtaining a ratio of the number of successful executions of the code to the total number of executions according to a preset correspondence between ratio intervals and scores, and a weighted sum of the correctness score, the efficiency score and the robustness score is obtained, and the weighted sum result is determined as the test evaluation value.

[0086] For example, the preset task is a programming competition (for example, an algorithm test question of the ACM International Collegiate Programming Contest (ICPC)), which includes data structure test, algorithm implementation test, code optimization test, code debugging and other tests. The programming test of the algorithm test question is performed through an online programming platform of an official platform, and the programming task completed by the chip verification user corresponding to the processing object within a specified preset time is obtained. The correctness, efficiency and robustness of the code automatically evaluated by the online programming platform are obtained, and the scores of the three parameters are obtained. The scores of the three parameters are weighted and fused, and the weighted sum result is determined as the test evaluation value.

[0087] The professional background evaluation value can be quantified by professional question testing. Specifically, the chip verification user corresponding to the processing object can be tested by professional questions in written form. The professional questions can include basic knowledge of computer system structure, digital circuit design and other disciplines.

[0088] In step 206, the verification behavior evaluation value and the verification qualification evaluation value are weighted and fused, and a first weighted fusion value is obtained. The object evaluation value is determined as the first weighted fusion value.

[0089] According to the task quantity of the chip verification task completed by the processing object in a preset historical time period, the average time of completing the chip verification task, and the ratio of the chip verification task to which the platform feedback completion result is allocated to the task quantity of the completed chip verification task, a verification behavior evaluation value is obtained; according to the historical cumulative length of performing chip verification and the test evaluation value of performing verification test on the preset chip verification task, a verification qualification evaluation value is obtained. The verification behavior evaluation value and the verification qualification evaluation value are weighted and fused, and the obtained first weighted fusion value is determined as an object evaluation value. The object evaluation value can reflect the historical performance and skill level of the chip verification user corresponding to the processing object, and the chip verification task can be allocated to the most suitable processing object based on the object evaluation value, so that the chip verification is performed by the chip verification user corresponding to the processing object.

[0090] The object evaluation value Weight of the processing object i is: i

[0091] The object evaluation value Weight of the processing object i is: i i i

[0092] The object evaluation value Weight of the processing object i is: i i The object evaluation value Weight of the processing object i is: i

[0093] Step 207, obtaining the product of the task complexity value of the chip verification task and the object evaluation value of the processing object allocated to the chip verification task, and determining the product as the task priority of the chip verification task.

[0094] The task priority Priority of the processing object i is: i

[0095] The task priority Priority of the processing object i is: i

[0096] The task priority Priority of the processing object i is: i

[0097] Step 208, determining the allocation order of at least one chip verification task according to the task priority, and allocating the chip verification task to the processing object for verification according to the allocation order.​​​​​​​​

[0098] The complexity value of the chip verification task is positively correlated with the object evaluation value of the processing object assigned to the chip verification task.

[0099] For example, the same processing object can be assigned multiple chip verification tasks, and the multiple chip verification tasks are sorted according to the task priority. The chip verification tasks are sequentially assigned to the processing object according to the order from high to low of the task priority.

[0100] In an embodiment, the chip verification task is to verify the correctness of the register transfer level code of the preset chip; and step 208 can include the following sub-steps:

[0101] In sub-step 2081, the chip verification task is assigned to the processing object, and the correctness of the register transfer level code is verified by the verification program corresponding to the processing object.

[0102] In summary, in the embodiment, the task information of the chip verification task and the object parameters of the processing object are obtained. The more the number of code lines of the code to be verified and the number of interfaces of the chip verification task, the heavier the task amount of the chip verification task, and the greater the complexity value of the chip verification task. According to the number of code lines and the number of interfaces of the task information, the complexity value of the chip verification task can be obtained, which can accurately and comprehensively reflect the complexity and difficulty of the chip verification task. According to the verification behavior parameters and the verification qualification parameters of the processing object, the account rating value of the processing object is obtained, and the object evaluation value can accurately and comprehensively reflect the chip verification ability of the chip verification user corresponding to the processing object. The product of the task complexity value of the chip verification task and the account rating value is determined as the task priority of the chip verification task, and according to the task priority, the chip verification task can be quickly assigned to the appropriate processing object for verification.

[0103] In an embodiment, the chip design document and the verification tool can be published in an open source manner to attract more chip verification users to apply for processing objects, so that the chip verification users can log in to the chip verification cloud platform through the processing objects to perform chip design and verification, thereby promoting the sharing and dissemination of technology and promoting the technological progress of the chip industry. By providing free design documents and verification tools, more research institutions and enterprises can participate in chip design and verification, thereby reducing research and development costs, accelerating chip research and development rates, and promoting the development of the chip industry.

[0104] The platform operation personnel can log in to the chip verification cloud platform through a management account to manage the chip verification cloud platform and publish chip verification tasks in the chip verification cloud platform.

[0105] The chip verification task and incentive mechanism information can be published by the chip verification cloud platform, the crowdsourcing crowds can sign up through the user accounts, and the chip verification tasks can be performed by the user accounts, the user accounts are screened, then the verification tasks are distributed to the screened user accounts, and the distribution results are fed back to the user accounts in time.

[0106] The chip verification task processing method can include the following steps:

[0107] Step A1, the chip verification user logs in the chip verification cloud platform based on the user account, browses the chip verification tasks published by the chip verification cloud platform, and takes the chip verification tasks through the corresponding processing object.

[0108] Specifically, the chip verification task taken by the processing object is the chip verification task distributed to the processing object through the above embodiment.

[0109] Step A2, the chip verification code written by the processing object is obtained.

[0110] Specifically, the written chip verification code is a verification code written for the chip RTL code.

[0111] Step A3, the chip verification code is uploaded to the chip verification cloud platform by the processing object.

[0112] The verification code is uploaded to the chip verification cloud platform, and the chip verification platform executes the verification code to execute the chip verification task.

[0113] Step A4, the chip verification cloud platform performs chip verification according to the chip verification code and obtains the chip verification result.

[0114] Specifically, based on the verification tool set by the official platform in the chip verification cloud platform, the chip verification is performed according to the chip verification code and the chip verification result is obtained.

[0115] Step A5, the chip verification result fed back by the chip verification cloud platform is recycled by the processing object, the verification result is analyzed, and a verification report is written.

[0116] The verification result can include information such as whether the chip verification passes.

[0117] Step A6, the verification result and the verification report are uploaded to the chip verification cloud platform by the processing object, so that the chip verification task is accepted by the management personnel of the chip verification cloud platform.

[0118] Figure 6 is a step flow chart of a chip verification task processing method provided by the embodiment of the application, referring to Figure 6 , the method can include the following steps:

[0119] Step S1, setting chip verification task related information in the chip verification cloud platform.

[0120] The platform operation personnel can log in to the chip verification cloud platform through the management account to manage the chip verification cloud platform, and set chip verification related data in the management cloud platform.

[0121] Further, step S1 can include the following sub-steps:

[0122] Sub-step S11, setting chip verification tasks.

[0123] Specifically, according to chip design specification and other materials, split the chip verification points, and write verification task instructions for each chip verification point.

[0124] Sub-step S12, setting incentive mechanism.

[0125] Specifically, for the processing object that completes the preset verification task according to the preset time, provide incentive mechanism information including scholarship, engineering certification certificate, academic exchange opportunity, etc. According to the difficulty and importance of the test task, set up different levels of reward or credit system to encourage crowdsourcing groups to participate in more challenging and valuable verification tasks through processing objects.

[0126] Sub-step S13, setting technical threshold.

[0127] Specifically, set the technical threshold and requirements of the crowdsourcing group corresponding to the processing object, and require the crowdsourcing group corresponding to the processing object participating in the verification task to have certain integrated circuit design or verification experience, and evaluate their technical level and ability through online test or examination.

[0128] Sub-step S14, setting evaluation method.

[0129] Specifically, test the user account applied by the crowdsourcing group, evaluate according to the test task result, and can introduce expert review or peer review, etc. To ensure that the crowdsourcing group corresponding to the selected processing object has sufficient technical ability and credibility.

[0130] Sub-step S15, setting training and feedback mechanism.

[0131] Specifically, a training and feedback mechanism can be established for the crowdsourcing groups that are not selected, online education resources and training courses are provided to help them improve their chip verification basic knowledge and skills. At the same time, feedback and suggestions can be given to the crowdsourcing groups that are not selected to encourage them to continue learning and improve, and to improve their ability and competitiveness in participating in chip verification tasks.

[0132] After setting chip verification related data in the management cloud platform, it also includes:

[0133] Step S2, publishing chip verification information in the chip verification cloud platform.

[0134] Specifically, the published chip verification information is for the crowdsourcing masses to apply for a user account through the chip verification platform, and to browse and apply for crowdsourcing information through the logged-in user account. The published crowdsourcing information can be the chip verification tasks, incentive mechanisms, technical thresholds, evaluation methods, training, and feedback mechanisms described in the foregoing steps.

[0135] Step S3, displaying a registration and login interface, in response to a registration operation of the crowdsourcing masses on the registration and login interface, obtaining a registered user account, and distributing a test task to the user account, and obtaining a test result fed back through the user account.

[0136] Specifically, the chip verification cloud platform displays a registration and login interface to the chip verification user, so that the crowdsourcing masses can register and log in through the registration and login interface. After successful registration and login, a test task is distributed to the processing object, so that the chip verification user can participate in the test task through the user account and submit the test result to the chip verification cloud platform for test result evaluation.

[0137] Step S4, screening user accounts meeting the chip verification task requirements according to the test results.

[0138] Specifically, the test results of the test tasks submitted by the crowdsourcing masses through the user account are evaluated. Specifically, according to the verification task requirements and the test results, the crowdsourcing masses whose test results meet the verification task requirements are screened.

[0139] Step S5, authorizing the user accounts meeting the chip verification task requirements.

[0140] Specifically, the available crowdsourcing masses are determined and notified: the appropriate crowdsourcing masses are determined, are given the permission to receive the verification tasks, and are notified of the results. For the crowdsourcing masses not selected, they are encouraged to self-study the chip verification basic knowledge and continue to participate.

[0141] Step S6, distributing the chip verification task to the authorized user account.

[0142] Obtaining a task complexity value of the chip verification task and an object evaluation value of the processing object, and distributing the chip verification task to the processing object according to the task complexity value and the object evaluation value.

[0143] Specifically, step S6 can include the following sub-steps:

[0144] Sub-step S61, obtaining a verification qualification evaluation value of the processing object according to a verification qualification evaluation value calculation formula of the processing object.

[0145] The object evaluation value is used to evaluate the chip verification capability of the chip verification user corresponding to the processing object. For example, the object evaluation value of 0 to 1 can be used to represent the chip verification capability of the chip verification user corresponding to the processing object, wherein 1 represents the highest capability and 0 represents the lowest capability. Specifically, the verification qualification evaluation value Ability of the processing object i is calculated using the following formula i :

[0146]

[0147] The programming test result obtained by the chip verification user corresponding to the processing object for programming for a preset task can be obtained, and the technical capability evaluation value is obtained according to the programming test result. The working years of the chip-related work, the project experience of the chip-related project, and the technical achievements of the chip-related project of the chip verification user corresponding to the processing object can also be obtained. The working years, the project experience and the technical achievements are scored, and the experience score value is obtained by fusing the scores of the three parameters.

[0148] Further, the technical capability evaluation value is equivalent to the test evaluation value in the foregoing embodiment, and the experience evaluation value is equivalent to the historical cumulative length of time of the chip verification performed by the chip verification user corresponding to the processing object.

[0149] In sub-step S62, the verification behavior evaluation value of the processing object is obtained according to the verification behavior evaluation value calculation formula of the processing object.

[0150] The verification behavior parameters of the processing object in the historical time period are obtained, and the verification behavior evaluation value Performance of the processing object i is calculated using the following formula i :

[0151]

[0152] N i represents the task amount of the chip verification task completed by the i th processing object in a preset historical time period; T i represents the average time of the chip verification user corresponding to the i th processing object to complete the chip verification task; P i represents the ratio of the chip verification task for which the processing object i completed and fed back the completion result to the chip verification task allocation platform to the task amount of the completed chip verification task.

[0153] The task completion amount refers to the total number of chip verification tasks completed by the participant in a preset unit of time (for example, one month), and the task completion amount is equivalent to the task amount of the chip verification task completed in the preset historical time period in the foregoing embodiment.

[0154] Sub-step S63, according to the verification behavior evaluation value and the verification qualification evaluation value of the processing object, an object evaluation value of the processing object is obtained.

[0155] The object evaluation value of the processing object corresponds to the allocation weight value when the chip verification task is allocated to the processing object. Specifically, after obtaining the verification qualification evaluation value reflecting the ability of the user corresponding to the processing object and the verification behavior evaluation value reflecting the historical performance of the user corresponding to the processing object, the verification behavior evaluation value and the verification qualification evaluation value can be fused using a weighted calculation method to obtain an object evaluation value reflecting the allocation weight of the processing object.

[0156] Specifically, the verification behavior evaluation value Performance i and the verification qualification evaluation value Ability i are weighted and summed to obtain the object evaluation value Weight i of the processing object i:

[0157] Weight i = w1 x Ability i + w2 x Performance i

[0158] wherein w1 and w2 are weight coefficients of the verification qualification evaluation value and the verification behavior evaluation value, respectively, for balancing the importance of the ability evaluation and the historical performance of the processing object.

[0159] Based on the weighted allocation algorithm, the verification task is dynamically allocated according to the ability, historical performance and task demand of the chip verification user, so as to optimize the overall efficiency or accuracy. The weighted allocation algorithm considers the ability evaluation and historical performance analysis of the chip verification user, and then allocates a proper object evaluation value to each processing object corresponding to the crowd sourcing crowd, so as to ensure that the task can be allocated to the most suitable processing object.

[0160] Sub-step S64, according to the task complexity value and the object evaluation value, the chip verification task is allocated to the processing object for verification.

[0161] According to the object evaluation value of the processing object (i.e., the allocation weight value of the processing object), different task allocation strategies can be used for chip verification task allocation.

[0162] For example, the task priority of task allocation can be determined according to the object evaluation value of the processing object i, and the task priority Priority i of the processing object i is calculated according to the following formula:

[0163] Priority i = weight i x Task Complexity

[0164] wherein, the Task Complexity is the task complexity value of the chip verification task, the complexity value of the task is determined by the scale of the to-be-verified module, and specifically includes the code line number of the to-be-verified code in the chip verification task and the interface number. Specifically, the more the code line number and the interface number are, the more complex the task is. According to different priorities, the allocation order of the task can be determined.

[0165] Referring to Figure 3 , the chip verification cloud platform is composed of basic computing resource modules, storage resource modules and network resource modules. The computing resource modules include central processing units (CPUs), graphics processing units (GPUs), FPGAs, etc., and the storage resource modules include memories, solid state disks (SSDs) and hard disk drives (HDDs) etc.

[0166] In the following Figure 5 , the chip verification cloud platform is further exemplarily described. Referring to Figure 5 , the chip verification cloud platform can include a specification document storage module, a register transfer level (RTL) module of a chip design, a container-based development environment module, a quality management module, and a chip verification computing and storage resource module.

[0167] The specification document storage module is an important component of the chip verification cloud platform, and is used to store specification documents. The specification documents can include the following contents: chip verification platform introduction information, the introduction information is used to introduce the design purpose, functional characteristics and application scope of the chip verification cloud platform. This part of content can help chip verification users to understand the basic situation and advantages of the platform. Chip verification platform usage guide, used to provide detailed usage guide, including platform registration and login process, task publishing and allocation method, data analysis and report generation process, etc. These guides can help chip verification users to quickly get started and effectively use platform resources. Technical architecture of the chip verification cloud platform: describes the technical architecture of the chip verification cloud platform, including the functions and mutual relationships of various components. This helps chip verification users to understand the internal working principle and running mechanism of the platform. Frequently asked questions of the chip verification cloud platform: collect and sort out the frequently asked questions of chip verification users, and provide corresponding answers and solutions. This helps chip verification users to quickly find solutions when problems are encountered in the use process.

[0168] The chip verification cloud platform further comprises an RTL code module in which RTL codes of the chip verification task are stored. The chip design RTL code is the basis of chip verification and can include: a simulation test unit for splitting the written RTL code and verifying its functional correctness and timing correctness. The simulation test should cover various typical and edge cases to ensure the integrity and stability of the design. A module division unit is configured to divide the chip design into different modules, each of which is responsible for implementing a specific function or sub-function. The module division should comply with the design specification and verification requirements to facilitate subsequent functional verification and timing verification. The RTL code storage unit stores a plurality of RTL codes of a plurality of modules. Each module's RTL code includes combinational logic, timing logic, and interface definition, etc.

[0169] The chip verification cloud platform further comprises a container-based development environment module configured to provide a container-based development environment for the chip verification task. The container-based development environment is configured to provide a unified and reusable development and testing environment for the processing object.

[0170] Further, the container-based development environment can include: a container image making file, the container image making file containing container images of development tools, verification tools, and runtime environments; these container images can contain necessary components such as chip design tools, simulators, and verification tool chains. A container orchestration and management file, specifically including a container orchestration tool. Using the container orchestration tool, for example, the container orchestration tool Kubernetes can be used to manage and deploy containerized development environments. Based on the container orchestration and management file, the scalability and reliability of the development and testing environment can be improved.

[0171] Further, the container-based development environment can further include environment configuration and sharing. The containerized development environment is configured as a shareable development environment, which can enable team members to collaborate and share resources through their respective processing objects to improve team efficiency and collaboration quality.

[0172] The quality management module in the chip verification cloud platform is configured to detect verification results and reports uploaded to the chip verification cloud platform by the crowdsourcing crowd through the user and determine whether the verification results of the chip verification task are accurate according to the verification results and reports.

[0173] Further, the RTL code is the source code of the chip design, which is used to describe the function and operation of the digital circuit and is equivalent to the simulator of the chip. In other words, the RTL code is the module to be verified in the chip verification task.

[0174] When performing chip verification tasks, verification code needs to be written to verify whether the chip's RTL code is functionally complete and can function properly. Specifically, the RTL code is given an input, its output is obtained, and it is determined whether the output is the expected value. If it is, the RTL code is considered to be working normally, meaning the chip and the corresponding RTL code's functional verification has passed; otherwise, the RTL code is considered to be malfunctioning, meaning the chip and the corresponding RTL code's functional verification has failed.

[0175] The container-based development environment serves as the environment for writing and running verification code. When performing chip verification tasks, chip verification personnel write verification code in the container-based development environment and then run it to verify whether the RTL code functions correctly.

[0176] The following reference Figure 3 The chip verification task processing system of this application embodiment will be described by way of example. Figure 3 As shown, the system may include a chip verification platform and a user terminal. The chip verification platform may include a chip verification task management module, a computing resource module, a storage resource module, and a network resource module. The user terminal may include multiple processing objects.

[0177] Platform maintenance personnel can publish verification tasks through the task management module, assign tasks based on the chip verification user's capabilities and historical performance, monitor task progress and quality in real time, and manage the processing objects corresponding to the crowdsourcing community. Specifically, the crowdsourcing community management module (not shown in the diagram) manages the account information of the processing objects of the crowdsourcing community and evaluates the chip verification capabilities of the processing objects. The crowdsourcing community management module is used to realize the registration of processing objects by chip verification users, qualification verification of processing objects, capability assessment of processing objects, and trust management.

[0178] Platform maintenance personnel can use the crowdsourcing crowd management module to obtain and manage the processing objects corresponding to the crowdsourcing crowds, ensuring that the crowdsourcing crowds corresponding to the processing objects have sufficient technical skills and professional capabilities.

[0179] Continue to refer to Figure 3 The chip verification cloud platform comprises a computing resource module and a storage resource module, which support the execution and management of chip verification tasks. Specifically, the computing resource module provides sufficient computing resources, including CPUs, GPUs, and FPGAs, as well as memory and storage, for performing chip verification tasks such as simulation, synthesis, and place-and-route. The storage resource module provides high-speed storage resources for storing chip design files, verification data, and intermediate results. The storage resource module is designed for high reliability and availability to ensure data security and accessibility.

[0180] The chip verification cloud platform can further include a network resource module, which is configured to provide high-speed network resources for team members to exchange and collaborate data among respective processing objects. For example, the network resources can have low latency and high bandwidth to meet the needs of large-scale chip verification tasks.

[0181] In one embodiment, the user corresponding to the processing object can be a crowd-sourced crowd, which mainly consists of personnel with basic knowledge of integrated circuits and strong interest in chip verification, and can include college students and working personnel. Figure 7 The steps of the crowd-sourced crowd logging into the chip verification cloud platform through the processing object to perform the chip verification task are exemplarily described as follows:

[0182] Step M1, log in to the chip verification cloud platform through the user account, obtain the instruction document provided by the chip verification platform, and get the chip verification task, pull the container from the verification cloud platform, and build a local development environment.

[0183] The processing object obtains and reads the instruction document provided by the chip verification platform to be familiar with the requirements of the distribution system. The container in this step is provided by the chip verification cloud platform. The processing object is the account of the crowd-sourced crowd applying for and logging into the chip verification platform.

[0184] Step M2, based on the instruction document, the user account compiles and runs the verification code in the local development environment.

[0185] Specifically, the verification code is used to verify the RTL code corresponding to the chip verification task.

[0186] Step M3, the user account submits the chip verification code to the chip verification cloud platform to compile and run the chip verification code through the resources of the chip verification cloud platform.

[0187] Specifically, the chip verification code is run through the pre-set compilation tools and running tools of the chip verification cloud platform.

[0188] Step M4, the chip verification cloud platform obtains the chip verification result and feeds back to the user account.

[0189] Specifically, the chip verification cloud platform executes the verification code and obtains the corresponding result after the verification code is run.

[0190] Step M5, the user account analyzes the obtained verification result based on the preset standard chip verification requirements, and forms a chip verification report.

[0191] For example, the chip verification cloud platform obtains a running result of the chip verification code, compares the running result with a preset running result, and determines whether the two are the same. If the two are the same, it is determined that the verification is passed, otherwise, it is determined that the verification is not passed. The preset running result is a running result expected when the chip is normally running during design of the chip.

[0192] Step M6, submitting the chip verification report to the chip verification platform through the user account for the chip verification platform to evaluate the verification result.

[0193] Specifically, the chip verification platform can feed back the chip verification report and related data to the chip verification task management module, so that the chip verification task management module evaluates the verification result according to the chip verification report and related data.

[0194] Reference Figure 8 It shows a chip verification task processing device provided by an embodiment of the application. The chip verification task processing device 30 includes:

[0195] The first obtaining module 301 is configured to obtain, in response to a chip verification request, task information of each chip verification task in the at least one chip verification task, and object parameters of each processing object in the at least one processing object.

[0196] The second obtaining module 302 is configured to obtain a task complexity value of the chip verification task according to the task information.

[0197] The third obtaining module 303 is configured to obtain an object evaluation value of the processing object according to the object parameters.

[0198] The distribution module 304 is configured to distribute the chip verification task to the processing object for chip verification according to the task complexity value and the object evaluation value. The complexity value of the chip verification task is positively correlated with the object evaluation value of the processing object distributed to the chip verification task.

[0199] Optionally, the object parameters include verification behavior parameters of the processing object in a historical time period for chip verification, and verification qualification parameters of the processing object. The third obtaining module 303 can include:

[0200] The first obtaining submodule is configured to input the verification behavior parameters into a verification behavior evaluation model to obtain a verification behavior evaluation value.

[0201] The second obtaining submodule is configured to input the verification qualification parameters into a verification qualification evaluation model to obtain a verification qualification evaluation value.

[0202] The third obtaining submodule is configured to perform weighted fusion processing on the verification behavior evaluation value and the verification qualification evaluation value, and determine a first weighted fusion value obtained by the processing as the object evaluation value.

[0203] Optionally, the verification behavior parameters are multiple, and the first obtaining submodule can include:

[0204] The first obtaining unit is configured to average the multiple verification behavior parameters to obtain a verification behavior evaluation value; wherein the verification behavior parameters include at least two of the following: the task quantity of the chip verification tasks completed in a preset historical time period, the average time of completing the chip verification tasks, and the ratio of the chip verification tasks for which the platform for allocating the chip verification tasks feeds back the completion results to the task quantity of the completed chip verification tasks.

[0205] Optionally, the second obtaining submodule can include:

[0206] The second obtaining unit is configured to average the multiple verification qualification parameters to obtain a verification qualification evaluation value; wherein the verification qualification parameters include the historical cumulative duration of performing the chip verification and the test evaluation value of performing the verification test for the preset chip verification task.

[0207] Optionally, the second obtaining module can include:

[0208] The fourth obtaining submodule is configured to obtain the code line number and the interface quantity in the task information; the code line number is the line number of the code to be verified in the chip verification task, and the interface quantity is the quantity of the interfaces to be verified in the code to be verified in the verification task;

[0209] The fifth obtaining submodule is configured to obtain the task complexity value of the chip verification task according to the code line number and the interface quantity; the task complexity value is positively correlated with the code line number, and the task complexity value is positively correlated with the interface quantity.

[0210] Optionally, the allocation module 304 can include:

[0211] The sixth obtaining submodule is configured to obtain the product of the task complexity value of the chip verification task and the object evaluation value of the processing object to which the chip verification task is allocated, and determine the task priority of the chip verification task according to the product;

[0212] The determining submodule is configured to determine the allocation sequence of the at least one chip verification task according to the task priority, and allocate the chip verification task to the processing object for verification according to the allocation sequence.

[0213] Optionally, the chip verification task is to verify the correctness of the register transfer level code of the preset chip; and the allocation module 304 can include:

[0214] The allocation submodule is configured to allocate the chip verification task to the processing object, and verify the correctness of the register transfer level code through the verification program corresponding to the processing object.

[0215] In the embodiment, a task complexity value of the chip verification task and an object evaluation value of the processing object are acquired, and the chip verification task is allocated to the processing object for chip verification according to the task complexity value and the object evaluation value. The task complexity value reflects the difficulty and complexity of the chip verification task, and the object evaluation value reflects the chip verification capability of the processing object. According to the task complexity value and the object evaluation value, the chip verification task is allocated, which is equivalent to reasonably allocating the chip verification task to the processing object with corresponding capability and experience for chip verification according to the difficulty and complexity of the task. According to the task allocation strategy of the embodiment, the accuracy and reliability of the chip verification task verification result can be ensured. The chip task is allocated to the processing object for chip verification, which can convert the closed-source and high-cost chip verification task into an open verification mode through common verification of a large number of chip verification users corresponding to the processing object, and can reduce the time consumed by chip verification.

[0216] Figure 9 is a block diagram of an electronic device 400 according to an exemplary embodiment. The electronic device 400 can be a mobile phone, a computer, a digital broadcasting terminal, a message transmitting / receiving device, a game console, a tablet device, a medical device, a fitness device, a personal digital assistant, and the like, for example.

[0217] Referring to Figure 9 The electronic device 400 can include one or more of the following components: a processing component 402, a memory 404, a power supply component 406, a multimedia component 408, an audio component 410, an input / output (I / O) interface 412, a sensor component 414, and a communication component 416.

[0218] The processing component 402 usually controls overall operations of the electronic device 400, such as operations associated with displaying, making phone calls, data communications, camera operations, and recording operations. The processing component 402 can include one or more processors 420 to execute instructions to complete all or part of steps of the above methods. In addition, the processing component 402 can include one or more modules to facilitate the interaction between the processing component 402 and other components. For example, the processing component 402 can include a multimedia module to facilitate the interaction between the multimedia component 408 and the processing component 402.

[0219] The memory 404 is used to store various types of data to support the operation of the electronic device 400. Examples of such data include instructions for any application or method operating on the electronic device 400, contact data, phonebook data, messages, pictures, multimedia, and the like. The memory 404 can be implemented by any type of volatile or nonvolatile storage devices or a combination thereof such as static random access memory (SRAM), electrically erasable programmable read only memory (EEPROM), erasable programmable read only memory (EPROM), programmable read only memory (PROM), read only memory (ROM), magnetic memory, flash memory, magnetic disk or optical disk.

[0220] The power supply component 406 supplies power for various components of the electronic device 400. The power supply component 406 can include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power for the electronic device 400.

[0221] The multimedia component 408 includes a screen providing an output interface between the electronic device 400 and a chip verification user. In some embodiments, the screen can include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes the touch panel, the screen can be implemented as a touch screen to receive an input signal from the chip verification user. The touch panel includes one or more touch sensors to sense a touch, swiping, and gestures on the touch panel. The touch sensor can not only sense a boundary of a touching or swiping action, but also detect duration and pressure related to the touching or swiping action. In some embodiments, the multimedia component 408 includes a front camera and / or a back camera. The front and / or back camera can receive external multimedia data when the electronic device 400 is in an operation mode such as a photographing mode or a multimedia mode. Each of the front and back camera can be a fixed optical lens system or have a focal length and optical zoom capability.

[0222] The audio component 410 is used to output and / or input audio signals. For example, the audio component 410 includes a microphone (MIC) to receive an external audio signal when the electronic device 400 is in an operation mode such as a call mode, a recording mode, and a voice recognition mode. The received audio signal can be further stored in the memory 404 or transmitted via the communication component 416. In some embodiments, the audio component 410 also includes a speaker to output audio signals.

[0223] The I / O interface 412 provides an interface between the processing component 402 and peripheral interface modules such as a keyboard, a click wheel, a button, and the like. The buttons can include, but are not limited to, a home button, a volume button, a start button, and a lock button.

[0224] The sensor component 414 includes one or more sensors for providing status assessments for various aspects of the electronic device 400. For example, the sensor component 414 can detect an open / closed position of the electronic device 400, relative positioning of components, such as a display and a keypad of the electronic device 400, a change in position of the electronic device 400 or a component of the electronic device 400, a presence or absence of a user in contact with the electronic device 400, an orientation or acceleration / deceleration of the electronic device 400, and a change in temperature of the electronic device 400. The sensor component 414 can include a proximity sensor configured to detect presence of a nearby object without any physical contact. The sensor component 414 can also include a light sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, the sensor component 414 can further include an acceleration sensor, a gyroscope sensor, a magnetic sensor, a pressure sensor, or a temperature sensor.

[0225] The communication component 416 is configured to facilitate wired or wireless communication between the electronic device 400 and other devices. The electronic device 400 can access a wireless network based on a communication standard, such as WiFi, a cellular network standard (such as 2G, 3G, 4G, or 5G), or a combination thereof. In an example embodiment, the communication component 416 receives a broadcast signal or broadcast-related information from an external broadcast management system via a broadcast channel. In an example embodiment, the communication component 416 further includes a Near Field Communication (NFC) module to facilitate short-range communication. For example, the NFC module can be implemented based on Radio Frequency Identification (RFID) technology, infrared data association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology and other technology.

[0226] In an example embodiment, the electronic device 400 can be implemented with one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controllers, micro-controllers, microprocessors, or other electronic elements, to implement a chip verification task processing method provided by the embodiments.

[0227] In an example embodiment, a non-transitory computer-readable storage medium including instructions, such as the memory 404 including instructions, is also provided, which can be executed by the processor 420 of the electronic device 400 to complete the above method. For example, the non-transitory storage medium can be a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, and an optical data storage device, etc.

[0228] Figure 10is a block diagram of an electronic device 500 according to an exemplary embodiment. For example, the electronic device 500 can be provided as a server. Referring to FIG. 5, the electronic device 500 includes a processing component 522, which further includes one or more processors, and a memory resource represented by a memory 532 for storing instructions, such as application programs, executable by the processing component 522. The application programs stored in the memory 532 can include one or more than one module each corresponding to a set of instructions. In addition, the processing component 522 is configured to execute the instructions to perform a chip verification task processing method provided by the embodiments of the present application. Figure 10 The electronic device 500 can further include a power supply component 526 configured to perform power management of the electronic device 500, a wired or wireless network interface 550 configured to connect the electronic device 500 to a network, and an input / output (I / O) interface 558. The electronic device 500 can operate based on an operating system stored in the memory 532, such as Windows Server™, Mac OS X™, Unix™, Linux™, FreeBSD™, or the like.

[0229] The electronic device 500 can further include a power supply component 526 configured to perform power management of the electronic device 500, a wired or wireless network interface 550 configured to connect the electronic device 500 to a network, and an input / output (I / O) interface 558. The electronic device 500 can operate based on an operating system stored in the memory 532, such as Windows Server™, Mac OS X™, Unix™, Linux™, FreeBSD™, or the like.

[0230] The embodiments of the present application also provide a computer program product, including a computer program, which, when executed by a processor, implements a chip verification task processing method.

[0231] Other embodiments of the present application will be apparent to those skilled in the art from consideration of the specification and practice of the application disclosed herein. It is intended that the present application cover any and all variations of the application that come within the scope of the claims and their equivalents. It is intended that the specification and examples be considered exemplary only, with the true scope and spirit of the application indicated by the following claims.

[0232] It is to be understood that the application is not limited to the precise construction herein described and as shown in the attached drawings, and that various modifications and changes can be made by those skilled in the art without departing from the scope of the application. The scope of the application should be determined by the following claims.

[0233] The above merely preferred embodiments of the present application and are not intended to limit the present application. These and other modifications can occur to those skilled in the art upon reading the specification and may be implemented as suitable without departing from the spirit and principles of the application. The scope of the present application should be determined by the following claims.

[0234] The chip verification task processing method and device, the electronic device, and the computer readable storage medium provided in the application are described in detail. The principles and implementation manners of the application are described by using specific examples. The above description of the embodiments is only used to help understand the method of the application and its core idea. Meanwhile, for those skilled in the art, according to the idea of the application, the specific implementation manners and application ranges will be changed. In conclusion, the content of the specification should not be understood as a limitation of the application.

Claims

1. A method for processing a chip verification task, characterized in that, The method comprises the following steps: In response to a chip verification request, task information of each chip verification task in at least one chip verification task and object parameters of each processing object in at least one processing object are acquired respectively; According to the task information, a task complexity value of the chip verification task is acquired, which comprises the following steps: acquiring the number of code lines and the number of interfaces in the task information; and obtaining the task complexity value of the chip verification task according to the number of code lines and the number of interfaces; the number of code lines is the number of code lines to be verified in the chip verification task, and the number of interfaces is the number of interfaces to be verified in the verification task; the task complexity value is positively correlated with the number of code lines, and the task complexity value is positively correlated with the number of interfaces; The verification behavior parameters are input into a verification behavior evaluation model to obtain a verification behavior evaluation value; the verification qualification parameters are averaged to obtain a verification qualification evaluation value; the verification behavior evaluation value and the verification qualification evaluation value are weighted and fused to obtain a first weighted fusion value, which is determined as the object evaluation value; The verification qualification parameters comprise a test evaluation value of a test for a preset chip verification task, and the method further comprises: comprehensively scoring the correctness, efficiency and robustness of the programmed code to obtain the test evaluation value; According to the task complexity value and the object evaluation value, the chip verification task is allocated to the processing object for chip verification; the complexity value of the chip verification task is positively correlated with the object evaluation value of the processing object to which the chip verification task is allocated.

2. The method of claim 1, wherein, The verification behavior parameters comprise a plurality of verification behavior parameters, which are input into a verification behavior evaluation model to obtain a verification behavior evaluation value, which comprises the following steps: The plurality of verification behavior parameters are averaged to obtain the verification behavior evaluation value; The verification behavior parameters comprise at least two of the following: the number of chip verification tasks completed in a preset historical time period, the average time for completing the chip verification tasks, and the ratio of the chip verification tasks for which the completion results are fed back to the chip verification task allocation platform to the number of completed chip verification tasks.

3. The method of claim 1, wherein, The verification qualification parameters comprise a historical cumulative duration of chip verification.

4. The method of claim 1, wherein, According to the task complexity value and the object evaluation value, the chip verification task is allocated to the processing object for chip verification, which comprises the following steps: The product of the task complexity value of the chip verification task and the object evaluation value of the processing object to which the chip verification task is allocated is obtained, and the product is determined as the task priority of the chip verification task; According to the task priority, the allocation order of at least one chip verification task is determined, and the chip verification task is allocated to the processing object for verification according to the allocation order.

5. The method of claim 4, wherein, The chip verification task is to verify the correctness of the register transfer level code of a preset chip; and according to the task complexity value and the object evaluation value, the chip verification task is allocated to the processing object for chip verification, which comprises the following steps: The chip verification task is allocated to the processing object, and the correctness of the register transfer level code is verified by a verification program corresponding to the processing object.

6. A chip verification task processing apparatus characterized by comprising: The device comprises: A first obtaining module is configured to, in response to a chip verification request, obtain task information of each chip verification task in at least one chip verification task and object parameters of each processing object in at least one processing object. A second obtaining module is configured to obtain a task complexity value of a chip verification task according to the task information, including: obtaining a code line number and an interface number in the task information; obtaining the task complexity value of the chip verification task according to the code line number and the interface number; the code line number is a line number of to-be-verified code in the chip verification task, and the interface number is a number of interfaces called by the to-be-verified code in the verification task; the task complexity value is positively correlated with the code line number, and the task complexity value is positively correlated with the interface number. A third obtaining module is configured to input verification behavior parameters into a verification behavior evaluation model to obtain a verification behavior evaluation value; average a plurality of verification qualification parameters to obtain a verification qualification evaluation value; and perform weighted fusion processing on the verification behavior evaluation value and the verification qualification evaluation value, and determine a first weighted fusion value obtained by the processing as an object evaluation value; the verification qualification parameters include a test evaluation value obtained by performing a verification test on a preset chip verification task, and a comprehensive score of correctness, efficiency and robustness of programmed code. An allocation module is configured to allocate the chip verification task to the processing object for chip verification according to the task complexity value and the object evaluation value; the complexity value of the chip verification task is positively correlated with the object evaluation value of the processing object allocated to the chip verification task.

7. An electronic device, comprising: It comprises: A processor; A memory for storing instructions executable by the processor; The processor is configured to execute the instructions to implement the method of any one of claims 1 to 5.

8. A computer-readable storage medium, characterized in that, When the instructions in the computer-readable storage medium are executed by the processor of the electronic device, the electronic device can perform the method of any one of claims 1 to 5.

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