Microdisplay device and method of manufacturing a microdisplay device

Abstract

This application discloses a microdisplay device and a method for fabricating the microdisplay device, relating to the field of microdisplay technology. In the microdisplay device, a driving substrate has a plurality of spaced-apart first grooves; a dielectric bump is formed between two adjacent first grooves, and a first bonding metal is disposed at the bottom of the first groove; a plurality of LED chips are spaced-apart and protrude from a common semiconductor layer, forming a second groove between two adjacent LED chips; a second bonding metal is disposed at the top of each LED chip along its protruding direction; the dielectric layer includes at least a groove-shaped portion, which covers the groove wall of the second groove and extends along the groove wall; wherein the dielectric bump is inserted into the second groove and bonded to the groove-shaped portion, the LED chip is inserted into the first groove, and the second bonding metal is bonded to the first bonding metal. This application can improve bonding strength and improve the reliability of the microdisplay device.

Description

Technical Field

[0001] This application relates to the field of semiconductor microdisplay technology, and more specifically to microdisplay devices and methods for fabricating microdisplay devices. Background Technology

[0002] Micro-display devices are devices that utilize Micro-LED display technology. They are typically fabricated by bonding a light-emitting substrate and a driving substrate. The difficulty in bonding these two substrates is a major obstacle to the commercialization of micro-display devices. Existing technologies include planar bonding, but planar bonding suffers from at least the following first and second shortcomings.

[0003] The first drawback is that existing planar bonding requires high-quality bonding interfaces, making it difficult to achieve high bonding strength. The second drawback is that in microdisplay devices formed by existing planar bonding, electron migration can easily occur between adjacent LED chips through the planar bonding interface, leading to short circuits.

[0004] Therefore, how to improve the bonding strength and reliability of microdisplay devices is a technical problem that urgently needs to be solved by those skilled in the art. Summary of the Invention

[0005] In view of this, in order to solve the above-mentioned technical problems, this application provides a microdisplay device and a method for fabricating the microdisplay device.

[0006] To solve the above-mentioned technical problems, this application adopts a technical solution that provides a micro-display device, which includes:

[0007] A driving substrate is provided with a plurality of spaced first grooves; a dielectric bump is formed between two adjacent first grooves; and a first bonding metal is provided at the bottom of the first groove.

[0008] The LED chip comprises a common semiconductor layer, a plurality of LED chips, a dielectric layer, and a second bonding metal. The plurality of LED chips are spaced apart and protrude from the common semiconductor layer to form a second groove between two adjacent LED chips. The second bonding metal is provided on the top of each LED chip along its protruding direction. The dielectric layer includes at least a groove-shaped portion that covers the groove wall of the second groove and extends along the groove wall of the second groove.

[0009] In this configuration, a dielectric bump is inserted into the second groove and bonded to the groove portion, while an LED chip is inserted into the first groove and bonded to the first bonding metal.

[0010] To address the aforementioned technical problems, another technical solution adopted in this application is to provide a method for fabricating a micro-display device, the method comprising:

[0011] Step S110: Provide a driving substrate and a light-emitting substrate;

[0012] The driving substrate is provided with a plurality of spaced first grooves; a dielectric bump is formed between two adjacent first grooves; and a first bonding metal is provided at the bottom of the first groove.

[0013] The light-emitting substrate includes a substrate, a common semiconductor layer, a plurality of LED chips, a dielectric layer, and a second bonding metal; the common semiconductor layer is disposed on the substrate, and the plurality of LED chips are spaced apart and protrude from the common semiconductor layer, so that a second groove is formed between two adjacent LED chips; the second bonding metal is disposed on the top of the LED chip along its own protrusion direction; the dielectric layer includes at least a groove-shaped portion, the groove-shaped portion covering the groove wall of the second groove and extending along the groove wall of the second groove;

[0014] Step S120: Bond the light-emitting substrate to the driving substrate;

[0015] In this configuration, a dielectric bump is inserted into the second groove and bonded to the groove portion, while an LED chip is inserted into the first groove and bonded to the first bonding metal.

[0016] Beneficial effects: Unlike the prior art, the technical solution of this application has at least the following first to second effects.

[0017] The first advantage of this application is that the dielectric bump is inserted into the second groove and bonded to the groove-shaped portion, while the LED chip is inserted into the first groove and the second bonding metal is bonded to the first bonding metal. This improves the bonding strength of the microdisplay device in two ways.

[0018] Firstly, a dielectric bonding interface exists at the bonding position between the dielectric bump and the groove, and a metal bonding interface exists at the bonding position between the second bonding metal and the first bonding metal, thus enabling a hybrid bonding.

[0019] Secondly, due to the interlocking of the dielectric bumps and the groove, the overall bonding interface formed by the dielectric bonding interface and the metal bonding interface can be formed into a bent and extended structure, which can increase the bonding area.

[0020] Secondly, in this application, since the dielectric bumps are formed between two adjacent first grooves and the second grooves are formed between two adjacent cores, the reliability of the microdisplay device can be improved in the following two ways.

[0021] Firstly, two adjacent metal bonding interfaces are separated by a dielectric bonding interface, and the dielectric bonding interface and the metal bonding interface are not coplanar (i.e., not in the same plane). Therefore, the current on the second bonding metal corresponding to adjacent LED chips is difficult to conduct through the dielectric bonding interface, meaning that adjacent LED chips are less likely to fail due to short circuits.

[0022] Secondly, the separation of two adjacent LED chips by dielectric bumps can reduce optical crosstalk between different LED chips. Attached Figure Description

[0023] Figure 1 This is a schematic diagram of the driving substrate provided in step S110 of the fabrication method of the microdisplay device in Embodiment 1 of this application;

[0024] Figure 2 This is a schematic diagram of the light-emitting substrate provided in step S110 of the fabrication method of the micro-display device in Embodiment 1 of this application;

[0025] Figure 3 This is a schematic diagram of step S120, which involves forming a preheating structure, in the fabrication method of the microdisplay device in Embodiment 1 of this application.

[0026] Figure 4 yes Figure 3 Enlarged schematic diagram of region A in the middle;

[0027] Figure 5 This is a schematic diagram of a micro-display device formed after step S120 of the micro-display device fabrication method in Embodiment 1 of this application;

[0028] Figure 6 This is a schematic diagram of another micro-display device formed after removing the substrate in step S120 of the fabrication method of the micro-display device in Embodiment 1 of this application;

[0029] Figure 7 This is a schematic diagram of the driving circuit board provided in step S11 of the fabrication method of the micro-display device in Embodiment 3 of this application;

[0030] Figure 8 This is a schematic diagram of step S12 in the fabrication method of the microdisplay device in Embodiment 3 of this application, showing the formation of the first material layer;

[0031] Figure 9 This is a schematic diagram of step S13 in the fabrication method of the microdisplay device in Embodiment 3 of this application, when a plurality of spaced first grooves are formed;

[0032] Figure 10 This is a schematic diagram of the structure formed after setting the first bonding metal in step S14 of the microdisplay device fabrication method in Embodiment 3 of this application;

[0033] Figure 11 This is a schematic diagram of the stacked structure formed in step S21 of the fabrication method of the microdisplay device in Embodiment 4 of this application;

[0034] Figure 12 This is a schematic diagram of the structure formed after etching the stacked structure in step S22 of the fabrication method of the microdisplay device in Embodiment 4 of this application;

[0035] Figure 13 This is a schematic diagram of the structure after the dielectric layer is formed in step S23 of the fabrication method of the microdisplay device in Embodiment 4 of this application;

[0036] Figure 14 This is a schematic diagram of the structure after the formation of the second bonding metal in step S24 of the microdisplay device fabrication method in Embodiment 4 of this application;

[0037] Figure 15 This is a schematic diagram showing the distribution of the LED chip and the second bonding metal after the formation of the second bonding metal in step S24 of the microdisplay device fabrication method in Embodiment 4 of this application. Figure 15 The dielectric layer is not shown.

[0038] Figure 16 This is a schematic diagram of the driving substrate provided in step S110 of the microdisplay device fabrication method in Embodiment 5 of this application;

[0039] Figure 17 This is a schematic diagram of the driving circuit board provided in step S31 of the fabrication method of the micro-display device in Embodiment 5 of this application;

[0040] Figure 18 This is a schematic diagram of step S32 in the fabrication method of the microdisplay device in Embodiment 5 of this application, showing the formation of the fifth material layer;

[0041] Figure 19 This is a schematic diagram of step S33 in the fabrication method of the microdisplay device in Embodiment 5 of this application, when a plurality of spaced first bonding metals are formed;

[0042] Figure 20 This is a schematic diagram of step S34 in the fabrication method of the microdisplay device in Embodiment 5 of this application, showing the formation of the first material layer;

[0043] Figure 21 This is a schematic diagram of the structure after the first hole is formed in step S35 of the fabrication method of the microdisplay device in Embodiment 5 of this application.

[0044] Explanation of reference numerals in the attached figures:

[0045] Microdisplay device 10; preheating structure 1a; reserved gap 1a-1; driving substrate 100; first groove 101; first hole 102; second hole 103; dielectric bump 110; first bonding metal 120; driving circuit board 130; stacked structure 30; first material layer 31; second material layer 32; third material layer 33; fourth material layer 34; fifth material layer 35;

[0046] Light-emitting substrate 200; second groove 201; substrate 210; common semiconductor layer 220; LED chip 230; first semiconductor layer 231; light-emitting layer 232; second semiconductor layer 233; dielectric layer 240; groove portion 241; extension portion 242; first opening 243; second bonding metal 250; first side surface A1; second side surface A2; first gap 20; first area S1; second area S2; third area S3; first pitch d1; first angle θ; height h1 of LED chip 230; first dimension d2; second angle β; depth h2 of first groove 101; second dimension d3; first thickness h3; second pitch d4; second thickness h4; third thickness h5. Detailed Implementation

[0047] To enable those skilled in the art to better understand the technical solutions of this application, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0048] First, it should be noted that if a~b appears in the following text, and a and b are numbers, then a~b means greater than or equal to a and less than or equal to b.

[0049] Example 1

[0050] Please see Figure 1 - Figure 5 The method for fabricating the microdisplay device 10 of this application includes steps S110 to S120.

[0051] like Figure 1 and Figure 2 As shown, step S110: Provide driving substrate 100 and light-emitting substrate 200.

[0052] like Figure 1 As shown, the driving substrate 100 is provided with a plurality of spaced first grooves 101. A dielectric bump 110 is formed between two adjacent first grooves 101, and a first bonding metal 120 is provided at the bottom of the first groove 101.

[0053] like Figure 2 As shown, the light-emitting substrate 200 includes a substrate 210, a common semiconductor layer 220, a plurality of LED chips 230, a dielectric layer 240, and a second bonding metal 250. The common semiconductor layer 220 is disposed on the substrate 210. The plurality of LED chips 230 are spaced apart and protrude from the common semiconductor layer 220, so that a second groove 201 is formed between two adjacent LED chips 230. The second bonding metal 250 is disposed on the top of each LED chip 230 along its protruding direction. The dielectric layer 240 includes at least a groove-shaped portion 241, which covers the groove wall of the second groove 201 and extends along the groove wall of the second groove 201.

[0054] Combination Figure 1 - Figure 2 See Figure 3 - Figure 5 As shown, step S120: bonding the light-emitting substrate 200 to the driving substrate 100.

[0055] Combination Figure 1 - Figure 2 See Figure 3 - Figure 5 As shown, the dielectric bump 110 is inserted into the second groove 201 and bonded to the groove portion 241, the LED chip 230 is inserted into the first groove 101 and the second bonding metal 250 is bonded to the first bonding metal 120.

[0056] In Embodiment 1, the technical solution of this application has at least the following first to third effects.

[0057] Firstly, in this application, the dielectric bump 110 is inserted into the second groove 201 and bonded to the groove portion 241, and the LED chip 230 is inserted into the first groove 101 and the second bonding metal 250 is bonded to the first bonding metal 120. This improves the bonding strength of the microdisplay device 10 in two ways.

[0058] Firstly, a dielectric bonding interface (not shown) exists at the bonding position between the dielectric bump 110 and the groove portion 241, and a metal bonding interface (not shown) exists at the bonding position between the second bonding metal 250 and the first bonding metal 120, thus enabling a hybrid bonding.

[0059] Secondly, due to the interlocking of the dielectric bump 110 and the groove 241, the overall bonding interface formed by the dielectric bonding interface and the metal bonding interface can be formed into a bent and extended structure, which can increase the bonding area.

[0060] Secondly, in this application, since the dielectric bump 110 is formed between two adjacent first grooves 101 and the second groove 201 is formed between two adjacent LED chips 230, the reliability of the microdisplay device 10 can be improved in the following two ways.

[0061] Firstly, there is a dielectric bonding interface between two adjacent metal bonding interfaces, and the dielectric bonding interface and the metal bonding interface are not coplanar (i.e., not in the same plane). As a result, the current on the second bonding metal 250 corresponding to the adjacent LED chip 230 is difficult to conduct through the dielectric bonding interface, which means that the adjacent LED chips 230 are not prone to failure due to short circuit.

[0062] Secondly, the two adjacent LED chips 230 are separated by the dielectric bump 110, which can reduce optical crosstalk between different LED chips 230.

[0063] The third effect is that when the dielectric bump 110 is inserted into the second groove 201, the second groove 201 can limit the dielectric bump 110, and when the LED chip 230 is inserted into the first groove 101, the first groove 101 can limit the LED chip 230, so that the second bonding metal 250 corresponding to the LED chip 230 can be more accurately and conveniently aligned with the first bonding metal 120.

[0064] Optionally, the material of the first bonding metal 120 includes, but is not limited to, one or more of Ti, Cr, Au, Pt, Ni, Sn, Al and In, and the material of the second bonding metal 250 includes, but is not limited to, one or more of Ti, Cr, Au, Pt, Ni, Sn, Al and In.

[0065] Combination Figure 1 - Figure 2 See Figure 5 As shown, in the micro-display device 10 prepared by the method of this application, the LED chip 230 sequentially includes a first semiconductor layer 231, a light-emitting layer 232 and a second semiconductor layer 233 along the protrusion direction of the LED chip 230. The first semiconductor layer 231 and the common semiconductor layer 220 are homogeneous layers and are integrally formed.

[0066] The side of the dielectric bump 110 facing the common semiconductor layer 220 is designated as the first side A1, and the side of the first semiconductor layer 231 facing away from the common semiconductor layer 220 is designated as the second side A2. The first side A1 is located on the side of the second side A2 closest to the common semiconductor layer 220.

[0067] By means of the above method, since the first side A1 is located on the side of the second side A2 closer to the common semiconductor layer 220, the dielectric bump 110 can be set higher, which has at least the following two effects. First, it makes the bonding between the slot 241 and the dielectric bump 110 more stable. Second, it makes it less likely that current in the second bonding metal 250 corresponding to one of the two adjacent LED chips 230 will cross the dielectric bump 110 to reach the second bonding metal 250 corresponding to the other LED chip 230, thereby reducing the likelihood of a short circuit between the two adjacent LED chips 230.

[0068] Optionally, combined Figure 1 , Figure 2 and Figure 5 See Figure 6 As shown, the fabrication method of the microdisplay device 10 may further remove the substrate 210 after step S120, but is not limited thereto. In other examples, the fabrication method of the microdisplay device 10 may also retain the substrate 210 after step S120, such as... Figure 5 As shown.

[0069] Optionally, such as Figure 2 As shown, in the light-emitting substrate 200 provided in step S110, the cross-sectional area of ​​the LED chip 230 gradually decreases along the protruding direction of the LED chip 230. And as... Figure 1 As shown, in step S110, the cross-sectional area of ​​the portion of the first groove 101 that accommodates the LED chip 230 gradually decreases along the concave direction of the first groove 101.

[0070] Through the above method, in step S120, the dielectric bump 110 can be more easily aligned and inserted into the second groove 201, and the LED chip 230 can be more easily aligned and inserted into the first groove 101. During the insertion of the dielectric bump 110 into the second groove 201, the second groove 201 guides the dielectric bump 110; and during the insertion of the LED chip into the first groove 101, the first groove 101 guides the LED chip 230. This allows the second bonding metal 250 corresponding to the LED chip 230 to gradually align with the first bonding metal 120 within the corresponding first groove 101 during both the insertion of the dielectric bump 110 into the second groove 201 and the insertion of the LED chip into the first groove 101.

[0071] Optionally, combined Figure 1 - Figure 3 See Figure 4The horizontal projection area of ​​the second bonding metal 250 is the first area S1, and the area of ​​the top wall of the LED chip 230 is the second area S2. The first area S1 is smaller than the second area S2. This facilitates the second bonding metal 250 entering the first groove 101 and aligning with the first bonding metal 120.

[0072] Combination Figure 1 - Figure 3 See Figure 4 In order to facilitate the alignment of the second bonding metal 250 with the first bonding metal 120, the area of ​​the horizontal projection of the first bonding metal 120 is further defined as the third area S3, where the first area S1 is smaller than the third area S3.

[0073] Example 2

[0074] Combination Figure 1 - Figure 2 See Figure 3 - Figure 5 As shown, Example 1 is further defined to obtain Example 2. The similarities between Example 2 and Example 1 will not be repeated here. The further limitations of Example 2 compared to Example 1 are as follows.

[0075] Step S120 includes steps S121 and S122.

[0076] Combination Figure 1 - Figure 2 See Figure 3 - Figure 4 As shown, step S121: The light-emitting substrate 200 and the driving substrate 100 are stacked and combined to form a preheating structure 1a.

[0077] Combination Figure 1 - Figure 2 See Figure 3 - Figure 4 As shown, the preheating structure 1a includes a light-emitting substrate 200 and a driving substrate 100 stacked together; a dielectric bump 110 is inserted into a second groove 201, and the dielectric bump 110 supports a groove 241 so that the dielectric bump 110 and the groove 241 form a pre-bonding; and an LED chip 230 is inserted into a first groove 101, and a second bonding metal 250 and a first bonding metal 120 are spaced apart to form a reserved gap 1a-1.

[0078] The reserved gap 1a-1 formed in step S121 has at least a first effect and a second effect.

[0079] The first effect is that it can accommodate the increased volume of the second bonding metal 250 and the first bonding metal 120 due to thermal expansion in the subsequent step S122, so that the stress generated by the expansion deformation of the second bonding metal 250 and the first bonding metal 120 during thermal expansion in the subsequent step S122 can be released in time through the reserved gap 1a-1, thereby reducing the generation of void defects on the metal bonding interface between the second bonding metal 250 and the first bonding metal 120 in step S122.

[0080] The second effect is to avoid the first situation in the preheating structure 1a of step S121, where the dielectric bump 110 detaches from the groove portion 241 due to the mutual support between the second bonding metal 250 and the first bonding metal 120, preventing the dielectric bump 110 from forming a pre-bond with the groove portion 241. Thus, by avoiding the first situation, the success rate of pre-bonding can be improved.

[0081] Combination Figure 1 - Figure 4 See Figure 5 As shown, step S122: The preheating structure 1a is heated so that the dielectric bump 110 and the groove portion 241 are bonded together, and the second bonding metal 250 and the first bonding metal 120 are heated and melted to fill the reserved gap 1a-1 so that they can contact and bond together.

[0082] It should be noted that in step S122, bonding the dielectric bump 110 and the groove portion 241 together includes: annealing the pre-bonded dielectric bonding interface formed by heating the dielectric bump 110 and the groove portion 241, thereby increasing the bonding energy.

[0083] Combination Figure 1 - Figure 4 See Figure 5 As shown, optionally, the spacing of the reserved gap 1a-1 is a second spacing d4; the second spacing d4 is 0.1 to 5 μm. For example, in some specific embodiments, the second spacing D4 can be 0.1 μm, 2 μm, or 5 μm, but is not limited thereto.

[0084] Optionally, combined Figure 1 - Figure 4 See Figure 5 As shown, in the fabricated microdisplay device 10, a first gap 20 exists within a first groove 101. The first gap 20 is located within the region enclosed by the dielectric layer 240, the first bonding metal 120, the second bonding metal 250, and the dielectric bump 110. The volume of the first gap 20 accounts for 30% to 90% of the volume of the first groove 101. For example, in some specific embodiments, the volume of the first gap 20 accounts for 30%, 60%, or 90% of the volume of the first groove 101, but is not limited thereto.

[0085] In this way, since there is a first gap 20 in the first groove 101 of the microdisplay device 10, it not only improves the success rate of pre-bonding of the dielectric bump 110 and the groove portion 241 when fabricating the microdisplay device 10, but also makes it easier for the LED chip 230 to be inserted into the first groove 101.

[0086] Example 3:

[0087] Combination Figure 1 See Figure 7 - Figure 10 As shown, Example 1 or Example 2 is further defined to obtain Example 3. The similarities between Example 3 and Example 1 or Example 2 will not be repeated. The further limitations of Example 3 compared to Example 1 or Example 2 are as follows.

[0088] The steps of providing the driving substrate 100 may include steps S11 to S14.

[0089] like Figure 7 As shown, step S11: Provide a driver circuit board 130.

[0090] like Figure 8 As shown, step S12: A first material layer 31 is formed on the drive circuit board 130. The first material layer 31 is used to form dielectric bumps 110.

[0091] Optionally, the material of the first material layer 31 is the same as the material of the dielectric bump 110, so that the first material layer 31 can be used to form the dielectric bump 110. For example, but not limitingly, the first material layer 31 includes, but is not limited to, SiO2, SiN. x Or at least one of SiON.

[0092] Combination Figure 8 See Figure 9 Step S13: A plurality of spaced first grooves 101 are formed in the first material layer 31, and the portion of the first material layer 31 between two adjacent first grooves 101 is formed as a dielectric bump 110.

[0093] Combination Figure 9 See Figure 10 Step S14: A first bonding metal 120 is provided at the bottom of the first groove 101.

[0094] Example 4

[0095] Combination Figure 1 , Figure 2 , Figure 7 - Figure 10 See Figure 11 - Figure 15As shown, Example 3 is further modified to obtain Example 4. The similarities between Example 4 and Example 3 will not be repeated here. The further modifications of Example 4 compared to Example 3 are as follows.

[0096] The step of providing the light-emitting substrate 200 may include steps S21 to S24.

[0097] like Figure 11 As shown, step S21: forming a stacked structure 30, the stacked structure 30 includes a substrate 210, a second material layer 32, a third material layer 33 and a fourth material layer 34 from bottom to top.

[0098] Combination Figure 2 See Figure 11 As shown, the region of the second material layer 32 near the substrate 210 is used to form a common semiconductor layer 220, and a portion of the region of the second material layer 32 away from the substrate 210 is used to cooperate with the third material layer 33 and the fourth material layer 34 to form an LED chip 230.

[0099] Combination Figure 2 , Figure 11 See Figure 12 As shown, step S22: Etching the stacked structure 30 to form a common semiconductor layer 220 and a plurality of LED chips 230, wherein the plurality of LED chips 230 are spaced apart and protrude from the common semiconductor layer 220, so that a second groove 201 is formed between two adjacent LED chips 230.

[0100] Combination Figure 2 , Figure 11 See Figure 12 As shown, the common semiconductor layer 220 is formed by the region of the second material layer 32 close to the substrate 210, and the LED chip 230 is formed by a portion of the region of the common semiconductor layer 220 away from the substrate 210, a portion of the third material layer 33, and a portion of the fourth material layer 34.

[0101] Optionally, combined Figure 2 , Figure 11 See Figure 12 As shown, the LED chip 230 sequentially includes a first semiconductor layer 231, a light-emitting layer 232, and a second semiconductor layer 233 along its protruding direction. The first semiconductor layer 231 and the common semiconductor layer 220 are homogeneous layers and integrally formed. Homogeneous layers are layers containing the same fabrication materials.

[0102] The first semiconductor layer 231 is formed from a portion of the region of the second material layer 32 that faces away from the substrate 210. The light-emitting layer 232 is formed from a portion of the third material layer 33, and the second semiconductor layer 233 is formed from a portion of the fourth material layer 34.

[0103] Optionally, such as Figure 12 As shown, the distance between the bottom of the sidewall on the same side of two adjacent LED chips 230 is the first distance d1, which is 2 to 60 μm. This ensures that the microdisplay device 10 has sufficient pixel density.

[0104] Optionally, such as Figure 12 As shown, the tilt angle of the sidewall of LED chip 230 is a first angle θ, which is 50 to 90 degrees. Figure 9 As shown, the inclination angle of the sidewall of the first groove 101 accommodating the LED chip 230 is the second angle β, which is 50 to 90 degrees.

[0105] The above method achieves at least the following first and second effects.

[0106] The first effect is that the sidewall of the portion of the first groove 101 that accommodates the LED chip 230 and the sidewall of the LED chip 230 form a matching slope, so that during the process of inserting the LED chip 230 into the first groove 101, the first groove 101 guides the second bonding metal 250 corresponding to the LED chip 230 to align with the first bonding metal 120 in the first groove 101.

[0107] The second effect is that the sidewall of the dielectric bump 110 has a sufficient slope, so that the current in the second bonding metal 250 corresponding to one of the two adjacent LED chips 230 is less likely to cross the dielectric bump 110 and reach the second bonding metal 250 corresponding to the other LED chip 230, thereby making it less likely to cause a short circuit between the two adjacent LED chips 230.

[0108] It should be noted that the first semiconductor layer 231 can be an N-type doped semiconductor layer, including but not limited to N-type doped GaN, as described in relevant existing art, and will not be elaborated further here. The second semiconductor layer 233 can be a P-type doped semiconductor layer, including but not limited to P-type doped GaN, as described in relevant existing art, and will not be elaborated further here.

[0109] Combination Figure 2 , Figure 12 See Figure 13 As shown, in step S23: a dielectric layer 240 is formed. The dielectric layer 240 includes at least a groove-shaped portion 241. The groove-shaped portion 241 covers the groove wall of the second groove 201 and extends along the groove wall of the second groove 201. The dielectric layer 240 is provided with a first opening 243 that exposes the second semiconductor layer 233.

[0110] Optionally, the dielectric layer 240 includes an extension 242 integrally formed with the groove portion 241 and covering the top wall of the LED chip 230, the extension 242 being provided with a first opening 243 exposing the second semiconductor layer 233.

[0111] Optionally, the dielectric layer 240 may be a single-layer structure or a multilayer structure composed of one of silicon oxide, silicon nitride, aluminum oxide, hafnium oxide and titanium oxide. Its main function is to protect the LED chip 230 and to form a bond with the dielectric bump 110, providing bonding strength.

[0112] Optionally, the bonding of the dielectric bump 110 to the groove portion 241 includes: the top wall of the dielectric bump 110 is bonded to the portion of the groove portion 241 covering the bottom wall of the second groove 201, and the side wall of the dielectric bump 110 is bonded to the portion of the groove portion 241 covering the side wall of the second groove 201.

[0113] It should be understood that in other examples, the dielectric layer 240 may also not include the extension 242, in which case the first opening 243 fully exposes the side of the second semiconductor layer 233 away from the light-emitting layer 232.

[0114] Combination Figure 2 , Figure 13 See Figure 14 Step S24: Form a second bonding metal 250. The second bonding metal 250 is disposed on the top of the LED chip 230 along its own protruding direction. The second bonding metal 250 covers the extension portion 242 and is electrically connected to the second semiconductor layer 233 through the first opening 243.

[0115] By utilizing the above method, the cooperation between the extension portion 242 and the groove portion 241 can effectively isolate the direct conduction between the second bonding metal 250 and the sidewall of the light-emitting layer 232 and the sidewall of the first semiconductor layer 231, thereby improving the reliability of the final fabricated micro-display device 10.

[0116] Optionally, such as Figure 12 As shown, the thickness of the dielectric layer 240 is a first thickness h3, which is 0.1–5 μm. Thus, the dielectric layer 240 allows light emitted from the LED chip 230 to pass through while preventing current flow and maintaining insulation performance.

[0117] Optionally, in order to ensure that the LED chip 230, the extension 242, the second bonding metal 250, and the first bonding metal 120 in the fabricated microdisplay device 10 can all be accommodated in the first recess 101, in the fabricated microdisplay device 10, as... Figure 12 As shown, the height h1 of the LED chip 230 is 0.5–3 μm. Figure 9As shown, the depth h2 of the first groove 101 is 2–20 μm. Combined with… Figure 2 - Figure 3 See Figure 4 As shown, the thickness of the first bonding metal 120 is the second thickness h4, and the second thickness h4 is 0.5~15μm; bonding Figure 2 - Figure 3 See Figure 4 The thickness of the second bonding metal 250 located on the side of the dielectric layer 240 away from the common semiconductor layer 220 is the third thickness h5, which is 0.5 to 15 μm.

[0118] Optionally, in order to ensure that the microdisplay device 10 has sufficient pixel density, such as Figure 12 As shown, in two adjacent LED chips 230, the bottom dimension of the LED chip 230 along the spacing direction between the two adjacent LED chips 230 is the first dimension d2, and the first dimension d2 is 1~60μm. Figure 9 As shown, between two adjacent first grooves 101, the top of the dielectric bump 110 has a second dimension d3 along the spacing direction of the two adjacent first grooves 101, and the second dimension d3 is 1 to 60 μm.

[0119] Example 5

[0120] Combination Figure 5 ,contrast Figure 1 See Figure 16 As shown, Example 5 is a variation of Examples 1 to 4. The parts in Example 5 that are the same as those in Examples 1 to 4 will not be repeated. The differences between Example 5 and Examples 1 to 4 are as follows.

[0121] The first groove 101 includes a first hole 102 and a second hole 103 connected in sequence along the concave direction of the first groove 101. The first hole 102 is the portion of the first groove 101 used to accommodate the LED chip 230, and the second hole 103 is the portion of the first groove 101 used to accommodate the first bonding metal 120.

[0122] The cross-section of the first hole 102 can gradually decrease along the concave direction of the first groove 101, and the cross-section of the second hole 103 can gradually increase along the concave direction of the first groove 101.

[0123] Optionally, combined Figure 16 See Figure 17 - Figure 21 As shown, the steps of providing the driving substrate 100 may include steps S31 to S35.

[0124] like Figure 17 As shown, step S31: Provide a driver circuit board 130.

[0125] like Figure 18 As shown, step S32: A fifth material layer 35 is formed on the drive circuit board 130. The fifth material layer 35 is used to form the first bonding metal 120.

[0126] Optionally, the material of the fifth material layer 35 is the same as the material of the first bonding metal 120, so that the fifth material layer 35 can be used to form the first bonding metal 120.

[0127] Combination Figure 18 See Figure 19 Step S33: Pattern the fifth material layer 35 to obtain a plurality of spaced first bonding metals 120.

[0128] Combination Figure 19 See Figure 20 Step S34: A first material layer 31 is formed on the drive circuit board 130. The first material layer 31 covers a plurality of first bonding metals 120 and the drive circuit board 130. The first material layer 31 is used to form dielectric bumps 110.

[0129] The portion of the first material layer 31 located around the periphery of the first bonding metal 120 forms the second hole 103. Optionally, the material of the first material layer 31 is the same as the material of the dielectric bump 110, so that the first material layer 31 can be used to form the dielectric bump 110. For example, but not limited to, the first material layer 31 includes, but is not limited to, SiO2 and SiN. x Or at least one of SiON.

[0130] Combination Figure 20 See Figure 21 Step S35: A first hole 102 is formed in the first material layer 31 corresponding to the first bonding metal 120. The first hole 102 and the second hole 103 are connected to form a first groove 101 above the drive circuit board 130. The portion of the first material layer 31 between two adjacent first grooves 101 is formed as a dielectric bump 110.

[0131] The above are merely embodiments of this application and do not limit the scope of this patent application. Any equivalent structural or procedural changes made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the scope of patent protection of this application.

Claims

1. A micro-display device, characterized in that, The microdisplay device includes: A driving substrate is provided with a plurality of spaced first grooves; a dielectric bump is formed between two adjacent first grooves; and a first bonding metal is provided at the bottom of the first groove. The device includes a common semiconductor layer, a plurality of LED chips, a dielectric layer, and a second bonding metal; the plurality of LED chips are spaced apart and protrude from the common semiconductor layer to form a second groove between two adjacent LED chips; the second bonding metal is disposed on the top of each LED chip along its protruding direction; the dielectric layer includes at least a groove-shaped portion that covers the groove wall of the second groove and extends along the groove wall of the second groove. Wherein, the dielectric bump is inserted into the second groove and the dielectric bump is bonded to the groove portion, the LED chip is inserted into the first groove and the second bonding metal is bonded to the first bonding metal; The LED chip includes a first semiconductor layer, a light-emitting layer and a second semiconductor layer in sequence along the protruding direction of the LED chip. The first semiconductor layer and the common semiconductor layer are homogeneous layers and are integrally formed. The side of the dielectric bump facing the common semiconductor layer is the first side; the side of the first semiconductor layer facing away from the common semiconductor layer is the second side; the first side is located on the side of the second side closer to the common semiconductor layer.

2. The microdisplay device according to claim 1, characterized in that, The dielectric layer includes an extension integrally formed with the groove portion and covering the top wall of the LED chip, the extension having a first opening that exposes the second semiconductor layer; The second bonding metal covers the extension portion and is electrically connected to the second semiconductor layer through the first opening.

3. The microdisplay device according to claim 1, characterized in that, The cross-sectional area of ​​the LED chip gradually decreases along the protruding direction of the LED chip, and the cross-sectional area of ​​the portion of the LED chip that is accommodated by the first groove gradually decreases along the concave direction of the first groove. Wherein, the area of ​​the horizontal projection of the second bonding metal is the first area, the area of ​​the top wall of the LED chip is the second area, and the first area is smaller than the second area.

4. The microdisplay device according to claim 3, characterized in that, The area of ​​the horizontal projection of the first bonding metal is the third area, and the first area is smaller than the third area.

5. The microdisplay device according to claim 1, characterized in that, The distance between the bottom of the sidewall on the same side of two adjacent LED chips is the first distance, which is 2~60μm.

6. The microdisplay device according to claim 1, characterized in that, The tilt angle of the sidewall of the LED chip is a first angle, which is 50 to 90 degrees.

7. The microdisplay device according to claim 6, characterized in that, The height of the LED chip is 0.5~3μm.

8. The microdisplay device according to claim 7, characterized in that, In two adjacent LED chips, the bottom dimension of the LED chip along the spacing direction between the two adjacent LED chips is a first dimension, which is 1~60μm.

9. The microdisplay device according to claim 1, characterized in that, The first groove accommodates the LED chip portion at a second angle, which is 50 to 90 degrees.

10. The microdisplay device according to claim 9, characterized in that, The depth of the first groove is 2~20μm.

11. The microdisplay device according to claim 10, characterized in that, Between two adjacent first grooves, the top of the dielectric bump has a second dimension along the spacing direction between the two adjacent first grooves, and the second dimension is 1~60μm.

12. The microdisplay device according to claim 1, characterized in that, The top wall of the dielectric bump is bonded to the portion of the groove that covers the bottom wall of the second groove, and the side wall of the dielectric bump is bonded to the portion of the groove that covers the side wall of the second groove.

13. The microdisplay device according to claim 1, characterized in that, The thickness of the dielectric layer is a first thickness, which is 0.1~5μm.

14. The microdisplay device according to claim 1, characterized in that, The thickness of the first bonding metal is the second thickness, which is 0.5~15μm; the thickness of the second bonding metal in the region of the dielectric layer opposite to the common semiconductor layer is the third thickness, which is 0.5~15μm.

15. The microdisplay device according to claim 1, characterized in that, The first groove contains a first gap, which is located in the area enclosed by the dielectric layer, the first bonding metal, the second bonding metal, and the dielectric bump; the volume of the first gap accounts for 30% to 90% of the volume of the first groove.

16. A method for fabricating a microdisplay device, characterized in that, The method for fabricating the microdisplay device includes: Step S110: Provide a driving substrate and a light-emitting substrate; The driving substrate is provided with a plurality of spaced first grooves; a dielectric bump is formed between two adjacent first grooves; and a first bonding metal is provided at the bottom of the first groove. The light-emitting substrate includes a substrate, a common semiconductor layer, a plurality of LED chips, a dielectric layer, and a second bonding metal. The common semiconductor layer is disposed on the substrate, and the plurality of LED chips are spaced apart and protrude from the common semiconductor layer to form a second groove between two adjacent LED chips. The second bonding metal is disposed on the top of each LED chip along its protruding direction. The dielectric layer includes at least a groove-shaped portion that covers the groove wall of the second groove and extends along the groove wall of the second groove. Step S120: Bond the light-emitting substrate to the driving substrate; Wherein, the dielectric bump is inserted into the second groove and the dielectric bump is bonded to the groove portion, the LED chip is inserted into the first groove and the second bonding metal is bonded to the first bonding metal; The LED chip includes a first semiconductor layer, a light-emitting layer and a second semiconductor layer in sequence along the protruding direction of the LED chip. The first semiconductor layer and the common semiconductor layer are homogeneous layers and are integrally formed. The side of the dielectric bump facing the common semiconductor layer is the first side; the side of the first semiconductor layer facing away from the common semiconductor layer is the second side; the first side is located on the side of the second side closer to the common semiconductor layer.

17. The preparation method according to claim 16, characterized in that, Step S120 includes: Step S121: Stack the light-emitting substrate and the driving substrate together to form a preheating structure; The preheating structure includes the light-emitting substrate and the driving substrate stacked together; the dielectric bump is inserted into the second groove, and the dielectric bump supports the groove portion so that the dielectric bump and the groove portion form a pre-bonding; and the LED chip is inserted into the first groove, and the second bonding metal and the first bonding metal are spaced apart to form a reserved gap; Step S122: The preheating structure is heated so that the dielectric bump is bonded to the groove portion, and the second bonding metal and the first bonding metal are heated and melted to fill the reserved gap so as to contact and bond together.

18. The preparation method according to claim 17, characterized in that, In the preheating structure, the spacing of the reserved gap is a second spacing; the second spacing is 0.1~5μm.

19. The preparation method according to claim 17, characterized in that, After step S122, a first gap exists in the first groove. The first gap is located in the area enclosed by the dielectric layer, the first bonding metal, the second bonding metal, and the dielectric bump. The volume of the first gap accounts for 30% to 90% of the volume of the first groove.

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