Portable high-precision optical phased array radar chip driving circuit and driving method thereof

Abstract

The invention is applied to the field of thermo-optic and electro-optic optical phased array chip control, and designs a portable high-precision optical phased array radar controller. The optical phased array radar chip controller is composed of four parts: an MCU control circuit, a dual-digital-to-analog conversion output network, a dual-power output circuit and a display module circuit. According to the invention, the dual-path AD5766 is controlled through the SIP interface of the MCU with the model of STM32F401 CCU6, so that a multi-channel voltage signal is output. According to the invention, 32 paths of voltage signals can be generated at most by adopting two paths of chips, the voltage signals are output through the impedance matching network, and the impedance matching network can solve the difference of end-to-end output signals caused by different wiring. And the dual-power output circuit adopts ADP5071 to output + / -12V voltage for positive and negative power supplies of AD5766 by adjusting a matched resistor. And the display module adopts a 2.1-inch color screen to be connected with the MCU through an SPI (Serial Peripheral Interface). The display screen is used for outputting control parameters and an optical phased array state; according to the invention, high-precision control of the optical phased array radar chip is realized through the above parts, and the optical phased array radar chip can be used for optical phased array chips with thermo-optic effect and electro-optic effect. According to the invention, the control cost of the optical phased array is obviously reduced while the size of the controller is reduced.

Description

Technical Field

[0001] The present invention is applied to the field of optical phased arrays and relates to a multi-channel voltage controller system using a DAC architecture and a driving method thereof. Background Art

[0002] As a type of solid-state optical radar, the optical phased array eliminates the interference caused by vibration compared to the MEMS micro-electromechanical system, and has advantages such as small size and large scanning angle. At present, the academic community mainly uses thermal tuning as the tuning method of the optical phased array. The small size, portable, and simple structure of the thermally tuned optical phased array tuning method has broad application prospects and advantages.

[0003] The present invention mainly adopts a multi-channel voltage control chip with a DAC architecture combined with an MCU to intelligently control the voltage and current signals of each channel of the optical phased array to realize the scanning of the optical phased array chip light beam. The optical phased array control drive circuit realized by the present invention meets the control requirements of a phased array chip with 32 silicon optical waveguides. The present invention has extremely high scalability while meeting the use of existing optical phased array chips. At present, the number of optical phased arrays with 64 or even 128 silicon optical waveguides is gradually increasing. This solution only needs to add corresponding DAC chips to meet the needs of multi-channel expansion. Summary of the invention

[0004] The present invention proposes an optical phased array driving method based on an MCU controlling a multi-channel DAC architecture, which solves the problems of complex structure and poor scalability of existing optical phased array driving circuits.

[0005] In order to achieve the above-mentioned miniaturization and other goals, the present invention uses MCU as the main control chip to control the output voltage and current of the DAC chip through the SPI bus. Each output of the DAC chip is equipped with a PI type impedance matching network.

[0006] The MCU controller model is STM32F401CCU6, which uses an external 8M crystal oscillator as the clock signal source. The output pin of the crystal oscillator is equipped with a 22pF capacitor, which is very helpful for the starting and stability of the crystal oscillator.

[0007] The MCU chip has additional circuits such as peripheral reset circuit and BOOT startup mode selection.

[0008] The humanized display interface is connected to the MCU through the SPI interface by the display module.

[0009] The MCU main control is controlled by 5 buttons: K1, K2, K3, K4, and K5.

[0010] K1 is for selecting the number of optical phased array output beams. The present invention supports phased array output modes of 1 or 2 beams. K2 is for selecting the output angle of the optical phased array. K3 is for the power switch of the display screen module. Turning off the display module can reduce the overall power consumption of the portable device. K4 and K5 are spare keys for the optical phased array expansion function.

[0011] The power supply is divided into two parts, one is the MCU and screen module power supply part, the other is the DAC network power supply part.

[0012] The power supply of MCU and peripherals adopts AMS1117 linear voltage regulator chip, and the maximum output current of linear voltage regulator circuit is 1A. The input and output ports of voltage regulator chip adopt 10uF and 0.1uF capacitors in parallel to enhance the filtering performance of the circuit.

[0013] The power supply of the DAC output network uses the ADP5071 dedicated DCDC conversion chip. The ADP5071 outputs a voltage of -12V to +12V to meet the voltage requirements for controlling the optical phased array. The ADP5071 controls its output voltage through bias resistors, and its upper and lower bias resistors are 51K and 44K respectively.

[0014] The DAC conversion chip uses AD5766. The present invention uses two AD5766 chips to meet the control of 32-way silicon optical waveguide thermal bias. The 12-bit digital-to-analog conversion chip controls the accuracy of the output current at the 0.1mA level, meeting the output requirements of the optical phased array.

[0015] The DAC chip uses ADR4525BRZ as the output reference voltage, and the output reference voltage is 2.5v. The output pin is connected to the ground with a 1uF decoupling capacitor to achieve a good voltage output effect.

[0016] The DAC output voltage signal is output through a PI type impedance matching network. The capacitor of the PI type circuit is not soldered to adapt to different output ports.

[0017] The MCU and DCA network communication protocol adopts the standard SPI protocol, and the protocol uses the high and low output levels to define 0 and 1. In the standard SPI communication protocol, the low level is defined as 0 and the high level is defined as 1. The present invention uses two AD5766 chips to communicate with STM32F401CCU6, which are named AD1 and AD2 respectively, wherein AD1 is connected to the SPI1 interface of the MCU, and AD2 is connected to the SPI2 of the MCU.

[0018] The MCU outputs different voltage values ​​through the SPI bus, which are converted into different current signals after being converted by the TiO2 built into the optical phased array. 2R is the thermal power formula of the conductor, and thus the output voltage can be converted into a current value through the DAC output network to achieve the control of the beam phase shift in the silicon optical waveguide in the optical phased array. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to clearly illustrate the technical solution used in the present invention, the circuit schematic diagram described in the present invention will be described below.

[0020] Figure 1 This is a diagram of the external 9V power supply interface of the present invention.

[0021] Figure 2 This is a diagram of the AMS1117 linear voltage-regulated power supply of the present invention.

[0022] Figure 3 This is the schematic diagram of the AD1 output network circuit of the present invention.

[0023] Figure 4 This is the schematic diagram of the AD2 output network circuit of the present invention.

[0024] Figure 5 This is a schematic diagram of the PI type impedance matching output network of the present invention.

[0025] Figure 6 This is the schematic diagram of the MCU main control circuit of the present invention.

[0026] Figure 7 It is the MCU control button of the present invention.

[0027] Figure 8 This is a far-field picture of the output beam of the optical phased array controlled by the present invention, wherein the far-field scanning angle is 0°.

[0028] Fig. 9 This is a far-field picture of the output beam of the optical phased array controlled by the present invention, wherein the far-field scanning angle is 40°. Specific implementation plan

[0029] Unless otherwise defined, the technical terms or scientific terms used in the present invention should be understood by people with ordinary skills in the field to which the present invention belongs. "First", "second" and similar words used in the present invention do not indicate any order, quantity or importance, but are only used to distinguish different components. "Include" or "comprise" and similar words mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0030] Compared with the traditional solution of multiple independent DACs with external voltage followers, the present invention integrates all analog DAC parts, realizes the conversion of output voltage to resistance through the combination of an external output impedance matching network and the built-in Ti metal oxide heater of the optical phased array, thereby realizing the thermal bias of the optical phased array, which greatly simplifies the output regulation circuit.

[0031] The power input interface of the present invention is as follows Figure 1 As shown, EC1, EC2: 470uF / 16v capacitors; C13, C14: 0.1uF capacitors. The four compatible parallel connections play a good role in filtering and circuit protection. DC1 is a standard 5.5 caliber power socket, which is the power supply structure of the present invention, with the positive pole inside and the negative pole outside.

[0032] The MCU control circuit power supply part of the present invention is as follows Figure 2 As shown in the figure, U3: AMS1117 chip; C23, C25: 10uF capacitors; C24, C26: 0.1uF capacitors. The 10uF and 0.1uF capacitors are connected in parallel at the input and output ports of the AMS1117 chip to filter out high-frequency noise in the power supply and ensure the purity of the power supply.

[0033] The circuit schematic diagram of the DAC conversion chip of the present invention is as follows: Figure 3 Figure 4 As shown, Figure 3 Figure 4 U7, U9: AD5766 chip, U6, U8: ADR4525BRZ chip. J17, J24: SPI terminals used by DAC to communicate with MCU. J15, J22, J23, J26: voltage signal output ports. In the definition diagram, U7 is AD1 and the SPI interface used to communicate with MCU is AD1; in the definition diagram, U9 is AD2 and the SPI interface used to communicate with MCU is AD2.

[0034] Figure 5 The PI type impedance matching network used in the present invention. The left end of all impedance matching networks is connected to Figure 3 , Figure 4 The right end of the impedance matching network is connected to the corresponding VOUT port. Figure 3 , Figure 4 The output terminals corresponding to J15, J22, J23, and J26 complete the output of voltage signals.

[0035] Figure 6 This is the circuit schematic of the MCU main control part, where U1A, U1B: STM32F401CCU6 chip; X2: 8M crystal oscillator; C7: STM32 external 0.1uF decoupling capacitor. U1A's PA13 pin is SWDIO; PA14 pin is SWCLK, and the host computer uploads the program to U1A through PA13 and PA14.

[0036] U1A's PA4, PA5, PA6, and PA7 are SPI1 communication pins. Figure 3 J17 controls AD1. PB10, PB12, PB14, and PB15 are SPI2 communication pins. Figure 4 The J24 pin controls AD2.

[0037] T1 is the external program download interface.

[0038] Figure 7 This is the schematic diagram of the MCU key circuit. In the figure, KEY1, KEY2, KEY3, KEY4, and KEY5 are connected to PA1, PA2, PA3, PB8, and PB9 respectively. The interface modes of PA1, PA2, PA3, PB8, and PB9 are set to built-in pull-up mode. When the key is pressed, the pin level is pulled down to 0v, which represents a low-level trigger, and the key is recorded as pressed.

[0039] According to the above principle, the current value of the DAC output network is arranged according to channels 0-31. When the current value of each channel is: 0.00429A, 0.00122A, 0.00695A, 0.00020A, 0.00061A, 0.00409A, 0.00245A, 0.00040A, 0.00040A, 0.00654A, 0.00572A, 0.00756A, 0.00654A, 0.00449A, 0.0038 The far-field beam focusing angle of the optical phased array is 0° when the far-field beam is 0.8A, 0.00695A, 0.00552A, 0.00511A, 0.00552A, 0.00695A, 0.00532A, 0.00613A, 0.00695A, 0.00327A, 0.00613A, 0.00061A, 0.00286A, 0.00592A, 0.00061A, 0.00061A, 0.00081A, and the far-field beam pattern is as follows Figure 8 As shown, Figure 8 The horizontal axis is the far-field angle, and the vertical axis is the normalized far-field light intensity.

[0040] According to the above principle, the current value of the DAC output network is arranged according to channels 0-31. When the current value of each channel is: 0.00163A, 0.00286A, 0.00307A, 0.00695A, 0.00122A, 0.00593A, 0.00736A, 0.00041A, 0.00490A, 0.00409A, 0.00572A, 0.00409A, 0.00450A, 0.00306A, 0.005 The far-field beam focusing angle of the optical phased array is 40° at 31A, 0.00490A, 0.00490A, 0.00429A, 0.00040A, 0.00450A, 0.00143A, 0.00306A, 0.00592A, 0.00286A, 0A, 0.00552A, 0.00245A, 0.00593A, 0.00592A, 0.00409A, 0.00511A, and 0A. The far-field beam pattern is as follows Fig. 9 As shown, Fig. 9 The horizontal axis is the far-field angle, and the vertical axis is the normalized far-field light intensity.

[0041] Those skilled in the art should understand that the discussion of any of the above embodiments is merely illustrative and is not intended to imply that the scope of the present invention (including the claims) is limited to these examples. Under the concept of the present invention, the technical features in the above embodiments or different embodiments may be combined, the steps may be implemented in any order, and there are many other variations of the different aspects of the present invention as described above, which are not provided in detail for the sake of simplicity.

[0042] The present invention is intended to cover all such substitutions, modifications and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A portable high-precision optical phased array radar chip driving circuit, It is characterized in that The MCU control circuit, digital-to-analog conversion circuit, multi-channel signal impedance matching circuit, positive and negative power supply module and screen display circuit can control up to 32 electro-optical or thermo-optical optical phased array chips. The MCU controller uses STMicroelectronics STM32F401CCU6 ARM core single-chip microcomputer as the main control to process host computer information, control screen display and control DAC through SPI interface; the digital-to-analog conversion circuit needs to convert the digital signal output by the MCU into an analog voltage value and load it into the multi-channel signal impedance matching circuit. The dual-chip AD5766 high-precision 16-bit digital-to-analog converter is used as the output end of the analog signal. The 2.5V voltage output by the ADR4525BZR chip is used in the digital-to-analog conversion circuit as the reference voltage of the digital-to-analog conversion circuit, which ensures the accuracy of the output voltage of the conversion circuit; the positive and negative power supply modules use ADP5071 as the control chip of the DCDC circuit to ensure the stability of the circuit output voltage.

2. The MCU control circuit according to claim 1, Features The STM32F401CCU6 microcontroller produced by STMicroelectronics is used as the main control, with an external 8M crystal oscillator and reset circuit, and three independent hardware SPI interfaces are reserved as the control interface of the DAC and screen module. Five independent external buttons are used for user interface interaction. Its SPI signal output end and AD5766 digital-to-analog conversion chip are connected to the screen module to load the control signal to each module.

3. The digital-to-analog conversion circuit according to claim 1, Features Two MZI-specific digital-to-analog conversion chips AD5766 produced by ADI are used. Each AD5766 chip is equipped with a 2.5v standard voltage circuit. Each output of each AD5766 is equipped with an output impedance matching network.

4. According to the 2.5V standard reference voltage output circuit of claim 3, Features ADR4525BRZ is used as the standard voltage output, and its output end is equipped with a 1uf decoupling capacitor to stabilize the output.

5. The output impedance matching network according to claim 3, Features Each impedance matching network uses a PI-shaped circuit composed of a capacitor and a resistor, wherein the resistor is 0 ohm. The capacitor of the PI-shaped circuit is in an unsoldered state to adapt to different output impedances.

6. The dual-channel power conversion module according to claim 1, Features The dual-channel power conversion control chip adopts a DC-DC architecture. The chip model is ADP5071. After matching the feedback resistors, the output of the dual-channel power module is -12v to +12v, which meets the requirements of the thermal-optical modulation phased array.

7. The MCU control circuit according to claim 1, Features The 3.3v voltage output by AMS1117 is used as the voltage regulator of MCU. The output and input of AMS1117 both have 10uF and 0.1uF filter capacitors to ensure the stability of the output voltage.

8. The SPI communication interface according to claim 1, Features It uses the standard SPI communication protocol and has three signal lines: MOSI, MISO, and CLK. The communication protocol uses high and low levels to distinguish signal attributes, where low level represents 0 and high level represents 1.

9. The display module according to claim 1, It is characterized in that The display module uses the SPI interface to communicate with the MCU, and the display content is the current value corresponding to each channel during the thermal optical phased array modulation, with a total of 32 channels. The output current can be switched by pressing the button to control the angle of the optical phased array output beam.

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