Compiler reconstruction method based on immediate operand type operand relocation function

Abstract

The invention discloses an immediate operand relocation function-based compiler reconstruction method, which relates to the field of compiler reconstruction and comprises the following steps of: loading a processor design result file; calling an interface corresponding to the loaded design result file, and recovering the processor design information in the design result file into a memory; the processor design information comprises instruction and operand information; traversing the instruction, and collecting instruction information corresponding to the instruction to construct a relocation information list; generating a relocation function of an immediate operand type operand according to the relocation information list; and reconstructing the compiler based on the relocation function. The method comprises the following steps: automatically generating a relocation function according to processor design information in a processor design result file; the compiler matched with the processor can call the relocation function to complete the relocation function of the operand, and the compiler matched with the processor can be generated accurately and rapidly.

Description

Technical Field

[0001] The present invention relates to the technical field of compiler reconstruction, and in particular to a compiler reconstruction method based on an immediate type operand relocation function. Background Art

[0002] The compiler is a key module in the processor design process. Whenever the processor design changes, the compiler needs to be regenerated. Being able to regenerate the compiler correctly and quickly can shorten the processor design process. During the compiler regeneration process, it is necessary to be able to automatically regenerate the relocation function of the immediate type operand. In the existing solution, the generation of the relocation function depends on the manual participation of the developer, and it is necessary to analyze and count the encoding information, especially the bit-level statistics. The development time is long and it is easy to make mistakes, which leads to slow compiler generation. Summary of the invention

[0003] The purpose of the present invention is to provide a compiler reconstruction method based on an immediate type operand relocation function, so as to solve the problem in the prior art that the relocation function takes a long time to develop and is prone to errors, thus resulting in a slow compiler generation speed.

[0004] To achieve the above object, the present invention provides the following solutions:

[0005] A compiler reconstruction method based on an immediate type operand relocation function comprises:

[0006] Load the processor design result file;

[0007] Calling the interface corresponding to the loaded design result file to restore the processor design information in the design result file to the memory; the processor design information includes instruction and operand information;

[0008] Traversing the instructions, collecting instruction information corresponding to the instructions to construct a relocation information list; the instruction information includes: an encoding format of the instruction, an ID of an immediate type operand, and a hardware logic description of the immediate type operand;

[0009] Generate a relocation function of an immediate type operand according to the relocation information list;

[0010] Rebuild the compiler based on the relocated functions.

[0011] Optionally, load the processor design result file, including:

[0012] The processor design result file is loaded through the loading function in the dynamic link library provided by the operating system; the loading function is the dlopen function.

[0013] Optionally, calling an interface corresponding to the loaded design result file to restore the processor design information in the design result file to the memory specifically includes:

[0014] Create a structure instance for each operand, which is the operand structure instance; store the operand information through the member variables of the structure;

[0015] Adding the operand structure instance to a doubly linked list, which is an operand doubly linked list; the operand doubly linked list is used to store operands, and each node in the operand doubly linked list is the operand structure instance;

[0016] Associating the operand doubly linked list to the operand structure instance;

[0017] Create a structure instance for each instruction, which is the instruction structure instance; store various information of the instruction through the member variables of the structure;

[0018] Adding the instruction structure instance to a bidirectional linked list, which is an instruction bidirectional linked list; the instruction bidirectional linked list is used to store instructions, and each node in the instruction bidirectional linked list is the instruction structure instance;

[0019] The instruction doubly linked list is associated with the instruction structure instance.

[0020] Optionally, generating a relocation function of an immediate type operand according to the relocation information list specifically includes:

[0021] Traversing the hardware logic description of the immediate type operand in reverse order and generating C++ code;

[0022] According to the encoding format of the instruction and the ID of the immediate type operand, determine the encoding starting bit number of the immediate type operand, and generate a C++ shift operation code;

[0023] According to the C++ code and the C++ shift operation code, a relocation function of each immediate type operand is obtained.

[0024] Optionally, traversing the hardware logic description of the immediate type operand in reverse order and generating C++ code specifically includes:

[0025] If the hardware logic description of the immediate type operand is a SEXT signed extension operation, a C++ code is generated to complete the inverse operation of the SEXT signed extension operation through a shift operation and a bitwise OR operation;

[0026] If the hardware logic description of the immediate type operand is a ZEXT unsigned extension operation, a C++ code is generated to complete the inverse operation of the ZEXT unsigned extension operation through a shift operation and a bitwise OR operation;

[0027] If the hardware logic description of the immediate value type operand is a SLICE slicing operation, a C++ code is generated to complete an extraction operation on the bits specified by the input value, and an inverse operation of the SLICE slicing operation is completed through the extraction operation;

[0028] If the hardware logic description of the immediate value type operand is a REPL copy operation, a C++ code is generated to complete an extraction operation on a single bit specified by the input value, and an inverse operation of the REPL copy operation is completed through the extraction operation;

[0029] If the hardware logic description of the immediate value type operand is a CONCAT connection operation, a C++ code is generated to complete the split operation of the input value, and the inverse operation of the CONCAT connection operation is completed through the split operation;

[0030] If the hardware logic description of the immediate value type operand is an SLL shift operation, a C++ code is generated to complete the right shift operation of the input value, and the inverse operation of the SLL shift operation is completed through the right shift operation;

[0031] If the hardware logic description of the immediate type operand is an ADD addition operation, a section of C++ code is generated to complete the subtraction operation of the input value, and the inverse operation of the ADD addition operation is completed through the subtraction operation.

[0032] The present invention also provides a compiler reconstruction system based on an immediate type operand relocation function, comprising:

[0033] A file loading unit, used for loading processor design result files;

[0034] A recovery unit, used to call the interface corresponding to the loaded design result file, and restore the processor design information in the design result file to the memory; the processor design information includes instruction and operand information;

[0035] A relocation information list building unit is used to traverse the instructions, collect instruction information corresponding to the instructions, and build a relocation information list; the instruction information includes: an encoding format of the instruction, an ID of an immediate type operand, and a hardware logic description of the immediate type operand;

[0036] A relocation function generating unit, used for generating a relocation function of an immediate type operand according to the relocation information list;

[0037] The compiler reconstruction unit is used to rebuild the compiler based on the relocation function.

[0038] Optionally, the recovery unit specifically includes:

[0039] The structure instance creation subunit is used to create a structure instance for each operand, which is an operand structure instance; the operand information is stored through the member variables of the structure;

[0040] An operand doubly linked list creation subunit is used to add the operand structure instance to a doubly linked list, which is an operand doubly linked list; the operand doubly linked list is used to store operands, and each node in the operand doubly linked list is the operand structure instance;

[0041] A first associating subunit, used for associating the operand bidirectional linked list to the operand structure instance;

[0042] The instruction structure instance creation subunit is used to create a structure instance for each instruction, which is the instruction structure instance; various information of the instruction is stored through the member variables of the structure;

[0043] An instruction doubly linked list creation subunit is used to add the instruction structure instance to a doubly linked list, which is an instruction doubly linked list; the instruction doubly linked list is used to store instructions, and each node in the instruction doubly linked list is an instruction structure instance;

[0044] The second associating subunit is used to associate the instruction bidirectional linked list with the instruction structure instance.

[0045] Optionally, the relocation function generating unit specifically includes:

[0046] A C++ code generation subunit, used for traversing the hardware logic description of the immediate type operand in reverse order and generating C++ code;

[0047] A C++ shift operation code generating subunit, used for determining the encoding start bit number of the immediate type operand according to the encoding format of the instruction and the ID of the immediate type operand, and generating a C++ shift operation code;

[0048] The relocation function generating subunit is used to obtain the relocation function of each immediate type operand according to the C++ code and the C++ shift operation code.

[0049] According to the specific embodiments provided by the present invention, the present invention discloses the following technical effects:

[0050] The present invention provides a compiler reconstruction method based on an immediate type operand relocation function, which automatically generates a relocation function according to processor design information in a processor design result file; a compiler matching the processor can call this relocation function to complete the operand relocation function, which helps to achieve accurate and rapid generation of a compiler matching the processor. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0052] Figure 1 The present invention provides a flowchart of a compiler reconstruction method based on an immediate type operand relocation function according to a first embodiment of the present invention. DETAILED DESCRIPTION

[0053] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0054] The purpose of the present invention is to provide a compiler reconstruction method based on immediate type operand relocation function, which realizes the rapid and accurate automatic generation of relocation function by replacing the original manual functions with automatic tools.

[0055] The processor design result file is a dynamic link library file, assuming its name is core.so. The processor design information is represented in the form of a structure (C language struct) and a doubly linked list and stored in the so file. The so file also provides a series of interfaces (functions). The tool designed by the present invention will load the so file and call the interfaces provided by it to restore the processor design information of the so file to the memory. In the memory, the processor design information is also stored and represented in the form of a structure and a doubly linked list to facilitate retrieval.

[0056] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0057] Embodiment 1

[0058] like Figure 1As shown, the compiler reconstruction method based on the immediate type operand relocation function provided in this embodiment includes the following steps:

[0059] Step 101: Load the processor design result file.

[0060] Use the dynamic link library loading function provided by the operating system to load the above core.so file:

[0061] The operating system provides a dynamic link library loading function to load the core.so file, and the loading function is a dlopen function: mycore=dlopen(core.so) / / dlopen function.

[0062] Step 102: calling the interface corresponding to the loaded design result file to restore the processor design information in the design result file to the memory; the processor design information includes instruction and operand information.

[0063] An interface (function) farm_create_core will be provided in the loaded core.so. The method described in this solution can restore the processor design information contained in core.so to the memory by calling this interface, so as to facilitate the retrieval of the processor design information in the subsequent steps.

[0064] (1) Find the interface (function) from the dynamic link library

[0065] The specific statements are as follows:

[0066] farm_t farm; / / define variables

[0067] core_create = dlsym(mycore, "farm_create_core"); / / Find the interface in the dynamic link library

[0068] (2) In the farm_create_core interface (function), the following steps are used to restore the instruction and operand information in the processor design result to the memory through the structure and the doubly linked list:

[0069] 1) Create a structure instance for each operand, which is the operand structure instance; store the operand information through the member variables of the structure.

[0070] 2) Add the created operand structure instance to a doubly linked list, the operand doubly linked list (assuming its name is operandsList). This doubly linked list is specifically used to store operands. Each node is the structure instance created in the previous step 1), corresponding to an operand.

[0071] 3) Associate the operandsList doubly linked list to the farm structure instance in the previous step 1) through the C language assignment statement farm->operands=operandsList.

[0072] 4) Create a structure instance for each instruction, which is the instruction structure instance; store various information about the instruction through the member variables of the structure.

[0073] 5) Add the created instruction structure instance to a doubly linked list, which is an instruction doubly linked list (assuming its name is instLists). This doubly linked list is dedicated to storing instructions. Each node is the structure instance created in the previous step 4), corresponding to an instruction.

[0074] 6) Associate the instLists doubly linked list to the farm structure instance in step 4) of the previous step, using the C language assignment statement farm->insts=instList.

[0075] 7) After the above steps, the operands and instruction information in the processor design have been restored to the memory, which is convenient for query and use in subsequent steps.

[0076] 8) After restoring the contents to the memory, assign the entry address of the memory to the defined variable farm.

[0077] For example: farm_create_core(farm); / / After restoring the content to the memory, assign the entry address of this memory to farm.

[0078] Step 103: traverse the instructions, collect instruction information corresponding to the instructions and construct a relocation information list; the instruction information includes: the encoding format of the instruction, the ID of the immediate type operand and the hardware logic description of the immediate type operand.

[0079] (1) Traverse the farm->insts and farm->operands bidirectional linked lists created in the previous steps, and collect the following three pieces of information for each node (that is, each instruction): the encoding format of the instruction, the ID of the immediate type operand, and the hardware logic description of the immediate type operand.

[0080] (2) Put the collected information into a new relocation information list, assuming its name is FixupInfoList. Each node in the list contains the above three items of information.

[0081] (3) After the collection is completed, a relocation information list will be obtained. Each instruction corresponds to a node in the list. The relocation information list contains all instructions. The content of each item in the relocation information list is shown in the following table:

[0082]

[0083] Step 104: Generate a relocation function for an immediate type operand according to the relocation information list.

[0084] Traverse the relocation information list FixupInfoList obtained in the previous step 103. Each node in the list contains three pieces of information (instruction encoding format, ID of immediate operand type, hardware logic description of immediate operand type). Generate corresponding C++ code for each node based on these three pieces of information to obtain the relocation function of the immediate operand type. The specific conversion rules and generation steps are as follows:

[0085] (1) First, traverse the hardware logic description of the operand in reverse order, that is, start from the last operation in the hardware logic description and traverse in reverse order:

[0086] 1) If the hardware logic description is a SEXT signed extension operation, a C++ code is generated to complete the inverse operation of the signed extension through a shift operation and a bit or operation.

[0087] 2) If the hardware logic description is a ZEXT unsigned extension operation, a C++ code is generated to complete the inverse operation of the unsigned extension through a shift operation and a bit or operation (bit or).

[0088] 3) If the hardware logic description is a SLICE slicing operation, a C++ code is generated to complete the extraction operation of the bit specified by the input value, and the inverse operation of the SLICE slicing operation is completed through this operation.

[0089] 4) If the hardware logic description is a REPL copy operation, a section of C++ code is generated to complete the extraction operation of a single bit specified by the input value, and the inverse operation of the REPL copy operation is completed through this operation.

[0090] 5) If the hardware logic description is a CONCAT connection operation, a C++ code is generated to complete the split operation of the input value, and the inverse operation of the CONCAT operation is completed through this operation.

[0091] 6) If the hardware logic description is an SLL shift operation, a C++ code is generated to complete the right shift operation of the input value, and the inverse operation of the SLL operation is completed through this operation.

[0092] 7) If the hardware logic is an ADD addition operation, generate a piece of C++ code that can perform a subtraction operation on the input value, and complete the inverse operation of the ADD operation through this operation.

[0093] (2) According to the encoding format of the instruction (such as 0001, ffff, ffff, vvvv, wwww) and the ID of the immediate operand (such as f), the starting bit number of the encoding of this immediate operand can be obtained and denoted as N (that is, starting from which bit, for example, in this example, f corresponds to the 8th bit, and w corresponds to the 0th bit). Based on this, generate C++ shift operation code such as "ValOut = ValIn << N;" to complete the adjustment of the value.

[0094] (3) According to the above steps and the code automatic generation rules, a relocation function can be obtained for each immediate operand type. The code in this function is automatically generated by the above steps.

[0095] Step 105: Rebuild the compiler based on the relocation function.

[0096] By integrating the automatically generated code into the LLVM compiler source code and then rebuilding the LLVM compiler, the compiler can be made to automatically support the relocation of immediate operand types in the instruction.

[0097] This method realizes a tool to automatically scan and analyze the instruction encoding information. According to the requirements of the compiler relocation function, as shown in steps 101 - 102, based on the encoding information, a relocation function is automatically generated. Since the instruction encoding information in the processor design is determined and regular, and the relocation in the compiler also has a fixed process, such a tool can be realized to automatically generate the function of the immediate operand type relocation function.

[0098] Embodiment 2

[0099] To execute the method corresponding to the above Embodiment 1 to achieve the corresponding functions and technical effects, a compiler reconstruction system based on the immediate operand type relocation function is provided below.

[0100] The system includes:

[0101] A file loading unit for loading the processor design result file;

[0102] A restoration unit for calling the interface corresponding to the loaded design result file and restoring the processor design information in the design result file to the memory; the processor design information includes instruction and operand information;

[0103] A relocation information list building unit is used to traverse the instructions, collect instruction information corresponding to the instructions, and build a relocation information list; the instruction information includes: an encoding format of the instruction, an ID of an immediate type operand, and a hardware logic description of the immediate type operand;

[0104] A relocation function generating unit, used for generating a relocation function of an immediate type operand according to the relocation information list;

[0105] The compiler reconstruction unit is used to rebuild the compiler based on the relocation function.

[0106] Furthermore, the recovery unit specifically includes:

[0107] The structure instance creation subunit is used to create a structure instance for each operand, which is an operand structure instance; the operand information is stored through the member variables of the structure;

[0108] An operand doubly linked list creation subunit is used to add the operand structure instance to a doubly linked list, which is an operand doubly linked list; the operand doubly linked list is used to store operands, and each node in the operand doubly linked list is the operand structure instance;

[0109] A first associating subunit, used for associating the operand bidirectional linked list to the operand structure instance;

[0110] The instruction structure instance creation subunit is used to create a structure instance for each instruction, which is the instruction structure instance; various information of the instruction is stored through the member variables of the structure;

[0111] An instruction doubly linked list creation subunit is used to add the instruction structure instance to a doubly linked list, which is an instruction doubly linked list; the instruction doubly linked list is used to store instructions, and each node in the instruction doubly linked list is an instruction structure instance;

[0112] The second associating subunit is used to associate the instruction bidirectional linked list with the instruction structure instance.

[0113] Furthermore, the relocation function generating unit specifically includes:

[0114] A C++ code generation subunit, used for traversing the hardware logic description of the immediate type operand in reverse order and generating C++ code;

[0115] A C++ shift operation code generating subunit, used for determining the encoding start bit number of the immediate type operand according to the encoding format of the instruction and the ID of the immediate type operand, and generating a C++ shift operation code;

[0116] The relocation function generating subunit is used to obtain the relocation function of each immediate type operand according to the C++ code and the C++ shift operation code.

[0117] In this specification, each embodiment is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the embodiments can be referred to each other. For the system disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part.

[0118] The principles and implementation methods of the present invention are described in this article using specific examples. The description of the above embodiments is only used to help understand the method and core idea of ​​the present invention. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as limiting the present invention.

Claims

1. A compiler reconstruction method based on immediate type operand relocation function, It is characterized in that include: Load the processor design result file; Calling the interface corresponding to the loaded design result file to restore the processor design information in the design result file to the memory; The processor design information includes instruction and operand information; Traversing the instructions, collecting instruction information corresponding to the instructions to construct a relocation information list; the instruction information includes: an encoding format of the instruction, an ID of an immediate type operand, and a hardware logic description of the immediate type operand; Generate a relocation function of an immediate type operand according to the relocation information list; Rebuild the compiler based on the relocated functions.

2. The compiler reconstruction method based on the immediate type operand relocation function according to claim 1, It is characterized in that Load the processor design result file, including: The processor design result file is loaded through the loading function in the dynamic link library provided by the operating system; the loading function is the dlopen function.

3. The compiler reconstruction method based on the immediate type operand relocation function according to claim 1, It is characterized in that Calling the interface corresponding to the loaded design result file to restore the processor design information in the design result file to the memory specifically includes: Create a structure instance for each operand, which is the operand structure instance; store the operand information through the member variables of the structure; Adding the operand structure instance to a doubly linked list, which is an operand doubly linked list; the operand doubly linked list is used to store operands, and each node in the operand doubly linked list is the operand structure instance; Associating the operand doubly linked list to the operand structure instance; Create a structure instance for each instruction, which is the instruction structure instance; store various information of the instruction through the member variables of the structure; Adding the instruction structure instance to a bidirectional linked list, which is an instruction bidirectional linked list; the instruction bidirectional linked list is used to store instructions, and each node in the instruction bidirectional linked list is the instruction structure instance; The instruction doubly linked list is associated with the instruction structure instance.

4. The compiler reconstruction method based on the immediate type operand relocation function according to claim 1, It is characterized in that Generate a relocation function of an immediate type operand according to the relocation information list, specifically including: Traversing the hardware logic description of the immediate type operand in reverse order and generating C++ code; According to the encoding format of the instruction and the ID of the immediate type operand, determine the encoding starting bit number of the immediate type operand, and generate a C++ shift operation code; According to the C++ code and the C++ shift operation code, a relocation function of each immediate type operand is obtained.

5. The compiler reconstruction method based on the immediate type operand relocation function according to claim 4, It is characterized in that Traversing the hardware logic description of the immediate type operand in reverse order and generating C++ code specifically includes: If the hardware logic description of the immediate type operand is a SEXT signed extension operation, a C++ code is generated to complete the inverse operation of the SEXT signed extension operation through a shift operation and a bitwise OR operation; If the hardware logic description of the immediate type operand is a ZEXT unsigned extension operation, a C++ code is generated to complete the inverse operation of the ZEXT unsigned extension operation through a shift operation and a bitwise OR operation; If the hardware logic description of the immediate value type operand is a SLICE slicing operation, a C++ code is generated to complete an extraction operation on the bits specified by the input value, and an inverse operation of the SLICE slicing operation is completed through the extraction operation; If the hardware logic description of the immediate value type operand is a REPL copy operation, a C++ code is generated to complete an extraction operation on a single bit specified by the input value, and an inverse operation of the REPL copy operation is completed through the extraction operation; If the hardware logic description of the immediate value type operand is a CONCAT connection operation, a C++ code is generated to complete the split operation of the input value, and the inverse operation of the CONCAT connection operation is completed through the split operation; If the hardware logic description of the immediate value type operand is an SLL shift operation, a C++ code is generated to complete the right shift operation of the input value, and the inverse operation of the SLL shift operation is completed through the right shift operation; If the hardware logic description of the immediate type operand is an ADD addition operation, a section of C++ code is generated to complete the subtraction operation of the input value, and the inverse operation of the ADD addition operation is completed through the subtraction operation.

6. A compiler reconstruction system based on immediate operand relocation functions, It is characterized in that include: A file loading unit, used for loading processor design result files; A recovery unit, used to call the interface corresponding to the loaded design result file to restore the processor design information in the design result file to the memory; The processor design information includes instruction and operand information; A relocation information list building unit is used to traverse the instructions, collect instruction information corresponding to the instructions, and build a relocation information list; the instruction information includes: an encoding format of the instruction, an ID of an immediate type operand, and a hardware logic description of the immediate type operand; A relocation function generating unit, used for generating a relocation function of an immediate type operand according to the relocation information list; The compiler reconstruction unit is used to rebuild the compiler based on the relocation function.

7. The compiler reconstruction system based on the immediate type operand relocation function according to claim 6, It is characterized in that The recovery unit specifically includes: The structure instance creation subunit is used to create a structure instance for each operand, which is an operand structure instance; the operand information is stored through the member variables of the structure; An operand doubly linked list creation subunit is used to add the operand structure instance to a doubly linked list, which is an operand doubly linked list; the operand doubly linked list is used to store operands, and each node in the operand doubly linked list is the operand structure instance; A first associating subunit, used for associating the operand bidirectional linked list to the operand structure instance; The instruction structure instance creation subunit is used to create a structure instance for each instruction, which is the instruction structure instance; various information of the instruction is stored through the member variables of the structure; An instruction doubly linked list creation subunit is used to add the instruction structure instance to a doubly linked list, which is an instruction doubly linked list; the instruction doubly linked list is used to store instructions, and each node in the instruction doubly linked list is an instruction structure instance; The second associating subunit is used to associate the instruction bidirectional linked list with the instruction structure instance.

8. The compiler reconstruction system based on the immediate type operand relocation function according to claim 6, It is characterized in that The relocation function generation unit specifically comprises: A C++ code generation subunit, used for traversing the hardware logic description of the immediate type operand in reverse order and generating C++ code; A C++ shift operation code generating subunit, used for determining the encoding start bit number of the immediate type operand according to the encoding format of the instruction and the ID of the immediate type operand, and generating a C++ shift operation code; The relocation function generating subunit is used to obtain the relocation function of each immediate type operand according to the C++ code and the C++ shift operation code.

Images