Preparation method of photodiode and photodiode

Abstract

The invention provides a preparation method of a photodiode and the photodiode. The method comprises the following steps: etching a P ohmic contact layer into a P ohmic contact block; growing a diffusion barrier film on the current surface layer; forming a diffusion hole in the diffusion window layer; zn diffusion processing is executed, so that a highly doped P < + >-INP diffusion region is formed in the first region; growing an anti-reflection film on the current surface layer; anti-reflection film corrosion treatment is carried out on the P ohmic contact block and a part of the diffusion region close to the P ohmic contact block to obtain a P window, and the P window is in a block shape; a P electrode is led out from the P window, an N electrode is arranged on the outer surface of the substrate layer, the P electrode is in a block shape, a second area where the P electrode is located covers the position where the P window is located, and the second area is adjacent to a third area covered by the photosensitive surface of the photodiode in a non-surrounding mode. According to the technical scheme, more area can be released to the photosensitive surface, and if the area of the photosensitive surface is fixed, the chip size of the photodiode can be reversely reduced.

Description

[Technical field]

[0001] The present application relates to the field of semiconductor manufacturing technology, and in particular to a method for preparing a photodiode and a photodiode. [Background technology]

[0002] When preparing a photodiode, the surface layer of the chip substrate is generally etched first to obtain a P ohmic contact ring, and then the diffusion window layer located inside the surface layer is corroded to obtain a diffusion hole. Generally speaking, the single-sided ring width of the P ohmic contact ring is in the range of 2μm-8μm, and the diffusion hole needs to wrap the entire P ohmic contact ring, so the diameter of the diffusion hole is usually larger than the outer diameter of the ohmic contact ring, which can be selected in the range of 4μm-10μm. Finally, the P electrode is led out from the P ohmic contact ring through the P window. In this structure, on the surface of the chip substrate, the inner diameter area of ​​the P ohmic contact ring is the photosensitive surface of the photodiode. However, the size of the photosensitive surface is positively correlated with the optical coupling efficiency of the photodiode. For some personalized application scenarios, the photosensitive surface area in the existing structure is small, coupling is difficult, and it is difficult to improve the optical coupling efficiency.

[0003] Therefore, how to avoid the problem of difficulty in light coupling due to the small photosensitive surface of the photodiode has become a technical problem that needs to be solved urgently. [Summary of the invention]

[0004] The embodiments of the present application provide a method for preparing a photodiode and a photodiode, aiming to solve the technical problem in the related art that the light coupling efficiency is affected by the small photosensitive surface inside the P ohmic contact ring of the photodiode.

[0005] In the first aspect, the embodiment of the present application provides a method for preparing a photodiode, which is used to manufacture a photodiode chip such as a PIN / MPD / APD. The chip substrate includes a P ohmic contact layer, a diffusion window layer, an intrinsic absorption layer, an N-type material contact layer and a substrate layer from the surface layer to the inside. The method includes:

[0006] Etching the P ohmic contact layer into a P ohmic contact block;

[0007] growing a diffusion barrier film on the current surface;

[0008] A diffusion hole is formed in the diffusion window layer, and the first area where the diffusion hole is located accommodates the location of the P ohmic contact block;

[0009] Performing Zn diffusion treatment to form a highly doped P+-INP diffusion zone in the first region, wherein the diffusion zone is distributed from the diffusion window layer to the intrinsic absorption layer;

[0010] growing an anti-reflection film on the current surface;

[0011] Performing an anti-reflection film etching process on the P ohmic contact block and a portion of the diffusion region adjacent to the P ohmic contact block to obtain a P window, wherein the P window is in a block shape;

[0012] A P electrode is led out at the P window, and an N electrode is arranged on the outer surface of the substrate layer to form a photodiode, wherein the P electrode is block-shaped, the second area where the P electrode is located covers the position of the P window, and the second area is non-circumferentially adjacent to the third area covered by the photosensitive surface of the photodiode.

[0013] In one embodiment of the present application, optionally, the photodiode is a PIN photodiode, an APD photodiode or an MPD photodiode.

[0014] In one embodiment of the present application, optionally, etching the P-ohmic contact layer into a P-ohmic contact block includes:

[0015] The P ohmic contact layer is etched into a P ohmic contact block with a specified length and a specified width, wherein the specified length is greater than or equal to 2 μm and less than or equal to 7 μm, and the specified width is greater than or equal to 2 μm and less than or equal to 7 μm.

[0016] In one embodiment of the present application, optionally, forming a diffusion hole in the diffusion window layer includes:

[0017] A diffusion hole having a pore diameter greater than or equal to 10 μm and less than or equal to 300 μm is formed in the diffusion window layer.

[0018] In one embodiment of the present application, optionally, the step of growing a diffusion barrier film on the current surface layer includes:

[0019] A SiO2 barrier film or a SiNx / SiO2 composite barrier film having a thickness greater than or equal to 100 nm and less than or equal to 1000 nm is grown on the current surface layer.

[0020] In one embodiment of the present application, optionally, forming a P stage in the diffusion window layer and the intrinsic absorption layer, and forming an N stage extending below the P stage in the N-type material contact layer, comprises:

[0021] forming the P stage and the N stage by photolithography and wet etching; or

[0022] The P stage and the N stage are formed by a photolithography process and an RIE dry etching process.

[0023] In a second aspect, the embodiment of the present application provides a method for manufacturing a photodiode chip such as a PIN / MPD / APD, wherein the chip substrate includes a P ohmic contact layer, a diffusion window layer, an intrinsic absorption layer, an N-type material contact layer and a substrate layer in sequence from the surface layer to the inside, and the method includes:

[0024] Etching the P ohmic contact layer into a P ohmic contact block;

[0025] growing a diffusion barrier film on the current surface;

[0026] A diffusion hole is formed in the diffusion window layer, and the first area where the diffusion hole is located accommodates the location of the P ohmic contact block;

[0027] Performing Zn diffusion treatment to form a highly doped P+-INP diffusion zone in the first region, wherein the diffusion zone is distributed from the diffusion window layer to the intrinsic absorption layer;

[0028] On a first side of the chip substrate adjacent to the P ohmic contact block and a second side away from the P ohmic contact block, a diffusion window layer, an intrinsic absorption layer, and an N-type material contact layer are subjected to step-shaped etching treatment respectively, so as to form a P platform on the diffusion window layer and the intrinsic absorption layer, and to form an N platform extending below the P platform on the N-type material contact layer;

[0029] growing an anti-reflection film on the current surface;

[0030] Performing an anti-reflection film etching process on the P ohmic contact block and a portion of the diffusion area adjacent to the P ohmic contact block to obtain a P window, and performing an anti-reflection film etching process on a portion of the N platform in the current surface layer extending beyond the edge of the P platform to obtain an N window, wherein the shape of the P window is a block, and the shape of the N window is an arc;

[0031] A P electrode and an N electrode are led out from the P window and the N window respectively, wherein the second area where the P electrode is located covers the position where the P window is located, and the second area is non-circumferentially adjacent to a third area covered by the photosensitive surface of the photodiode.

[0032] In one embodiment of the present application, optionally, the photodiode is a PIN photodiode, an APD photodiode or an MPD photodiode.

[0033] In one embodiment of the present application, optionally, etching the P-ohmic contact layer into a P-ohmic contact block includes:

[0034] The P ohmic contact layer is etched into a P ohmic contact block with a specified length and a specified width, wherein the specified length is greater than or equal to 2 μm and less than or equal to 7 μm, and the specified width is greater than or equal to 2 μm and less than or equal to 7 μm.

[0035] In one embodiment of the present application, optionally, forming a diffusion hole in the diffusion window layer includes:

[0036] A diffusion hole having a pore diameter greater than or equal to 10 μm and less than or equal to 300 μm is formed in the diffusion window layer.

[0037] In one embodiment of the present application, optionally, the step of growing a diffusion barrier film on the current surface layer includes:

[0038] A SiO2 barrier film or a SiNx / SiO2 composite barrier film having a thickness greater than or equal to 100 nm and less than or equal to 1000 nm is grown on the current surface layer.

[0039] In one embodiment of the present application, optionally, forming a P stage in the diffusion window layer and the intrinsic absorption layer, and forming an N stage extending below the P stage in the N-type material contact layer, comprises:

[0040] forming the P stage and the N stage by photolithography and wet etching; or

[0041] The P stage and the N stage are formed by a photolithography process and an RIE dry etching process.

[0042] In a third aspect, an embodiment of the present application provides a photodiode, comprising:

[0043] A diffusion window layer is provided with a diffusion hole, wherein a first region where the diffusion hole is located has a diffusion region with a high doping P+-INP;

[0044] A diffusion barrier film covering the area outside the diffusion hole in the surface layer of the diffusion window layer;

[0045] An intrinsic absorption layer is located in a lower layer adjacent to the diffusion window layer, and the diffusion region diffuses to an upper region of the intrinsic absorption layer;

[0046] An N-type material contact layer, located in a lower layer adjacent to the intrinsic absorption layer;

[0047] A substrate layer, located in a lower layer adjacent to the N-type material contact layer;

[0048] A P ohmic contact block, located on the first region of the diffusion window layer;

[0049] an anti-reflection film covering a position other than the diffusion barrier film, the P ohmic contact block in the first region, and a portion adjacent to the P ohmic contact block;

[0050] A P electrode is connected to the P ohmic contact block and a portion of the diffusion area adjacent to the P ohmic contact block through a P window, wherein the P electrode and the P window are both block-shaped, a second area where the P electrode is located covers a location where the P window is located, and the second area is non-circumferentially adjacent to a third area covered by a photosensitive surface of the photodiode;

[0051] The N electrode is arranged on the outer surface of the substrate layer.

[0052] In one embodiment of the present application, optionally, the photodiode is a PIN photodiode, an APD photodiode or an MPD photodiode.

[0053] In one embodiment of the present application, optionally, the length of the P ohmic contact block is greater than or equal to 2 μm and less than or equal to 7 μm, and the width of the P ohmic contact block is greater than or equal to 2 μm and less than or equal to 7 μm.

[0054] In one embodiment of the present application, optionally, the diffusion hole has a pore size greater than or equal to 10 μm and less than or equal to 300 μm.

[0055] In one embodiment of the present application, optionally, the diffusion barrier film is a SiO 2 barrier film or a SiNx / SiO 2 composite barrier film having a thickness greater than or equal to 100 nm and less than or equal to 1000 nm.

[0056] In one embodiment of the present application, optionally, the P stage and the N stage are formed by: photolithography and wet etching, or photolithography and RIE dry etching.

[0057] In a fourth aspect, an embodiment of the present application provides a photodiode, comprising:

[0058] A diffusion window layer is provided with a diffusion hole, wherein a first region where the diffusion hole is located has a diffusion region with a high doping P+-INP;

[0059] A diffusion barrier film covering the area outside the diffusion hole in the surface layer of the diffusion window layer;

[0060] An intrinsic absorption layer is located in a lower layer adjacent to the diffusion window layer, the diffusion region diffuses to an upper region of the intrinsic absorption layer, and the diffusion window layer and the intrinsic absorption layer form a P platform;

[0061] An N-type material contact layer, located in a lower layer adjacent to the intrinsic absorption layer, extending below the P platform to form an N platform;

[0062] A substrate layer, located in a lower layer adjacent to the N-type material contact layer;

[0063] A P ohmic contact block, located on the first region of the diffusion window layer;

[0064] an anti-reflection film covering a position other than a P window and an N window in a surface layer of the small photosensitive surface photodiode, wherein the P window is located at a position where the P ohmic contact block and a portion adjacent to the P ohmic contact block are located in the first region, and the N window is located at a portion of the N stage extending beyond an edge of the P stage, the P window is in a block shape, and the N window is in an arc shape;

[0065] A P electrode is led out through the P window and communicated with the P ohmic contact block and a portion of the diffusion area adjacent to the P ohmic contact block, the second area where the P electrode is located covers the location of the P window, and the second area is non-circumferentially adjacent to a third area covered by the photosensitive surface of the photodiode;

[0066] The N electrode is led out through the N window and isolated from the P stage and the substrate layer by the anti-reflection film.

[0067] In one embodiment of the present application, optionally, the photodiode is a PIN photodiode, an APD photodiode or an MPD photodiode.

[0068] In one embodiment of the present application, optionally, the length of the P ohmic contact block is greater than or equal to 2 μm and less than or equal to 7 μm, and the width of the P ohmic contact block is greater than or equal to 2 μm and less than or equal to 7 μm.

[0069] In one embodiment of the present application, optionally, the diffusion hole has a pore size greater than or equal to 10 μm and less than or equal to 300 μm.

[0070] In one embodiment of the present application, optionally, the diffusion barrier film is a SiO 2 barrier film or a SiNx / SiO 2 composite barrier film having a thickness greater than or equal to 100 nm and less than or equal to 1000 nm.

[0071] In one embodiment of the present application, optionally, the P stage and the N stage are formed by: photolithography and wet etching, or photolithography and RIE dry etching.

[0072] The above technical solution aims to solve the problem in the related art that the photosensitive surface inside the P-ohm contact ring of the photodiode is small, which affects the light coupling efficiency. The P-ohm contact ring is replaced by a P-ohm contact block, which releases more area to the photosensitive surface and improves the light coupling efficiency of the photodiode. At the same time, when the area of ​​the photosensitive surface is constant, the chip size of the photodiode can be reduced in reverse, so that more chips can be produced from the same size of epitaxial wafer, thereby reducing chip costs and improving the market competitiveness of products.

Brief Description of the Drawings

[0073] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0074] Figure 1 A schematic diagram of a chip substrate according to an embodiment of the present application is shown;

[0075] Figure 2 A flow chart showing a method for preparing a photodiode according to an embodiment of the present application is shown;

[0076] Figure 3 shows the relevant technology and Figure 2 Comparison diagram of the steps for preparing a photodiode with a large photosensitive surface in the embodiment;

[0077] Figure 4 A cross-sectional view of a large photosensitive surface photodiode of the related art is shown;

[0078] Figure 5 Shows Figure 2 A cross-sectional view of a large photosensitive surface photodiode in an embodiment;

[0079] Figure 6 A flow chart showing a method for preparing a photodiode according to another embodiment of the present application is shown;

[0080] Figure 7 shows the relevant technology and Figure 6 Comparison diagram of the steps for preparing a photodiode with a small photosensitive surface in the embodiment;

[0081] Figure 8 A cross-sectional view of a small photosensitive surface photodiode of the related art is shown;

[0082] Fig. 9 Shows Figure 6 Cross-sectional view of a small photosensitive area photodiode in an embodiment. [Specific implementation method]

[0083] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0084] like Figure 1 As shown, the chip substrate used to make the photodiode includes a P ohmic contact layer, a diffusion window layer, an intrinsic absorption layer, an N-type material contact layer and a substrate layer from the surface to the inside.

[0085] Embodiment 1

[0086] On this basis, Figure 2 A flow chart of a method for preparing a photodiode according to an embodiment of the present application is shown.

[0087] like Figure 2 As shown, a method for preparing a photodiode according to an embodiment of the present application includes:

[0088] Step 202, etching the P-ohmic contact layer into a P-ohmic contact block.

[0089] like Figure 3 As shown, in the related art, the P ohmic contact layer on the surface of the chip substrate is generally etched into a P ohmic contact ring. However, in the present technical solution, an ohmic contact block is used instead of an ohmic contact ring to reduce the surface area occupied by the ohmic contact, so as to facilitate the subsequent release of the surface area to the photosensitive surface, thereby increasing the area of ​​the photosensitive surface.

[0090] In a possible design, the P ohmic contact layer can be etched into a P ohmic contact block of a specified length and a specified width, wherein the specified length is greater than or equal to 2 μm and less than or equal to 7 μm, and the specified width is greater than or equal to 2 μm and less than or equal to 7 μm. Of course, the length and width of the P ohmic contact block can be arbitrarily set values ​​based on the use requirements of the photodiode, and are not limited to the above value range.

[0091] Step 204, growing a diffusion barrier film on the current surface layer.

[0092] The diffusion barrier film is used to protect the area outside the diffusion hole on the surface of the chip substrate during the process of setting the diffusion hole.

[0093] In a possible design, a SiO2 barrier film or a SiNx / SiO2 composite barrier film with a thickness greater than or equal to 100 nm and less than or equal to 1000 nm is grown on the current surface as a diffusion barrier film. Of course, the thickness of the diffusion barrier film can be any value that meets actual needs, and is not limited to the above value range.

[0094] Step 206: forming a diffusion hole in the diffusion window layer, wherein the first region where the diffusion hole is located accommodates the location of the P-ohmic contact block.

[0095] like Figure 3As shown, in the related art, when diffusion is performed, the entire P ohmic contact ring is contained in the diffusion hole. In the present technical solution, this step does not need to be adjusted, but the actual result is that the P ohmic contact block occupying a smaller surface area is contained in the diffusion hole.

[0096] Step 208, performing Zn diffusion treatment to form a highly doped P+-INP diffusion region in the first region.

[0097] like Figure 5 As shown, after the Zn diffusion process is performed, the diffusion region is distributed from the diffusion window layer to the intrinsic absorption layer.

[0098] Step 210, growing an anti-reflection film, ie, an AR anti-reflection film, on the current surface layer.

[0099] The anti-reflection film is used to fully absorb light of a specific wavelength to minimize light reflection.

[0100] Optionally, the anti-reflection film is a SiNx film, the thickness of which is greater than or equal to 170 nm and less than or equal to 210 nm, and the reflectivity of light with a wavelength of 1310 nm is less than 5%.

[0101] Optionally, the anti-reflection film is a SiNx / SiO2 composite film, the thickness of which is greater than or equal to 300 nm and less than or equal to 800 nm, and the reflectivity of the light with a wavelength of 1310 nm is less than 5%.

[0102] Step 212, performing anti-reflection film etching treatment on the P ohmic contact block and a portion of the diffusion region adjacent to the P ohmic contact block to obtain a P window, wherein the P window is in a block shape.

[0103] like Figure 3 As shown, in the related art, when setting the P window, the entire area where the P ohmic contact ring is located needs to be etched as a window. However, in the present technical solution, since the area of ​​the P ohmic contact block is much smaller than the P ohmic contact ring in the related art, it is only necessary to etch a smaller P window at the location of the P ohmic contact block.

[0104] Optionally, the P stage and the N stage may be formed by a photolithography process and a wet etching process; or the P stage and the N stage may be formed by a photolithography process and a RIE dry etching process.

[0105] Step 214, leading out a P electrode at the P window, and setting an N electrode on the outer surface of the substrate layer to form a photodiode, wherein the P electrode is block-shaped, the second area where the P electrode is located covers the position of the P window, and the second area is non-circumferentially adjacent to the third area covered by the photosensitive surface of the photodiode.

[0106] Likewise, if Figure 3 As shown, when forming the P electrode, the related art needs to set a P electrode covering the entire P window, and lead the P electrode to a specified position, which includes but is not limited to the upper right corner of the figure. In the present technical solution, since the area of ​​the P ohmic contact block is much smaller than the P ohmic contact ring in the related art, it is only necessary to lead the P electrode to the specified position at the position of the P ohmic contact block.

[0107] Finally, if Figure 3 The top view of a single diode chip shown changes, and Figure 4 and Figure 5 The cross-sectional view of the photodiode of the related technology and the present application is changed. The photosensitive surface of the photodiode formed by the present technical solution has an increased area of ​​an ohmic contact ring relative to the photosensitive surface of the photodiode in the related technology, covering most of the area where the original P ohmic contact ring was located.

[0108] In one possible design, Figure 3 As shown in the figure, on the original 280μm*280μm photodiode, after the original P ohm contact ring is replaced by a P ohm contact block, the single-side width of the photosensitive surface is increased from 210μm to 232μm, effectively increasing the light-receiving area. Of course, this photodiode size and the photosensitive surface increase value are only an example of this application. In actual applications, the size of the photodiode and the increase in its photosensitive surface can be any value that meets the actual component use requirements, and is not limited to this example.

[0109] The photodiode described in this embodiment includes a large photosensitive surface photodiode with a diameter greater than or equal to 60 μm, and its types include but are not limited to low-speed chips, MPD backlight monitoring diode chips or sensor diode chips, etc. In another possible design, the photodiode is a PIN photodiode, an APD photodiode or an MPD photodiode.

[0110] In addition, through the photodiode preparation method of the technical solution, the photosensitive surface area can be kept unchanged while the optical coupling efficiency of the photodiode remains unchanged, and the chip size of the photodiode can be reduced, thereby saving epitaxial materials. Moreover, by reducing the area of ​​the photodiode, more chips can be produced from the epitaxial wafer of the same size, thereby reducing chip costs and improving the market competitiveness of products.

[0111] The above technical solution replaces the P ohm contact ring with a P ohm contact block, releasing more area to the photosensitive surface and improving the light coupling efficiency of the photodiode. At the same time, under the condition of a certain photosensitive surface area, the chip size of the photodiode can be reduced inversely, so that more chips can be produced from the same size epitaxial wafer, thereby reducing chip costs and improving the market competitiveness of products.

[0112] Based on the above embodiment 1, Figure 2 and Figure 5 As shown, an embodiment of the present application also proposes a photodiode, comprising: a diffusion window layer, provided with a diffusion hole, wherein the first region where the diffusion hole is located has a diffusion region of high doping P+-INP; a diffusion barrier film, covering the region outside the diffusion hole in the surface layer of the diffusion window layer; an intrinsic absorption layer, located in the adjacent lower layer of the diffusion window layer, wherein the diffusion region diffuses to the upper region of the intrinsic absorption layer; an N-type material contact layer, located in the adjacent lower layer of the intrinsic absorption layer; a substrate layer, located in the adjacent lower layer of the N-type material contact layer; a P ohmic contact block, located in the diffusion window layer; The first region of the oral layer; an anti-reflection film, covering the diffusion barrier film, the P ohmic contact block in the first region and the position other than the adjacent portion of the P ohmic contact block; a P electrode, connected to the P ohmic contact block and the adjacent portion of the diffusion region of the P ohmic contact block through a P window, wherein the P electrode and the P window are both block-shaped, the second region where the P electrode is located covers the position where the P window is located, and the second region is non-surroundingly adjacent to the third region covered by the photosensitive surface of the photodiode; an N electrode, arranged on the outer surface of the substrate layer.

[0113] The photodiode uses any of the solutions described in the first embodiment above, and therefore has all the above technical effects, which will not be described in detail here.

[0114] Embodiment 2

[0115] Figure 6 A flow chart of a method for preparing a photodiode according to another embodiment of the present application is shown.

[0116] like Figure 6 As shown, a method for preparing a photodiode according to another embodiment of the present application includes:

[0117] Step 602, etching the P-ohmic contact layer into a P-ohmic contact block.

[0118] like Figure 7 As shown, in the related art, the P ohmic contact layer on the surface of the chip substrate is generally etched into a P ohmic contact ring. However, in the present technical solution, the P ohmic contact layer on the surface of the chip substrate is etched into a P ohmic contact block occupying a smaller surface area, so as to reduce the surface area occupied by the ohmic contact, and facilitate the subsequent release of the surface area to the photosensitive surface, so as to increase the area of ​​the photosensitive surface, thereby improving the light coupling efficiency.

[0119] In a possible design, the P ohmic contact layer can be etched into a P ohmic contact block of a specified length and a specified width, wherein the specified length is greater than or equal to 2 μm and less than or equal to 7 μm, and the specified width is greater than or equal to 2 μm and less than or equal to 7 μm. Of course, the length and width of the P ohmic contact block can be arbitrarily set values ​​based on the use requirements of the photodiode, and are not limited to the above value range.

[0120] Step 604, growing a diffusion barrier film on the current surface layer.

[0121] The diffusion barrier film is used to protect the area outside the diffusion hole on the surface of the chip substrate during the process of setting the diffusion hole.

[0122] In a possible design, a SiO2 barrier film or a SiNx / SiO2 composite barrier film with a thickness greater than or equal to 100 nm and less than or equal to 1000 nm is grown on the current surface as a diffusion barrier film. Of course, the thickness of the diffusion barrier film can be any value that meets actual needs, and is not limited to the above value range.

[0123] Step 606: forming a diffusion hole in the diffusion window layer, wherein the first region where the diffusion hole is located accommodates the location of the P-ohmic contact block.

[0124] like Figure 7 As shown, in the related art, when diffusion is performed, the entire P ohmic contact ring is contained in the diffusion hole. In the present technical solution, this step does not need to be adjusted, but the actual result is that the P ohmic contact block occupying a smaller surface area is contained in the diffusion hole.

[0125] At the same time, if Figure 7 As shown, in the related art, a P metal ohmic contact ring needs to be made first to lead out the electrode. However, in the technical solution of the present application, since the P ohmic contact is led out through a P window falling in the diffusion area, there is no need to make a P metal ohmic contact ring, thereby simplifying the photodiode preparation process.

[0126] Step 608 , performing Zn diffusion treatment to form a highly doped P+-INP diffusion region in the first region, wherein the diffusion region is distributed from the diffusion window layer to the intrinsic absorption layer.

[0127] Step 610 , performing step-like etching processing on the diffusion window layer, the intrinsic absorption layer, and the N-type material contact layer on a first side of the chip substrate adjacent to the P ohmic contact block and a second side away from the P ohmic contact block, respectively.

[0128] like Figure 7 As shown, the P-stage etching and N-stage etching steps of the related technology and the present technical solution remain unchanged, combined with Fig. 9It can be seen that a P stage is formed in the diffusion window layer and the intrinsic absorption layer, and an N stage extending below the P stage is formed in the N-type material contact layer.

[0129] Optionally, the P stage and the N stage may be formed by a photolithography process and a wet etching process; or the P stage and the N stage may be formed by a photolithography process and a RIE dry etching process.

[0130] Step 612, growing an anti-reflection film on the current surface layer.

[0131] The anti-reflection film is used to fully absorb light of a specific wavelength to minimize light reflection.

[0132] Optionally, the anti-reflection film is a SiNx film, the thickness of which is greater than or equal to 170 nm and less than or equal to 210 nm, and the reflectivity of light with a wavelength of 1310 nm is less than 5%.

[0133] Optionally, the anti-reflection film is a SiNx / SiO2 composite film, the thickness of which is greater than or equal to 300 nm and less than or equal to 800 nm, and the reflectivity of the light with a wavelength of 1310 nm is less than 5%.

[0134] Step 614, performing anti-reflection film etching treatment on the P ohmic contact block and the part of the diffusion area adjacent to the P ohmic contact block to obtain a P window, and performing anti-reflection film etching treatment on the part of the N platform in the current surface layer extending beyond the edge of the P platform to obtain an N window.

[0135] The shape of the P window is block-shaped, and the shape of the N window is arc-shaped.

[0136] Step 616, lead out a P electrode and an N electrode from the P window and the N window respectively, wherein the second area where the P electrode is located covers the position of the P window, and the second area is non-circumferentially adjacent to a third area covered by the photosensitive surface of the photodiode.

[0137] like Figure 7 As shown, the steps of setting the P window and the N window and leading out the P electrode and the N electrode in the related technology and the present technical solution remain unchanged.

[0138] Finally, if Figure 7 The top view of a single diode chip is shown, and Figure 8 and Fig. 9 The cross-sectional view of the photodiode of the related technology and the present application is changed. The photosensitive surface of the photodiode formed by the present technical solution has an additional full circle of ohmic contact ring compared to the photosensitive surface of the photodiode in the related technology, covering most of the area where the original P ohmic contact ring is located.

[0139] In one possible design, Figure 7 As shown in the figure, after replacing the original P-ohm contact ring with a P-ohm contact block on the original 360μm*300μm photodiode, the diameter of the photosensitive surface is expanded from 16μm to 21μm, effectively increasing the light-receiving area. Of course, this photodiode size and the increased value of the photosensitive surface are only an example of this application. In actual applications, the size of the photodiode and the increase in its photosensitive surface can be any value that meets the actual component use requirements, and is not limited to this example.

[0140] The photodiode described in this embodiment includes a small photosensitive surface photodiode with a diameter greater than or equal to 10 μm and less than 60 μm, and its types include but are not limited to 10G-100GHz APD high-speed chips and PIN PD high-speed chips, etc. In another possible design, the photodiode is a PIN photodiode, an APD photodiode, or an MPD photodiode.

[0141] In addition, through the photodiode preparation method of the technical solution, the photosensitive surface area can be kept unchanged while the optical coupling efficiency of the photodiode remains unchanged, and the chip size of the photodiode can be reduced, thereby saving epitaxial materials. Moreover, by reducing the area of ​​the photodiode, more chips can be produced from the epitaxial wafer of the same size, thereby reducing chip costs and improving the market competitiveness of products.

[0142] The above technical solution replaces the P ohmic contact ring with a P ohmic contact block, thereby reducing the surface area occupied by the P window and the P ohmic contact ring, releasing more area to the photosensitive surface, and improving the light coupling efficiency of the photodiode. At the same time, under the condition of a certain photosensitive surface area, the chip size of the photodiode can also be reduced in reverse, so that more chips can be produced from the same size epitaxial wafer, thereby reducing chip costs and improving the market competitiveness of products.

[0143] Based on the above embodiment 1, Figure 6 and Fig. 9As shown, an embodiment of the present application also proposes a photodiode, comprising: a diffusion window layer, provided with a diffusion hole, wherein the first region where the diffusion hole is located has a diffusion zone of high doping P+-INP; a diffusion barrier film, covering the region other than the diffusion hole in the surface layer of the diffusion window layer; an intrinsic absorption layer, located in an adjacent lower layer of the diffusion window layer, wherein the diffusion zone diffuses to the upper region of the intrinsic absorption layer, and the diffusion window layer and the intrinsic absorption layer form a P platform; an N-type material contact layer, located in an adjacent lower layer of the intrinsic absorption layer, extending under the P platform to form an N platform; a substrate layer, located in an adjacent lower layer of the N-type material contact layer; a P ohmic contact block, located on the first region of the diffusion window layer; an anti-reflection film, covering the A position other than a P window and an N window in the surface layer of a small photosensitive surface photodiode, wherein the P window is located at the position of the P ohmic contact block and the adjacent portion of the P ohmic contact block in the first region, and the N window is located at the portion of the N stage extending beyond the edge of the P stage, the P window is block-shaped, and the N window is arc-shaped; a P electrode is led out through the P window, connected to the P ohmic contact block and the adjacent portion of the diffusion region, a second region where the P electrode is located covers the position of the P window, and the second region is non-circumferentially adjacent to a third region covered by the photosensitive surface of the photodiode; an N electrode is led out through the N window, and isolated from the P stage and the substrate layer by the anti-reflection film.

[0144] The photodiode uses any of the solutions described in the first embodiment above, and therefore has all the above technical effects, which will not be described in detail here.

[0145] The above describes the technical solution of the present application in detail in combination with the accompanying drawings. Through the technical solution of the present application, the P ohmic contact ring is replaced by a P ohmic contact block, thereby reducing the surface area occupied by the P window and the P ohmic contact ring, releasing more area to the photosensitive surface, and improving the light coupling efficiency of the photodiode. At the same time, when the area of ​​the photosensitive surface is constant, the chip size of the photodiode can also be reduced in reverse, so that more chips can be produced from the same size of epitaxial wafer, thereby reducing chip costs and improving the market competitiveness of products.

[0146] It should be understood that although the terms first, second, etc. may be used to describe regions in the embodiments of the present application, these regions should not be limited to these terms. These terms are only used to distinguish regions from each other. For example, without departing from the scope of the embodiments of the present application, the first region may also be referred to as the second region, and similarly, the second region may also be referred to as the first region.

[0147] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the present application. The singular forms "a", "said" and "the" used in the embodiments of the present application and the appended claims are also intended to include plural forms, unless the context clearly indicates other meanings.

[0148] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).

[0149] The embodiments described above are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included in the protection scope of the present invention.

Claims

1. A method for preparing a photodiode, It is characterized in that The method is used to process a chip substrate into a photodiode, wherein the chip substrate includes a P ohmic contact layer, a diffusion window layer, an intrinsic absorption layer, an N-type material contact layer and a substrate layer in sequence from the surface layer to the inside. The method includes: Etching the P ohmic contact layer into a P ohmic contact block; growing a diffusion barrier film on the current surface; A diffusion hole is formed in the diffusion window layer, and the first area where the diffusion hole is located accommodates the location of the P ohmic contact block; Performing Zn diffusion treatment to form a highly doped P+-INP diffusion zone in the first region, wherein the diffusion zone is distributed from the diffusion window layer to the intrinsic absorption layer; growing an anti-reflection film on the current surface; Performing an anti-reflection film etching process on the P ohmic contact block and a portion of the diffusion region adjacent to the P ohmic contact block to obtain a P window, wherein the P window is in a block shape; A P electrode is led out at the P window, and an N electrode is arranged on the outer surface of the substrate layer to form a photodiode, wherein the P electrode is block-shaped, the second area where the P electrode is located covers the position of the P window, and the second area is non-circumferentially adjacent to the third area covered by the photosensitive surface of the photodiode.

2. A method for preparing a photodiode, It is characterized in that The method is used to process a chip substrate into a photodiode, wherein the chip substrate includes a P ohmic contact layer, a diffusion window layer, an intrinsic absorption layer, an N-type material contact layer and a substrate layer in sequence from the surface layer to the inside. The method includes: Etching the P ohmic contact layer into a P ohmic contact block; growing a diffusion barrier film on the current surface; A diffusion hole is formed in the diffusion window layer, and the first area where the diffusion hole is located accommodates the location of the P ohmic contact block; Performing Zn diffusion treatment to form a highly doped P+-INP diffusion zone in the first region, wherein the diffusion zone is distributed from the diffusion window layer to the intrinsic absorption layer; On a first side of the chip substrate adjacent to the P ohmic contact block and a second side away from the P ohmic contact block, a diffusion window layer, an intrinsic absorption layer, and an N-type material contact layer are subjected to step-shaped etching treatment respectively, so as to form a P platform on the diffusion window layer and the intrinsic absorption layer, and to form an N platform extending below the P platform on the N-type material contact layer; growing an anti-reflection film on the current surface; Performing an anti-reflection film etching process on the P ohmic contact block and a portion of the diffusion area adjacent to the P ohmic contact block to obtain a P window, and performing an anti-reflection film etching process on a portion of the N platform in the current surface layer extending beyond the edge of the P platform to obtain an N window, wherein the shape of the P window is a block, and the shape of the N window is an arc; A P electrode and an N electrode are led out from the P window and the N window respectively, wherein the second area where the P electrode is located covers the position where the P window is located, and the second area is non-circumferentially adjacent to a third area covered by the photosensitive surface of the photodiode.

3. The method according to claim 1 or 2, It is characterized in that The photodiode is a PIN photodiode, an APD photodiode or an MPD photodiode.

4. The method according to claim 1 or 2, It is characterized in that The step of etching the P-ohmic contact layer into a P-ohmic contact block comprises: Etching the P ohmic contact layer into a P ohmic contact block with a specified length and a specified width, wherein the specified length is greater than or equal to 2 μm and less than or equal to 7 μm, and the specified width is greater than or equal to 2 μm and less than or equal to 7 μm; The step of forming a diffusion hole in the diffusion window layer comprises: forming a diffusion hole having a pore size greater than or equal to 10 μm and less than or equal to 300 μm in the diffusion window layer; The step of growing a diffusion barrier film on the current surface layer comprises: A SiO2 barrier film or a SiNx / SiO2 composite barrier film having a thickness greater than or equal to 100 nm and less than or equal to 1000 nm is grown on the current surface layer.

5. The method according to claim 2, It is characterized in that The step of forming a P platform in the diffusion window layer and the intrinsic absorption layer, and forming an N platform extending below the P platform in the N-type material contact layer comprises: forming the P stage and the N stage by photolithography and wet etching; or The P stage and the N stage are formed by a photolithography process and an RIE dry etching process.

6. A photodiode, It is characterized in that include: A diffusion window layer is provided with a diffusion hole, wherein a first region where the diffusion hole is located has a diffusion region with a high doping P+-INP; A diffusion barrier film covering the area outside the diffusion hole in the surface layer of the diffusion window layer; An intrinsic absorption layer is located in a lower layer adjacent to the diffusion window layer, and the diffusion region diffuses to an upper region of the intrinsic absorption layer; An N-type material contact layer, located in a lower layer adjacent to the intrinsic absorption layer; A substrate layer, located in a lower layer adjacent to the N-type material contact layer; A P ohmic contact block, located on the first region of the diffusion window layer; an anti-reflection film covering a position other than the diffusion barrier film, the P ohmic contact block in the first region, and a portion adjacent to the P ohmic contact block; A P electrode is connected to the P ohmic contact block and a portion of the diffusion area adjacent to the P ohmic contact block through a P window, wherein the P electrode and the P window are both block-shaped, a second area where the P electrode is located covers a location where the P window is located, and the second area is non-circumferentially adjacent to a third area covered by a photosensitive surface of the photodiode; The N electrode is arranged on the outer surface of the substrate layer.

7. A photodiode, It is characterized in that include: A diffusion window layer is provided with a diffusion hole, wherein a first region where the diffusion hole is located has a diffusion region with a high doping P+-INP; A diffusion barrier film covering the area outside the diffusion hole in the surface layer of the diffusion window layer; An intrinsic absorption layer is located in a lower layer adjacent to the diffusion window layer, the diffusion region diffuses to an upper region of the intrinsic absorption layer, and the diffusion window layer and the intrinsic absorption layer form a P platform; An N-type material contact layer, located in a lower layer adjacent to the intrinsic absorption layer, extending below the P platform to form an N platform; A substrate layer, located in a lower layer adjacent to the N-type material contact layer; A P ohmic contact block, located on the first region of the diffusion window layer; an anti-reflection film covering a position other than a P window and an N window in a surface layer of the small photosensitive surface photodiode, wherein the P window is located at a position where the P ohmic contact block and a portion adjacent to the P ohmic contact block are located in the first region, and the N window is located at a portion of the N stage extending beyond an edge of the P stage, the P window is in a block shape, and the N window is in an arc shape; A P electrode is led out through the P window and communicated with the P ohmic contact block and a portion of the diffusion area adjacent to the P ohmic contact block, the second area where the P electrode is located covers the location of the P window, and the second area is non-circumferentially adjacent to a third area covered by the photosensitive surface of the photodiode; The N electrode is led out through the N window and isolated from the P stage and the substrate layer by the anti-reflection film.

8. The photodiode according to claim 6 or 7, It is characterized in that The photodiode is a PIN photodiode, an APD photodiode or an MPD photodiode.

9. The photodiode according to claim 6 or 7, It is characterized in that The length of the P ohmic contact block is greater than or equal to 2 μm and less than or equal to 7 μm, and the width of the P ohmic contact block is greater than or equal to 2 μm and less than or equal to 7 μm; The diffusion hole has a pore size greater than or equal to 10 μm and less than or equal to 300 μm; The diffusion barrier film is a SiO2 barrier film or a SiNx / SiO2 composite barrier film with a thickness greater than or equal to 100 nm and less than or equal to 1000 nm.

10. The photodiode according to claim 7, It is characterized in that The P stage and the N stage are formed by photolithography and wet etching, or photolithography and RIE dry etching.

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