Heuristic quantum bit mapping method based on dynamic look-ahead window

Abstract

The invention provides a heuristic quantum bit mapping method based on a dynamic look-ahead window, and belongs to the technical field of quantum circuit compiling. The technical problem that the quantum circuit cannot be effectively operated on the NISQ equipment with limited communication is solved. Comprising the following steps: S1, reading a quantum circuit from a source file, and preprocessing the quantum circuit; s2, establishing an initial mapping relationship between the logic quantum bits and the physical quantum bits; s3, after all quantum gates in the quantum circuit are processed, outputting a physical quantum circuit; and S4, restoring the single-bit quantum gate deleted during quantum circuit preprocessing to the physical quantum circuit output in the quantum bit routing process according to the recorded original position information, thereby obtaining a final physical quantum circuit. The method has the beneficial effects that the number of SWAP gates required for executing the quantum circuit on the NISQ equipment is obviously reduced in a relatively short time.

Description

Technical Field

[0001] The present invention relates to the field of quantum circuit compilation technology, and in particular to a heuristic quantum bit mapping method based on a dynamic look-ahead window. Background Art

[0002] The nearest neighbor interaction constraint between qubits is one of the main physical limitations faced by current noisy intermediate-scale quantum (NISQ) computers. This limitation requires that a two-bit quantum gate is only allowed to act on a pair of directly connected physical qubits.

[0003] Quantum circuits are a common model for describing quantum algorithms, which usually contain several logical qubits and a sequence of quantum gate operations acting on them. When designing quantum circuits, it is always assumed that a two-bit quantum gate can act on any two qubits. This assumption causes quantum circuits to usually not satisfy the nearest neighbor interaction constraints between physical qubits on current NISQ computers, making it impossible for quantum circuits to run directly on the device.

[0004] Quantum bit mapping is an important component of the quantum circuit compiler. It establishes and adjusts the mapping relationship between logical qubits and physical qubits so that all two-bit quantum gates in the quantum circuit satisfy the nearest neighbor interaction constraints of the NISQ device.

[0005] Since two-bit quantum gate operations on NISQ devices generally face a high error rate, minimizing the number of two-bit quantum gate operations introduced by quantum bit mapping becomes the key to ensuring the success rate of quantum circuit execution. This optimization problem has been proven to have NP-hard computational complexity. Existing quantum bit mapping technology introduces too many auxiliary quantum gates due to limitations in logical quantum bit allocation and routing.

[0006] Reducing the number of auxiliary quantum gates, namely SWAP gates, introduced by quantum bit mapping is the key to improving the success rate of quantum circuit execution. However, this optimization problem has NP-hard computational complexity and it is difficult to obtain the optimal solution through brute force enumeration or manual methods. The existing heuristic quantum bit mapping technology has the following limitations: (1) When allocating quantum bits, the interaction relationship between logical quantum bits and the execution timing of quantum gates are not considered simultaneously; (2) When routing quantum bits, only forward-looking heuristic rules with fixed window sizes are used to select SWAP gate operations, ignoring the close relationship between window size and local circuit characteristics. Due to the above two limitations, existing quantum bit mapping technologies usually introduce too many SWAP gate operations, which significantly reduces the execution success rate of quantum circuits. Summary of the invention

[0007] The purpose of the present invention is to provide a heuristic quantum bit mapping method based on a dynamic look-ahead window. When performing quantum bit allocation, the present invention will simultaneously consider the interaction relationship and interaction timing of logical quantum bits, and when performing quantum bit routing, dynamically adjust the size of the look-ahead window according to the local detail characteristics of the quantum circuit, so as to select a SWAP gate with better effect, thereby significantly reducing the number of SWAP gates required in the end.

[0008] In order to better achieve the above-mentioned invention object, the following related concepts in the present invention are described:

[0009] Quantum bit: A quantum bit is the basic unit for storing and processing quantum information on a quantum computer. The state of a quantum bit is referred to as a quantum state. The quantum bits in a quantum circuit are called logical quantum bits; and the quantum bits in a NISQ computer are called physical quantum bits.

[0010] Quantum circuit: A quantum circuit usually consists of logical qubits and a sequence of quantum gate operations acting on the qubits. Figure 1 The example quantum circuit shown includes six logical qubits {q0, q1, q2, q3, q4, q5} and seven two-bit quantum gates, namely CNOT gates.

[0011] Physical qubit coupling graph of the NISQ computer: The coupling graph describes the connection relationship between physical qubits in the NISQ computer, where nodes represent physical qubits and edges between nodes represent the two-bit quantum gates that are allowed to be applied. Figure 2 An example of a coupling diagram containing six physical qubits {Q0, Q1, Q2, Q3, Q4, Q5} is given.

[0012] SWAP gate: SWAP gate is a commonly used two-bit quantum gate, which is used to exchange the quantum states of two related physical quantum bits, and can also be equivalently regarded as exchanging the logical quantum bits corresponding to the two physical quantum bits. Figure 3 shown.

[0013] In order to achieve the above-mentioned invention object, the technical solution adopted by the present invention is specifically: a heuristic quantum bit mapping method based on a dynamic look-ahead window, the quantum bit mapping method comprising the following steps:

[0014] S1, read the quantum circuit from the source file and preprocess the quantum circuit;

[0015] S2. Based on the logical qubit interaction graph that contains both interaction relationship and timing information, the logical qubits in the quantum circuit are assigned their corresponding physical qubits in turn in a "radiation" manner that spreads outward from the central position, and finally the initial mapping relationship between the logical qubits and the physical qubits is established;

[0016] S3. Read active quantum gates from the quantum gate dependency graph in sequence. For active quantum gates that do not satisfy the neighbor interaction constraint, use dynamic forward-looking heuristic rules to select and insert the best SWAP gate. By routing the logical quantum bits in the coupling graph, all active quantum gates are gradually made to satisfy the neighbor interaction constraint. After all quantum gates in the quantum circuit are processed, the physical quantum circuit is output.

[0017] S4. The single-bit quantum gate deleted during quantum circuit preprocessing is restored to the physical quantum circuit output by the quantum bit routing process according to its recorded original position information, thereby obtaining the final physical quantum circuit.

[0018] Furthermore, the step S2 includes the following steps:

[0019] S21. Quantum circuit reading and preprocessing

[0020] The quantum circuit source file is a quantum circuit description file based on any quantum basic gate library, provided by a third party, generated by other quantum circuit pre-compilation tools, or customized. There is no requirement for the format of the quantum circuit source file, and its format can be a text file, a database file, or any other valid quantum circuit file format.

[0021] Quantum circuit preprocessing includes: deleting single-bit quantum gates that are not related to quantum bit mapping from the quantum circuit and recording their original positions in the quantum circuit; establishing a directed acyclic graph for the quantum circuit that expresses the execution dependency of quantum gates; topologically sorting the quantum bit dependency graph, and using the sequence number of each quantum gate in the topological sorting sequence as its execution timing information; generating a physical quantum bit coupling graph based on the device information of the NISQ computer, and calculating the distance between any two physical quanta on the coupling graph, wherein the distance refers to the shortest path length between the two physical quantum bits on the coupling graph, and storing the shortest path length between any two physical quanta on the coupling graph through a two-dimensional array D[][], where D[i][j] stores the physical quantum bit Q i and Q j The distance between

[0022] The quantum gate dependency graph, in which nodes represent quantum gates, and directed edges between quantum gates represent direct dependencies between two quantum gates, that is, the output of the previous quantum gate will be used as the input of the next quantum gate, and the label on the edge indicates which logical quantum bit the dependency is related to;

[0023] The construction process of the quantum gate dependency graph is as follows: by reading each quantum gate g1 in the quantum circuit in turn, a corresponding node is added to the quantum gate dependency graph for it. If the quantum gate g1 shares the same logical qubit with a quantum gate g2 that has just been added to the graph, a directed edge is established from the quantum gate g2 to the quantum gate g1, and the label on the edge is the shared logical qubit; Figure 6 Given Figure 1 The quantum gate dependency diagram corresponding to the quantum circuit shown;

[0024] The physical quantum bit coupling graph, wherein the nodes represent physical quantum bits, and the edges between the nodes represent the two-bit quantum gates that are allowed to be applied; Figure 2 An example of a coupling diagram containing six physical qubits {Q0, Q1, Q2, Q3, Q4, Q5} is given, in which a two-bit quantum gate is allowed to act on any two directly connected physical qubits.

[0025] S22. Quantum bit allocation

[0026] The qubit allocation is used to assign a physical qubit that stores its information to each logical qubit in the quantum circuit, thereby establishing an initial mapping relationship between logical qubits and physical qubits. When allocating qubits, the interaction relationship and interaction timing of qubits are considered at the same time, which helps to reduce the number of SWAP gates.

[0027] The quantum bit mapping relationship is represented by the function π:Q→V, where Q={q0,q1,…,q n} is a set of logical quantum bits, V = {Q0, Q1, ..., Q m} is a set of physical quantum bits, if π(q i )=Q j , which means that the logical quantum bit q i Assigned to physical quantum bits Q j superior;

[0028] S23. Quantum bit routing

[0029] After the logical qubits are assigned, each logical qubit corresponds to a physical qubit in the NISQ device. Under the current qubit mapping relationship, there are some two-bit quantum gates in the quantum circuit that do not satisfy the nearest neighbor interaction constraint;

[0030] The nearest neighbor interaction constraint means that the two-bit quantum gate is only allowed to act on two directly connected physical quantum bits in the coupling graph; Figure 2 As shown, the two-bit quantum bit can act on the following seven pairs of physical quantum bits, namely: (Q0, Q1), (Q1, Q2), (Q0, Q3), (Q1, Q4), (Q2, Q5), (Q3, Q4), (Q4, Q5), each pair of quantum bits corresponds to an edge in the coupling graph;

[0031] If a two-bit quantum gate does not satisfy the nearest neighbor interaction constraint under the current quantum bit mapping relationship π, it is necessary to move the relevant logical quantum bits on the coupling graph by inserting a SWAP gate until it satisfies the nearest neighbor interaction constraint. Fig.10 An example is given. If the initial mapping π makes π(q0)=Q0, π(q1)=Q2, and π(q2)=Q1, in order to execute the two-bit quantum gate g(q0,q1) on the coupling graph shown in 2, at least one SWAP gate needs to be inserted to make the two-bit quantum gate satisfy the nearest neighbor interaction constraint.

[0032] The quantum bit routing refers to traversing the quantum circuit according to the dependency relationship of the quantum gates, and inserting SWAP gates to make the currently accessed two-bit quantum gate satisfy the nearest neighbor interaction constraint until all two-bit quantum gates in the quantum circuit are traversed. The quality of the quantum bit routing strategy has a decisive influence on the number of SWAP gates inserted into the quantum circuit.

[0033] S24, Physical Quantum Circuit Output

[0034] The single-bit quantum gate deleted during quantum circuit preprocessing is restored to the physical quantum circuit output by the quantum bit routing process according to its recorded original position information, and the final physical quantum circuit is output.

[0035] Furthermore, in step S22, the quantum bit allocation starts from the center position of the physical quantum bit coupling diagram and the logical quantum bit interaction diagram, and gradually establishes a mapping relationship between the logical quantum bits and the physical quantum bits in a "radiation" manner that spreads outward; the method comprises the following steps:

[0036] S221. According to the structure of the quantum circuit, a corresponding logical quantum bit interaction diagram is established, which takes into account the interaction relationship between logical quantum bits and the execution timing priority of quantum gates;

[0037] The process of establishing the logical quantum bit interaction diagram is as follows:

[0038] (1) Determine the node set of the quantum bit interaction graph, read the logical quantum bit set in the quantum circuit, and establish a node for each logical quantum bit;

[0039] (2) Determine the edge set of the quantum bit interaction graph, traverse the two-bit quantum gates in the quantum circuit in turn, obtain the two logical quantum bits operated by the two-bit quantum gate, add an edge between the nodes corresponding to the two logical quantum bits, and assign the edge a weight based on the timing information of the first appearance of this type of two-bit quantum gate in the quantum circuit, where the timing information is generated in the quantum circuit preprocessing stage;

[0040] S222, respectively determine the center points of the physical quantum bit coupling diagram and the logical quantum bit interaction diagram, and record the quantum bits at the corresponding positions as q c and Q c ; and by transforming the logical quantum bit q c Assigned to physical qubit Q c , to initialize the quantum bit mapping relationship, that is, to set π(q c ) = Qc;

[0041] The physical qubit coupling graph and the logical qubit interaction graph are both undirected graphs. The center point of the graph refers to the node with the smallest maximum distance to all other nodes in the graph. The center point of the graph is obtained by calculating and comparing the distances between any two nodes in the graph. If there are multiple center points in the physical qubit coupling graph or the logical qubit interaction graph, any one of them is selected as the center point. c or Q c ;

[0042] S223. Generate a priority queue for allocating logical qubits according to the logical qubit interaction diagram. Subsequent steps will strictly allocate physical qubits to the logical qubits in sequence according to the order in the priority queue. The priority queue is generated as follows:

[0043] 1) From the center point q selected in the second step c First, perform a breadth-first traversal of the logical qubit interaction graph and remove all q c The logical qubits other than the ones above are placed into the allocation priority queue in the order of traversal;

[0044] 2) During the traversal process, for other logical qubits that are directly connected to the current logical qubit and have not yet been accessed, the order of insertion into the priority queue is determined according to the earliest interaction sequence between them and the current logical qubit. The earlier the logical qubit interacts with the current logical qubit, the earlier it is placed in the priority queue.

[0045] S224, assigning physical qubits to each logical qubit in turn according to the order specified by the logical qubit allocation priority queue until all logical qubits have corresponding physical qubits. i , perform the following steps:

[0046] ① Initialize the reference position set of the physical qubit. If a physical qubit has been assigned a logical qubit, and the logical qubit has an interaction relationship with the logical qubit to be currently assigned, that is, there is a corresponding edge on the logical qubit interaction graph, then the physical qubit is added to the reference position set when the current logical qubit is assigned. All physical qubits placed in the reference set are arranged according to the time sequence of their interaction with the current logical qubit.

[0047] ② Initialize the candidate position set of physical qubits. Based on the first reference physical qubit, select the idle physical qubit closest to it as the candidate position set. The idle physical qubit refers to the physical qubit that has not been occupied by the logical qubit. The distance refers to the shortest path length between two physical qubits on the physical qubit coupling diagram.

[0048] ③ Iteratively screen candidate physical qubits. For each physical qubit in the reference position set except the first one, calculate the distance between it and each physical qubit in the candidate position set one by one, and retain only the physical qubit with the smallest distance as the new candidate position set. If there is only one physical qubit left in the candidate position set, or all reference qubits have been visited, the iteration is terminated; the distance refers to the shortest path length between two physical qubits on the physical qubit coupling graph;

[0049] ④ Determine the physical qubit corresponding to the current logical qubit. If there are still multiple physical qubits in the candidate position set, then determine the physical qubit corresponding to the current logical qubit. i The degree in the logical qubit interaction graph is chosen as the reference physical qubit with the closest degree in the physical qubit coupling graph. j As the final mapping position, update the quantum bit mapping relationship π so that π(q i )=Q j The degree of a node in the logical quantum bit interaction graph and the physical quantum bit coupling graph refers to the number of edges associated with the node in the logical quantum bit interaction graph and the physical quantum bit coupling graph.

[0050] Furthermore, in step S23, the quantum bit routing method adopted includes the following steps:

[0051] S231, reading the quantum gate operations in an active state from the quantum gate dependency graph to form an active quantum gate set,

[0052] The quantum gate operation in the active state has no predecessor node in the quantum gate dependency graph, that is, the quantum gates it depends on have been deleted from the quantum gate dependency graph;

[0053] S232, check whether there is an executable quantum gate in the active quantum gate set. If not, proceed to the next step. Otherwise, delete this row of executable gates from the active quantum gate set and the quantum gate dependency graph, and add it to the physical quantum circuit. Then check whether the quantum gate dependency graph after the deletion operation is empty. If not, return to step S231. Otherwise, terminate the operation and return to the physical quantum circuit.

[0054] The executable gate refers to an active quantum gate that satisfies the neighbor interaction constraint, and the physical quantum circuit refers to the quantum circuit that is ultimately sent to the NISQ computer for execution;

[0055] S233: Generate a set of candidate SWAP gates, where the candidate SWAP gates meet the following conditions:

[0056] S2331, the SWAP gate shares the same physical quantum bit with at least one quantum gate in the active quantum gate set;

[0057] S2332, executing the SWAP gate will bring a non-negative effect to the execution of each quantum gate in the active quantum gate set;

[0058] S2333, the SWAP gate complies with the nearest neighbor interaction constraint, that is, it acts on two directly connected physical qubits in the coupling graph;

[0059] S234. For each SWAP gate in the candidate SWAP gate set, a look-ahead window is constructed for it by a dynamic look-ahead technique, wherein the look-ahead window contains a maximum continuous quantum gate sequence having a non-negative effect on the SWAP gate, wherein the dynamic look-ahead technique has the following characteristics:

[0060] S2341, assuming that the SWAP gate acts on the physical quantum bit Q i and Q j , under the current mapping relationship π, the corresponding logical quantum bits are q x and q y , that is, π(q x )=Q i ,π(q y )=Q j , along the lines representing q x and q yDependency edges of quantum gates are traversed in depth first;

[0061] S2342. For the currently traversed quantum gate, check its effect value under the action of the SWAP gate. If the effect value is positive or zero, add it to the look-ahead window corresponding to the SWAP gate; otherwise, stop traversing downward along the quantum bit;

[0062] The effect value refers to the difference in the physical distance of the quantum gate before and after the SWAP gate acts. The physical distance of the quantum gate refers to the shortest path length of two physical quantum bits related to the quantum gate on the coupling graph, which is directly accessed through the distance array D[][] obtained in the preprocessing stage;

[0063] S235, for each SWAP gate in the candidate SWAP gate set, calculate the sum of the effect values ​​of all quantum gates in its look-ahead window after the execution of the SWAP gate, insert the SWAP gate with the largest effect value into the physical quantum circuit, update the current quantum bit mapping relationship according to the inserted SWAP gate, and then return to step S231 to continue execution;

[0064] The physical quantum circuit refers to the quantum circuit that is ultimately sent to the NISQ computer for execution;

[0065] The updating of the current quantum bit mapping relationship according to the inserted SWAP gate has the following characteristics: if the current quantum bit mapping relationship is π, and satisfies π(q i )=Q x ,π(q j )=Q y , then in the physical quantum bit Q x and Q y After applying the SWAP gate, the mapping relationship π is updated to In the new mapping Next, the logical quantum bit q i and q j The positions of will be exchanged, that is, π(q i )=Q y ,π(q j )=Q x .

[0066] The following table shows the comparison results of the method of the present invention and the prior art SABRE [1] on multiple benchmark quantum circuits, where g1 and g2 represent the number of auxiliary quantum gates inserted by SABRE and the method of the present invention, respectively, and t1 and t2 represent the time in seconds.

[0067]

[0068] Compared with the prior art, the present invention has the following beneficial effects:

[0069] (1) When allocating quantum bits, the method of the present invention takes into account the interaction relationship and interaction timing of logical quantum bits, and adopts a "radiation" method that spreads outward from the center position to allocate the corresponding physical quantum bits to the logical quantum bits in the quantum circuit in turn, so that high-quality initial mapping can be quickly determined in a short time. Experimental results show that compared with the prior art, the method of the present invention has a higher advantage in time cost, and this advantage becomes more obvious as the scale of the quantum circuit increases. For benchmark quantum circuits with more than 10,000 quantum gates, the time used by the present invention is about one-tenth of that of the prior art; for benchmark quantum circuits with more than 100,000 quantum gates, the prior art can no longer obtain mapping results within the specified time, while the method of the present invention can still obtain results within tens of seconds. Compared with the prior art, the method of the present invention is more conducive to real-time compilation and execution of quantum circuits.

[0070] (2) The method of the present invention dynamically constructs a look-ahead window and considers the local structural characteristics of the quantum circuit during quantum state routing, so that the entire quantum circuit can be executed with fewer auxiliary quantum gates. Experimental results show that the method of the present invention also has a high advantage in the number of auxiliary quantum gates. Compared with the prior art, the number of gates required for all benchmark circuits in the method of the present invention is reduced by an average of 22.92%, and by up to 43.65%, so that quantum circuits can run more reliably on NSIQ devices.

[0071] (3) The quantum bit mapping method proposed in the present invention can significantly reduce the number of SWAP gates required to execute quantum circuits on NISQ devices in a relatively short period of time. Compared with the prior art SABRE[1], the number of gates required for all benchmark circuits in the proposed method is reduced by an average of 22.92% and by a maximum of 43.65%. BRIEF DESCRIPTION OF THE DRAWINGS

[0072] The accompanying drawings are used to provide further understanding of the present invention and constitute a part of the specification. They are used to explain the present invention together with the embodiments of the present invention and do not constitute a limitation of the present invention.

[0073] Figure 1 It is a schematic diagram of a quantum circuit embodiment corresponding to the present invention.

[0074] Figure 2 It is a structural schematic diagram of an embodiment of a physical quantum bit coupling diagram corresponding to the present invention.

[0075] Figure 3 It is a schematic diagram of a SWAP gate embodiment corresponding to the present invention.

[0076] Figure 4It is a schematic diagram of the flow chart of the quantum bit mapping method corresponding to the present invention.

[0077] Figure 5 Schematic diagram of the quantum bit mapping device corresponding to the present invention.

[0078] Figure 6 for Figure 1 Schematic diagram of the quantum gate dependencies of the quantum circuit shown.

[0079] Figure 7 It is a schematic diagram of the flow chart of the quantum bit allocation method corresponding to the present invention.

[0080] Figure 8 yes Figure 1 Diagram of the logical qubit interactions of the quantum circuit shown.

[0081] Fig. 9 for Figure 7 Schematic diagram of a single logical quantum bit allocation process corresponding to the fourth step of the quantum bit allocation method shown.

[0082] Fig.10 Schematic diagram of an embodiment of using SWAP gates to move logical qubits.

[0083] Fig.11 The figure is a flow chart of the quantum bit routing method corresponding to the present invention.

[0084] Fig.12 It is a schematic diagram of an embodiment of a quantum bit allocation method corresponding to the present invention.

[0085] Fig.13 It is a schematic diagram of an embodiment of a quantum bit routing method corresponding to the present invention.

[0086] Fig.14 Schematic diagram of other quantum bit mapping technology embodiments. DETAILED DESCRIPTION

[0087] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. Of course, the specific embodiments described here are only used to explain the present invention and are not used to limit the present invention.

[0088] Example 1

[0089] This embodiment provides a technical solution, which is a heuristic quantum bit mapping method based on a dynamic look-ahead window, specifically an embodiment of the quantum bit allocation method used, such as Fig.12When mapping the quantum circuit shown in the left figure to the physical quantum bit coupling diagram in the right figure, the method of this embodiment finds an initial quantum bit mapping (where π(q0)=Q0), π(q1)=Q1), π(q2)=Q2), π(q3)=Q3)). Under the initial mapping, the quantum circuit can be directly executed without inserting any SWAP gates. This embodiment verifies the effectiveness of the quantum bit allocation method of the present invention.

[0090] Example 2

[0091] The technical solution provided in this embodiment is a heuristic quantum bit mapping method based on a dynamic look-ahead window, specifically, under the initial quantum mapping π (where π(q i )=Q i ), will be as Figure 1 The quantum circuit shown is mapped to Figure 2 In the physical quantum bit coupling diagram shown in Fig.13 As shown, only two SWAP gates are included, which has reached the optimal number of SWAP gates. This embodiment verifies the effectiveness of the quantum bit routing method described in the present invention.

[0092] Example 3

[0093] The technical solution provided in this embodiment is that the physical quantum circuit that may be generated by other quantum bit mapping methods is specifically under the initial quantum mapping π (where π(q i )=Q i ), will be as Figure 1 The quantum circuit shown is mapped to Figure 2 In the physical quantum bit coupling diagram shown in Fig.14 As shown, there are only five SWAP gates, which exceeds the number of SWAP gates required by the technology described in the present invention in Example 2.

[0094] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A heuristic quantum bit mapping method based on dynamic look-ahead window, It is characterized in that The quantum bit mapping method comprises the following steps: S1, read the quantum circuit from the source file and preprocess the quantum circuit; S2. Based on the logical qubit interaction graph that contains both interaction relationship and timing information, the logical qubits in the quantum circuit are assigned their corresponding physical qubits in turn in a "radiation" manner that spreads outward from the central position, and finally the initial mapping relationship between the logical qubits and the physical qubits is established; S3. Read active quantum gates from the quantum gate dependency graph in sequence. For active quantum gates that do not satisfy the neighbor interaction constraint, use dynamic forward-looking heuristic rules to select and insert the best SWAP gate. By routing the logical quantum bits in the coupling graph, all active quantum gates are gradually made to satisfy the neighbor interaction constraint. After all quantum gates in the quantum circuit are processed, the physical quantum circuit is output. S4. The single-bit quantum gate deleted during quantum circuit preprocessing is restored to the physical quantum circuit output by the quantum bit routing process according to its recorded original position information, thereby obtaining the final physical quantum circuit.

2. The heuristic quantum bit mapping method based on a dynamic look-ahead window according to claim 1, It is characterized in that The step S2 includes the following steps: S21. Quantum circuit reading and preprocessing The quantum circuit source file is a quantum circuit description file based on any quantum basic gate library provided by a third party, generated by other quantum circuit pre-compilation tools, or customized. There is no requirement for the format of the quantum circuit source file. Its format can be a text file, a database file, or any other valid quantum circuit file format. Quantum circuit preprocessing includes: deleting single-bit quantum gates that are not related to quantum bit mapping from the quantum circuit and recording their original positions in the quantum circuit; establishing a directed acyclic graph for the quantum circuit that expresses the execution dependency of quantum gates; topologically sorting the quantum bit dependency graph, and using the sequence number of each quantum gate in the topological sorting sequence as its execution timing information; generating a physical quantum bit coupling graph based on the device information of the NISQ computer, and calculating the distance between any two physical quanta on the coupling graph, wherein the distance refers to the shortest path length between the two physical quantum bits on the coupling graph, and storing the shortest path length between any two physical quanta on the coupling graph through a two-dimensional array D[][], where D[i][j] stores the physical quantum bit Q i and Q j The distance between The quantum gate dependency graph, in which nodes represent quantum gates, and directed edges between quantum gates represent direct dependencies between two quantum gates, that is, the output of the previous quantum gate will be used as the input of the next quantum gate, and the label on the edge indicates which logical quantum bit the dependency is related to; The process of constructing the quantum gate dependency graph is as follows: by reading each quantum gate g in the quantum circuit in turn 1 , add a corresponding node to the quantum gate dependency graph. If the quantum gate g 1 and a quantum gate g that was recently added to the diagram 2 Sharing the same logical qubit, we can establish a quantum gate g 2 Start to the quantum gate g 1 The labels on the edges are the shared logical qubits; The physical quantum bit coupling graph, wherein the nodes represent physical quantum bits, and the edges between the nodes represent the two-bit quantum gates that are allowed to be applied; S22. Quantum bit allocation The qubit allocation is used to assign a physical qubit that stores its information to each logical qubit in the quantum circuit, thereby establishing an initial mapping relationship between logical qubits and physical qubits. When allocating qubits, the interaction relationship and interaction timing of qubits are considered at the same time, which helps to reduce the number of SWAP gates. The quantum bit mapping relationship is represented by the function π:Q→V, where Q={q 0 ,q 1 ,…,q n } is a set of logical quantum bits, V = {Q 0 ,Q 1 ,…,Q m } is a set of physical quantum bits, if π(q i )=Q j , which means that the logical quantum bit q i Assigned to physical quantum bits Q j superior; S23. Quantum bit routing After the logical qubits are assigned, each logical qubit corresponds to a physical qubit in the NISQ device. Under the current qubit mapping relationship, there are some two-bit quantum gates in the quantum circuit that do not satisfy the nearest neighbor interaction constraint; The nearest neighbor interaction constraint means that the two-bit quantum gate is only allowed to act on two directly connected physical quantum bits in the coupling graph; If a two-bit quantum gate does not satisfy the nearest neighbor interaction constraint under the current quantum bit mapping relationship π, it is necessary to move the relevant logical quantum bits on the coupling graph by inserting a SWAP gate until it satisfies the nearest neighbor interaction constraint. The qubit routing refers to traversing the quantum circuit according to the dependency relationship of the quantum gates, and inserting SWAP gates to make the currently accessed two-bit quantum gate satisfy the nearest neighbor interaction constraint until all two-bit quantum gates in the quantum circuit are traversed. The quality of the qubit routing strategy has a decisive influence on the number of SWAP gates inserted into the quantum circuit. S24, Physical Quantum Circuit Output The single-bit quantum gate deleted during quantum circuit preprocessing is restored to the physical quantum circuit output by the quantum bit routing process according to its recorded original position information, and the final physical quantum circuit is output.

3. The heuristic quantum bit mapping method based on a dynamic look-ahead window according to claim 2, It is characterized in that In step S22, the quantum bit allocation starts from the center position of the physical quantum bit coupling diagram and the logical quantum bit interaction diagram, and gradually establishes the mapping relationship between the logical quantum bits and the physical quantum bits in a "radiation" manner that spreads outward; the quantum bit allocation method includes the following steps: S221. According to the structure of the quantum circuit, a corresponding logical quantum bit interaction diagram is established, which takes into account the interaction relationship between logical quantum bits and the execution timing priority of quantum gates; The process of establishing the logical quantum bit interaction diagram is as follows: (1) Determine the node set of the quantum bit interaction graph, read the logical quantum bit set in the quantum circuit, and establish a node for each logical quantum bit; (2) Determine the edge set of the quantum bit interaction graph, traverse the two-bit quantum gates in the quantum circuit in turn, obtain the two logical quantum bits operated by the two-bit quantum gate, add an edge between the nodes corresponding to the two logical quantum bits, and assign the edge a weight based on the timing information of the first appearance of this type of two-bit quantum gate in the quantum circuit, where the timing information is generated in the quantum circuit preprocessing stage; S222, respectively determine the center points of the physical quantum bit coupling diagram and the logical quantum bit interaction diagram, and record the quantum bits at the corresponding positions as q c and Q c ; and by transforming the logical quantum bit q c Assigned to physical qubit Q c , to initialize the quantum bit mapping relationship, that is, to set π(q c ) = Qc; The physical qubit coupling graph and the logical qubit interaction graph are both undirected graphs. The center point of the graph refers to the node with the smallest maximum distance to all other nodes in the graph. The center point of the graph is obtained by calculating and comparing the distances between any two nodes in the graph. If there are multiple center points in the physical qubit coupling graph or the logical qubit interaction graph, any one of them is selected as the center point. c or Q c ; S223. Generate a priority queue for allocating logical qubits according to the logical qubit interaction diagram. Subsequent steps will strictly allocate physical qubits to the logical qubits in sequence according to the order in the priority queue. The priority queue is generated as follows: 1) From the center point q selected in the second step c First, perform a breadth-first traversal of the logical qubit interaction graph and remove all q c The logical qubits other than the ones above are placed into the allocation priority queue in the order of traversal; 2) During the traversal process, for other logical qubits that are directly connected to the current logical qubit and have not yet been accessed, the order of insertion into the priority queue is determined according to the earliest interaction sequence between them and the current logical qubit. The earlier the logical qubit interacts with the current logical qubit, the earlier it is placed in the priority queue. S224, assigning physical qubits to each logical qubit in turn according to the order specified by the logical qubit allocation priority queue until all logical qubits have corresponding physical qubits. i , perform the following steps: ① Initialize the reference position set of the physical qubit. If a physical qubit has been assigned a logical qubit, and the logical qubit has an interaction relationship with the logical qubit to be currently assigned, that is, there is a corresponding edge on the logical qubit interaction graph, then the physical qubit is added to the reference position set when the current logical qubit is assigned. All physical qubits placed in the reference set are arranged according to the time sequence of their interaction with the current logical qubit. ② Initialize the candidate position set of physical qubits. Based on the first reference physical qubit, select the idle physical qubit closest to it as the candidate position set. The idle physical qubit refers to the physical qubit that has not been occupied by the logical qubit. The distance refers to the shortest path length between two physical qubits on the physical qubit coupling diagram. ③ Iteratively screen candidate physical qubits. For each physical qubit in the reference position set except the first one, calculate the distance between it and each physical qubit in the candidate position set one by one, and retain only the physical qubit with the smallest distance as the new candidate position set. If there is only one physical qubit left in the candidate position set, or all reference qubits have been visited, the iteration is terminated; the distance refers to the shortest path length between two physical qubits on the physical qubit coupling graph; ④ Determine the physical qubit corresponding to the current logical qubit. If there are still multiple physical qubits in the candidate position set, then determine the physical qubit corresponding to the current logical qubit. i The degree in the logical qubit interaction graph is chosen as the reference physical qubit with the closest degree in the physical qubit coupling graph. j As the final mapping position, update the quantum bit mapping relationship π so that π(q i )=Q j .

4. The heuristic quantum bit mapping method based on a dynamic look-ahead window according to claim 3, It is characterized in that In step S23, the quantum bit routing method adopted includes the following steps: S231, reading the quantum gate operations in an active state from the quantum gate dependency graph to form an active quantum gate set, The quantum gate operation in the active state has no predecessor node in the quantum gate dependency graph, that is, the quantum gates it depends on have been deleted from the quantum gate dependency graph; S232, check whether there is an executable quantum gate in the active quantum gate set. If not, proceed to the next step. Otherwise, delete this row of executable gates from the active quantum gate set and the quantum gate dependency graph, and add it to the physical quantum circuit. Then check whether the quantum gate dependency graph after the deletion operation is empty. If not, return to step S231. Otherwise, terminate the operation and return to the physical quantum circuit. The executable gate refers to an active quantum gate that satisfies the neighbor interaction constraint, and the physical quantum circuit refers to the quantum circuit that is ultimately sent to the NISQ computer for execution; S233: Generate a set of candidate SWAP gates, where the candidate SWAP gates meet the following conditions: S2331, the SWAP gate shares the same physical quantum bit with at least one quantum gate in the active quantum gate set; S2332, executing the SWAP gate will bring a non-negative effect to the execution of each quantum gate in the active quantum gate set; S2333, the SWAP gate complies with the nearest neighbor interaction constraint, that is, it acts on two directly connected physical qubits in the coupling graph; S234, for each SWAP gate in the candidate SWAP gate set, a look-ahead window is constructed for it by a dynamic look-ahead technology, wherein the look-ahead window contains a maximum continuous quantum gate sequence having a non-negative effect on the SWAP gate, wherein the dynamic look-ahead technology has the following characteristics: S2341, assuming that the SWAP gate acts on the physical quantum bit Q i and Q j , under the current mapping relationship π, the corresponding logical quantum bits are q x and q y , that is, π(q x )=Q i ,π(q y )=Q j , along the lines representing q x and q y Dependency edges of quantum gates are traversed in depth first; S2342. For the currently traversed quantum gate, check its effect value under the action of the SWAP gate. If the effect value is positive or zero, add it to the look-ahead window corresponding to the SWAP gate; otherwise, stop traversing downward along the quantum bit; The effect value refers to the difference in the physical distance of the quantum gate before and after the SWAP gate acts. The physical distance of the quantum gate refers to the shortest path length of two physical quantum bits related to the quantum gate on the coupling graph, which is directly accessed through the distance array D[][] obtained in the preprocessing stage; S235, for each SWAP gate in the candidate SWAP gate set, calculate the sum of the effect values ​​of all quantum gates in its look-ahead window after the execution of the SWAP gate, insert the SWAP gate with the largest effect value into the physical quantum circuit, update the current quantum bit mapping relationship according to the inserted SWAP gate, and then return to step S231 to continue execution; The physical quantum circuit refers to the quantum circuit that is ultimately sent to the NISQ computer for execution; The updating of the current quantum bit mapping relationship according to the inserted SWAP gate has the following characteristics: if the current quantum bit mapping relationship is π, and satisfies π(q i )=Q x ,π(q j )=Q y , then in the physical quantum bit Q x and Q y After applying the SWAP gate, the mapping relationship π is updated to φ. Under the new mapping relationship φ, the logical quantum bit q i and q j The positions of will be exchanged, that is, π(q i )=Q y ,π(q j )=Q x .

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