Driving method of display panel and display module

Abstract

The invention provides a driving method of a display panel and a display module. The display panel comprises a light-emitting element and a pixel circuit used for driving the light-emitting element to emit light, the pixel circuit comprises a pulse width modulation module and an amplitude modulation module which are electrically connected, the pulse width modulation module comprises a pulse width driving transistor, and the amplitude modulation module comprises an amplitude driving transistor. The method comprises the following steps: after a pulse width driving transistor receives a first data signal, providing a first reset signal to the pulse width driving transistor so as to reset the pulse width driving transistor; and after the amplitude driving transistor receives the second data signal, providing a second reset signal to the amplitude driving transistor so as to reset the amplitude driving transistor. The problem that in the prior art, a display panel of a pixel circuit combining PAM and PWM has display ghosting is at least solved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a driving method of a display panel and a display module. Background Art

[0002] With the development of display technology, the application of display panels is becoming more and more common, and users have more and more requirements on the display quality of display panels. In order to meet the requirements of higher definition, the resolution of display panels is getting higher and higher.

[0003] In order to meet the driving requirements of high-resolution display panels, a pixel circuit combining pulse amplitude modulation (PAM) and pulse width modulation (PWM) is used to control the intensity and duration of the driving current to control the luminous state of the light-emitting element.

[0004] However, the pixel circuit using a combination of pulse amplitude modulation (PAM) and pulse width modulation (PWM) in the related art has the problem of display afterimage. Summary of the invention

[0005] The main purpose of the present application is to provide a display panel driving method and a display module, so as to at least solve the problem of display afterimage in the display panel using a pixel circuit combining PAM and PWM in the prior art.

[0006] In order to achieve the above object, according to one aspect of the present application, a method for driving a display panel is provided, wherein the display panel includes a light-emitting element and a pixel circuit for driving the light-emitting element to emit light, wherein the pixel circuit includes a pulse width modulation module and an amplitude modulation module electrically connected, wherein the pulse width modulation module includes a pulse width driving transistor, and wherein the amplitude modulation module includes an amplitude driving transistor, wherein the method includes:

[0007] After the pulse width driving transistor receives the first data signal, providing a first reset signal to the pulse width driving transistor to reset the pulse width driving transistor;

[0008] After the amplitude driving transistor receives the second data signal, a second reset signal is provided to the amplitude driving transistor to reset the amplitude driving transistor.

[0009] According to another aspect of the present application, a display module is provided, comprising:

[0010] A display panel, comprising a light emitting element and a pixel circuit for driving the light emitting element to emit light, wherein the pixel circuit comprises a pulse width modulation module and an amplitude modulation module which are electrically connected, wherein the pulse width modulation module comprises a pulse width driving transistor, and the amplitude modulation module comprises an amplitude driving transistor;

[0011] A controller comprises one or more processors, a memory and one or more programs, wherein the one or more programs are stored in the memory and are configured to be executed by the one or more processors, and the one or more programs include a driving method for executing any one of the display panels.

[0012] By applying the technical solution of the present application, after the first data signal of the pulse width driving transistor is written, the first reset signal is provided to the pulse width driving transistor to reset the pulse width driving transistor; and after the second data signal of the amplitude driving transistor is written, the second reset signal is provided to the amplitude driving transistor to reset the amplitude driving transistor. The driving method of the display panel of the present application resets the driving transistors of the pulse width modulation module and the amplitude modulation module respectively through the first reset signal and the second reset signal after the data signal is written into the pixel circuit, which can ensure that the current frame written data of the driving transistors of the pulse width modulation module and the amplitude modulation module are not affected by the previous frame written data, thereby achieving the effect of improving the display afterimage and ensuring a better display effect of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] The drawings constituting part of the present application are used to provide a further understanding of the present application. The exemplary embodiments and descriptions of the present application are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0014] Figure 1 A hardware structure block diagram of a mobile terminal for executing a display panel driving method provided in an embodiment of the present application is shown;

[0015] Figure 2 A schematic diagram of a process of driving a display panel provided according to an embodiment of the present application is shown;

[0016] Figure 3 A schematic structural diagram of a pixel circuit provided according to an embodiment of the present application is shown;

[0017] Figure 4 A schematic structural diagram of a display panel provided according to an embodiment of the present application is shown;

[0018] Figure 5 A driving timing diagram of a display panel provided according to an embodiment of the present application is shown;

[0019] Figure 6 A driving timing diagram of another display panel provided according to an embodiment of the present application is shown;

[0020] Figure 7 A driving timing diagram of another display panel provided according to an embodiment of the present application is shown;

[0021] Figure 8 A driving timing diagram of another display panel provided according to an embodiment of the present application is shown;

[0022] Fig. 9 A circuit structure schematic diagram of a pixel circuit provided according to an embodiment of the present application is shown;

[0023] Fig.10 A circuit structure schematic diagram of another pixel circuit provided according to an embodiment of the present application is shown;

[0024] Fig.11 A schematic structural diagram of a display module provided according to an embodiment of the present application is shown.

[0025] The above drawings include the following reference numerals:

[0026] 100. Display panel; 102. Processor; 104. Memory; 106. Transmission device; 108. Input / output device; 10. Pixel circuit; 11. Amplitude modulation module; 111. Amplitude driving transistor; 112. Second data signal line; 113. Amplitude reset transistor; 114. Amplitude data writing transistor; 115. Second gate reset transistor; 12. Pulse width modulation module; 121. Pulse width driving transistor; 122. First data signal line; 123. Pulse width reset transistor; 124. Pulse width data writing transistor; 125. First gate reset transistor; 20. Light-emitting element. DETAILED DESCRIPTION

[0027] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0028] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present application.

[0029] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequential order. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present application described here. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0030] As introduced in the background technology, the display panel using the pixel circuit combining PAM and PWM in the prior art has display afterimages. To solve the above technical problems, the embodiments of the present application provide a display panel driving method and a display module.

[0031] The technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the accompanying drawings in the embodiments of the present invention.

[0032] The method embodiments provided in the embodiments of the present application can be executed in a mobile terminal, a computer terminal or a similar computing device. Taking running on a mobile terminal as an example, Figure 1 FIG. 1 is a hardware structure block diagram of a mobile terminal of a display panel driving method according to an embodiment of the present invention. Figure 1 As shown, the mobile terminal may include one or more ( Figure 1 Only one is shown in the figure) a processor 102 (the processor 102 may include but is not limited to a processing device such as a microprocessor MCU or a programmable logic device FPGA) and a memory 104 for storing data, wherein the mobile terminal may also include a transmission device 106 and an input / output device 108 for communication functions. It can be understood by those skilled in the art that Figure 1 The structure shown is only for illustration and does not limit the structure of the mobile terminal. Figure 1 More or fewer components as shown, or with Figure 1 Different configurations are shown.

[0033] The memory 104 can be used to store computer programs, for example, software programs and modules of application software, such as the computer program corresponding to the driving method of the display panel in the embodiment of the present invention. The processor 102 executes various functional applications and data processing by running the computer program stored in the memory 104, that is, the above method is implemented. The memory 104 may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, the memory 104 may further include a memory remotely arranged relative to the processor 102, and these remote memories can be connected to the mobile terminal via a network. Examples of the above-mentioned network include but are not limited to the Internet, an intranet, a local area network, a mobile communication network, and a combination thereof. The transmission device 106 is used to receive or send data via a network. The above-mentioned specific network example may include a wireless network provided by a communication provider of the mobile terminal. In one example, the transmission device 106 includes a network adapter (Network Interface Controller, referred to as NIC), which can be connected to other network devices through a base station so as to communicate with the Internet. In one example, the transmission device 106 may be a radio frequency (RF) module, which is used to communicate with the Internet wirelessly.

[0034] In this embodiment, a method for driving a display panel running on a mobile terminal, a computer terminal or a similar computing device is provided. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and although a logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from that shown here.

[0035] Figure 2 1 is a flow chart of a method for driving a display panel according to an embodiment of the present application, and the method can be applied to an IC, a COF or an FPC of a display panel. Specifically, Figure 3 As shown, the display panel includes a light emitting element 20 and a pixel circuit 10 for driving the light emitting element 20 to emit light. The pixel circuit 10 includes a pulse width modulation (PWM) module 12 and an amplitude modulation (PAM) module 11 that are electrically connected. The pulse width modulation module 12 includes a pulse width driving transistor 121, and the amplitude modulation module 11 includes an amplitude driving transistor 111. Figure 2 As shown, the method comprises the following steps:

[0036] Step S201, after the pulse width driving transistor receives the first data signal, providing a first reset signal to the pulse width driving transistor to reset the pulse width driving transistor;

[0037] Specifically, the pulse width driving transistor can select a three-terminal switch tube such as a MOS tube and a triode, and can be designed according to actual conditions during specific implementation. The first data signal is provided to the first end or the second end of the pulse width driving transistor, and the first reset signal is provided to the first end or the second end of the pulse width driving transistor. In the case where the pulse width driving transistor selects a MOS tube, the first data signal and the first reset signal are both provided to the source or drain of the pulse width driving transistor, for example, both are provided to the source.

[0038] Step S202 : after the amplitude driving transistor receives the second data signal, providing a second reset signal to the amplitude driving transistor to reset the amplitude driving transistor.

[0039] Specifically, the amplitude driving transistor can select a three-terminal switch such as a MOS tube and a triode, and can be designed according to actual conditions during specific implementation. The second data signal is provided to the first end or the second end of the amplitude driving transistor, and the second reset signal is provided to the first end or the second end of the amplitude driving transistor. In the case where the amplitude driving transistor selects a MOS tube, the second data signal and the second reset signal are both provided to the source or drain of the amplitude driving transistor, for example, both are provided to the source.

[0040] Through the above embodiment, after the first data signal of the pulse width driving transistor is written, the first reset signal is provided to the pulse width driving transistor to reset the pulse width driving transistor; and after the second data signal of the amplitude driving transistor is written, the second reset signal is provided to the amplitude driving transistor to reset the amplitude driving transistor. The driving method of the display panel of the present application resets the driving transistors of the pulse width modulation module and the amplitude modulation module respectively through the first reset signal and the second reset signal after the data signal is written into the pixel circuit, which can ensure that the current frame written data of the driving transistors of the pulse width modulation module and the amplitude modulation module are not affected by the previous frame written data, thereby achieving the effect of improving the display afterimage and ensuring the better display effect of the display panel.

[0041] In actual application, the light emitting element may specifically be a micro light emitting diode (Micro Light Emitting Diode, micro LED) or an organic light emitting diode (Organic Light Emitting Diode, OLED).

[0042] Optionally, the light emitting element may be an inorganic light emitting element including a first electrode, a second electrode and an inorganic semiconductor disposed between the first electrode and the second electrode.

[0043] In the pixel circuit, the pulse width modulation module can adjust the pulse width of the voltage applied to the light emitting element based on the voltage value of the first data signal. The amplitude modulation module can control the amplitude of the current driving the light emitting element based on the voltage value of the second data signal.

[0044] The pulse width modulation module adjusts the pulse width of the voltage applied to the first electrode of the light-emitting element, that is, the pulse width modulation module adjusts the actual emission period of the driving current applied to the light-emitting element, and at the same time, the driving current applied to the light-emitting element is maintained at a constant level to adjust the grayscale or brightness displayed by the light-emitting element, rather than adjusting the grayscale or brightness displayed by the light-emitting element by adjusting the magnitude of the driving current applied to the light-emitting element. Therefore, the amplitude modulation module can provide the driving current to the light-emitting element so that the light-emitting element is driven with the best luminous efficiency, and adjust the grayscale or brightness displayed by the light-emitting element by adjusting the light-emitting duty cycle of the light-emitting element (that is, the emission period of the light-emitting element) through the pulse width modulation module.

[0045] In the pixel circuit, the threshold voltage of the pulse width driving transistor and the amplitude driving circuit can change according to the change mode of the transistor gate to source voltage (Vgs). For example, the threshold voltage of the transistor may present a first average voltage when Vgs rises from low to high, but may present a second average level different from the first average voltage when Vgs changes from high to low, thereby generating different current-voltage (IV) curves. This dependence of the threshold voltage on the actual Vgs value is called the "hysteresis" of the transistor or the offset of the transistor threshold voltage. In some cases, the threshold voltage Vth may be offset, for example, when the display panel is converted from a black screen to a white screen or the display panel is converted from one gray level to another gray level, the offset of the threshold voltage Vth (i.e., the aforementioned "hysteresis" of the transistor) causes the next frame of data to be written to be affected by the data written in the previous frame, that is, the current moment picture is affected by the previous moment picture, thereby generating a residual image phenomenon. Without performing a source or drain reset of the transistor, the sampled Vth will correspond to a deviation from the target Ids curve; by introducing a source or drain reset of the transistor and inputting a reset signal at the source or drain of the transistor, the offset of the transistor threshold voltage can be reduced, effectively improving the "lag" phenomenon of the transistor and the afterimage phenomenon.

[0046] Figure 4 The structure diagram of a display panel of the present application is exemplarily shown. Figure 5 , Figure 6 , Figure 7 as well as Figure 8Schematic diagrams of driving timing of four display panels are shown respectively as examples. Figure 4 As shown, the display panel 100 includes a plurality of rows of pixel circuits 10, and the method further includes: simultaneously writing the second data signal to the amplitude driving transistors 111 of the plurality of rows of pixel circuits 10, that is, within a frame time, the amplitude modulation modules 11 in the plurality of rows of pixel circuits 10 are simultaneously turned on, specifically, Figure 4 As shown, the second data signal can be written into the amplitude driving transistor 111 through the second data signal line 112. After the amplitude driving transistor receives the second data signal, a second reset signal is provided to the amplitude driving transistor 111, including: Figures 5 to 8 As shown, after the amplitude driving transistors 111 of all rows receive the second data signal (with the same timing as PAM_S2), the second reset signal (with the same timing as PAM_S3) is provided to the amplitude driving transistors 111 of each row. In this embodiment, after the global data signal is written into the amplitude modulation module, the amplitude modulation module is reset, thereby eliminating the influence of the previous frame data on the amplitude modulation module, further ensuring that the display afterimage removal effect is more obvious.

[0047] In an optional solution, the method further includes: writing the first data signal PWM_S2 to the pulse width driving transistors of the plurality of rows of pixel circuits row by row, that is, within a frame time, the pulse width modulation modules in the plurality of rows of pixel circuits are turned on row by row, specifically, Figure 4 As shown, the first data signal can be written into the pulse width driving transistor 121 through the first data signal line 122. After the pulse width driving transistor receives the first data signal, providing a first reset signal to the pulse width driving transistor includes: Figure 5 and Figure 6 As shown, after the pulse width driving transistor in the i-th row receives the first data signal (same as PWM_S2 timing), the first reset signal (same as PWM_S3 timing) is provided to the pulse width driving transistor in the i-th row, where i is an integer greater than or equal to 1. In this embodiment, multiple rows of pulse width modulation modules are turned on row by row, and after each row of data signal is written into the pulse width modulation module, the pulse width modulation module of the row is reset, thereby eliminating the influence of the previous frame of data on the pulse width modulation module, further ensuring that the display afterimage removal effect is more obvious.

[0048] Furthermore, in addition to providing the first reset signal to the pulse width driving transistor in the i-th row after the pulse width driving transistor in the i-th row receives the first data signal, the first reset signal can also be provided to the pulse width driving transistor in the i+1-th row before the pulse width driving transistor in the i-th row receives the first data signal, that is, after the pulse width driving transistor in the i-th row receives the first data signal and before the pulse width driving transistor in the i+1-th row receives the first data signal.

[0049] In addition, in some other embodiments, the first reset signal provided to the pulse width driving transistors in the i-th row may also be sent simultaneously with the first data signal provided to the pulse width driving transistors in the i+1-th row, that is, Figure 5 and Figure 6 As shown, providing the first reset signal to the pulse width driving transistors in the i-1th row includes: providing the first reset signal (with the same timing as PWM_S3) to the pulse width driving transistors in the i-th row, and providing the first data signal (with the same timing as PWM_S2) to the pulse width driving transistors in the i-th row. That is, the reset signal of the pulse width driving transistor in the previous row is transmitted at the same time as the data signal of the pulse width driving transistor in the current row, thereby reducing the overall duration of the reset operation.

[0050] In another optional solution, the method further includes: writing the first data signal to the pulse width driving transistors of the plurality of rows of pixel circuits row by row, that is, within one frame time, the pulse width modulation modules 12 in the plurality of rows of pixel circuits 10 are turned on row by row, specifically, Figure 4 As shown, the first data signal can be written into the pulse width driving transistor 121 row by row through the first data signal line 122. After the pulse width driving transistor receives the first data signal, a first reset signal is provided to the pulse width driving transistor, including: Figure 7 As shown, after the pulse width driving transistors 121 of all rows receive the first data signal (same as PWM_S2 timing), the first reset signal (same as PWM_S3 timing) is provided to the pulse width driving transistors of each row. In this embodiment, the pulse width modulation module is turned on row by row, and after all the data signals are written into the pulse width modulation module, the pulse width modulation module of each row is reset, thereby eliminating the influence of the previous frame data on the pulse width modulation module, while further ensuring the display afterimage removal effect, ensuring that the control logic of the pixel circuit is relatively simple.

[0051] According to some exemplary embodiments of the present application, Fig. 9As shown, the pulse width modulation module 12 further includes a pulse width reset transistor 123, the output end of the pulse width reset transistor 123 is electrically connected to the input end of the pulse width driving transistor 121, and the input end of the pulse width reset transistor 123 is used to receive the first reset signal PWM_VDH. The amplitude modulation module 11 further includes an amplitude reset transistor 113, the output end of the amplitude reset transistor 113 is electrically connected to the input end of the amplitude driving transistor 111, and the input end of the amplitude reset transistor 113 is used to receive the second reset signal PAM_VDH. Providing a first reset signal to the pulse width driving transistor includes: providing a first control signal PWM_S3 to the control end of the pulse width reset transistor 123 to turn on the pulse width reset transistor 123, so that the first reset signal PWM_VDH is transmitted to the pulse width driving transistor 121; providing a second reset signal to the amplitude driving transistor includes: providing a second control signal PAM_S3 to the control end of the amplitude reset transistor 113 to turn on the amplitude reset transistor 113, so that the second reset signal PAM_VDH is transmitted to the amplitude driving transistor 111. In the above embodiment, a pulse width reset transistor connected in series with the pulse width driving transistor is provided in the pulse width modulation module, and the switching state of the pulse width reset transistor is controlled by the first control signal, thereby controlling whether the first reset signal is transmitted to the input end of the pulse width driving transistor, and an amplitude reset transistor connected in series with the amplitude driving transistor is provided in the amplitude modulation module, and the switching state of the pulse width reset transistor is controlled by the second control signal, thereby controlling whether the second reset signal is transmitted to the input end of the amplitude driving transistor, and the purpose of providing reset signals to the pulse width driving transistor and the amplitude driving transistor is achieved by the first control signal and the second control signal.

[0052] Based on the above embodiments, Fig. 9 As shown, the pulse width modulation module 12 further includes a pulse width data writing transistor 124, the output end of the pulse width data writing transistor 124 is electrically connected to the input end of the pulse width driving transistor 121, and the input end of the pulse width data writing transistor 124 is used to receive the first data signal PWM_DATA, and the amplitude modulation module 11 further includes an amplitude data writing transistor 114, the output end of the amplitude data writing transistor 114 is electrically connected to the input end of the amplitude driving transistor 111, and the input end of the amplitude data writing transistor 114 is used to receive the second data signal PAM_DATA. That is, the purpose of providing data signals to the pulse width driving transistor 121 and the amplitude driving transistor 111 is achieved by setting the pulse width data writing transistor 124 and the amplitude data writing transistor 114.

[0053] In actual application, the signal line for transmitting the first control signal may be the same as or different from the signal line for transmitting the second control signal. When the two are the same, it is necessary to ensure that the two control signals do not overlap in timing.

[0054] In an optional solution, the signal line for transmitting the first control signal is different from the signal line for transmitting the second control signal, that is, different signal lines are set to transmit the first control signal and the second control signal respectively.

[0055] In another alternative, Figure 4 As shown, the display panel 100 includes a plurality of rows of the pixel circuits 10, that is, the plurality of pixel circuits 10 are arranged at intervals along the row direction, and at least one of the first control signals corresponding to the plurality of rows of pulse width reset transistors is the same as the second control signal. In this embodiment, the control signal of the amplitude reset transistor and the control signal of at least one row of pulse width reset transistors share a control signal, that is, the turn-on time of each of the amplitude reset transistors is the same as the turn-on time of at least one row of pulse width reset transistors, and the reset operation is performed synchronously, which is conducive to simplifying the control timing of the pixel circuit and reducing the control logic.

[0056] Those skilled in the art can set the position of the first control signal that is the same as the second control signal according to actual needs. For example, the first control signal corresponding to the pulse width reset transistors in the first row is set to be the same as the second control signal; for another example, the first control signal corresponding to the pulse width reset transistors in the second row is set to be the same as the second control signal, and so on.

[0057] In the exemplary embodiment of the present application, Figure 5 and Figure 8 As shown, the first control signal PWM_S3 corresponding to the last row of the pulse width reset transistors in the plurality of rows of the pulse width reset transistors is the same as the second control signal PAM_S3.

[0058] It should be noted that the same first control signal and the same second control signal may be transmitted via different signal lines or via the same signal line.

[0059] In the exemplary embodiment of the present application, the same first control signal and the same second control signal are transmitted using the same signal line. By setting the second control signal of the amplitude modulation module and the first control signal corresponding to at least one row of pulse width modulation modules to multiplex a signal line, it is possible to save signal lines and reduce the number of signal lines in the display panel, which is beneficial to the high PPI (Pixels Per Inch, pixel density) design of the display panel.

[0060] Alternatively, if Figure 6and Figure 7 As shown, after the pulse width driving transistor receives the first data signal, a first reset signal is provided to the pulse width driving transistor, including: after providing the second reset signal to the amplitude driving transistor and after the pulse width driving transistor receives the first data signal, the first reset signal is provided to the pulse width driving transistor. In this embodiment, the amplitude driving transistor is reset first, and then the pulse width driving transistor is reset, and then the light emitting stage of the light emitting element is entered. Specifically, the amplitude driving transistor may be reset first, and then the pulse width driving transistor of each row may be reset after the data signal of each row is written into the pulse width driving transistor; in addition, the amplitude driving transistor may be reset first, and then the pulse width driving transistor of each row may be reset after all the data signals are written into the pulse width driving transistor.

[0061] Specifically, Figure 6 and Figure 7 As shown, the method further includes: after providing the second reset signal (with the same timing as PAM_S3) to the amplitude driving transistor, providing the first data signal (with the same timing as PWM_S2) to the pulse width driving transistor of the pixel circuit of the first row.

[0062] Of course, in addition to the above method, the pulse width driving transistor can be reset first, and then the amplitude driving transistor can be reset, that is, after the amplitude driving transistor receives the second data signal, the second reset signal is provided to the amplitude driving transistor, including: after providing the first reset signal to the pulse width driving transistor, and after the pulse width driving transistor receives the first data signal, the first reset signal is provided to the pulse width driving transistor. Specifically, after the first data signal of each row is written into the pulse width driving transistor, the pulse width driving transistor of the row can be reset, and then the amplitude driving transistor can be reset; after all the first data signals are written into the pulse width driving transistor, the pulse width driving transistor of each row can be reset, and then the amplitude driving transistor can be reset.

[0063] Alternatively, if Fig. 9As shown, the pulse width modulation module 12 further includes a pulse width data writing transistor 124 and a first gate reset transistor 125, the output end of the pulse width data writing transistor 124 is electrically connected to the input end of the pulse width driving transistor 121, the input end of the pulse width data writing transistor 124 is used to receive the first data signal PWM_DATA, the output end of the first gate reset transistor 125 is electrically connected to the control end of the pulse width driving transistor 121, the input end of the first gate reset transistor 125 is used to receive a third reset signal PWM_REF, the third reset signal PWM_REF is used to reset the control end potential of the pulse width driving transistor 121, and one of the control end of the pulse width data writing transistor 124 and the control end of the first gate reset transistor 125 satisfies: sharing a signal line with the control end of the amplitude reset transistor 113. In the present embodiment, since the first data signal and the second reset signal have no overlap in timing, and the third reset signal and the second reset signal have no overlap in timing, the first data signal and the second reset signal can reuse one signal line, and the third reset signal and the second reset signal can reuse one signal line, thereby saving signal lines and reducing the number of signal lines in the display panel, which is beneficial to the high PPI design of the display panel.

[0064] Similarly, if Fig. 9 As shown, the amplitude modulation module 11 further includes an amplitude data writing transistor 114 and a second gate reset transistor 115, the output end of the amplitude data writing transistor 114 is electrically connected to the input end of the amplitude driving transistor 111, the input end of the amplitude data writing transistor 114 is used to receive the second data signal PAM_DATA, the output end of the second gate reset transistor 115 is electrically connected to the control end of the amplitude driving transistor 111, the input end of the second gate reset transistor 115 is used to receive a fourth reset signal PAM_REF, the fourth reset signal PAM_REF is used to reset the control end potential of the amplitude driving transistor 111, and one of the control end of the amplitude data writing transistor 114 and the control end of the second gate reset transistor 115 satisfies: sharing a signal line with the control end of the pulse width reset transistor 123.

[0065] It should be noted that Fig. 9 The present invention only illustrates a 13T2C structure pixel circuit by way of example, which does not constitute a limitation on the pixel circuit structure of the present invention. In actual application, the driving method of the present invention may also be applicable to pixel circuits of other structures.

[0066] In some further exemplary embodiments, the third reset signal may share a signal line with the first reset signal. After the third reset signal is transmitted to the first gate reset transistor through the signal line to perform a reset operation on the control terminal potential of the pulse width driving transistor, the first reset signal line is then transmitted to the pulse width reset transistor through the signal line to perform a reset operation on the first terminal or the second potential of the pulse width driving transistor.

[0067] Similarly, the fourth reset signal can share a signal line with the second reset signal. After the fourth reset signal is transmitted to the second gate reset transistor through the signal line to perform a reset operation on the control terminal potential of the amplitude driving transistor, the second reset signal line is transmitted to the amplitude reset transistor through the signal line to perform a reset operation on the first terminal or the second potential of the amplitude driving transistor.

[0068] According to other exemplary embodiments of the present application, Fig.10As shown, the pulse width modulation module 12 further includes a pulse width data writing transistor 124, the output end of the pulse width data writing transistor 124 is electrically connected to the input end of the pulse width driving transistor 121, and the input end of the pulse width data writing transistor 124 is used to receive the first data signal PWM_DATA and the first reset signal PWM_VDH. The amplitude modulation module 11 further includes an amplitude data writing transistor 114, the output end of the amplitude data writing transistor 114 is electrically connected to the input end of the amplitude driving transistor 111, and the input end of the amplitude data writing transistor 114 is used to receive the second data signal PAM_DATA and the second reset signal PAM_VDH. Providing a first reset signal to the pulse width driving transistor includes: providing a first control signal PAM_S3 to the control end of the pulse width data writing transistor 124 to turn on the pulse width data writing transistor 124, so that the first reset signal PWM_VDH is transmitted to the pulse width driving transistor 121; providing a second reset signal to the amplitude driving transistor includes: providing a second control signal PAM_S3 to the control end of the amplitude data writing transistor 114 to turn on the amplitude data writing transistor 114, so that the second reset signal PAM_VDH is transmitted to the amplitude driving transistor 111. In this embodiment, a pulse width data writing transistor connected in series with a pulse width driving transistor is provided in the pulse width modulation module, and the switching state of the pulse width data writing transistor is controlled by the first control signal, thereby controlling whether the first reset signal is transmitted to the input end of the pulse width driving transistor, and an amplitude data writing transistor connected in series with the amplitude driving transistor is provided in the amplitude modulation module, and the switching state of the pulse width data writing transistor is controlled by the second control signal, thereby controlling whether the second reset signal is transmitted to the input end of the amplitude driving transistor, and the purpose of providing a reset signal to the pulse width driving transistor and the amplitude driving transistor is achieved by the first control signal and the second control signal. In addition, the data writing transistor that transmits the reset signal is multiplexed as a transistor that transmits the data signal, thereby simplifying the design of the pixel circuit while facilitating high PPI.

[0069] In addition to the above differences, Fig.10 Other structures in the pixel circuit are Fig. 9 The structures shown may be the same or different, and the corresponding driving methods may be the same or different.

[0070] It should be noted that the steps shown in the flowcharts of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and that, although a logical order is shown in the flowcharts, in some cases, the steps shown or described can be executed in an order different from that shown here.

[0071] The embodiment of the present application also provides a display module, such as Fig.11 As shown, the above display module includes:

[0072] The display panel comprises a light emitting element and a pixel circuit for driving the light emitting element to emit light, wherein the pixel circuit comprises a pulse width modulation module and an amplitude modulation module which are electrically connected, wherein the pulse width modulation module comprises a pulse width driving transistor, and the amplitude modulation module comprises an amplitude driving transistor;

[0073] A controller includes one or more processors, a memory and one or more programs, wherein the one or more programs are stored in the memory and are configured to be executed by the one or more processors, and the one or more programs include a driving method for executing any one of the above-mentioned display panels.

[0074] The above-mentioned display module includes a display panel and its controller, and the above-mentioned controller is used to execute the above-mentioned driving method, which provides the above-mentioned first reset signal to the above-mentioned pulse width driving transistor after the first data signal of the above-mentioned pulse width driving transistor is written, and performs a reset operation on the above-mentioned pulse width driving transistor; and provides the above-mentioned second reset signal to the above-mentioned amplitude driving transistor after the second data signal of the above-mentioned amplitude driving transistor is written, and performs a reset operation on the above-mentioned amplitude driving transistor. The driving method of the display panel of the present application resets the driving transistors of the pulse width modulation module and the amplitude modulation module respectively through the first reset signal and the second reset signal after the data signal is written into the pixel circuit, which can ensure that the current frame written data of the driving transistors of the pulse width modulation module and the amplitude modulation module are not affected by the previous frame written data, thereby achieving the effect of improving the display afterimage and ensuring that the overall display effect of the display module is better.

[0075] An embodiment of the present invention provides a computer-readable storage medium, wherein the computer-readable storage medium includes a stored program, wherein when the program is executed, a device where the computer-readable storage medium is located is controlled to execute the driving method of the display panel.

[0076] An embodiment of the present invention provides a device, the device including a processor, a memory, and a program stored in the memory and executable on the processor, and when the processor executes the program, at least the following steps are implemented:

[0077] Step S201, after the pulse width driving transistor receives the first data signal, providing a first reset signal to the pulse width driving transistor to reset the pulse width driving transistor;

[0078] Step S202 : after the amplitude driving transistor receives the second data signal, providing a second reset signal to the amplitude driving transistor to reset the amplitude driving transistor.

[0079] The devices in this article can be servers, PCs, PADs, mobile phones, etc.

[0080] The present application also provides a computer program product, including computer instructions, which, when executed by a processor, at least implement the following method steps:

[0081] Step S201, after the pulse width driving transistor receives the first data signal, providing a first reset signal to the pulse width driving transistor to reset the pulse width driving transistor;

[0082] Step S202 : after the amplitude driving transistor receives the second data signal, providing a second reset signal to the amplitude driving transistor to reset the amplitude driving transistor.

[0083] Obviously, those skilled in the art should understand that the above modules or steps of the present invention can be implemented by a general computing device, they can be concentrated on a single computing device, or distributed on a network composed of multiple computing devices, they can be implemented by a program code executable by a computing device, so that they can be stored in a storage device and executed by the computing device, and in some cases, the steps shown or described can be executed in a different order than here, or they can be made into individual integrated circuit modules, or multiple modules or steps therein can be made into a single integrated circuit module for implementation. Thus, the present invention is not limited to any specific combination of hardware and software.

[0084] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application may adopt the form of a computer program product implemented in one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that contain computer-usable program code.

[0085] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0086] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0087] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process in the computer or other programmable device. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0088] In a typical configuration, a computing device includes one or more processors (CPU), input / output interfaces, network interfaces, and memory.

[0089] The memory may include non-permanent memory in a computer-readable medium, random access memory (RAM) and / or non-volatile memory in the form of read-only memory (ROM) or flash RAM. The memory is an example of a computer-readable medium.

[0090] Computer readable media include permanent and non-permanent, removable and non-removable media that can be implemented by any method or technology to store information. Information can be computer readable instructions, data structures, program modules or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, compact disk read-only memory (CD-ROM), digital versatile disk (DVD) or other optical storage, magnetic cassettes, magnetic tape disk storage or other magnetic storage devices or any other non-transmission media that can be used to store information that can be accessed by a computing device. As defined herein, computer readable media does not include temporary computer readable media (transitory media), such as modulated data signals and carrier waves.

[0091] It should also be noted that the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, commodity or device. In the absence of more restrictions, the elements defined by the sentence "comprises a ..." do not exclude the existence of other identical elements in the process, method, commodity or device including the elements.

[0092] From the above description, it can be seen that the above embodiments of the present application achieve the following technical effects:

[0093] 1) The driving method of the display panel of the present application provides the first reset signal to the pulse width driving transistor after the first data signal of the pulse width driving transistor is written, and performs a reset operation on the pulse width driving transistor; and provides the second reset signal to the amplitude driving transistor after the second data signal of the amplitude driving transistor is written, and performs a reset operation on the amplitude driving transistor. The driving method of the display panel of the present application resets the driving transistors of the pulse width modulation module and the amplitude modulation module respectively through the first reset signal and the second reset signal after the data signal is written into the pixel circuit, which can ensure that the current frame written data of the driving transistors of the pulse width modulation module and the amplitude modulation module are not affected by the previous frame written data, thereby achieving the effect of improving the display afterimage and ensuring a better display effect of the display panel.

[0094] 2) The display module of the present application includes a display panel and its controller, and the controller is used to execute the driving method. After the first data signal of the pulse width driving transistor is written, the method provides the first reset signal to the pulse width driving transistor to reset the pulse width driving transistor; and after the second data signal of the amplitude driving transistor is written, the second reset signal is provided to the amplitude driving transistor to reset the amplitude driving transistor. After the data signal is written into the pixel circuit, the driving method of the display panel of the present application resets the driving transistors of the pulse width modulation module and the amplitude modulation module respectively through the first reset signal and the second reset signal, which can ensure that the current frame written data of the driving transistors of the pulse width modulation module and the amplitude modulation module are not affected by the previous frame written data, thereby achieving the effect of improving the display afterimage and ensuring the better overall display effect of the display module.

[0095] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A method for driving a display panel, characterized in that: The display panel includes a light-emitting element and a pixel circuit for driving the light-emitting element to emit light, the pixel circuit includes a pulse width modulation module and an amplitude modulation module electrically connected, the pulse width modulation module includes a pulse width driving transistor, the amplitude modulation module includes an amplitude driving transistor, and the method includes: After the pulse width driving transistor receives the first data signal, providing a first reset signal to the pulse width driving transistor to reset the pulse width driving transistor; After the amplitude driving transistor receives the second data signal, a second reset signal is provided to the amplitude driving transistor to reset the amplitude driving transistor.

2. The driving method according to claim 1, characterized in that: The display panel includes a plurality of rows of pixel circuits, The method further comprises: simultaneously writing the second data signal to the amplitude driving transistors of the pixel circuits in a plurality of rows, After the amplitude driving transistor receives the second data signal, providing a second reset signal to the amplitude driving transistor includes: after the amplitude driving transistors in all rows receive the second data signal, providing the second reset signal to the amplitude driving transistors in each row.

3. The driving method according to claim 2, characterized in that: The method further comprises: writing the first data signal to the pulse width driving transistors of the pixel circuits in a plurality of rows row by row, After the pulse width driving transistor receives the first data signal, providing a first reset signal to the pulse width driving transistor, including: after the pulse width driving transistor in the i-th row receives the first data signal, providing the first reset signal to the pulse width driving transistor in the i-th row, where i is an integer greater than or equal to 1.

4. The driving method according to claim 2, characterized in that: The method further comprises: writing the first data signal to the pulse width driving transistors of the pixel circuits in a plurality of rows row by row, After the pulse width driving transistor receives the first data signal, providing a first reset signal to the pulse width driving transistor includes: after the pulse width driving transistors in all rows receive the first data signal, providing the first reset signal to the pulse width driving transistors in each row.

5. The driving method according to any one of claims 1 to 4, characterized in that: The pulse width modulation module further includes a pulse width reset transistor, the output end of the pulse width reset transistor is electrically connected to the input end of the pulse width driving transistor, and the input end of the pulse width reset transistor is used to receive the first reset signal. The amplitude modulation module further includes an amplitude reset transistor, the output end of the amplitude reset transistor is electrically connected to the input end of the amplitude driving transistor, and the input end of the amplitude reset transistor is used to receive the second reset signal. Providing a first reset signal to the pulse width driving transistor includes: providing a first control signal to a control terminal of the pulse width reset transistor to turn on the pulse width reset transistor so that the first reset signal is transmitted to the pulse width driving transistor, Providing a second reset signal to the amplitude driving transistor includes: providing a second control signal to a control terminal of the amplitude reset transistor to turn on the amplitude reset transistor, so that the second reset signal is transmitted to the amplitude driving transistor.

6. The driving method according to claim 5, characterized in that: A signal line for transmitting the first control signal is different from a signal line for transmitting the second control signal.

7. The driving method according to claim 5, characterized in that: The display panel includes a plurality of rows of pixel circuits, and at least one of the first control signals corresponding to the plurality of rows of pulse width reset transistors is the same as the second control signal.

8. The driving method according to claim 7, characterized in that: The first control signal corresponding to the pulse width reset transistors in the last row of the plurality of rows of the pulse width reset transistors is the same as the second control signal.

9. The driving method according to claim 7, characterized in that: The same first control signal and the same second control signal are transmitted via the same signal line.

10. The driving method according to claim 1, characterized in that: After the pulse width driving transistor receives the first data signal, providing a first reset signal to the pulse width driving transistor comprises: After the second reset signal is provided to the amplitude driving transistor and after the pulse width driving transistor receives the first data signal, the first reset signal is provided to the pulse width driving transistor.

11. The driving method according to claim 1, characterized in that: Providing the first reset signal to the pulse width driving transistors in the i-th row includes: The first reset signal is provided to the pulse width driving transistors in the (i-1)th row, and the first data signal is provided to the pulse width driving transistors in the (i)th row.

12. The driving method according to claim 5, characterized in that: The pulse width modulation module further includes a pulse width data writing transistor and a first gate reset transistor, wherein the output end of the pulse width data writing transistor is electrically connected to the input end of the pulse width driving transistor, the input end of the pulse width data writing transistor is used to receive the first data signal, the output end of the first gate reset transistor is electrically connected to the control end of the pulse width driving transistor, the input end of the first gate reset transistor is used to receive a third reset signal, and one of the control end of the pulse width data writing transistor and the control end of the first gate reset transistor satisfies: A signal line is shared with the control end of the amplitude reset transistor.

13. A display module, characterized in that: include: A display panel, comprising a light emitting element and a pixel circuit for driving the light emitting element to emit light, wherein the pixel circuit comprises a pulse width modulation module and an amplitude modulation module which are electrically connected, wherein the pulse width modulation module comprises a pulse width driving transistor, and the amplitude modulation module comprises an amplitude driving transistor; A controller comprising one or more processors, a memory and one or more programs, wherein the one or more programs are stored in the memory and are configured to be executed by the one or more processors, and the one or more programs include a driving method for executing the display panel described in any one of claims 1 to 12.

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