Driving method of display panel and display module

Abstract

The application provides a display panel driving method and a display module. The display panel comprises a light emitting element and a pixel circuit for driving the light emitting element to emit light. The pixel circuit comprises a pulse width modulation module and an amplitude modulation module connected electrically. The pulse width modulation module comprises a pulse width driving transistor, and the amplitude modulation module comprises an amplitude driving transistor. The method comprises: after the pulse width driving transistor receives a first data signal, providing a first reset signal to the pulse width driving transistor to reset the pulse width driving transistor; and after the amplitude driving transistor receives a second data signal, providing a second reset signal to the amplitude driving transistor to reset the amplitude driving transistor. The application at least solves the problem of display residual image of the display panel with the pixel circuit combining PAM and PWM in the prior art.

Description

Display panel driving method and display module Technical Field

[0001] This application relates to the field of display technology, and more specifically, to a driving method for a display panel and a display module. Background Technology

[0002] With the development of display technology, display panels are being used more and more widely, and users are demanding more and more display quality from them. To meet the requirements for higher definition, the resolution of display panels is getting higher and higher.

[0003] To meet the driving requirements of high-resolution display panels, a pixel circuit combining pulse amplitude modulation (PAM) and pulse width modulation (PWM) is used to control the intensity and duration of the driving current, thereby controlling the light-emitting state of the light-emitting element.

[0004] However, the pixel circuits that combine pulse amplitude modulation (PAM) and pulse width modulation (PWM) in related technologies suffer from image retention issues. Summary of the Invention

[0005] The main objective of this application is to provide a driving method for a display panel and a display module, so as to at least solve the problem of display ghosting in display panels that use pixel circuits combining PAM and PWM in the prior art.

[0006] To achieve the above objectives, according to one aspect of this application, a driving method for a display panel is provided. The display panel includes a light-emitting element and a pixel circuit for driving the light-emitting element to emit light. The pixel circuit includes a pulse width modulation module and an amplitude modulation module electrically connected to each other. The pulse width modulation module includes a pulse width driving transistor, and the amplitude modulation module includes an amplitude driving transistor. The method includes:

[0007] After the pulse width driving transistor receives the first data signal, a first reset signal is provided to the pulse width driving transistor to reset the pulse width driving transistor.

[0008] After the amplitude driving transistor receives the second data signal, a second reset signal is provided to the amplitude driving transistor to reset the amplitude driving transistor.

[0009] According to another aspect of this application, a display module is provided, comprising:

[0010] The display panel includes a light-emitting element and a pixel circuit for driving the light-emitting element to emit light. The pixel circuit includes a pulse width modulation module and an amplitude modulation module electrically connected. The pulse width modulation module includes a pulse width driving transistor, and the amplitude modulation module includes an amplitude driving transistor.

[0011] The controller includes one or more processors, a memory, and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by the one or more processors, and the one or more programs include a driving method for performing any of the described display panels.

[0012] By applying the technical solution of this application, after the first data signal of the pulse width driving transistor is written, a first reset signal is provided to the pulse width driving transistor to perform a reset operation on the pulse width driving transistor; and after the second data signal of the amplitude driving transistor is written, a second reset signal is provided to the amplitude driving transistor to perform a reset operation on the amplitude driving transistor. The display panel driving method of this application, after writing the data signal to the pixel circuit, resets the driving transistors of the pulse width modulation module and the amplitude modulation module respectively through the first reset signal and the second reset signal. This ensures that the current frame data written by the driving transistors of the pulse width modulation module and the amplitude modulation module is not affected by the data written in the previous frame, thereby improving the display ghosting effect and ensuring a better display effect of the display panel. Attached Figure Description

[0013] The accompanying drawings, which form part of this application, are used to provide a further understanding of this application. The illustrative embodiments and descriptions of this application are used to explain this application and do not constitute an undue limitation of this application. In the drawings:

[0014] Figure 1 shows a hardware structure block diagram of a mobile terminal that performs a method for driving a display panel according to an embodiment of this application;

[0015] Figure 2 shows a schematic flowchart of a driving method for a display panel according to an embodiment of this application;

[0016] Figure 3 shows a schematic diagram of a pixel circuit according to an embodiment of this application;

[0017] Figure 4 shows a schematic diagram of the structure of a display panel according to an embodiment of this application;

[0018] Figure 5 shows a schematic diagram of the driving timing of a display panel according to an embodiment of this application;

[0019] Figure 6 shows a driving timing diagram of another display panel provided according to an embodiment of this application;

[0020] Figure 7 shows a driving timing diagram of another display panel provided according to an embodiment of this application;

[0021] Figure 8 shows a driving timing diagram of another display panel provided according to an embodiment of this application;

[0022] Figure 9 shows a schematic diagram of the circuit structure of a pixel circuit according to an embodiment of this application;

[0023] Figure 10 shows a schematic diagram of the circuit structure of another pixel circuit provided according to an embodiment of this application;

[0024] Figure 11 shows a schematic diagram of the structure of a display module provided according to an embodiment of this application.

[0025] The above figures include the following reference numerals:

[0026] 100. Display panel; 102. Processor; 104. Memory; 106. Transmission device; 108. Input / output device; 10. Pixel circuit; 11. Amplitude modulation module; 111. Amplitude driving transistor; 112. Second data signal line; 113. Amplitude reset transistor; 114. Amplitude data writing transistor; 115. Second gate reset transistor; 12. Pulse width modulation module; 121. Pulse width driving transistor; 122. First data signal line; 123. Pulse width reset transistor; 124. Pulse width data writing transistor; 125. First gate reset transistor; 20. Light-emitting element. Detailed Implementation

[0027] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. This application will now be described in detail with reference to the accompanying drawings and embodiments.

[0028] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort should fall within the scope of protection of the present application.

[0029] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate for the embodiments of this application described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0030] As described in the background section, display panels using pixel circuits combining PAM and PWM in the prior art suffer from display ghosting. To solve the above-mentioned technical problem, embodiments of this application provide a driving method for a display panel and a display module.

[0031] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention.

[0032] The method embodiments provided in this application can be executed in a mobile terminal, computer terminal, or similar computing device. Taking a mobile terminal as an example, FIG1 is a hardware structure block diagram of a mobile terminal for a display panel driving method according to an embodiment of the present invention. As shown in FIG1, the mobile terminal may include one or more (only one is shown in FIG1) processors 102 (processor 102 may include, but is not limited to, processing devices such as microprocessors MCUs or programmable logic devices FPGAs) and a memory 104 for storing data. The mobile terminal may also include a transmission device 106 for communication functions and an input / output device 108. Those skilled in the art will understand that the structure shown in FIG1 is only illustrative and does not limit the structure of the mobile terminal. For example, the mobile terminal may also include more or fewer components than shown in FIG1, or have a different configuration than shown in FIG1.

[0033] The memory 104 can be used to store computer programs, such as application software programs and modules, like the computer program corresponding to the display panel driving method in this embodiment of the invention. The processor 102 executes various functional applications and data processing by running the computer program stored in the memory 104, thereby implementing the above-described method. The memory 104 may include high-speed random access memory and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 104 may further include memory remotely located relative to the processor 102, and these remote memories can be connected to the mobile terminal via a network. Examples of the aforementioned networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof. The transmission device 106 is used to receive or send data via a network. Specific examples of the aforementioned networks may include wireless networks provided by the mobile terminal's communication provider. In one example, the transmission device 106 includes a network interface controller (NIC), which can be connected to other network devices via a base station to communicate with the Internet. In one example, the transmission device 106 may be a radio frequency (RF) module, which is used to communicate with the Internet wirelessly.

[0034] This embodiment provides a driving method for a display panel that runs on a mobile terminal, computer terminal, or similar computing device. It should be noted that the steps shown in the flowchart in the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions. Also, although a logical order is shown in the flowchart, in some cases, the steps shown or described may be executed in a different order than that shown here.

[0035] Figure 2 is a flowchart of a driving method for a display panel according to an embodiment of this application. This driving method can be applied to an IC, COF, or FPC of the display panel. Specifically, as shown in Figure 3, the display panel includes a light-emitting element 20 and a pixel circuit 10 for driving the light-emitting element 20 to emit light. The pixel circuit 10 includes a pulse width modulation (PWM) module 12 and an amplitude modulation (PAM) module 11 electrically connected. The PWM module 12 includes a pulse width driving transistor 121, and the PAM module 11 includes an amplitude driving transistor 111. As shown in Figure 2, the method includes the following steps:

[0036] Step S201: After the pulse width driving transistor receives the first data signal, a first reset signal is provided to the pulse width driving transistor to reset the pulse width driving transistor.

[0037] Specifically, the pulse width driving transistor can be selected from three-terminal switching transistors such as MOSFETs and transistors, and the design can be adjusted according to actual conditions during implementation. The first data signal is provided to either the first or second terminal of the pulse width driving transistor, and the first reset signal is provided to either the first or second terminal of the pulse width driving transistor. When the pulse width driving transistor is a MOSFET, both the first data signal and the first reset signal are provided to either the source or drain of the pulse width driving transistor, for example, both are provided to the source.

[0038] Step S202: After the amplitude driving transistor receives the second data signal, a second reset signal is provided to the amplitude driving transistor to reset the amplitude driving transistor.

[0039] Specifically, the amplitude driving transistor can be selected from three-terminal switching transistors such as MOSFETs and transistors, and the design can be adjusted according to actual conditions during implementation. The second data signal is provided to either the first or second terminal of the amplitude driving transistor, and the second reset signal is provided to either the first or second terminal of the amplitude driving transistor. When the amplitude driving transistor is a MOSFET, both the second data signal and the second reset signal are provided to the source or drain of the amplitude driving transistor, for example, both are provided to the source.

[0040] In the above embodiments, after the first data signal of the pulse width driving transistor is written, a first reset signal is provided to the pulse width driving transistor to perform a reset operation; and after the second data signal of the amplitude driving transistor is written, a second reset signal is provided to the amplitude driving transistor to perform a reset operation. The display panel driving method of this application, after writing the data signal to the pixel circuit, resets the driving transistors of the pulse width modulation module and the amplitude modulation module respectively using the first and second reset signals. This ensures that the current frame data written to the driving transistors of the pulse width modulation module and the amplitude modulation module is not affected by the data written in the previous frame, thereby improving the display ghosting effect and ensuring a better display effect of the display panel.

[0041] In practical applications, the aforementioned light-emitting elements can specifically be micro light-emitting diodes (micro LEDs) or organic light-emitting diodes (OLEDs).

[0042] Optionally, the light-emitting element may be an inorganic light-emitting element comprising a first electrode, a second electrode, and a non-polar semiconductor disposed between the first electrode and the second electrode.

[0043] In the pixel circuit described above, the pulse width modulation module can adjust the pulse width of the voltage applied to the light-emitting element based on the voltage value of the first data signal. The amplitude modulation module can control the amplitude of the current driving the light-emitting element based on the voltage value of the second data signal.

[0044] The pulse width modulation (PWM) module adjusts the pulse width of the voltage applied to the first electrode of the light-emitting element (LED), i.e., it adjusts the actual emission period of the drive current applied to the LED while maintaining the drive current applied to the LED at a constant level, thereby adjusting the grayscale or brightness of the LED display. This is done rather than adjusting the magnitude of the drive current applied to the LED. Therefore, the amplitude modulation (AM) module can provide drive current to the LED so that it is driven with optimal luminous efficiency, and the PWM module adjusts the LED's emission duty cycle (i.e., the emission period) to adjust the grayscale or brightness of the LED display.

[0045] In pixel circuits, the threshold voltage of the pulse width driving transistor and the amplitude driving circuit can vary depending on how the transistor's gate-to-source voltage (Vgs) changes. For example, the transistor's threshold voltage may exhibit a first average voltage as Vgs rises from low to high, but a second average level different from the first average voltage as Vgs falls from high to low, thus producing different current-voltage (IV) curves. This dependence of the threshold voltage on the actual Vgs value is called the transistor's "hysteresis" or threshold voltage offset. In some cases, the threshold voltage Vth can shift, such as when the display panel changes from a black screen to a white screen or from one grayscale level to another. The shift in threshold voltage Vth (i.e., the aforementioned transistor "hysteresis") causes the next frame's data writing to be affected by the previous frame's data writing, meaning the current frame's image is influenced by the previous frame's image, resulting in ghosting. Without performing a source or drain reset of the transistor, the sampled Vth will correspond to a deviation from the target Ids curve. By introducing a source or drain reset of the transistor, a reset signal can be input at the source or drain of the transistor, which can reduce the offset of the transistor threshold voltage, effectively improve the "hysteresis" phenomenon of the transistor, and improve the image retention phenomenon.

[0046] Figure 4 exemplarily illustrates a structural schematic diagram of a display panel according to this application, and Figures 5, 6, 7, and 8 respectively exemplarily illustrate driving timing schematic diagrams of four types of display panels. In the embodiments of this application, as shown in Figure 4, the display panel 100 includes multiple rows of pixel circuits 10, and the method further includes: simultaneously writing the second data signal to the amplitude driving transistors 111 of the multiple rows of pixel circuits 10, that is, within one frame time, the amplitude modulation modules 11 in the multiple rows of pixel circuits 10 are simultaneously turned on. Specifically, as shown in Figure 4, the second data signal can be written to the amplitude driving transistors 111 through the second data signal line 112. After the amplitude driving transistors receive the second data signal, a second reset signal is provided to the amplitude driving transistors 111, including: as shown in Figures 5 to 8, after all rows of amplitude driving transistors 111 receive the second data signal (with the same timing as PAM_S2), the second reset signal (with the same timing as PAM_S3) is provided to the amplitude driving transistors 111 of each row. In this embodiment, after the global data signal is written to the amplitude modulation module, the amplitude modulation module is reset to eliminate the influence of the previous frame data on the amplitude modulation module, thereby further ensuring that the display ghosting removal effect is more obvious.

[0047] In one alternative embodiment, the method further includes: writing the first data signal PWM_S2 to the pulse width driving transistors of the multi-row pixel circuits row by row. That is, within one frame, the pulse width modulation modules in the multi-row pixel circuits are turned on row by row. Specifically, as shown in FIG4, the first data signal can be written to the pulse width driving transistor 121 through the first data signal line 122. After the pulse width driving transistor receives the first data signal, a first reset signal is provided to the pulse width driving transistor, including: as shown in FIG5 and FIG6, after the pulse width driving transistor of the i-th row receives the first data signal (with the same timing as PWM_S2), the first reset signal (with the same timing as PWM_S3) is provided to the pulse width driving transistor of the i-th row, where i is an integer greater than or equal to 1. In this embodiment, the multi-row pulse width modulation modules are turned on row by row, and after each row of data signal is written to the pulse width modulation module, the pulse width modulation module of that row is reset, thereby eliminating the influence of the previous frame data on the pulse width modulation module, further ensuring that the display ghosting removal effect is more obvious.

[0048] Furthermore, the timing of providing the first reset signal to the pulse width driving transistor in the i-th row can be not only after the pulse width driving transistor in the i-th row receives the first data signal, but also before the pulse width driving transistor in the (i+1)-th row receives the first data signal.

[0049] Furthermore, in some other embodiments, the first reset signal provided to the pulse width driving transistor in the i-th row can also be transmitted simultaneously with the first data signal provided to the pulse width driving transistor in the (i+1)-th row. As shown in Figures 5 and 6, providing the first reset signal to the pulse width driving transistor in the (i-1)-th row includes: providing the first reset signal (with the same timing as PWM_S3) to the pulse width driving transistor in the i-th row, and providing the first data signal (with the same timing as PWM_S2) to the pulse width driving transistor in the i-th row. In other words, the reset signal of the pulse width driving transistor in the previous row is transmitted at the same time as the data signal of the pulse width driving transistor in the current row, thereby reducing the overall time occupied by the reset operation.

[0050] In another alternative embodiment, the method further includes writing the first data signal line by line to the pulse width driving transistors of the multi-row pixel circuits. Specifically, within one frame, the pulse width modulation module 12 in the multi-row pixel circuit 10 is turned on line by line. As shown in FIG4, the first data signal can be written to the pulse width driving transistor 121 line by line via the first data signal line 122. After the pulse width driving transistor receives the first data signal, a first reset signal is provided to the pulse width driving transistor, including, as shown in FIG7, after all the pulse width driving transistors 121 in all rows receive the first data signal (with the same timing as PWM_S2), providing the first reset signal (with the same timing as PWM_S3) to the pulse width driving transistors in each row. In this embodiment, the pulse width modulation module is turned on line by line, and after all the data signals are written to the pulse width modulation module, the pulse width modulation module of each row is reset, thereby eliminating the influence of the previous frame's data on the pulse width modulation module. This further ensures the display ghosting removal effect while maintaining a relatively simple control logic for the pixel circuits.

[0051] According to some exemplary embodiments of this application, as shown in FIG9, the pulse width modulation module 12 further includes a pulse width reset transistor 123. The output terminal of the pulse width reset transistor 123 is electrically connected to the input terminal of the pulse width driving transistor 121. The input terminal of the pulse width reset transistor 123 is used to receive the first reset signal PWM_VDH. The amplitude modulation module 11 further includes an amplitude reset transistor 113. The output terminal of the amplitude reset transistor 113 is electrically connected to the input terminal of the amplitude driving transistor 111. The input terminal of the amplitude reset transistor 113 is used to receive the second reset signal PAM_VDH. Providing a first reset signal to the pulse width driving transistor includes: providing a first control signal PWM_S3 to the control terminal of the pulse width reset transistor 123 to turn on the pulse width reset transistor 123, so that the first reset signal PWM_VDH is transmitted to the pulse width driving transistor 121; providing a second reset signal to the amplitude driving transistor includes: providing a second control signal PAM_S3 to the control terminal of the amplitude reset transistor 113 to turn on the amplitude reset transistor 113, so that the second reset signal PAM_VDH is transmitted to the amplitude driving transistor 111. In the above embodiments, a pulse width modulation module is provided with a pulse width reset transistor connected in series with the pulse width driving transistor. The switching state of the pulse width reset transistor is controlled by the first control signal, thereby controlling whether the first reset signal is transmitted to the input terminal of the pulse width driving transistor. Similarly, an amplitude modulation module is provided with an amplitude reset transistor connected in series with the amplitude driving transistor. The switching state of the pulse width reset transistor is controlled by the second control signal, thereby controlling whether the second reset signal is transmitted to the input terminal of the amplitude driving transistor. The first and second control signals achieve the purpose of providing reset signals to the pulse width driving transistor and the amplitude driving transistor.

[0052] Based on the above embodiments, as shown in FIG9, the pulse width modulation module 12 further includes a pulse width data writing transistor 124. The output terminal of the pulse width data writing transistor 124 is electrically connected to the input terminal of the pulse width driving transistor 121, and the input terminal of the pulse width data writing transistor 124 is used to receive the first data signal PWM_DATA. The amplitude modulation module 11 further includes an amplitude data writing transistor 114. The output terminal of the amplitude data writing transistor 114 is electrically connected to the input terminal of the amplitude driving transistor 111, and the input terminal of the amplitude data writing transistor 114 is used to receive the second data signal PAM_DATA. That is, by setting the pulse width data writing transistor 124 and the amplitude data writing transistor 114, the purpose of providing data signals to the pulse width driving transistor 121 and the amplitude driving transistor 111 is achieved.

[0053] In practical applications, the signal line transmitting the first control signal and the signal line transmitting the second control signal can be the same or different. When they are the same, it is necessary to ensure that the timing of these two control signals does not overlap.

[0054] In one alternative embodiment, the signal line transmitting the first control signal is different from the signal line transmitting the second control signal. That is, different signal lines are used to transmit the first control signal and the second control signal respectively.

[0055] In another alternative embodiment, as shown in Figure 4, the display panel 100 includes multiple rows of pixel circuits 10, meaning that the multiple pixel circuits 10 are arranged at intervals along the row direction, and at least one of the first control signals corresponding to the multiple rows of pulse width reset transistors is the same as the second control signal. In this embodiment, the control signal of the amplitude reset transistor shares a single control signal with the control signal of at least one row of pulse width reset transistors, meaning that the turn-on time of each amplitude reset transistor is the same as the turn-on time of at least one row of pulse width reset transistors, and the reset operation is performed synchronously. This simplifies the control timing of the pixel circuits and reduces control logic.

[0056] Those skilled in the art can set the position of the first control signal to be the same as the second control signal according to actual needs. For example, the first control signal corresponding to the pulse width reset transistor in the first row can be set to be the same as the second control signal; or the first control signal corresponding to the pulse width reset transistor in the second row can be set to be the same as the second control signal, and so on.

[0057] In an exemplary embodiment of this application, as shown in FIG5 and FIG8, the first control signal PWM_S3 corresponding to the last row of pulse width reset transistors in the multiple rows of the above-mentioned pulse width reset transistors is the same as the second control signal PAM_S3.

[0058] It should be noted that the same first control signal and the same second control signal can be transmitted via different signal lines or via the same signal line.

[0059] In an exemplary embodiment of this application, the same first control signal and the same second control signal are transmitted using the same signal line. By multiplexing the second control signal of the amplitude modulation module and the first control signal corresponding to at least one row of pulse width modulation modules onto a single signal line, it is possible to save signal lines and reduce the number of signal lines in the display panel, which is beneficial for the high PPI (Pixels Per Inch) design of the display panel.

[0060] Optionally, as shown in Figures 6 and 7, after the pulse width driving transistor receives the first data signal, providing a first reset signal to the pulse width driving transistor includes: providing the second reset signal to the amplitude driving transistor, and providing the first reset signal to the pulse width driving transistor after the pulse width driving transistor receives the first data signal. In this embodiment, the amplitude driving transistor is reset first, then the pulse width driving transistor is reset, and then the light-emitting stage of the light-emitting element begins. Specifically, the amplitude driving transistor can be reset first, and then the pulse width driving transistor for each row can be reset after each row of data signals is written to the pulse width driving transistor; alternatively, the amplitude driving transistor can be reset first, and then the pulse width driving transistors for each row can be reset after all data signals are written to the pulse width driving transistor.

[0061] Specifically, as shown in Figures 6 and 7, the above method further includes: after providing the second reset signal (with the same timing as PAM_S3) to the amplitude driving transistor, providing the first data signal (with the same timing as PWM_S2) to the pulse width driving transistor of the pixel circuit in the first row.

[0062] Of course, besides the above methods, the pulse width driving transistor can be reset first, and then the amplitude driving transistor can be reset. That is, after the amplitude driving transistor receives the second data signal, a second reset signal is provided to the amplitude driving transistor. This includes providing the first reset signal to the pulse width driving transistor after providing the first reset signal to the pulse width driving transistor, and after the pulse width driving transistor receives the first data signal. Specifically, the pulse width driving transistor for each row can be reset after the first data signal is written to it, and then the amplitude driving transistor can be reset; alternatively, the pulse width driving transistors for each row can be reset after all the first data signals are written to them, and then the amplitude driving transistor can be reset.

[0063] Optionally, as shown in FIG9, the pulse width modulation module 12 further includes a pulse width data writing transistor 124 and a first gate reset transistor 125. The output terminal of the pulse width data writing transistor 124 is electrically connected to the input terminal of the pulse width driving transistor 121. The input terminal of the pulse width data writing transistor 124 is used to receive the first data signal PWM_DATA. The output terminal of the first gate reset transistor 125 is electrically connected to the control terminal of the pulse width driving transistor 121. The input terminal of the first gate reset transistor 125 is used to receive a third reset signal PWM_REF. The third reset signal PWM_REF is used to reset the control terminal potential of the pulse width driving transistor 121. One of the control terminals of the pulse width data writing transistor 124 and the first gate reset transistor 125 satisfies the condition that they share a signal line with the control terminal of the amplitude reset transistor 113. In this embodiment, since the first data signal and the second reset signal do not overlap in timing, and the third reset signal and the second reset signal also do not overlap in timing, the first data signal and the second reset signal can share a single signal line, and the third reset signal and the second reset signal can share a single signal line. This saves signal lines and reduces the number of signal lines in the display panel, which is beneficial for the high PPI design of the display panel.

[0064] Similarly, as shown in Figure 9, the amplitude modulation module 11 further includes an amplitude data writing transistor 114 and a second gate reset transistor 115. The output terminal of the amplitude data writing transistor 114 is electrically connected to the input terminal of the amplitude driving transistor 111. The input terminal of the amplitude data writing transistor 114 is used to receive the second data signal PAM_DATA. The output terminal of the second gate reset transistor 115 is electrically connected to the control terminal of the amplitude driving transistor 111. The input terminal of the second gate reset transistor 115 is used to receive the fourth reset signal PAM_REF. The fourth reset signal PAM_REF is used to reset the control terminal potential of the amplitude driving transistor 111. One of the control terminals of the amplitude data writing transistor 114 and the second gate reset transistor 115 satisfies the condition that they share a signal line with the control terminal of the pulse width reset transistor 123.

[0065] It should be noted that Figure 9 only illustrates one 13T2C structure pixel circuit of this application and does not constitute a limitation on the pixel circuit structure of this application. In actual application, the driving method of this application can also be applied to pixel circuits with other structures.

[0066] In some other exemplary embodiments, the third reset signal may share a signal line with the first reset signal. After transmitting the third reset signal to the first gate reset transistor through the signal line to perform a reset operation on the control terminal potential of the pulse width driving transistor, the first reset signal line is then transmitted to the pulse width reset transistor through the signal line to perform a reset operation on the first terminal or the second potential of the pulse width driving transistor.

[0067] Similarly, the fourth reset signal can share a signal line with the second reset signal. After transmitting the fourth reset signal to the second gate reset transistor through the signal line to perform a reset operation on the control terminal potential of the amplitude driving transistor, the second reset signal line can be transmitted to the amplitude reset transistor through the signal line to perform a reset operation on the first terminal or the second potential of the amplitude driving transistor.

[0068] According to some other exemplary embodiments of this application, as shown in FIG10, the pulse width modulation module 12 further includes a pulse width data writing transistor 124. The output terminal of the pulse width data writing transistor 124 is electrically connected to the input terminal of the pulse width driving transistor 121. The input terminal of the pulse width data writing transistor 124 is used to receive the first data signal PWM_DATA and the first reset signal PWM_VDH. The amplitude modulation module 11 further includes an amplitude data writing transistor 114. The output terminal of the amplitude data writing transistor 114 is electrically connected to the input terminal of the amplitude driving transistor 111. The input terminal of the amplitude data writing transistor 114 is used to receive the second data signal PAM_DATA and the second reset signal PAM_VDH. Providing a first reset signal to the pulse width driving transistor includes: providing a first control signal PAM_S3 to the control terminal of the pulse width data writing transistor 124 to turn on the pulse width data writing transistor 124, so that the first reset signal PWM_VDH is transmitted to the pulse width driving transistor 121; providing a second reset signal to the amplitude driving transistor includes: providing a second control signal PAM_S3 to the control terminal of the amplitude data writing transistor 114 to turn on the amplitude data writing transistor 114, so that the second reset signal PAM_VDH is transmitted to the amplitude driving transistor 111. In this embodiment, a pulse width modulation module includes a pulse width data writing transistor connected in series with the pulse width driving transistor. The switching state of the pulse width data writing transistor is controlled by the first control signal, thereby controlling whether the first reset signal is transmitted to the input terminal of the pulse width driving transistor. Similarly, an amplitude modulation module includes an amplitude data writing transistor connected in series with the amplitude driving transistor. The switching state of the pulse width data writing transistor is controlled by the second control signal, thereby controlling whether the second reset signal is transmitted to the input terminal of the amplitude driving transistor. The first and second control signals achieve the purpose of providing reset signals to both the pulse width driving transistor and the amplitude driving transistor. Furthermore, the data writing transistor transmitting the reset signal is multiplexed as a transistor transmitting the data signal, thus simplifying the pixel circuit design while facilitating high PPI.

[0069] Apart from the differences mentioned above, the other structures in the pixel circuit of Figure 10 may be the same as or different from those shown in Figure 9, and the corresponding driving methods may be the same or different.

[0070] It should be noted that the steps shown in the flowchart in the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions, and although a logical order is shown in the flowchart, in some cases the steps shown or described may be executed in a different order than that shown here.

[0071] An embodiment of this application also provides a display module, as shown in FIG11, the display module comprising:

[0072] The display panel includes a light-emitting element and a pixel circuit for driving the light-emitting element to emit light. The pixel circuit includes a pulse width modulation module and an amplitude modulation module electrically connected. The pulse width modulation module includes a pulse width driving transistor, and the amplitude modulation module includes an amplitude driving transistor.

[0073] The controller includes one or more processors, a memory, and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by the one or more processors, and the one or more programs include a driving method for performing any of the above-described display panels.

[0074] The aforementioned display module includes a display panel and its controller. The controller executes the aforementioned driving method. This method provides a first reset signal to the pulse-width modulation (PWM) driving transistor after the first data signal is written to the PWM driving transistor, resetting the PWM driving transistor; and provides a second reset signal to the amplitude driving transistor after the second data signal is written to the amplitude driving transistor, resetting the amplitude driving transistor. The display panel driving method of this application, after writing the data signal to the pixel circuit, resets the driving transistors of the PWM module and amplitude modulation module respectively using the first and second reset signals. This ensures that the current frame data written to the driving transistors of the PWM module and amplitude modulation module is not affected by the previous frame data, thereby improving the display ghosting effect and ensuring a better overall display effect of the display module.

[0075] This invention provides a computer-readable storage medium including a stored program, wherein when the program is executed, it controls the device containing the computer-readable storage medium to execute the driving method of the display panel.

[0076] This invention provides a device including a processor, a memory, and a program stored in the memory and executable on the processor. When the processor executes the program, it performs at least the following steps:

[0077] Step S201: After the pulse width driving transistor receives the first data signal, a first reset signal is provided to the pulse width driving transistor to reset the pulse width driving transistor.

[0078] Step S202: After the amplitude driving transistor receives the second data signal, a second reset signal is provided to the amplitude driving transistor to reset the amplitude driving transistor.

[0079] The devices mentioned in this article can be servers, PCs, tablets, mobile phones, etc.

[0080] This application also provides a computer program product, including computer instructions, which, when executed by a processor, implement at least the following method steps:

[0081] Step S201: After the pulse width driving transistor receives the first data signal, a first reset signal is provided to the pulse width driving transistor to reset the pulse width driving transistor.

[0082] Step S202: After the amplitude driving transistor receives the second data signal, a second reset signal is provided to the amplitude driving transistor to reset the amplitude driving transistor.

[0083] It is obvious to those skilled in the art that the modules or steps of the present invention described above can be implemented using general-purpose computing devices. They can be centralized on a single computing device or distributed across a network of multiple computing devices. They can be implemented using computer-executable program code, and thus can be stored in a storage device for execution by a computing device. In some cases, the steps shown or described can be performed in a different order than those described herein, or they can be fabricated as separate integrated circuit modules, or multiple modules or steps can be fabricated as a single integrated circuit module. Thus, the present invention is not limited to any particular combination of hardware and software.

[0084] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0085] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in one or more flowchart illustrations and / or one or more block diagrams.

[0086] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means that implement the functions specified in one or more flowcharts and / or one or more block diagrams.

[0087] These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process, such that the instructions, which execute on the computer or other programmable apparatus, provide steps for implementing the functions specified in one or more flowcharts and / or one or more block diagrams.

[0088] In a typical configuration, a computing device includes one or more processors (CPU), input / output interfaces, network interfaces, and memory.

[0089] Memory may include non-persistent memory in computer-readable media, such as random access memory (RAM) and / or non-volatile memory, such as read-only memory (ROM) or flash RAM. Memory is an example of computer-readable media.

[0090] Computer-readable media includes both permanent and non-permanent, removable and non-removable media that can store information using any method or technology. Information can be computer-readable instructions, data structures, modules of programs, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, CD-ROM, digital versatile optical disc (DVD) or other optical storage, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other non-transferable medium that can be used to store information accessible by a computing device. As defined herein, computer-readable media does not include transient computer-readable media, such as modulated data signals and carrier waves.

[0091] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0092] As can be seen from the above description, the embodiments of this application achieve the following technical effects:

[0093] 1) The display panel driving method of this application provides a first reset signal to the pulse width driving transistor after the first data signal of the pulse width driving transistor is written, thereby resetting the pulse width driving transistor; and provides a second reset signal to the amplitude driving transistor after the second data signal of the amplitude driving transistor is written, thereby resetting the amplitude driving transistor. After the data signal is written to the pixel circuit, the display panel driving method of this application resets the driving transistors of the pulse width modulation module and the amplitude modulation module respectively using the first and second reset signals. This ensures that the current frame data written to the driving transistors of the pulse width modulation module and the amplitude modulation module is not affected by the previous frame data, thereby improving the display ghosting effect and ensuring a better display effect of the display panel.

[0094] 2) The display module of this application includes a display panel and its controller. The controller is used to execute the driving method described above. This method provides a first reset signal to the pulse width driving transistor after the first data signal is written to the pulse width driving transistor to reset it; and provides a second reset signal to the amplitude driving transistor after the second data signal is written to the amplitude driving transistor to reset it. The driving method of the display panel of this application resets the driving transistors of the pulse width modulation module and the amplitude modulation module respectively after the data signal is written to the pixel circuit using the first and second reset signals. This ensures that the current frame data written to the driving transistors of the pulse width modulation module and the amplitude modulation module is not affected by the previous frame data, thereby improving the display ghosting effect and ensuring a better overall display effect of the display module.

[0095] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A driving method for a display panel, characterized in that, The display panel includes a light-emitting element and a pixel circuit for driving the light-emitting element to emit light. The pixel circuit includes a pulse width modulation module and an amplitude modulation module electrically connected. The pulse width modulation module includes a pulse width driving transistor, and the amplitude modulation module includes an amplitude driving transistor. The method includes: after the pulse width driving transistor receives a first data signal, providing a first reset signal to the pulse width driving transistor to reset the pulse width driving transistor; after the amplitude driving transistor receives a second data signal, providing a second reset signal to the amplitude driving transistor to reset the amplitude driving transistor. The display panel includes multiple rows of the pixel circuit. The method further includes: simultaneously writing the second data signal to the amplitude driving transistors of the multiple rows of pixel circuits; after the amplitude driving transistor receives the second data signal, providing a second reset signal to the amplitude driving transistor, including: after all the amplitude driving transistors in all rows receive the second data signal, providing the second reset signal to the amplitude driving transistors in each row.

2. The driving method according to claim 1, characterized in that, The method further includes: writing the first data signal to the pulse width driving transistors of the multiple rows of pixel circuits row by row, and providing a first reset signal to the pulse width driving transistors after the pulse width driving transistors receive the first data signal, including: providing the first reset signal to the pulse width driving transistors of the i-th row after the pulse width driving transistors of the i-th row receive the first data signal, where i is an integer greater than or equal to 1.

3. The driving method according to claim 1, characterized in that, The method further includes: writing the first data signal to the pulse width driving transistors of the multiple rows of pixel circuits row by row, and providing a first reset signal to the pulse width driving transistors after the pulse width driving transistors receive the first data signal, including: providing the first reset signal to the pulse width driving transistors of each row after the pulse width driving transistors of all rows receive the first data signal.

4. The driving method according to any one of claims 1 to 3, characterized in that, The pulse width modulation module further includes a pulse width reset transistor, the output terminal of which is electrically connected to the input terminal of the pulse width driving transistor. The input terminal of the pulse width reset transistor is used to receive the first reset signal. The amplitude modulation module further includes an amplitude reset transistor, the output terminal of which is electrically connected to the input terminal of the amplitude driving transistor. The input terminal of the amplitude reset transistor is used to receive the second reset signal. Providing a first reset signal to the pulse width driving transistor includes: providing a first control signal to the control terminal of the pulse width reset transistor to turn on the pulse width reset transistor, so that the first reset signal is transmitted to the pulse width driving transistor. Providing a second reset signal to the amplitude driving transistor includes: providing a second control signal to the control terminal of the amplitude reset transistor to turn on the amplitude reset transistor, so that the second reset signal is transmitted to the amplitude driving transistor.

5. The driving method according to claim 4, characterized in that, The signal line that transmits the first control signal is different from the signal line that transmits the second control signal.

6. The driving method according to claim 4, characterized in that, The display panel includes multiple rows of pixel circuits, and at least one of the first control signals corresponding to the multiple rows of pulse width reset transistors is the same as the second control signal.

7. The driving method according to claim 6, characterized in that, The first control signal corresponding to the pulse width reset transistor in the last row of the multiple rows is the same as the second control signal.

8. The driving method according to claim 6, characterized in that, The same first control signal and the same second control signal are transmitted through the same signal line.

9. The driving method according to claim 1, characterized in that, Providing a first reset signal to the pulse width driving transistor after the pulse width driving transistor receives the first data signal includes: providing the first reset signal to the pulse width driving transistor after providing the second reset signal to the amplitude driving transistor, and after the pulse width driving transistor receives the first data signal.

10. The driving method according to claim 1, characterized in that, Providing the first reset signal to the pulse width driving transistor in the i-th row includes: providing the first reset signal to the pulse width driving transistor in the (i-1)-th row, and providing the first data signal to the pulse width driving transistor in the i-th row.

11. The driving method according to claim 4, characterized in that, The pulse width modulation module further includes a pulse width data writing transistor and a first gate reset transistor. The output terminal of the pulse width data writing transistor is electrically connected to the input terminal of the pulse width driving transistor. The input terminal of the pulse width data writing transistor is used to receive the first data signal. The output terminal of the first gate reset transistor is electrically connected to the control terminal of the pulse width driving transistor. The input terminal of the first gate reset transistor is used to receive a third reset signal. One of the control terminals of the pulse width data writing transistor and the first gate reset transistor satisfies the condition that it shares a signal line with the control terminal of the amplitude reset transistor.

12. A display module, characterized in that, include: The display panel includes a light-emitting element and a pixel circuit for driving the light-emitting element to emit light. The pixel circuit includes a pulse width modulation module and an amplitude modulation module electrically connected. The pulse width modulation module includes a pulse width driving transistor, and the amplitude modulation module includes an amplitude driving transistor. A controller includes one or more processors, a memory, and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by the one or more processors, the one or more programs including a driving method for performing a display panel according to any one of claims 1 to 11.

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